JP2779443B2 - Semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a terminal for selectively outputting an analog signal from a digital / analog converter and output data from another circuit.

[0002]

2. Description of the Related Art FIG. 1 is a block diagram showing a main part of a conventional semiconductor device of this kind. Output data DO from a circuit unit (not shown) is output from a tri-state buffer 2 to which a control signal output from a direction register 4 is supplied to a control terminal 2a.
Is output to the input / output terminal 1 via the. The input data DI is
It is taken in from an input / output terminal 1 via an inverter 3 into a circuit unit (not shown). An analog signal from the digital / analog converter 5 is output to the input / output terminal 1 via the switch 6. The switch 6 is closed when an analog signal of the digital / analog converter 5 is selected.

Next, the operation of this semiconductor device will be described. When the input / output terminal 1 is used as an output terminal, for example, the control signal of the direction register 4 is set to "1", the tristate buffer 2 is operated as a buffer, and the output data is output.
Outputs DO to input / output terminal 1. On the other hand, when the input / output terminal 1 is used as an input terminal for input data, the control signal of the direction register 4 is set to “0” to set the tristate buffer 2
Is brought into a high impedance state, and the input data DI is taken in from an input / output terminal 1 via an inverter 3 into a circuit unit (not shown).

Next, when selecting the analog signal of the digital / analog converter 5, the control signal of the direction register 4 is set to "0" prior to the closing of the switch 6, and the tri-state buffer 2 is set to the high impedance state. Thereafter, the switch 6 is closed to output an analog signal from the digital / analog converter 5 to the input / output terminal 1.

[0005]

In the semiconductor device as described above, when the analog signal of the digital / analog converter 5 is selected, it is necessary to change the control signal of the direction register to bring the tristate buffer 2 into a high impedance state. There is. If output data DO from another circuit unit and an analog signal from the digital / analog converter 5 are erroneously output simultaneously, the digital / analog converter 5
Accurate analog signal cannot be obtained. In this case, if the polarities of the output data and the analog signal do not match, there is a problem that a short circuit occurs in the semiconductor device.

In view of the foregoing, the present invention provides a semiconductor device which does not require a control to change a control signal of a direction register to bring an output buffer into a high impedance state when selecting an analog signal from a digital / analog converter. It is intended to provide a device.

[0007]

A semiconductor device according to a first aspect of the present invention has an output buffer for outputting output data through an output terminal.
And a signal for controlling the output and non-output of the output buffer.
Control means for outputting an analog signal to the output terminal.
And a digital / analog converter that outputs
From the output buffer based on a signal from the control means.
The analog signal from the output signal and the digital / analog converter so as to selectively output from the output terminal
In the semiconductor device, a signal from the control means and a signal
A data for outputting the analog signal from the output terminal.
Digital / analog converter output selection signal
A signal to control output and non-output to the output buffer
It is characterized by having a logic circuit for outputting .

[0008] The semiconductor device according to the second invention, the output data
And an output buffer for outputting the
Output signal that controls the output and non-output of the output buffer
Output means for outputting an analog signal through the output terminal.
A digital / analog converter, wherein the control means
The output signal of the output buffer and the
The semiconductor device of analog signals from the serial digital / analog converter and configured to selectively output from the <br/> input terminal
, A signal from the control means and the input / output terminal
/ Analog for outputting analog signal from
Receiving the output selection signal of the analog converter,
Output a signal to control output and non-output to
Logic circuit and output selection of the digital / analog converter
A signal and an analog signal of said digital / analog converter,
Or, input data input through the input / output terminal
Digital / analog, comprising a second logic circuit for power
The operation of the first logic circuit based on a converter output selection signal.
The output buffer is controlled to output or non-output by
Output data and analog signals from the input / output terminals.
Output, and the operation is performed by the second logic circuit.
Importing input data from input / output terminals
It is characterized by.

[0009]

According to the first invention, a digital / analog conversion for selecting an analog signal to output an analog signal from an output terminal is provided.
The output selection signal of the converter and the signal of the control means to the first logic circuit.
If you give to the output buffer through the road, the output buffer is out
It will force or non-output, the output signal and the analog <br/> grayed signal of the output buffer is output from the selective output terminal, analog signal
When the signal is output from the output terminal , an accurate analog signal can be obtained.

In the second invention, a digital / analog signal for selecting an analog signal to output an analog signal from an input / output terminal is provided.
Given a signal of the output selection signal and the control means of the log converter to the output buffer, the output buffer becomes an output or non-output, is possible to output only an analog signal, from the output terminal
Possible and will also be output analog signals from the input and output terminal
Digital / analog converter to select analog signal
Output selection signal and an analog signal or input data
The current output from the logic circuit when input to the logic circuit
Does not change according to the analog signal .

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below in detail with reference to the drawings showing the embodiments. FIG. 2 is a block diagram showing a main part configuration of the semiconductor device according to the first invention. The control signal output from the direction register 4 is input to one input terminal 7a on one side of an AND circuit 7, and the other input terminal 7b receives an analog signal from the digital / analog converter 5 via an inverter 8 as an input / output terminal 1. An output selection bit SBT to be output from is input.

An output signal of the AND circuit 7 is applied to a control terminal 2a of the tristate buffer 2 to which the output data DO is input. The output signal of tristate buffer 2 is applied to input / output terminal 1. Input data DI is input / output terminal 1
Via the inverter 3. An analog signal from the digital / analog converter 5 is input / output terminal 1 via a switch 6 which is closed when the analog signal selection mode is set.
Given to.

Next, the operation of the semiconductor device thus configured will be described. Now, when the analog signal from the digital / analog converter 5 is not output from the input / output terminal 1, the output selection bit SBT of the digital / analog converter 5 is “0”, whereby the output signal of the inverter 8 becomes “0”. "1", and the AND circuit 7 gives the control signal "1" output from the direction register 4 to the control terminal 2a of the tristate buffer 2.

On the other hand, since the output selection bit SBT is "0" and the mode is not the analog signal selection mode, the switch 6 is opened. Therefore, the output data from the circuit unit not shown
DO to input / output terminal 1 via tri-state buffer 2
Is output. When the input / output terminal 1 is used as an input terminal, the control signal output from the direction register 4 is set to "0". Then, the output signal of the AND circuit 7 becomes “0”,
The tri-state buffer 2 enters the high impedance state, and the output data DO is prevented from being output to the input / output terminal 1. Therefore, a circuit unit (not shown) receives the input data DI from the input / output terminal 1 via the inverter 3.

Next, when the analog signal selection mode is set to output the analog signal from the digital / analog converter 5 to the input / output terminal 1, the switch 6 is closed, and the output selection bit SBT becomes "1". Inverter 8
Becomes "0", and the output signal of the AND circuit 7 becomes "0" regardless of the control signal output from the direction register 4. Therefore, the tri-state buffer 2 enters a high impedance state and prevents the output data DO from being output to the input / output terminal 1. And in this state, switch 6
Is closed, an analog signal from the analog / digital converter 5 is output to the input / output terminal 1.

When an analog signal output from the digital / analog converter 5 to the input / output terminal 1 is input to the inverter 3, a through current flows through the inverter 3 according to the analog signal.

FIG. 2 is a block diagram showing a main configuration of a semiconductor device according to the second invention. The control signal output from the direction register 4 is input to one input terminal 7a of the AND circuit 7.
An output selection bit SBT for outputting an analog signal from the digital / analog converter 5 from the input / output terminal 1 is supplied via an inverter 8 to the other input terminal 7b of the AND circuit 7 as the first logic circuit and the NAND circuit as the second logic circuit. 9 one-side input terminal 9a
Is input to

The output signal of the AND circuit 7 is applied to a control terminal 2a of the tristate buffer 2 to which the output data DO is input. The output signal of tristate buffer 2 is applied to input / output terminal 1. The input data given to the input / output terminal 1 is input to the other input terminal 9b of the NAND circuit 9, and the input data DI is taken in from the input / output terminal 1 via the NAND circuit 9 by a circuit unit (not shown). An analog signal from the digital / analog converter 5 is supplied to the input / output terminal 1 via the switch 6 which is closed when the analog signal selection mode is set.

Next, the operation of the semiconductor device thus configured will be described. The semiconductor device shown in FIG. 2 is used to output the output data DO from the circuit unit (not shown) to the input / output terminal 1 and to take the input data DI from the input / output terminal 1 to the circuit unit (not shown). An operation similar to the operation of the device is performed. By the way, when an analog signal selection mode for outputting an analog signal from the digital / analog converter 5 from the input / output terminal 1 is set, the switch 6 is closed.

The output selection bit SBT for outputting an analog signal from the input / output terminal 1 becomes "1", whereby the output signal of the inverter 8 becomes "0" and the AND circuit 7
Is "0" regardless of the control signal output from the direction register 4. Therefore, tristate buffer 2
Goes into a high impedance state and prevents output data DO from being output to input / output terminal 1. In this state, since the switch 6 is closed, the analog signal from the analog / digital converter 5 is supplied to the input / output terminal 1.
Output to

Since the output selection bit SBT is "1", the output signal of the inverter 8 becomes "0" and the NAND circuit 9
The one-side input terminal 9a becomes "0", and the output signal of the NAND circuit 9 is fixed at "1". Thus, even if an analog signal from the digital / analog converter 5 is input to the other input terminal 9b of the NAND circuit 9, a through current that changes according to the analog signal does not flow from the NAND circuit 9. Therefore, even if a circuit unit (not shown) for receiving the input data DI is formed of, for example, a CMOS transistor, there is no adverse effect on the transistor.

In this embodiment, the input / output terminal 1 for inputting / outputting a signal is provided. However, the same effect can be obtained even if the output terminal is used for sharing output data and an analog signal from the digital / analog converter 5 for output. Is obtained. When the digital / analog converter 5 is operated, the output selection bit SB is used.
Although T is set to "1", this is merely an example and may be set to "0", in which case the inverter 8 for inputting the output selection bit SBT becomes unnecessary.

Further, the output selection bit SBT and the switch 6
Output control signals to open and close
An analog signal is selected by SBT and its output selection bit SBT
, The switch 6 may be closed.

[0024]

[0025]

As described in detail above, the first invention and the second invention
In any of the inventions, when an output selection signal for outputting an analog signal from a digital / analog converter from an output terminal or an input / output terminal is provided to an output buffer, the output buffer becomes non-output, and only the analog signal is output. The output analog signal can be output to the output terminal or the input / output terminal, and the output analog signal does not become inaccurate due to interference with other signals. Further, a short-circuit state caused by the interfered signal does not occur.

Further, in the second invention, when an analog signal from the digital / analog converter is input to the second logic circuit
Outputs a predetermined current from the second logic circuit.
Output current changes according to the analog signal
It has excellent effects such as absence.

[Brief description of the drawings]

FIG. 1 is a block diagram showing a main configuration of a conventional semiconductor device.

FIG. 2 is a block diagram showing a main configuration of the semiconductor device according to the first invention;

FIG. 3 is a block diagram showing a main part configuration of a semiconductor device according to a second invention.

[Explanation of symbols]

 Reference Signs List 1 input / output terminal 2 tristate buffer 4 direction register 5 digital / analog converter 6 switch

Claims (2)

(57) [Claims] An output data is output through an output terminal.
Outputting an output buffer and a signal for controlling output and non-output of the output buffer;
Control means for outputting an analog signal through the output terminal
/ Analog converter, and a signal from the control means
The output terminal of the analog signal from the output signal and the digital <br/> Le / analog converter from the output buffer based
In a semiconductor device in which a so that to output selectively from the digital / analog converter for outputting said analog signal from the signal and the output terminal from the control means
And the output selection signal of
Equipped with a logic circuit that outputs a signal that controls output and non-output
Wherein a that. 2. Output data is output through an input / output terminal.
Output buffer, and a signal for controlling the output and non-output of the output buffer.
Control means for outputting an analog signal through the output terminal
/ Analog converter, and a signal from the control means
The output terminal of the analog signal from the output signal and the digital / analog converter of the output buffer based
In the semiconductor device so as to output selectively from, as input <br/> output selection signal of the digital / analog converter for outputting an analog signal from the signal and the input and output terminals from said control means, said Output to output buffer
First logic circuit for outputting a signal for controlling force and non-output
When the output selection signal of the digital / analog converter and the de
Analog signal of digital / analog converter, or said input / output
The second is to input the input data input through the input terminal
And a logic circuit based on a digital / analog converter output selection signal.
The output buffer is output by the operation of the first logic circuit,
Control to non-output, the output data and analog signal
Selectively outputting from a write-in / output terminal;
Input data is input from the input / output terminals by the operation of the circuit.
A semiconductor device characterized in that it is embedded therein.