JP2520162B2 - Correlated double sampling circuit - Google Patents

Description

TECHNICAL FIELD The present invention relates to a correlated double sampling circuit.

[Prior Art] FIG. 5 shows a video camera signal processing system.

In the figure, 1 is a lens, 2 is a solid-state imaging device, 3 is a sample hold circuit (S / H, 4 is a process circuit, and 5 is a pulse generation circuit (SSG).

 Next, the operation will be described.

A subject (not shown) is imaged on the solid-state image sensor 2 by the lens 1 and photoelectrically converted by the solid-state image sensor 2. An example of the output signal waveform of the solid-state image sensor 2 is shown in FIG. Since only a part is used as the signal charge due to leakage of the clock pulse or the like, the output signal output from the solid-state imaging device 2 is sample-held by the sample-hold circuit 3 and the waveform is shaped. . An example of the waveform-shaped signal is shown in FIG.
The sample-and-hold signal is processed by the process circuit 4 and output as a video signal.

A video camera signal processing system using a correlated double sampling circuit shown in FIG. 4 in place of the sample hold circuit 3 is known.

In the correlated double sampling circuit shown in FIG. 4, when the pulse shown in FIG. 3 (b) is input through the terminal SH1,
The switch 6 is turned ON / OFF, the feedthrough potential is sampled, and stored in the capacitor 9. And the third
When the pulse shown in FIG. 7C is input via the terminal SH2, the switch 7 and the switch 8 are turned on at the same time. When the switch 8 is turned ON / OFF, the feedthrough potential accumulated in the hold capacitor 9 is sampled, and the hold capacitor 11 is sampled via the buffer 15 and the switch 8.
Is accumulated in An example of the signal stored in the hold capacitor 11 is shown in FIG. On the other hand, switch 7 is ON / O
When FF is performed, the signal potential is sampled and stored in the hold capacitor 10. An example of the signal stored in the hold capacitor 10 is shown in FIG. Then, the signal potential accumulated in the hold capacitor 10 and the feed-through potential accumulated in the hold capacitor 11 are input to the differential amplifier 12 via the buffer circuits 17 and 16, and the differential amplifier 12 outputs the signal through the differential amplifier 12 shown in FIG. ) Signal is output.

[Problems to be Solved by the Invention] Since the conventional correlated double sampling circuit has only a single function of the correlated double sampling function, even if it is integrated with another circuit, for example, a process circuit, this integrated circuit is integrated. Can be used only when the process circuit and the correlated double sampling circuit are used at the same time, and there is a limit to cost reduction due to circuit integration, and there is a problem that the cost cannot be further reduced.

An object of the present invention is to solve the above problems and provide a correlated double sampling circuit that can reduce the cost even when integrated with other circuits.

[Means for Solving the Problem] In order to solve such a problem, the present invention provides first sample and hold means for sampling and holding an input signal and second sample and hold means for sampling and holding an input signal. , A third sample and hold means for sampling and holding the input signal sampled and held by the second sample and hold means, and a first selection for selecting one of a signal and a constant voltage sampled and held by the third sample and hold means Means and a first differential voltage output means for outputting a differential voltage between the signal level or constant voltage selected by the first selecting means and the hold voltage by the first sample and hold means.

Further, the present invention provides a first sample-hold means for sampling and holding an input signal, a second selecting means for selecting one of the input signal and a constant voltage, and an input signal selected by the second selecting means. Alternatively, it is obtained by a second sample and hold means for sampling and holding a constant voltage, a third sample and hold means for sampling and holding an input signal or a constant voltage sampled and held by the second sample and hold means, and a third sample and hold means. It is characterized by further comprising second differential voltage output means for outputting a differential voltage between the signal level or constant voltage and the hold voltage by the first sample and hold means.

[Operation] In the present invention, the input signal is sampled and held or passed through by the first sample and hold means, and the input signal is changed to the second signal.
Sample-hold by the sample-hold means, and the second
The input signal sample-held by the sample-hold means is sample-held by the third sample-hold means, and either the signal sampled and held by the third sample-hold means or the constant voltage is selected by the first selecting means. The difference voltage between the level or constant voltage of the signal selected by the selection means and the hold voltage by the first sample and hold means is output by the first difference voltage output means.

Further, in the present invention, the input signal is sampled and held or passed through by the first sample and hold means, one of the input signal and the constant voltage is selected by the second selection means, and the input signal selected by the second selection means or The constant voltage is sampled and held by the second sample and hold means, the input signal sampled and held by the second sample and hold means or the constant voltage is sampled and held by the third sample and hold means, and the level of the signal obtained by the third sample and hold means Alternatively, the difference voltage between the voltage of the constant voltage power source and the signal level from the first sample and hold means is output by the second difference voltage output means.

Embodiments Embodiments of the present invention will be described in detail below with reference to the drawings.

FIG. 1 shows an embodiment of the present invention. In the figure,
11, 13 to 17 show the same parts as in FIG. The buffer 14, the switch 7, the capacitor 10 and the buffer 16 constitute a first sample and hold means, the buffer 13, the switch 6, the capacitor 9 and the buffer 15 constitute a second sample and hold means, and the switch 8, the capacitor 11 and the buffer 17 constitute a first sample and hold means. Three sample and hold means are configured. 19 is a constant voltage power supply. Reference numeral 18 denotes a changeover switch as the first selecting means, which selects either the voltage held in the capacitor 11 or the voltage of the constant voltage power source. Reference numeral 20 denotes a differential amplifier which outputs a difference voltage between the voltage held by the capacitor 11 or the voltage of the constant voltage power supply selected by the changeover switch 18 and the level of the signal held by the capacitor 10. is there.

Since the correlated double sampling circuit of this embodiment is configured as described above, it has the following three functions.

(1) Correlated double sampling function To obtain this function, the contact piece of the changeover switch 18 is closed at the terminal a, and in this state, the switches 6 to 8 are controlled in the same manner as in the conventional example.

(2) Sample hold function To obtain this function, the contact piece of the changeover switch 18 is closed at the terminal b, the voltage of the constant voltage power supply 19 is applied to the negative terminal of the differential amplifier 20, and in this state, Based on the signal level shown in FIG. 3 (c), the switch 7 is turned on / off, the input signal is sampled and held, stored in the capacitor 10, and the difference between the voltage of the constant voltage power supply and the signal level held in the capacitor 10 is held. The voltage is output from the differential amplifier 12. Differential amplifier 12
FIG. 3 (i) shows an example of the signal waveform output from the device.
However, the output signal level changes by DC.

(3) Through function To obtain this function, the contact piece of the changeover switch 18 is closed at the terminal b, the voltage of the constant voltage power source is applied to the negative terminal of the differential amplifier 20, and the switch 7 is always closed. I'll do it. In this state, the differential amplifier 12 outputs a signal having the same waveform as the input signal. However, the output signal level is DC
It has changed by the minute.

 FIG. 2 shows another embodiment of the present invention.

This embodiment is different from the one embodiment in that the selection means and the difference voltage output means are different.

That is, in the embodiment, the changeover switch 18 as the first selecting means selects either one of the input signal and the constant voltage power source, but in the present embodiment, the changeover switch 21 as the second selecting means. Thus, one of the voltage held in the capacitor 11 and the voltage of the constant voltage source is selected.

Further, in one embodiment, the differential amplifier 20 as the first differential voltage output means has the voltage of the constant voltage power source selected by the changeover switch 18 or the signal level held in the capacitor 11 and the voltage level held in the capacitor 10. The differential voltage with respect to the existing signal level is output. However, in the present embodiment, the differential amplifier 12 as the second differential voltage output means uses the changeover switch 21 and the switches 6 and 8 to connect the capacitors.
The difference voltage between the signal level held in 11 or the voltage of the constant voltage power supply and the signal level held in the capacitor 10 is output. Since it did in this way, the operation effect of this example is not essentially different from that of one example.

[Effects of the Invention] As described above, according to the present invention, since it is configured as described above, there is an effect that the cost can be reduced even when integrated with other circuits.

[Brief description of drawings]

FIG. 1 is a diagram showing a correlated double sampling circuit according to an embodiment of the present invention, FIG. 2 is a diagram showing a correlated double sampling circuit according to another embodiment of the present invention, and FIG. 3 is FIG. 1 and FIG. FIG. 4 is a diagram showing signal waveforms of respective parts of the correlated double sampling circuit shown in FIG. 4, FIG. 4 is a diagram showing a conventional correlated double sampling circuit, and FIG. 5 is a block diagram showing a video camera signal processing system. 6-8 ... Switch, 9-11 ... Capacitor, 13-17 ... Buffer, 18 ... Changeover switch, 19 ... Constant voltage power supply, 20 ... Differential amplifier.

Claims (2)

(57) [Claims] 1. A first sample and hold means for sampling and holding an input signal, or a second sample and hold means for sampling and holding the input signal, and a sample and hold for the input signal sampled and held by the second sample and hold means. Third sample and hold means, first selection means for selecting one of a signal sampled and held by the third sample and hold means and a constant voltage, and a signal level or a constant voltage selected by the first selection means And a first differential voltage output means for outputting a differential voltage with respect to the hold voltage by the first sample and hold means. 2. A first sample and hold means for sampling and holding an input signal, or a through means, a second selecting means for selecting one of the input signal and a constant voltage, and an input signal or a constant voltage selected by the selecting means. Second sample and hold means for sampling and holding, and a third sample and hold means for sampling and holding the input signal or the constant voltage sampled and held by the second sample and hold means.
Sample holding means and second differential voltage output means for outputting a difference voltage between the level or constant voltage of the signal obtained by the third sample holding means and the hold voltage by the first sample holding means. Correlated double sampling circuit.