JP2517035B2 - Frequency discrimination circuit - Google Patents

Description

The present invention relates to a frequency discriminating circuit applied to demodulation of a signal frequency-modulated by an analog signal, a data signal or the like, or a frequency deviation measurement of an input signal. Regarding

[Conventional technology and its problems]

Conventionally, as a method for discriminating the instantaneous frequency of an input signal,
There are methods that utilize the tuning characteristics of ceramic elements (ceramic discriminator), quadrature detection methods, and the like.

However, these require devices such as ceramic elements and inductance elements for 90 ° phase shift that are not suitable for IC, and even if they are used outside the IC, there is a limit to miniaturization, and they are not to be processed. Since the carrier wave is limited to a specific intermediate frequency, its application to a heterodyne receiver is limited, and there is a problem in miniaturization and generalization.

Further, two locally oscillating baseband signals are extracted by frequency-mixing two local oscillation waves having the same frequency as the input signal and having phases different from each other by π / 2 radian, and one of them. A so-called quadrature detection method, which takes out two multiplication outputs obtained by analog multiplication of the π / 2 radian shift signal and the other baseband signal and uses the difference between them as a frequency discrimination output, is a highly versatile method.

However, in order to obtain a discriminative output without distortion in this system, two ideal analog multiplier circuits are required, the circuit scale becomes large, and there is a problem that it is not suitable for miniaturization.

[Means for solving problems]

The present invention has been made to solve the above-mentioned conventional problems, downsizing by implementing a distortion-free frequency discrimination operation without using an analog multiplier, easy IC, and, It is intended to provide a frequency discriminating circuit having excellent versatility.

That is, the circuit of the present invention is the local oscillation circuit 1 that obtains the local oscillation output L having the same frequency as the center frequency of the input signal R.
, A polarity inverter 2 which inverts the polarity of the local oscillation output L to obtain a polarity inversion output, and an input signal R and a local oscillation output L, and an input signal R and a polarity inversion output, respectively.
The first and second phase difference detection outputs θ ₁ and θ ₂ are obtained in accordance with the phase difference characteristic of a sawtooth shape that repeats linearly rising or falling with a period of 2π radians with respect to the phase difference between one input R and L, R.
1, the second phase difference detection circuit 31, 32, the input signal R and the local oscillation output L are input, and the phase difference judgment output C which presents a binary judgment value every π radian with a period of 2π radians for these phase differences.
Phase difference determination circuit 4 for obtaining the first and second phase difference detection outputs θ
₁ and θ ₂ are input, and by the time differential operation,
The first and second differentiators 51 and 52 for obtaining the second differential outputs D ₁ and D ₂
A switching circuit 6 for inputting the second differential outputs D ₁ and D ₂ and selecting one of these _two inputs in accordance with the binary state of the phase difference determination output C, and obtaining these switching outputs D; An input signal which is composed of a low-pass filter 7 which inputs D and removes a noise component outside the baseband band caused by noise in the transmission line to obtain a frequency discrimination output S, and which gives a binary change of the phase difference judgment output C. The phase difference point between R and the local oscillation output L is
Phase difference detection of the second phase difference detection outputs θ ₁ and θ ₂ with a phase difference of ± π / 2 radians with respect to the phase difference point that gives a discontinuous change in the phase difference detection characteristic of the sawtooth shape circuit
31 and 32 and the phase difference determination circuit 4 are configured, and the switching circuit 6 has the phase difference determination output C indicated by 2 at the phase difference point at which the first or second phase difference detection output θ ₁ or θ ₂ is discontinuously changed. It is configured so that the second or first differential output D ₂ or D ₁ and the first or second differential output D ₁ or D ₂ are selected and switched for the value state and the opposite state, respectively. is there.

[Work]

A local oscillation output L having the same frequency as the center frequency of the input signal R is obtained from the local oscillation circuit 1, and this local oscillation output L and the input signal R are input to the first phase difference detection circuit 31 and both of these inputs are input. The first phase difference detection output θ ₁ is obtained according to the phase difference characteristic of a sawtooth shape that repeats linearly rising or falling with a period of 2π radians with respect to the phase difference.

Further, the local oscillating output L is input to the polarity reversing device 2 to obtain a polarity reversing output whose polarity is reversed. The polarity reversing output and the input signal R are input to the second phase difference detection circuit 32, The second phase difference detection output θ ₂ is obtained according to the phase difference characteristic of the sawtooth shape in which the phase difference between both inputs R is repeated linearly with a period of 2π radians.

The input signal R and the local output / departure output L are input to the phase difference determination circuit 4, and a phase difference determination output C that exhibits a binary determination value every π radian with a period of 2π radians for these phase differences is obtained.

An input signal R that gives a binary change of the phase difference determination output C
The phase difference between the local output L and the local output L is ± π / 2 radian with respect to the phase difference that gives a discontinuous change in the phase difference detection characteristics of the first and second phase difference detection outputs θ ₁ and θ _2. Have a phase difference of.

The first and second phase difference detection outputs θ ₁ and θ ₂ are respectively the first and second
The first and second differential outputs D ₁ and D ₂ are obtained from the time-differentiating operations of the differentiators 51 and 52. One of these two inputs θ ₁ and θ ₂ is selected by the switching circuit 6 in accordance with the binary state of the phase difference determination output C, and is taken out as the switching output D.

That is, the switching circuit 6 outputs the first or second phase difference detection output θ.
_{For the} binary state indicated by the phase difference determination output C on the phase difference point giving a discontinuous change of ₁ or θ ₂ and the opposite state, the second or first differential output D ₂ or D ₁ , and the first or first differential output Two
Select the differential output D ₁ or D ₂ respectively and switch output.

This switching output D is input to the low-pass filter 7, noise components outside the baseband band generated by noise in the transmission circuit are removed, and discontinuous changes in the first and second phase difference detection outputs θ ₁ and θ ₂ The influence of the impulse output on the _first and second differential outputs D ₁ and D ₂ caused by the above is avoided, and the frequency discrimination output S is obtained from the low-pass filter 7.

〔Example〕

 An embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing the construction of an embodiment of the circuit of the present invention, and FIGS. 2 (a) and 2 (b) are respectively the first embodiment of the present invention.
FIG. 1 is a diagram showing the phase difference detection characteristics of the second phase difference detection circuit and the output characteristics of the phase difference determination circuit, and FIGS. 3 (a) and 3 (b) are configuration examples of the first and second phase difference detection circuits, respectively. FIG. 3 is a connection diagram showing a configuration example of a phase difference determination circuit.

In FIG. 1, R is an input signal that is frequency-modulated by a baseband signal containing direct current, and 1 is a local oscillator that emits a local oscillation output L having the same frequency as the center frequency of the input signal R. Reference numeral 2 is a polarity inverter, which receives the local oscillation output L and obtains a polarity inversion output of the input L, that is, an output having a phase difference of π radian.

Reference numerals 31 and 32 denote first and second phase difference detection circuits, which respectively input the input signal R and the local oscillation output, and the input signal R and the polarity inversion output, and linearly rise with a period of 2π radians for each phase difference or The first and second phase difference detection outputs θ ₁ and θ ₂ are emitted according to the phase difference characteristic of the sawtooth shape which repeats the downward movement.

4 is a phase difference determination circuit, which is an input signal R and a local oscillation output L
And a binary judgment value “L” or “H” is output for each π radian with a period of 2π radians with respect to the phase difference between them. C is the phase difference determination output. The phase difference point between the local oscillation output L and the input signal R which gives the change of the binary state “H” → “L”, “L” → “H” of the phase difference judgment output C is the first and second phase difference detection. It has a deviation of ± π / 2 with respect to the phase point that gives a discontinuous change (vertical fall or rise) in the sawtooth-shaped phase difference detection characteristics of the outputs θ ₁ and θ ₂ .

First and second phase difference detection circuits 31, 32 and phase difference determination circuit 4
FIG. 2A and FIG. 2B show characteristic examples of
become that way. The vertical axes in FIGS. 2A and 2B represent the binary logic states of the outputs θ ₁ and θ ₂ of the first and second phase difference detection circuits 31 and 32 and the output C of the phase difference determination circuit 4, respectively. Represents
The horizontal axis represents the phase difference θ radian of the local oscillation output L with respect to the input signal R.

The characteristic indicated by the solid line in FIG. 2 (a) is the characteristic of θ ₁ , which has a maximum value + V ₁ and a minimum value −V, and shows an undesired discontinuous change when θ is an integer multiple of 2π radians. The case where the shape is exhibited is shown. At this time, the characteristic of θ ₂ is that as one input of the second phase difference detection circuit 32 has a phase difference of π radian with respect to the local oscillation output L, the phase difference of θ ₁ as shown by the broken line is shown. The characteristics are shifted by π radians.

The characteristic of the phase difference determination output C in FIG. 2 (b) changes at the phase difference point deviated by ± π / 2 radian from the vertical descent point of θ ₁ and θ ₂ as described above. Has a rectangular characteristic in which the “H” and “L” states alternate at points that are an odd multiple of π / 2 radians. When the input signal R, the local oscillation output L, and the polarity inversion output are shaped into a binary logic value, the first and second phase difference detection circuits 31 and 32 and the phase difference determination circuit 4 having such characteristics are shaped. Can be realized by the configuration examples shown in FIGS. 3 (a) and 3 (b), respectively.

311 in FIG. 3 (a) inputs L or, and a monostable multivibrator that generates a pulse sufficiently shorter than the cycle of the input signal R in synchronization with its rising edge, and 312 uses R as a trigger input (T), In the D-type flip-flop circuit in which the pulse output of the monostable multivibrator 311 is used as the reset input (R), the data input (D) is held in the logic state "H".

313 is a low-pass filter that receives the data output (Q) of the flip-flop circuit 312 and removes the carrier frequency component of the input signal R and its harmonic components, the output of which is the first and second phase difference detection outputs. θ ₁ and θ ₂ .

According to the above configuration, the D-type flip-flop circuit 312 samples and outputs the "H" state of the data input (D) in response to the rising edge of the input signal R, so that the set state (Q = "H") is reached and the rising edge of L, By this, the reset state (Q = “L”) is restored, so L for the phase of R,
In the range where the phase difference Q is 0 <θ <2π, the duty ratio of the output of the D type flip-flop circuit 312 in the “H” state is proportional to θ. Therefore, if this is smoothed by the low-pass filter 313, the output of the low-pass filter 313 becomes a voltage proportional to θ, and it can be seen that the characteristic indicated by the solid line in FIG. 2 (a) is obtained.

41 in FIG. 3 (b) indicates an input signal R and a local oscillation output L.
An exclusive OR circuit having 42 as an input, the input of the output of this circuit 41, a low-pass filter having the same function as 313 of FIG. 3 (a), and 43 the output of the low-pass filter 42. This is a level comparator that shapes into a binary logic value, and its output becomes a phase difference determination output C.

With the above configuration, the output of the exclusive OR circuit 41 is R
And L are in phase (θ = 0), and in reverse phase (θ = ± π)
, All become “L” and all “H”, and π / 2
“H” and “L” in the case of radian phase difference (θ = ± π / 2)
Are generated at the same rate, the smoothed output by the low-pass filter 42 is the minimum value, the maximum value, and the former two values at θ = 0, θ = ± π, and θ = ± π / 2, respectively. It exhibits the property of a triangle giving the average value of. Therefore, if the level comparator 43 uses the above-mentioned average value as a threshold value and makes a binary decision, it can be seen that the rectangular characteristic of FIG. 2 (b) is obtained.

Next, returning to FIG. 1, 51 and 52 are _first and _second differentiators that input θ ₁ and θ ₂ respectively and output their differential waveforms, and D ₁ and D ₂ are their differential outputs. is there. 6 is differential output
A switching circuit for inputting D ₁ and D ₂ and a phase determination output C, selecting one of D ₁ and D ₂ according to the binary state of C, and switching and outputting can be constituted by an analog switch. 7
Is a low-pass filter that receives the output D (D ₁ or D ₂ ) of the switching circuit 6 and removes the noise component outside the baseband generated at the switching output D due to the noise in the transmission line. And its output S is a frequency discriminating output consisting of the baseband signal extracted by the low pass filtering operation.

In the above-mentioned configuration, an example of the configuration of the circuit of the present invention shown in FIG. 1 and the first and second aspects of the present invention shown in FIGS. 3 (a) and 3 (b)
Based on the configuration examples of the second phase difference detection circuit and the phase difference determination circuit and the characteristic examples of the first and second phase difference detection circuits and the phase difference determination circuit shown in FIGS. The discrimination operation and effect will be described in detail by using mathematical expressions and time charts.

Now, the time waveforms of the signals θ ₁ , θ ₂ , D ₁ , D ₂ , D of FIG. 1 and θ of FIG. 2 are respectively represented by θ ₁ (t), θ ₂ (t), D.
₁ (t), D ₂ (t), D (t), θ (t), and the time waveform obtained by replacing the binary states “H” and “L” of C with +1 and 0 respectively is C (t )far. Further, the operation of the switching circuit 6 is C =
D ₁ when “H” (C (t) = + 1), and C = “L” (C
When (t) = 0, D ₂ is selected and output. At this time, the following various relational expressions can be derived from FIGS. 1 and 2.

D _t = D ₁ (t) · C (t) + D ₂ (t) (1-C (t))
(5) However, δ {·} is a Dirac impulse function and is generated by differentiating at the discontinuous points of θ ₁ and θ ₂ described in FIG. Here, from the relationship between θ ₁ and θ ₂ and C shown in FIGS. Therefore, the following formula is finally obtained by summing the formulas (1) to (7). Get.

From this equation (8), the switching output waveform D (t) is dθ
Since it is proportional to (t) / dt, that is, the angular frequency deviation (set as Δω) from the central angular frequency of the input signal R, it is clear that D (t) is a frequency discriminant output.

A specific example of the frequency discriminating operation represented by the above mathematical formula will be shown next with reference to a time chart in FIG.
It becomes like (b).

4 (a) and 4 (b) show the angular frequency deviation Δ, respectively.
The time waveforms when the absolute value of ω is relatively large (Δω = ± ω _H ) and when it is small (Δω = ± ω _L ) are shown, and Δω = Δω _H , Δω _L > 0 , And Δ
The case of ω = −Δω _H , −Δω _L <0 is shown by a solid line and a broken line, respectively (where Δω _H > Δω _L ).

In FIG. 4A, since the change (phase rotation) of the phase difference θ is faster than that of (b), the change of the sawtooth wave of θ ₁ (t) and θ ₂ (t) is (a) It will be faster than b). Therefore, these time differential waveforms D ₁ (t) and D ₂ (t) are θ
_{The part of the change in 1} (t), θ ₂ (t) other than the downward or upward sharp impulse train occurring at the discontinuous point is θ ₁
A constant voltage proportional to the inclination of the linear inclination portion of (t) and θ ₂ (t) is exhibited, and (a) is larger than (b). This means that this constant voltage value is Δω = Δω _H , Δω _L (solid line)
If v _H and v _L are set for each of the above, Δω = −Δω _H , −
Δω _L (broken line) is −v _H , −v _L , respectively, and v _H , v _L are expressed by the following equations (1) to (4). It is also clear from what is given by.

On the other hand, the sharp impulse train described above corresponds to the second term in [] on the right side of each of the equations (3) and (4), and its period is
Since the angular frequency Δω is generated in each of D ₁ (t) and D ₂ (t), if Δω is small as it is, the fundamental wave component of the impulse train is mixed in the baseband signal band of the frequency discrimination output, and Since the distortion component that cannot be removed by the bandpass filter 7 is low, the process of low-pass filtering D ₁ (t) or D ₂ (t) as it is is not appropriate.

Here, the judgment output waveform C (t) of the phase difference judgment circuit 4 is shown in FIGS. 4 (a) and 4 (b) according to the relationship of FIGS. 2 (a) and 2 (b).
As shown in the second row from the bottom _{of, D 1 (t) C (} t) at the time of impulse generation of = 0 (C = "L" ), C during impulse generation of _{D 2 (t) (t)} = + 1 It can be seen that (C = “H”).

Therefore, the inputs D ₁ (t) and D ₂ (t) of the switching circuit 6 in FIG.
The switching output operation logic of If it is configured so that D (t) is effectively expressed by the equation (5), it becomes a switching output waveform that alternately avoids the impulse generation points of D ₁ (t) and D ₂ (t). Figure 4 (a),
As shown at the bottom of (b), D (t) does not include distortion in the baseband signal band, and the frequency discrimination output ± Δω _H ,
It is possible to obtain constant outputs ± v _H and ± v _L that are proportional to ± Δω _L , respectively.

〔The invention's effect〕

As described in detail above, according to the present invention, it is possible to obtain a frequency discrimination operation that is theoretically distortion-free and does not include unnecessary harmonics. In order to realize this, two local oscillation outputs having a phase difference of π / 2 radians, which are in the conventional quadrature detection system, as a local oscillation circuit, an analog multiplier, etc. are not required, and an operational amplifier and a level are simply used. Comparator,
With analog switches, logic circuits, etc. as the main constituent elements, circuits can be formed by application of technologies such as linear ICs, switched capacitor circuits, CMOS circuits, etc.
Suitable for small size and low power consumption. Further, the application is not limited to the super-heterodyne receiver, and can be applied to a receiver that directly converts the received wave into the baseband region, and thus has an advantage of excellent versatility.

[Brief description of drawings]

FIG. 1 is a block diagram showing the construction of an embodiment of the circuit of the present invention, and FIGS. 2 (a) and 2 (b) are respectively the first embodiment of the present invention.
FIG. 1 is a diagram showing the phase difference detection characteristics of the second phase difference detection circuit and the output characteristics of the phase difference determination circuit, and FIGS. 3 (a) and 3 (b) are configuration examples of the first and second phase difference detection circuits, respectively. And a connection diagram showing a configuration example of the phase difference determination circuit, and FIGS. 4 (a) and 4 (b) are time waveform examples when the absolute value of the angular frequency deviation Δω of the input signal is relatively large and small, respectively. 2 is a time chart showing. 1 ... Local oscillation circuit, R ... Input signal, L ... Local oscillation output, 2 ... Polarity reversing device, ... Polarity reversing output, 31, 32
...... First and second phase difference detection circuits, θ ₁ , θ ₂ ...... The first and second phase difference detection outputs, 4 ...... Phase difference determination circuit, C ...... The phase difference determination output, 51, 52 …… First and second differentiators, D ₁ , D ₂ ……
The first and second differential outputs, 6 ... switching circuit, D ... switching output, 7 ... low-pass filter, S ... frequency discrimination output.

Claims (1)

(57) [Claims] 1. A local oscillator circuit 1 for obtaining a local oscillation output L having the same frequency as the center frequency of an input signal R, a polarity inverter 2 for inverting the polarity of the local oscillation output L to obtain a polarity inversion output, and an input signal. R and the local oscillation output L, and the input signal R and the polarity inversion output are input respectively and two inputs R and
First and second phase difference detection outputs θ ₁ and θ ₂ are obtained according to the phase difference characteristic of a sawtooth shape that repeats linear rising and falling with a period of 2π radians with respect to the phase difference between L and R Phase difference detection circuits 31 and 32, and a phase difference determination output C that receives the input signal R and the local oscillation output L and obtains a phase difference determination output C that presents a binary determination value every π radian with a period of 2π radians for these phase differences. The circuit 4 and the first and second phase difference detection outputs θ ₁ and θ ₂ are input and the first and second differential outputs are made by the time differentiating operation.
First and second differentiators 51 and 52 for obtaining D ₁ and D ₂ , and first and second differentiator outputs
D ₁ and D ₂ are input, one of these two inputs is selected according to the binary state of the phase difference determination output C, and the switching circuit 6 that obtains these switching outputs D and the switching output D are input. A low-pass filter 7 for obtaining a frequency discrimination output S by removing a noise component outside the baseband caused by noise in a transmission line, and an input signal R and a local oscillation for giving a binary change of a phase difference judgment output C. The phase difference point with the output L is ± π / 2 radian phase difference point with respect to the phase difference point that gives a discontinuous change in the sawtooth phase difference detection characteristics of the first and second phase difference detection outputs θ ₁ and θ _2. The first and second phase difference detection circuits 31 and 32 and the phase difference determination circuit 4 are configured to have, and the switching circuit 6 gives a discontinuous change in the first or second phase difference detection output θ ₁ or θ _2. Binary state indicated by the phase difference determination output C on the phase difference point,
A frequency discriminating circuit configured to select the second or first differential output D ₂ or D ₁ and the first or second differential output D ₁ or D ₂ for the opposite state and switch output.