JP2572028B2 - Facsimile communication system - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a facsimile communication system that divides image information into a plurality of area information and transmits the divided area information.

More specifically, the present invention relates to a facsimile communication system configured to efficiently perform retransmission correction of image information.

(Prior art)

A conventional facsimile communication system will be specifically described according to the following items.

§1 Description of HDLC frame configuration (using Fig. 1) §2 Specific example of error retransmission using HDLC frame configuration (using Fig. 2) §3 Problems caused by performing error retransmission using HDLC frame configuration § 3.1 Influence on line errors §3.2 Influence due to bit position in which an error occurred (using Fig.3) §3.3 Influence based on propagation delay characteristics of communication line (using Fig.4) §3.4 Difficulty of coding §4 Conventional Disadvantages of the known error retransmission method §4.1 Regarding fallback §4.2 Processing when reception of training signal fails (using Fig.5-7) §4.3 Processing when EOL cannot be detected §4.4 Processing when signal transmission is completed §4.5 Processing after transmission of instruction signal such as retransmission start line §4.6 Selection of error retransmission mode §1 Description of HDLC frame configuration When data is transmitted through a communication line such as a line, an error occurs in the data at a certain establishment due to the effects of instantaneous interruption of the communication line, noise, distortion, and the like. In order to detect this data error, a predetermined operation or the like is performed on the received data to determine whether a certain rule is maintained. And if an error is detected,
According to a predetermined transmission control procedure, a method of transmitting an information data group including error data again is adopted.

Such an automatic repeat request (ARQ)
uest) is a technique used when performing half-duplex transmission using a telephone line or the like, and is a high level data link control procedure (HDLC).
It is performed according to. This HDLC is a bit transparent, which enables highly efficient data transmission between data terminal equipments (DTEs) via a data transmission line and can transmit an arbitrary bit string without depending on any coding system. This is a synchronous transmission control procedure. In the HDLC procedure, information of an arbitrary bit string and link control information are transmitted in a frame as a transfer unit. The start and end of the frame are indicated by a flag sequence (01111110).

FIG. 1 shows the frame format of the HDLC procedure.
The illustrated flag sequence is a signal for frame synchronization, and the frame is synchronized by transmitting and receiving one or more flag sequences. If the same bit sequence as the flag sequence appears in the information transferred in the frame, the receiving side regards it as the end of the frame. To prevent this, when a pattern of five consecutive bits “1” appears in the information of the frame, the transmitting side immediately sets the bit “0”.
Is forcibly inserted and transmitted, and the receiving side uses a method of removing one bit “0” received following the pattern of five consecutive bits “1” (zero bit insertion method), Ensure the transparency of the data to be transferred.

In the address field, the address assigned to the station transmitting and receiving the frame is represented by a binary code (for example, 11111111).
Indicated by The frame having the address of the station on the receiving side is a command frame, and the frame having the address of the station on the transmitting side is a response frame.

The control field indicates an operation command to the partner station when the frame is a command, and indicates a response to a command frame command when the frame is a response.

Frame Check Sequence (FCS)
equence) is a 16-bit sequence for detecting a frame transmission error, and indicates an operation result by the generator polynomial X ¹⁶ + X + X ⁵ +1. The operation is performed from the beginning of the address field of the frame to the end of the information field.

The length of the information field is arbitrary (for example, 512 bytes, that is, 512 × 8 bits).

§2 Specific Example of Error Retransmission Using HDLC Frame Configuration FIG. 2 shows a specific example when error retransmission is performed using the HDLC frame data shown in FIG. That is, if no error has occurred when the receiving side has received a frame, an ACK signal is sent out, and if an error has occurred, a NACK signal is sent out.

On the other hand, the transmitting side transmits the frame N + 1 after transmitting the frame N in response to the ACK signal detected during the transmission of the frame N.

On the other hand, if a NACK signal is detected during transmission of a certain frame N, or if an ACK signal cannot be detected,
After transmitting the frame N, the frame N-1 is retransmitted. Then, for the same frame, a predetermined number of times or more of NA
When the CK signal is detected or when the ACK signal is not detected at all, control for performing fallback is performed.

In this way, when transmitting the framed data from the transmitting side and performing reception at the receiving side, no error occurs with respect to frame N at the receiving side as shown in FIG. When this occurs, the following control is performed. That is, an ACK signal is transmitted to the receiving side after receiving frame N, and a NACK signal is transmitted after receiving frame N + 1.

On the other hand, on the transmitting side, while transmitting frame N + 1,
Since the ACK signal is received, the frame N + 2 is transmitted after the frame N + 1 is transmitted. Further, the transmitting side receives the NACK signal during the transmission of the frame N + 2, so that the transmission of the frame N + 1 is performed again after the transmission of the frame N + 2.

After transmitting the NACK signal for frame N + 1, the receiving side transmits an ACK signal after receiving frame N + 2 regardless of whether an error occurs in frame N + 2. Thus, the receiving side is in a state of waiting for reception of the frame N + 1. If no error has occurred in the retransmission frame N + 1 transmitted subsequent to the frame N + 2, the receiving side transmits an ACK signal after receiving the retransmission frame N + 1.

On the other hand, the transmitting side transmits ACK while transmitting retransmission frame N + 1.
Since the signal is received, the frame N + 2 is transmitted again after transmitting the retransmission frame N + 1. Then, in response to the ACK signal received during transmission of frame N + 2, transmission of frame N + 3 is performed after transmission of frame N + 2.

§3 Problems caused by error retransmission using HDLC frames Conventionally known image communication devices using the retransmission correction method ARQ adopt the HDLC frame configuration as described above. There was the problem described.

§3.1 Effects on line errors Since signals to be transmitted are blocked using HDLC frames, on the receiving side, a) no error occurred in the block, or b) one or more bits It can be determined whether an error has occurred. Therefore, on the receiving side, it is possible to reproduce a good image without any bit error.

However, when a reception error occurs for a certain block, it cannot be determined how much the error was. That is, on the receiving side, it is simply determined whether no error has occurred in the block or whether an error has occurred in the block (that is, the first bit to the xth bit (x varies depending on the block size and image information). Cannot be specified).

Therefore, HDLC can be used under good line conditions such as in Japan.
Although it is effective to block a signal by a frame (that is, in a case of a good line condition, an image without any error can be reproduced on the receiver side).
When the line condition is poor, the probability that several bits included in the HDLC frame will result in a reception error increases. For this reason, there has been a disadvantage that the number of retransmissions increases.

§3.2 Influence of the bit position where the error occurred The signal to be transmitted is divided into blocks using the HDLC frame, so if an error occurs at any bit position of the block, it is necessary to retransmit from the beginning of the block. is there. For example, as shown in FIG. 3, even when an error occurs in the data in the portion shown in (a), it is necessary to retransmit from the head of the block, that is, the data in (a). For this reason, there is a disadvantage that the transmission efficiency cannot be improved.

§3.3 Influence based on the propagation delay characteristic of the communication line The transmitting side determines whether the frame N-1 previously transmitted during the transmission period of a certain frame N has been correctly received by the receiving side. However, also in this case, there may be a case where the ACK signal cannot be received due to the delay time inherent in the line. A specific example will be described with reference to FIG. Assuming that the time required to transmit one block of data is Tf and the delay time generated when transmitting a signal from the transmitting side to the receiving side is Td, Tf> 2Td is required. As described above, there is a disadvantage that an allowable delay time on a line is defined according to the block size.
Therefore, in order to allow a long delay time on the line, a method of increasing the block size can be considered. However, when the block size is increased, the disadvantage described in the section “§3.2 Influence by Bit Position in Which Error Occurred” has been remarkably exhibited.

§3.4 Difficulty of encoding There was a drawback that extra time was required to create the encoding for the new design.

§4 Disadvantages of the conventionally known error retransmission method §4.1 Regarding fallback In the conventional error retransmission method, a retransmission request is made when a reception error occurs in the receiving device. In addition, when an error retransmission is performed a certain number of times (for example, three times) during transmission of a certain original, a fallback (reducing the transmission speed) has been performed.

Therefore, even when reception at a predetermined transmission speed (for example, 4800 bits / Sec) is possible without a change in the state (characteristics) of the line, when impulse noise is superimposed on the line (for example, one (When the impulse noise occurs three times during the transmission of the original), the fallback occurs.

Similarly, when reception at a predetermined transmission speed is impossible even though the line is in a steady state, fallback is performed when error retransmission occurs three times in a row.

The latter case described above is a meaningful fallback because there is a possibility of eliminating a reception error by performing a fallback. However, in the former case, even if fallback is performed, an error occurs again on the receiving side due to impulsive noise. Therefore, performing fallback in the former case is useless.

As described above, in the conventional error retransmission method, useless fallback is performed, and there is a disadvantage that the transmission time is unnecessarily long.

§4.2 Processing when the reception of the training signal fails In the conventionally known image communication method, if the reception of the training signal fails, an error occurs immediately on the receiving side, and on the other hand, one document is transmitted on the transmitting side. Is configured to generate an error after terminating the transmission. As described above, although the image transmission is not performed, the line remains occupied until the transmission of one document is completed, and there is a great disadvantage that the fee is wasted.

FIG. 5 shows an operation example when the receiving side apparatus fails to receive the training signal in the conventional error retransmission method.

 Here, NSF is non-standard equipment, CSI is called station identification, DIS is digital identification signal, NSS is non-standard equipment setting, TSI is transmitting terminal identification, DCS is digital command signal, TCF is training check, CFR is reception preparation Acknowledgment, EOP indicates end of procedure, DCN indicates disconnection command (see CCITT recommendation T.30).

The waveform diagrams shown in FIGS. 6 (1) to (3) show a state in which the receiving side device has received a training signal and succeeded in receiving the training signal. In this figure,
(1) shows a signal on the line. This figure (B) shows a signal presence / absence (SED: Signal E) indicating whether there is a signal on the line.
nergy Detect), and exhibits a high level when a signal presence state is detected. FIG. 3C shows a carrier detect (CD) indicating whether valid data transmitted at a predetermined transmission speed has been detected. When valid data at a predetermined transmission speed is detected, the signal is high. Present a level.

As is apparent from FIGS. 6 (1) to (3), the SED
Is high level and CD is low level (Tr),
This means that the training signal is being received (24
Tr = 1158mS at 00bit / S, Tr = 923m at 4800bit / S
S), a flowchart shown in FIG. 7 shows a control procedure for receiving a training signal / image signal in a conventional device.

Here, step S1000 represents reception of a training signal / image signal.

In step S1002, the timer T2 for determining that the reception of the training signal has failed is set to 10 seconds.

In step S1004, it is determined whether SED = 1 continuously for 20 milliseconds while determining whether T2 times out. At this time, if the timer T2 times out, the process proceeds to step S1012. If SED = 1 continuously for 20 milliseconds (that is, if the head of the training signal is received), the process proceeds to step S1006.

In step S1006, while determining whether or not the timer T2 times out, the CD is continuously executed for a millisecond (700 milliseconds for 2400b / S and 500 milliseconds for 4800b / S).
It is determined whether or not = 0. At this time, if the timer T2 times out, the process proceeds to step S1012. Also, a
When CD = 0 continuously for milliseconds (that is, when a training signal is received), the process proceeds to step S1008.

In step S1008, CD = 1 continuously for 20 milliseconds while determining whether or not the timer T2 times out.
Is determined. At this time, if the timer T2 times out, the process proceeds to step S1012. If CD = 1 continuously for 20 milliseconds (that is, if the head of the image signal is received), the process proceeds to step S1010.

 Step S1010 represents reception of an image signal.

 Step S1012 indicates a reception error.

As shown in FIG. 7, when the reception of the training signal fails (that is, when the SED and the CD do not operate properly), it takes about 10 seconds from the start of the training signal / image signal receiving mode. The disadvantage was that it ended with an error later.

§4.3 Regarding processing when EOL cannot be detected In the conventional facsimile machine, when the training signal was successfully received and the image signal receiving mode was entered, when the EOL (End of Line) signal could not be received for more than 5 seconds, It was an error immediately. This is the same when the error retransmission mode is used.

As described above, when the demodulated data is not correctly demodulated despite the successful reception of the training signal, an error is immediately detected, so that a defect that the error retransmission is not effectively utilized is observed.

§4.4 Processing when image signal transmission is completed In the conventional facsimile machine, when the image signal transmission is completed, the procedure signal is immediately transmitted. Cannot be performed.

§4.5 Processing after transmitting an instruction signal such as a retransmission start line In a conventional facsimile apparatus, when the receiving side detects an error, it transmits a NACK signal, and then transmits an instruction signal such as a retransmission start line. Next, the receiving-side device was about to receive the image signal transmitted from the transmitting-side device (that is, the image signal from the designated retransmission phase start line).

However, when the transmitting side cannot correctly receive the instruction signal such as the retransmission start line transmitted from the receiving side, an error occurs.

§4.6 Selection of error retransmission mode In general, error retransmission mode has the advantage that image information can be transmitted reliably, but if there are no errors, it takes extra time than normal transmission. There is an inconvenience. Therefore, it is desirable to let the operator decide whether or not to perform transmission in the error retransmission mode.

However, the conventional facsimile apparatus has a disadvantage that the error retransmission mode cannot be arbitrarily selected by the operator.

[Purpose] An object of the present invention is to provide a first mode in which communication is continued without error retransmission if there is little communication error, and a second mode in which error retransmission is performed in line units if there is only one line of image data communication error. An object of the present invention is to provide a facsimile communication system capable of selectively setting two modes.

In order to achieve the above object, the present invention provides an adding unit that adds a line number to each line of image data, and a counting unit that increases the value of the line number added by the adding unit at regular line intervals. Setting means for setting the constant line interval to an arbitrary value; transmitting means for transmitting image data to which the line number has been added by the adding means; and error specifying the line number of the image data for which error retransmission is requested. Receiving means for receiving a retransmission request signal; and a transmission-side facsimile apparatus having retransmission control means for causing the transmission means to retransmit transmitted image data from a line number designated by the error retransmission request signal; and Receiving means for receiving, and detecting means for detecting a line number added to the image data received by the receiving means, If the line number detected by the detecting means is equal to the line number detected immediately before the detecting means, or if it is a continuous value, it is determined that the received image data is normal. If the line number detected in step (1) is a value that is not continuous with the line number detected immediately before, a determination unit that determines that the received image data is an error, and that the image data received by the determination unit is an error. And a receiving-side facsimile apparatus having error retransmission request means for transmitting an error retransmission request signal designating a retransmission start line number.

〔Example〕

A facsimile apparatus will be described as an embodiment to which the present invention is applied, and will be described.

 First, an outline of the present embodiment will be described.

(I) When transmitting image information (transmitting side), an encoded line number is assigned to each line and transmitted together with the image information. Then, data following the code corresponding to a certain line number can be retransmitted.

On the receiver side, the line number is checked during the reception of the image information, and thereby the presence or absence of a reception error is determined. When data is received correctly, the line number is removed and decoding is performed. On the other hand, when the receiver recognizes the occurrence of the reception error, the receiver transmits a control signal to interrupt the transmission of the image information of the transmitter.
Thereafter, the receiving device notifies the transmitting device of the retransmission request start line number. This allows the transmitting device to:
Transmission from the retransmission request start line number is resumed.

(Ii) When transmitting image information, the line number inserted for each line has the following characteristics.

B) The line number is incremented for each line.

B) The line number is a signal representing the end of the code of one line, for example, “EOL” (End of Line; used when modified Huffman coding or modified read coding is performed based on CCITT recommendation T4). Insert later. As a result, the receiving apparatus can identify the image information and the line number.

C) The length of the line number is fixed. Therefore,
The code number of the line number representing the small number is the same as the code length of the line number representing the large number. Thus, the receiving side device can recognize that the predetermined byte in the signal indicating the end of the code of one line is a line number. In this manner, the image information and the line number can be easily identified on the receiving side.

D) The line number is a signal with a special meaning, for example,
A signal indicating the end of one line, and a signal having a different code configuration. Therefore, when an error occurs on the receiving side, a signal having a special meaning (indicating the end of one line) is searched again, and line synchronization can be established in response to the detection of the signal.

Hereinafter, the facsimile apparatus according to the present embodiment will be described in detail according to the following items.

§1 Example of error retransmission procedure (using Fig. 8) §2 Explanation of line number (using Fig. 9) §3 Specific example of storing encoded data in FIFO memory (using Fig. 10) §4 FIFO Description of pointers for controlling memory and FIFO memory §5 Configuration for selecting error retransmission mode from transmitting side device (using FIGS. 11 and 12) §6 Management of FIFO memory in transmitting side device (FIGS. 13 to 13)
§7 Validity of memory capacity for storing retransmission start address §8 Control after transmitting all image information from transmitting device §9 Condition for performing retransmission request and fallback request from receiving device Conditions (using Fig. 16) §10 Configuration of NSF signal (using Fig. 17) §11 Operation of transmitting device when NACK signal is received (using Fig. 18) §12 Explanation of block diagram of transmitting device ( FIG. 19 and FIG.
§13 Schematic operation of control circuit in transmitter
§14 Detailed operation of the control circuit in the transmitting device (using Fig.22 and Fig.23) §15 Block configuration of the receiving device (using Fig.24) §16 Control circuit in the receiving device Description of operation (using FIGS. 25 and 26) §17 Other embodiments §1 Example of error retransmission procedure (using FIG. 8) When mode is selected to perform image transmission in error retransmission mode ( That is, the case where the start button is continuously pressed for 2.5 seconds or more in the transmission side device or the case where the error retransmission mode is selected by the switch or the like in the transmission side device will be described with reference to FIG.

In FIG. 8, a case is considered in which impulsive noise occurs once during transmission of image information, and an error of three or more lines occurs in the receiving apparatus. When such an error occurs, the receiving side apparatus sends a NACK signal (PIS signal in this embodiment; Procedure Interrupt Signal
Procedure interruption signal). The transmitting device interrupts the transmission of the image information by detecting the PIS signal.

The receiving device transmits information such as a retransmission start line / fallback to the transmitting device following the PIS signal.
The V21 modulated NSF signal is used. In this embodiment, the last line number correctly received is notified to the transmission side device by the NSF signal.

Based on such a signal, the transmitting apparatus retransmits image information from the line next to the line specified by the receiving side. At this time, the transmitting apparatus performs fallback if there is a fallback instruction. If fallback cannot be performed more than the current time (that is, if image transmission is currently performed at 2400b / S and error retransmission is performed three times), an error is terminated and a line disconnection (DCM) occurs.
And

The abbreviations such as NSF / CSI / DIS shown in FIG. 8 are as described above with reference to FIG.

§2 Explanation of line number (using FIG. 9) FIG. 9 is a bit configuration diagram showing a specific example of the line number. This line number is inserted after EOL (line end code).

In this embodiment, a modified Huffman code is used as the encoding method.

The line number is 2 bytes (16 bits) following the line end code EOL. And the line number is EOL
The LSB (Least Significant Bit) of the high byte and the LSB of the low byte of the line number in the line number are fixed to 1 so that they can be distinguished from the signal. When decoded by the receiving device, the number of bits in one line is
If it is not 1728 bits (when receiving A4 size),
Perform EOL search again and synchronize the lines. For this reason, the line number needs to be a signal different from EOL.

For example, line number 0 is 01H (high byte of line number) 01H (low byte of line number) and line number 1 is 01H (high byte of line number) 0
3H (low byte of line number), line number 2
Is 01H (high byte of line number) 05H (low byte of line number), line number 3 is 01H (high byte of line number) 07H (low byte of line number), line number 10 is 01H (high byte of line number) ) 15H (Line number low byte), Line number 100 is 01H (Line number high byte) C9
H (low byte of line number). These line numbers are defined to be incremented every three lines.

§3 Specific example of storing coded data in FIFO memory (using FIG. 10) FIG. 10 illustrates a state where coded data and a retransmission start address corresponding to each line number are stored in the memory. It is. In the figure, TFIFS is a head address (8400H in the present embodiment) of a memory for storing encoded data. As the memory area for storing the encoded data in the transmitting apparatus, for example, 8400H to AFFFH are considered. Also, as a memory area for storing the retransmission start address, for example, C000H to C3FFH are considered.

Now, as a condition of the transmitting device, when the minimum transmission time when one line is all white is 10 mSec, and when the one line has black is 20 mSec and the transmission speed is 4800 b / S, The 10th procedure for transmitting A4 size originals (all white)
Description will be made based on the drawings. At this time, the minimum number of bytes in one line is 6. When sending the byte data stored in the memory, the byte data is sent from the LSB. For example, when transmitting data of address 8401H, first, information of 0 is transmitted for 7 bits, and then information of 1 is transmitted.

In FIG. 10, EOL is formed by data stored at addresses 8400H and 8401H (15 consecutive 0s).
One information is sent after the information). Address 8402H stores high byte data of the line number, and address 8403H stores low byte data of the line number. Data stored at addresses 8402H and 8403H are 01H and 01H
And represents the line number 0.

At addresses 8404H to 8406H, when the 1728 bits are all white, modified Huffman-encoded data is stored. That is, the modified Huffman-coded data when 1728 bits are all white is 01 0
011 011 0011 01 01 (when data is transmitted to the line in order from the left-hand data). Here, 010011011 is a makeup code in the case of 1728-bit white run length, and 00110101 is a terminating code in the case of 0-bit white run length. When the modified Huffman coded data when the 1728 bits are all white is stored in the memory, it becomes B2H, 59H, 01H.

When data is transmitted to the line, the data of the LSB of B2H is converted to the data of the MSB, the data of the LSB of 59H is converted to the data of the MSB, 01
The LSB data of H is transmitted in the order of MSB data. That is, data is transmitted to the line in the order of 01001101 (data of B2H), 10011010 (data of 59H), 1000 0000 (data of 01H) (when data is transmitted to the line sequentially from the left-hand data). Thereafter, similarly, the encoded data is stored in the memory of the transmitting device.

On the other hand, the retransmission start address is stored in the memory corresponding to each line number. The memory area where the retransmission start address is stored is from address C000H to address C3F.
FH. The head address of the memory area where the retransmission start address is stored is called LINO. To specify one retransmission start address, the memory area needs 2 bytes. Since the memory area from address C000H to address C3FFH is 1024 bytes, the retransmission start address is 512 bytes.
Can be stored. Further, as described above, the line number is configured to be incremented for each line. Therefore, when the line number changes (that is, when the line number is incremented by 1), the encoded data is stored in the memory storing the retransmission start address. Of the line number of the memory in which is stored. A specific example is as shown in FIG.

00H and 84H are stored in the addresses C000H and C001H. The data stored at address C000H is raw data at the retransmission start address of line number 0, and the data stored at address C001H is line data 0.
Is the high data at the resending start address of the data, and the head address where the line number 0 is stored (for the memory where the encoded data is stored) is 8400H
It is.

Also, 07H and 84H are stored in the addresses C002H and C003H. The data stored at the address C002H is low data at the retransmission start address of the line number 1, and the data stored at the address C003H is high data at the retransmission start address of the line number 1, and the line number 1 is stored. Start address (for memory where encoded data is stored) is 8407H
It is. Similarly, line number 2, line number
3, the start address where the line number 4 is stored (for the memory where the encoded data is stored)
Are 840EH, 8415H and 841CH.

Furthermore, as described above, since the memory area for storing the retransmission start address is 1024 bytes, 512 retransmission start line numbers can be stored. The 513th line number is stored in the LINO (address C000H). Thus, the past 512 line numbers are stored.

§4 Description of FIFO Memory and Pointer Controlling FIFO Memory In the transmitting apparatus, data encoded according to the present embodiment is stored in a FIFO (First-In First-Out) memory. FIFO memory capacity is from 8400H to AFFFH as described above
Up to. Here, the start address of the FIFO memory of the transmission side device is TFIFS (TRN FIFO START;
00H), the high byte at the start address of the FIFO memory of the transmitting device is TFIFSH (TRN FIFO START HIGH; 84H in this embodiment), and the last address in the FIFO memory of the transmitting device is TFIFE (TRN FIFO END; this embodiment). In
AFFFH), the high byte at the last address of the FIFO memory of the transmission side device is called TFIFEH (TRN FIFO END HIGH; AFH in this embodiment).

In the transmitting apparatus, the data read by the reading means is stored in the FIFO memory of the transmitting apparatus after being encoded, and a pointer is used to control the FIFO memory. The pointer used for this is
Called TMHPTR (TRN MH POINTER). Also, the FI on the transmitter side
The data stored in the FO memory is modulated by the modulator and then sent out to the line sequentially. Here, however, a pointer for controlling the FIFO memory is required. The pointer used for this is called TMDPTR (TRNMODEM POINTER).

On the other hand, in the receiving device, the data sent from the transmitting device is stored in the memory. This memory is a FIFO (First-In First-Out) memory, like the transmitting side device. The capacity of the FIFO memory of the receiving side device is also set to 8400H to AFFFH, similarly to the transmitting side device.

Here, the head address in the FIFO memory of the receiving side device is RFIFS (REC FIFO START; in this embodiment, 8400
H), the high byte of the first address in the FIFO memory of the receiving device is RFIFSH (REC FIFO START HIGH; 84H in this embodiment), and the last address in the FIFO memory of the receiving device is RFIFE (REC FIFO END; this embodiment). AF in
FFH), the high byte of the final address in the FIFO memory of the receiving device is called RFIFEH (REC FIFO END HIGH; AFH in this embodiment).

In the receiving device, the data sent from the transmitting device is demodulated by the demodulator and then stored in the FIFO memory. When storing the demodulated data in the FIFO memory, a pointer is used.
DEM POINTER). The data stored in the FIFO memory is sequentially read, decoded, and recorded. FIFO
The pointer is also used when sequentially reading and decoding the data stored in the memory.
Called TR (REC MH POINTER).

§5 Configuration for selecting error retransmission mode from transmission side device (using FIGS. 11 and 12) Two methods are employed as a method for selecting an error retransmission mode from the transmission side device. The first is a method of selecting an error retransmission mode using a switch or the like. That is,
It is assumed that the error retransmission mode is selected when a specific switch is on.

A second method of selecting the error retransmission mode is to continuously press the start button of the transmitting device. That is, the error retransmission mode is selected by pressing the start button continuously for 2.5 seconds or more, and the operator knows that the error retransmission mode has been selected by the generation of a "beep" sound.

When the start button of the transmitting apparatus is continuously pressed for 5 seconds or more, the G2 mode is selected, and the operator knows that the G2 mode has been selected by the generation of the "p" and "p" sounds.

In this embodiment, image transmission in the error retransmission mode is performed at a transmission speed of 4800b / S. Therefore, when the transmission side apparatus selects the error retransmission mode, if the reception side apparatus has the function of the error retransmission mode, the transmission in the error retransmission mode is performed. However, if the receiving apparatus does not have the function of the error retransmission mode, the transmission speed is reduced to 4800b / S instead of 9600b / S and transmission is started.

FIG. 11 is a block diagram showing the configuration of the transmission side of the facsimile apparatus according to the present embodiment. In the figure, reference numeral 67 denotes a network control unit (NCU), which is used to use the telephone network for data communication and the like. It connects to a line terminal to control connection of the telephone exchange network, switches to a data communication path, and holds a loop. 67a is a telephone line.

Reference numeral 68 denotes a hybrid circuit that separates a transmission system signal and a reception system signal. The transmission signal on signal line 71a is signal line 6
The data is transmitted to the telephone line 67a via the network controller 7b and the network controller 67. Further, a signal sent from the other party's facsimile machine is sent out to the signal line 68a via the network control unit 67.

Reference numeral 69 denotes a binary signal transmission circuit which inputs data on the signal line 76a when a pulse is generated on the signal line 76b,
The 21-modulated data is output to a signal line 69a.

Numeral 70 denotes a tonal signal transmission circuit, which inputs a signal on the signal line 76c when the data on the signal line 76d is at the signal level "1". If the input data is "1", the tonal signal of 462Hz, if "2", the tonal signal of 1080Hz, if "3", the tonal signal of 1650Hz, if "4", the tonal signal of 1850Hz, If "5", a 2100 Hz tonal signal is output to the signal line 70a.

Reference numeral 71 denotes an addition circuit, which inputs the signal on the signal line 69a and the signal on the signal line 70a, and outputs the result of the addition to the signal line 71a.

Reference numeral 72 denotes a tonal signal detection circuit, which inputs a signal on the signal line 68a to detect a 462 Hz signal, and outputs a "1" signal to the signal line 72a, and detects a 1080 Hz signal to "2" on a signal line 72a. Signal is detected on the signal line 72a when the signal of 1650 Hz is detected, the signal of 4 is detected on the signal line 72a when the signal of 1850 Hz is detected, and the signal line 72a is detected on the signal line 72a when the signal of 2100 Hz is detected. To output a signal of "5".

Reference numeral 73 denotes a binary signal detection circuit which generates a pulse on a signal line 73a when detecting a binary signal and outputs demodulated binary data to a signal line 73b.

Reference numeral 74 denotes a start button, and when the start button is pressed, a signal of signal level "1" on the signal line 74a is output.

An error retransmission mode selection switch 75 outputs a signal of signal level "1" to the signal line 75a when transmission in the error retransmission mode is selected.

 76 is a control circuit.

Reference numeral 77 denotes a mode change notification sound generation circuit which generates a "p" sound when a pulse is generated on the signal line 76e.

FIG. 12 is a flowchart showing a control procedure of the control circuit 76 shown in FIG.

In step S1014, it is determined whether start button 74 has been pressed. This is determined by inputting the signal on the signal line 74a. When the start button 74 is pressed, the process proceeds to step S1016.

In step S1016, it is determined whether the start button 74 has been continuously pressed for 2.5 seconds or more. This is determined by inputting the signal on the signal line 74a. If the start button 74 is continuously pressed for 2.5 seconds or more, the process proceeds to step S1028. If the start button 74 has not been continuously pressed for more than 2.5 seconds, step S018
Proceed to.

In step S1018, it is determined whether the error retransmission mode is selected. This is determined by inputting the signal on the signal line 75a. Then, when the error retransmission mode is selected, the process proceeds to step S1022. On the other hand, when the error retransmission mode has not been selected, the process proceeds to step S1020.

Step S1020 indicates transmission of image information at 9600b / S.

In step S1022, it is determined whether the other party's facsimile machine (reception side device) has an error retransmission function. Information indicating whether or not the receiving apparatus has an error retransmission function is notified to the transmitting side by an NSF signal FIF. That is, by inputting the signals on the signal lines 73a and 73b, it is determined whether or not the receiving device has an error retransmission function. If the receiving device has the error retransmission function, the process proceeds to step S1026. On the other hand, if the receiving side apparatus does not have the error retransmission function, step S1024
Proceed to.

In step S1024, image information is transmitted at 4800b / S.

In step S1026, image information is transmitted in the error retransmission mode.

In step S1028, a "beep" sound is generated (a pulse is transmitted to the signal line 76e) to notify the operator that the error retransmission mode is selected.

In step S1030, subsequently, it is determined whether start button 74 has been continuously pressed for 2.5 seconds or more. This is determined by inputting the signal on the signal line 74a. Then the start button is continuously 2.5
If pressed for more than a second, the process proceeds to step S1032. On the other hand, if the start button is not continuously pressed for more than 2.5 seconds, the process proceeds to step S1022.

In step S1032, a "p" sound is generated (a pulse is transmitted twice to the signal line 76e) to inform the operator that the G2 mode is selected.

 In step S1034, transmission in the G2 mode is performed.

§6 Management of FIFO memory in the transmitting device (Fig. 13-
(Using FIG. 15) The management of the FIFO memory included in the transmission side device will be described below.

FIGS. 13 (1) and (2) are diagrams for explaining the relationship between the FIFO memory and various pointers. TMHPTR indicates to which address the encoded data is stored in the FIFO memory space. On the other hand, TMDPTR indicates at which address data has been modulated and transmitted to the line in the FIFO memory space. The encoder stores the encoded data from the TFIFS address, and when the encoded data is stored up to the TFIFE address, stores the next encoded data at the TFIFS address. At this time, the flag “REVRS (reverse)” is set to 1 and the encoded data is transmitted to the modem side by the FI
Stored to the last address of the FO, indicating that TMHPTR has returned to the beginning of the FIFO.

On the other hand, as processing on the modem side, the encoded data from the TFIFS address is sequentially read out, modulated, and then transmitted to the line. Then, the data stored at the TFIFE address is read, modulated, and transmitted to the line.
The data stored at the address is read, modulated, and transmitted to the line. At this time, the flag “REVRS (reverse)” is set to “0” and the encoding is performed by the FIFO.
Of the data at the last address and transmission to the line is completed, and the TMDPTR returns to the top of the FIFO.

The main operation of the FIFO management in the transmitting device is as follows.

When the line number changes, the address storing the encoded data corresponding to the line number is stored in the memory storing the retransmission start line number.

Ensure that the modem pointer, TMDPTR, does not overtake the encoder pointer, TMHPTR.

The encoder pointer TMHPTR goes around the FIFO memory so that it does not come too close to the modem pointer TMDPTR. (Retransmission is performed when a reception error occurs on the receiving side, but data for retransmission is left in the FIFO memory. To save).

Since the above has already been described with reference to FIG. 10, the description is omitted here.

Next, the above will be described. Modem pointer
To prevent TMDPTR from overtaking the encoder pointer TMHPTR, a fill is sent when the modem pointer TMDPTR approaches the encoder pointer TMHPTR.
Here, when encoding the read data, the EOL is composed of 2 bytes and is 00H and 80H data (see FIG. 10). As an example of the control of such items, the following actual examples can be considered.

If the modem pointer TMDPTR detects data 00H and 80H while transmitting data in the FIFO memory, the REVRS (reverse) flag is checked. When the REVRS (reverse) flag is 0, (high address in the encoder pointer TMHPTR)
-(High address in modem pointer TMDPTR) <
2 is determined, and when the above condition is satisfied, a fill is transmitted. When the above condition is not satisfied,
That is, (the address in the encoder pointer TMHPTR)-
(High address in modem pointer TMDPTR) ≧ 2
In this case, the data stored in the FIFO memory is transmitted with the pointer TMDPTR of the modem incremented sequentially.

On the other hand, when the REVRS (reverse) flag is 1, first, the high address in the modem pointer TMDPTR is TF
It is determined whether it is equal to IFEH (the byte at the last address of the FIFO). When the high address in the modem pointer TMDPTR is not equal to TFIFEH, the data stored in the FIFO memory is transmitted by sequentially incrementing the modem pointer.

When the modem pointer TMDPTR is equal to TFIFEH, (the high address in the encoder pointer TMHPTR)
It is determined whether or not TFIFSH <1, and if the above condition is satisfied, a fill is transmitted. If the above condition is not satisfied, that is, (high address in the encoder pointer TMHPTR)
If TFIFSH ≧ 1, the data stored in the FIFO memory is transmitted by sequentially incrementing the pointer TMDPTR of the modem.

In the above case, even in the case where the fill is transmitted, the encoding is completely completed (actually, the encoding side sets the flag MHEND to 1 when the encoding is completed. By checking, it is possible to recognize whether or not all the encoding is completed.)
TR is sequentially incremented and the data stored in the FIFO memory is transmitted.

When transmission of all the encoded data is completed, an RTC (Return To Control) signal is transmitted. This RT
C also adds the last transmitted line number after EOL. 103 EOLs are transmitted.

Next, the above will be described. FIG. 14 shows the number of bits and bytes transmitted in three seconds at each transmission speed. That is, the encoder pointer TMHPTR needs to be separated from the modem pointer TMDPTR by 3600 bytes or more in order to enable retransmission up to a delay of 3 seconds in a round trip.

FIG. 15 shows the relationship between the FIFO memory and various pointers. In this embodiment, when incrementing the high address in the encoder pointer TMHPTR, the modem pointer
In comparison with TMDPTR, control is performed such that the pointer TMHPTR of the encoder is at least 4096 bytes away from the pointer TMDPTR of the modem. A specific example of the control will be described below.

When incrementing the high address in the encoder pointer TMHPTR, the REVRS (reverse) flag is checked. When the REVRS (reverse) flag is 0, it is determined whether or not {TFIFEH- (high address in encoder pointer TMHPTR)} + {(high address in modem pointer TMDPTR) -TFIFSH} <16. When the condition is satisfied, the encoding is interrupted and a wait state is set. If the above condition is not satisfied, that is, {TFIFEH− (high address in encoder pointer TMHPTR)} + {(high address in modem pointer TMDPTR) −TFIFSH} ≧ 16, encoding is performed.
Store the encoded data in the FIFO memory.

On the other hand, when the REVRS (reverse) flag is 1, (high address in modem pointer TMDPTR)-
(High address in encoder pointer TMHPTR)
It is determined whether or not <16, and if the above condition is satisfied, the encoding is interrupted and a wait state is set. When the above condition is not satisfied, that is, (High address in modem pointer TMDPTR)-
(High address in encoder pointer TMHPTR)
If ≧ 16, encoding is performed, and the encoded data is stored in the FIFO memory.

§7 Validity of the memory capacity for storing the retransmission start address In this embodiment, the memory area for storing the retransmission start address is 1024 bytes. Therefore, 512 retransmission start addresses can be stored. That is, the past 51
Retransmission of two line numbers is possible. Here, when one line is encoded, the shortest data is 1
This is when the line was completely white. As described above, the number of bytes when all white lines are encoded is 7 bytes. Since the one line number is incremented for each line, the minimum byte number of one line number is seven. And considering retransmission for 512 line numbers,
A minimum of 3584 bytes is required. At this time, if the transmission speed is 4800b / S, 3584 (bytes) ÷ 600 (bytes / second) ≒ 6 (seconds), and as described above, 3 seconds is set as the time to allow the delay on the line. The retransmission start address is 512
It is sufficient to store the data in a memory having a capacity of one.

§8 Control after sending all image information from the transmitting side device When all encoding of the transmission original is completed, a control return signal (RTC; Return to Control) signal is written to the FIFO memory. This RTC has 103 EOLs. And EO
Following L, the last transmitted line number is added. The EOL here is composed of 12 bits in which 11 “0” s follow and “1” follows.

The transmission time of the above-mentioned RTC is 0.6 seconds at 4800b / S, and 1.2 seconds at 2400b / S.

Generally, when performing error retransmission, the line quality is often poor. For this reason, it is expected that RTC detection will be impossible if the conventional EOL signal is set to six. Therefore, the number of RTC signals is set to 103 EOL,
C signal can be detected without fail.

Actually, even when the transmission of the RTC signal from the modem ends, the transmission does not immediately proceed to the transmission of the procedure signal. In this embodiment, the delay of the international circuit is 1.2 seconds,
One second is considered as the detection time of the ACK signal (PIS signal). Then, after the transmission of RTC ends, 1.5 seconds later, SE
If D = 0, it is determined that the PIS signal has not been transmitted from the receiving side, and the procedure proceeds to transmission of the procedure signal. Specifically, EOM / MPS / EOP / PRI-EOM / PRI-MPS / PRI-EOP
Is used.

Also, after the transmission of the RTC signal ends, 1.5 seconds later, SE
If D = 1, go to search for PIS signal. If a PIS signal is detected within two seconds, error retransmission is performed. If the PIS signal is not detected after 2 seconds, the procedure proceeds to sending the procedure signal.

§9 Conditions for making a retransmission request from the receiving device and conditions for making a fallback request (using FIG. 16) There are three cases described below as cases where a retransmission request is made from the receiving device.

When an image error occurs continuously for three or more lines, when a training signal fails to be received, after entering the image receiving mode, a certain period of time (for example, 24
When the EOL signal cannot be detected for more than 4.5 seconds for 00b / S and 3.5 seconds for 4800b / S).

In addition, a request for fallback is made when "retransmission is performed three times during transmission of one document". However, if error-free data has been received for a certain number of bytes or more (for example, 127 bytes) or more, the counter for counting the number of retransmissions is cleared.

The flowchart shown in FIG. 16 shows a control procedure of image reception focusing on a case where a retransmission request is made and a case where a fallback request is made. The retransmission request / fallback operation will be described in detail with reference to FIG.

Step S1036 represents the image receiving state. Before image reception, a counter for counting the number of times of transmission of the NSF signal and a retransmission counter indicating the number of retransmissions during reception of one document are cleared.

In step S1038, it is determined whether the training reception has been successful. Successful reception of the training means that the confirmation of SED = 1, the confirmation of CD = 0 (length of about half the training time), and the confirmation of CD = 1 have been correctly performed. If the training reception is successful within 3.5 seconds, the process proceeds to step S1040. On the other hand, if training reception has not succeeded within 3.5 seconds, the process proceeds to step S1078.

Normally, the training reception ends within 3.5 seconds.
Therefore, if the training does not end within 3.5 seconds after starting the training reception, it is determined that the training reception has failed. As described above, in the present embodiment, it is possible to immediately determine that the training reception has failed. Therefore, after that, error retransmission or transmission of an NSF signal (which may be a DCN signal) becomes possible.

The selection of whether to perform error retransmission or to transmit an NSF signal (when a NSF signal is transmitted three times, a DCN signal is transmitted) will be described later.

In step S1040, since the training reception was successful, the counter that counts the number of times the NSF signal has been transmitted is cleared. When performing error retransmission, the receiving device
The NSF signal is transmitted following the signal. The NSF signal includes information such as a retransmission start line and the presence / absence of fallback. When the NSF signal is correctly received by the transmitting apparatus, retransmission is performed from the retransmission start line after performing control such as fallback.

However, when the transmitting device cannot correctly receive the NSF signal, the process proceeds to receiving the NSF signal again. On the other hand, after transmitting the NSF signal, the receiving device proceeds to receive the training signal. However, since the transmitting device has not sent the training signal, the training reception is unsuccessful. At this time, the receiving device determines whether SED = 1 has been detected within 3.5 seconds (step S1078). In this case, since the training signal has not been transmitted, SED is "0".
It is. Then, the receiving-side device goes back to sending the NSF signal again. The counter is for counting this number.

If the training signal is not transmitted from the transmitting side even after transmitting the NSF signal three times, the DCN signal is transmitted to disconnect the line.

Steps S1042 to S1046 represent an image receiving state.

In step S1042, it is determined whether or not a continuous error of three or more lines has occurred. These three lines are merely an example, and can be set to any other value. Further, it is possible to automatically change the number of lines according to the fineness of the received image.

If three or more consecutive errors have occurred, the process advances to step S1052 to perform error retransmission. On the other hand, if a continuous error of three or more lines has not occurred, step S104
Proceed to 4.

In step S1044, between a (when 2400 b / S, a
= 4.5 seconds, a = 3.5 seconds at 4800b / S)
It is determined whether a signal is detected. If the EOL signal has not been detected for a second, the process proceeds to step S1056 to perform error retransmission. If the EOL signal has been detected within a seconds, the process proceeds to step S1046. This a second is determined based on the longest transmission time of one line at each transmission speed. This makes it possible to perform error retransmission even when training reception is successful but correct data is not demodulated.

In step S1046, RTC (Return to Control)
It is determined whether a signal has been detected. Upon detecting the RTC signal, the process proceeds to step S1048. On the other hand, if no RTC signal has been detected, the process proceeds to step S1042.

 Step S1048 represents a post procedure.

Step S1050 is when the time is over during reception of one document (T = 16 minutes), which indicates an error.

In step S1052, it is determined whether correct data of a certain number of bytes or more has been received. When the characteristics of the line are in a steady state, image reception is good, but if an error occurs due to infrequent impulse noise, correct data of a certain number of bytes or more has already been received. Become.

In such a line condition, an error occurs again even if fallback is performed on the transmission side. Therefore, in such a case, it is more appropriate not to make useless fallback. That is, if correct data of a certain number of bytes or more has been received first, the process proceeds to step S1054, and the retransmission counter is cleared. If correct data of a certain number of bytes or more has not been received yet, the process proceeds to step S1056, and the retransmission counter is not cleared.

In step S1056, a PIS signal is transmitted to interrupt transmission on the transmission side.

In step S1058, the retransmission counter is incremented by one.

In step S1060, it is determined whether the signal has arrived (that is, whether SED = 1). SED
If = 1, the process proceeds to step S1062. In this case,
This is a case where the transmitting device does not correctly receive the PIS signal transmitted in step S1056. On the other hand, when SED = 0, the process proceeds to step S1064.

In step S1062, the PIS signal is transmitted again.

In step S1064, it is determined whether the count value of the retransmission counter is 3 or more (that is, whether fallback is performed). The count value of the retransmission counter is 3
In the above cases (ie, when performing fallback)
Proceeds to step S1066. If the count value of the retransmission counter is less than 3 (that is, if fallback is not performed), the process proceeds to step S1074.

In step S1066, the current transmission speed is 240
It is determined whether it is 0b / S. The current transmission speed
At 2400b / S, it is not possible to perform fallback any more, so after transmitting the DCN signal (step S106
8), the processing ends with an error (step S1070). On the other hand, if the current transmission speed is not 2400b / S, the process proceeds to step S1072.
Go to and specify a fallback.

In step S1074, an NSF signal including information on the presence / absence of a retransmission start line / fallback is transmitted.

In step S1076, the counter for counting the number of times the NSF signal is transmitted is incremented by one, and the process proceeds to the reception of the image signal.

Step S1078 is a block that branches when training reception fails. If the reception of the training signal after transmitting the CFR signal fails, error retransmission is performed. However, if the training signal reception after sending the NSF signal after performing the error retransmission once fails,
Error retransmission is performed, and NSF / DCN signal is transmitted.

That is, when the NSF signal is not correctly received by the transmitting device (when the transmitting device does not transmit the training signal; YES in step S1078, step S1080
Is YES), the NSF signal is retransmitted. On the other hand,
If the reception is not successful in the receiving device (NO in step S1078), error retransmission is performed. Here, SED = 1 in step S1078 indicates that it is determined that the training signal has arrived. If SED = 1 is detected in step S1078 (that is, if the training signal has arrived), the process proceeds to step S1056. On the other hand, in step S1078, SE
If D = 1 cannot be detected (that is, if the training signal has not arrived), the process proceeds to step S1080.

In step S1080, it is determined whether the NSF signal for retransmission has been transmitted immediately before. If the NSF signal for retransmission has been transmitted immediately before, the process proceeds to step S1082. If the NSF signal for retransmission has not been transmitted immediately before, the process proceeds to step S1056.

In step S1082, it is determined whether the retransmission of the NSF signal has already been performed three times. When the re-transfer of the NSF signal is performed three times, after transmitting the DCN signal (step S1084),
The process ends with an error (step S1086). If the NSF signal has not been retransmitted three times, the process advances to step S1064 to retransmit the NSF signal.

§10 Configuration of NSF signal (using Fig. 17) The receiving side device has a memory area to store the latest received line number. At the time of initialization, the data of 0101H is stored.

Each time the decoder detects EOL, it checks the next two bytes of data, that is, the line number. And
If the line number received this time is incremented by less than 3 compared to the line number received correctly last time, it is determined that the received image is “good”. In other words, an image error of less than three lines is determined to be "good" in reception. This line number is stored in memory and updated each time it is detected.

On the other hand, if the line number received this time has been incremented by three or more from the line number received correctly last time, a NACK signal is sent. In this embodiment, a PIS signal (a signal in which a 462 Hz signal is made continuous for 3 seconds) is transmitted. That is, when an image error of three or more lines occurs, the received image is determined to be defective, and a request for error retransmission is made. Therefore, after transmitting the PIS signal, the retransmission start line number and the presence / absence of fallback are notified to the transmitting side device using the 300b / S signal.

FIG. 17 shows an example of a 300b / S signal transmitted from the receiving device to the transmitting device. In this figure, the preamble is a continuous “0111 1110” pattern for about 1 second, FFH is address data, 13H is control data (LSB data
The line is transmitted in the order of MSB data), 20H is the NSF FCF
(Facsimile control field).
Further, the line number transmitted thereafter is data focusing on the lower 9 digits of the line number, and ranges from line number 0 to line number 511. The line number sent at this time is determined by the LS of each byte data.
Do not set B to 1. For example, the line number 0 is 00H, 00H.

The next byte data indicates the presence or absence of fallback. Specifically, at 00H, no fallback is specified and FFH
In the case of, fallback is specified.

FCS is the frame check sequence, FLAG is “0111 11
10 ".

In decoding at the time of image reception, 2-byte data (that is, line number) following EOL is ignored.

§11 Operation of transmitting device when NACK signal is received (using Fig. 18) The transmitting device reads the information of the original by the reading means, encodes the data by the encoder, and encodes the data by the modem. Is modulated and transmitted to the line.
At this time, the NACK signal (the PIS signal in this embodiment) is monitored. And, when the NACK signal is not detected,
Image information is transmitted, and when a NACK signal is detected, the image information transmission is interrupted. Then, it proceeds to the reception of the 300b / S signal. As described above, the line number (lower 9 digits) at which retransmission is started and information on the presence or absence of fallback are stored in this 300b / S.

When the transmitting device detects the retransmission start line number,
Address in the encoder pointer TMHPTR of the transmitting device, modem pointer TMDPTR in the transmitting device
, The REVRS (reverse) flag, and the retransmission start address are checked, and various controls are performed based on the results. As the control example, the following three cases can be considered.

In the first case, when the REVRS flag is 0 and the encoder pointer TMHPTR in the transmitting device is larger than the modem pointer TMDPTR in the transmitting device, and the modem pointer TMDPTR in the transmitting device is larger than the retransmission start address. It is. FIGS. 18 (1) to 18 (3) show three cases in which a retransmission start address is recognized and retransmission is performed. The first case described here is shown in Figure 18 (1)
Is shown in FIG. In this case, the retransmission start address is set in the modem pointer TMDPTR in the transmitting device,
Resend from the line number.

The second case is illustrated in FIG. 18 (2). That is, the case where the REVRS (reverse) flag is 1 and the pointer TMDPTR of the modem in the transmitting device is larger than the pointer TMHPTR of the encoder in the device.
In this case, the pointer TM of the modem in the transmitting device
The retransmission start address is set in DPTR, and retransmission is performed from the line number. Here, when the encoder pointer TMHPTR in the transmitting apparatus is larger than the retransmission start address, it is determined that an error has occurred, and for example, a DCN signal or the like (300 b / S) is transmitted without transmitting image information. , Release the line.

The third case is illustrated in FIG. 18 (3). That is, when the REVRS (reverse) flag is 0 and the encoder pointer TMHPTR in the transmitting device is larger than the modem pointer TMDPTR in the transmitting device, the retransmission start address pointer is larger than the modem pointer TMDPTR in the transmitting device. Is the case. In this case,
The retransmission start address is set in the modem pointer TMDPTR in the transmitting device, and retransmission is performed from the line number. Also, 1 is set to the REVRS flag. Here, if the encoder pointer TMHPTR in the transmitting apparatus is larger than the retransmission start address, it is determined that an error has occurred, and a DCN signal or the like (300b / S) is transmitted without transmitting image information, and the line is released. .

When an instruction to perform fallback is received, fallback is performed and image information is transmitted. Also, if a DCN signal is detected following the PIS signal, the line is opened,
Error termination.

§12 Explanation of the block diagram of the transmitting device (Fig. 19 and
FIG. 19 is a block diagram showing the configuration on the transmitting side of a facsimile apparatus to which the present invention is applied.

In FIG. 19, reference numeral 2 denotes a network controller for holding a loop.
An NCU (Network Control Unit), which is used to control the connection of the telephone exchange network by connecting to the terminal of the line or to switch to the data communication path in order to use the telephone network for data communication and the like.

 2a is a telephone line.

Reference numeral 4 denotes a hybrid circuit that separates a transmission system signal and a reception system signal. The transmission signal on the signal line 28a is transmitted to the telephone line 2a through the signal line 2b and via the network control device 2. The signal sent from the other party's facsimile machine is output to the signal line 4a after passing through the network control device 2.

Reference numeral 6 denotes a circuit for detecting a retransmission request signal (a PIS signal is used in this embodiment) transmitted from the receiver. That is, the signal of the signal line 4a is introduced, and when the retransmission request signal (the PIS signal in this embodiment) is detected, the signal of the signal level "1" is output to the signal line 6a. on the other hand,
When the signal on the signal line 4a is introduced and a retransmission request signal (PIS signal in this embodiment) is not detected, a signal of signal level "0" is output to the signal line 6a.

Reference numeral 8 denotes a 300b / S signal (in this embodiment, an NSF signal is used; in which a retransmission start line number and fallback presence / absence information are transmitted after the retransmission request signal is received from the receiving side device; Disconnection command (DCN) signal (3) transmitted following the retransmission request signal
00b / S). When detecting the NSF signal, the binary signal receiving circuit 8 generates a pulse on the signal line 8a and outputs a retransmission start line number on the signal line 8b. Then, fallback presence / absence information (0 → not fallback, 1 → fallback) is output to the signal line 8d. When detecting the DCN signal, the binary signal receiving circuit 8 generates a pulse on the signal line 8c.

A reading device 10 reads an image signal for one line in the main scanning line direction from a transmission document and creates a signal sequence representing a binary value of white or black. The reading device 10 includes an imaging device such as a CCD (Charge Coupled Device) and an optical system. Signal line 12
When a pulse is generated at a, that is, when there is a request to read the image signal of one line, the image signal of one line is read, and
The digitized data is output to the signal line 10a.

Reference numeral 12 denotes a double buffer circuit for writing an image signal of the next line in the other buffer memory while an image signal in one buffer memory is being encoded. Two buffers are BUF0 (buffer 0), BUF
Called 1 (buffer 1). When image data is clogged in the buffer of BUF0, a signal of signal level "1" is output to the signal line 12b (buffer 0 full). When image data is not clogged in the buffer of BUF0, signal line 12
A signal of signal level “0” is output to b (buffer 0 full). When the image data is clogged in the buffer of BUF1, a signal of signal level "1" is output to the signal line 12c (buffer 1 full). When the image data is not clogged in the buffer of BUF1, the signal line 12c (buffer 1
Full), a signal of signal level “0” is output.

After confirming that the buffer is full, the control circuit 30 described later designates a buffer to be read next on the signal line 30b.
(When the signal line 30b is at the signal level "0", the data in the buffer 0 is read; when the signal line 30b is at the signal level "1", the data in the buffer 1 is read), and thereafter , A pulse (read pulse) is generated on the signal line 30a.

This double buffer circuit 12 outputs data of a designated buffer to a signal line 12d. Then, when the data of the designated buffer has been output to the signal line 12d, the buffer full of the designated buffer is dropped. That is, the signal line
The signal level output to 30b is “0” (buffer 0
When a (read) pulse is generated on the signal line 30a and all the data in the buffer is output, the buffer full 0 is dropped (that is, a signal of the signal level "0" is output on the signal line 12b). ). When the signal level output to the signal line 30b is “1” (buffer 1 specified), a (read) pulse is generated on the signal line 30a, and all data in the buffer is output, the buffer full 1 (That is, a signal of signal level “0” is output to the signal line 12c).

When the buffer becomes empty, the double buffer circuit 12 generates a pulse on the signal line 12a, and inputs one line of data in the main scanning direction from the reading device 10. In this case, the data is stored in an empty buffer, and at the same time, 1 is set to the buffer full storing the data. The read data is stored alternately with buffer 0, buffer 1, buffer 0, and buffer 1.

Reference numeral 14 denotes a counter for counting a line number inserted after the line end code (EOL). Signal line 30c
When a pulse is generated, the line number is set to 0 (0101H)
Set to. Then, every time a pulse is generated on the signal line 30d, the value of the line number is incremented. That is, when a pulse is generated in the signal 30d while the line number is 0 (0101H), the line number becomes 1 (0103H). The same applies hereinafter. The line number 2
The byte data is output to the signal line 14a.

Reference numeral 16 denotes one line of the binarized data output to the signal line 30e, and encodes (in the present embodiment, modified Huffman coding) data into a signal line 16c.
Circuit. A pulse is generated on the signal line 16a when binary data of one line is input and the number of bits at the time of encoding becomes eight, that is, when one byte of encoded data is completed. . On the other hand, when the encoding of one line is completed, the signal line 16b is set to (end).
Generate a pulse. When encoding of one line is completed,
If the last data is less than 8 bits, the remaining data is set to 0, and the processing is performed assuming that the data has all 8 bits.

Reference numeral 18 denotes a FIFO memory used to store line data read and encoded. On the other hand, the modem reads out the data stored in the FIFO memory, modulates the data, and sends out the modulated data. From signal line 30f, signal line 3
The encoded data is written to the FIFO memory by three signal lines of 0h. When a (write) pulse is generated on the signal line 30f, the byte data output on the signal line 30h is stored at the address output on the signal line 30g. The data stored in the FIFO memory is read out by three signal lines, i.e., the signal line 30i, the signal line 30j, and the signal line 18a.
When a (read) pulse occurs on signal line 30i, signal line 3
The data at the address output to 0j is output to the signal line 18a. In the present embodiment, the FIFO memory is
It has an address of FH.

Reference numeral 20 denotes a retransmission start address storage memory, whereby when a receiving error occurs on the receiving side, the transmitting apparatus retransmits from the line number where the error has occurred. When the transmitting apparatus retransmits from a certain line number, it is necessary to recognize from which address in the FIFO memory the data of the line number is stored. This data is stored in this memory. Signal line 30k, signal line 30l,
Using the signal line 30m, "The data of a certain line number is F
From which address of the IFO memory is stored "to the memory 20. When a (write) pulse is generated on the signal line 30m, the byte data of the signal line 30l is written to the address output on the signal line 30k. Store and signal line 3
By using 0k, the signal line 30n, and the signal line 20a, information indicating "from which address in the FIFO memory data from a certain line number is stored" is read from the main memory 20.

When a (read) pulse is generated on the signal line 30n, the data of the address output on the signal line 30k is transferred to the signal line 2n.
Output to 0a. Retransmission start address storage memory is C000H
To C3FFH. The storage memory configuration of the retransmission start address is as shown in FIG.

As shown in FIG. 20, addresses C000H, C001H store addresses of line numbers 0, 512,.
002H and C003H store addresses of line numbers 1,513 ..., and addresses C004H and C005H store line numbers 2,514.
… Are stored, and similarly, the address C3FCH,
The addresses of the line numbers 510, 1022... Are stored in C3FDH, and the line numbers 511, 102 are stored in the addresses C3FEH and C3FFH.
Addresses 3 ... are stored.

Reference numeral 22 denotes a parallel-serial conversion circuit (hereinafter, abbreviated as a P / S conversion circuit) that converts parallel data into serial data. When the parallel data becomes empty, the P / S conversion circuit 22 generates a byte data request pulse on the signal line 22a. When a pulse is generated on the signal line 22a, the control circuit 30 outputs byte data to the signal line 300. On the other hand, the P / S conversion circuit 22 receives the byte data output to the signal line 300, performs parallel-serial conversion, and then outputs the serial data to the signal line 22b.

Reference numeral 24 denotes a modulator that performs modulation based on the known CCITT recommendation V27ter (differential phase modulation). This modulator 24 is a signal line
The signal of 22b is input and modulated, and the modulated data is
Output to 4a.

26 is a signal line 26a when a pulse is generated on the signal line 30p.
This is a circuit that sends out a DCN signal (300b / S signal). When the transmission of the DCN signal ends, the DCN signal transmission circuit 26
A pulse is generated on the signal line 26b.

28 inputs the signal of the signal line 24a and the signal of the signal line 26a,
This is an addition circuit that outputs the result of the addition to the signal line 28a.

Reference numeral 30 denotes a control circuit, which is described in the following items §12 and §
Details are described in Section 13.

§13 Schematic operation explanation of the control circuit in the transmitting device (No.
The control circuit 30 shown in FIG. 19 performs the control described below. However, encoding is performed according to a main routine, and signal transmission is performed according to an interrupt routine.

The encoding by the control circuit 30, that is, the control process in the main routine is as shown in FIG. First, the pointer TMDPTR of the modem and the pointer TMHPTR of the encoder are set to the head address of the FIFO memory for storing the encoded data (step S100). And
It is determined whether reading of the image information of one main scanning line is completed, that is, whether the line buffer is full (step S102).

When reading of the image information of the main scanning line in one line is completed (that is, when the line buffer becomes full), the process proceeds to step S104. Then, data of one line is read (step S104). Here, as described above, the buffer has a double buffer configuration of the buffer 0 and the buffer 1, and data is read alternately from these two buffers.

After reading data from each buffer, it encodes and writes the encoded data to FIFO memory (step
S106). The main control at the time of encoding is shown below in a bulleted list.

1. Write the encoded data to the FIFO memory.

2. Write the line end code (EOL signal) (the data to be written to the FIFO memory is 00H and 80H) and the line number to the FIFO memory.

3. When a receiving error occurs in the receiving device, the transmitting device retransmits data from the erroneous line number. The following control is performed to enable this retransmission.

That is, when incrementing the byte in the encoder pointer TMHPTR, the encoder pointer TM
The HPTR goes around the FIFO memory around the modem pointer TMDPTR and controls it so that it does not get too close. Specifically, the pointer TMHPTR of the encoder is changed to the pointer TMDPTR of the modem.
, When it approaches a certain degree or more, the coding is interrupted and a wait state is set. And when you are waiting,
It checks whether a PIS signal has been detected or not, and if a PIS signal is detected, receives an NSF signal. Then, the pointer of the modem is set to the retransmission start address, and retransmission is performed from the data. When performing this retransmission, training is performed again. This is the same as the control from step S108 to step S112 described later.

4. When resending from a certain line number, it is necessary to recognize from which address in the FIFO memory the data of the line number is stored. This information is stored in the retransmission start address storage memory.

Then, when the encoding of a certain line is completed, it is determined whether or not a retransmission request signal, that is, a PIS signal has been detected (step S108). When the retransmission request signal, that is, the PIS signal is detected, the transmission of the image information is interrupted, and the NSF signal is received (step S110). Here, when a fall-back instruction is issued, the transmission speed of the modem is reduced to fall back. If a DCN signal is received, the processing ends with an error.

Next, set the modem pointer TMDPTR to the retransmission start address (this information is contained in the NSF signal),
Retransmission is performed from the data (step S112).

Thereafter, it is determined whether the encoding of one document has been completed (step S114). If the encoding of one document has not been completed, the process returns to step S102. If the encoding of one document has been completed, the process proceeds to step S116.

When encoding of one document is completed, it is determined whether or not unencoded data remains in the double buffer memory (step S116). If uncoded data remains in the double buffer memory, the process returns to step S102. If no unencoded data remains in the double buffer memory, the process proceeds to step S118, and the control return signal RTC (Return To Control
ol) to the FIFO memory.

After that, it waits for the data stored in the FIFO memory to be transmitted by the modem. After the transmission of the data stored in the FIFO memory is completed, the wait is performed for 1.5 seconds. If SED = 0 at that time, the procedure proceeds to the post-procedure (step S122). On the other hand, if SED = 1, it means that the PIS signal has been transmitted from the receiving side device, so that error retransmission is performed toward detection of the PIS signal (step S120).

On the other hand, the transmission processing (that is, the interrupt processing) includes: (a) modulating the data stored in the modem pointer TMDPTR and transmitting the data to the line; (b) sequentially incrementing the modem pointer TMDPTR; Modem pointer TMDPTR is encoder pointer
The main content is to control so as not to overtake TMHPTR.

§14 Detailed operation of the control circuit in the transmitting device (using FIGS. 22 and 23) A control procedure (main processing) performed by the control circuit 30 with reference to the flowcharts shown in FIGS. 22 (1) to (12) That is, the encoding processing procedure) will be described.

First, various initialization processes are performed in steps S128 to S144.

In step S128, a flag TRNEND indicating whether or not all of the encoded data stored in the FIFO memory has been transmitted.
Is set to 0.

In step S130, C000H is set in the pointer AGAPTR that controls the memory that stores the retransmission start address.

In step S132, the encoder pointer TMHP
Set TR to 8400H.

In step S134, the pointer TMDPTR of the modem is
Set 8400H.

The line number is incremented every certain number of lines (one line in this embodiment), and this control is controlled by a counter called LINCNT. Step S136
, The counter LINCNT is set to 1.

In step S138, the aforementioned REVRS flag is set to 0.
Is set.

In step S140, 0 is set to a flag MHEMD indicating whether or not encoding has been completed.

In step S142, 0 is set to a flag BAF indicating from which buffer data is currently being read. When the flag BAF is 0, data is read from the buffer 0. When the flag BAF is 1, data is read from the buffer 1.

In step S144, the line number is initialized.

In steps S146 to S154, it is determined whether the buffer is full, that is, whether or not reading of one line has been completed.
Proceed to S156. Here, the data in the buffer is buffer 0,
Read alternately with buffer 1.

In steps S156 to S160, one line of data is read from the double buffer and output to the encoder.

Steps S162 to S182 shown in FIG. 22 (2)
In this case, the retransmission start address storage memory stores from which address in the FIFO memory the data of the specific line number is stored so that retransmission is performed from the data of the specific line number. Here, when the line number changes, the retransmission start address is stored in the retransmission start address storage memory.

In step S162, control is performed to increment the line number for each line. In steps S164 to S168, the low byte data at the retransmission start address is stored in the retransmission start address storage memory.

In step S170, the retransmission start address pointer
AGAPTR is incremented. In steps S172 to S176, the high byte data at the retransmission start address is stored in the retransmission start address storage memory. In step S178, the retransmission start address pointer AGAPTR is incremented. In step S180, it is determined whether or not the retransmission pointer AGAPTR has reached the end of the retransmission start address storage memory. When the retransmission pointer AGAPTR advances to the end of the retransmission start address storage memory, C000H is set in the retransmission pointer AGAPTR (step S182).

Steps S184 to S188 shown in FIG. 22 (3)
In, 00H is stored in the FIFO memory.

In step S190, the encoder pointer TMHP
Increment TR. The increment of TMHPTR will be described later.

In steps S192 to S196, 800H is stored in the FIFO memory.

In step S198, the encoder pointer TMHP
Increment TR.

In steps S200 to S216, the line number is input, and the line number is stored in the FIFO memory. That is, in step S200, a line number is input. In steps S202 to S206, the high byte data of the line number is stored in the FIFO memory. In step S208, the pointer TMHPTR of the encoder is incremented.

Steps S210 to S214 shown in FIG. 22 (4)
, The low byte data of the line number
Store in memory. In step S216, the pointer TMHPTR of the encoder is incremented.

In steps S218 to S230, the encoded data is stored in the FIFO memory.

First, in step S218, it is determined whether 1-byte data has been encoded. When 1-byte data is encoded, the data is input (step S220),
One-byte encoded data is stored in the FIFO memory (steps S222 to S226).

In step S228, the encoder pointer TMHP
Increment TR. In step S230, 1
It is determined whether the encoding of the line has been completed. If the encoding of one line has not been completed, the process proceeds to step S218. When the encoding of one line is completed, the process proceeds to step S232.

Steps S232 to S238 shown in FIG. 22 (5)
In, it is checked whether or not the line number is incremented, and if it is necessary to increment the line number, the line number is incremented. Here, the line number is incremented for each line.

In steps S240 to S248, it is determined whether a retransmission request signal, that is, a PIS signal has been received. When a PIS signal is received, an NSF signal is received and a retransmission start line number is input. Then, the retransmission start address is set in the pointer TMDPTR of the modem, and transmission is performed from the data of the address. Here, if a fallback instruction is given, the transmission speed is reduced.
If a DCN signal is received, the line is disconnected. Furthermore,
If the NSF signal cannot be detected after a certain period of time (for example, 30 seconds), the line is disconnected.

In step S250, it is determined whether encoding of one document has been completed. If the encoding of one document has been completed, the process proceeds to step S252. If the encoding of one document has not been completed, the process proceeds to step S146.

In steps S252 and S254, it is determined whether one of the buffers is full. If either buffer 0 or buffer 1 is full, the process proceeds to step S146. Buffer 0, Buffer 1
If none of the buffers are full, step S2
Go to 56.

In steps S256 to S300 shown in FIGS. 22 (6) and (7), a control return signal RTC (Return To Control) signal is stored in the FIFO memory.

First, in steps S256 to S260,
Store 00H data in FIFO memory.

In step S262, the encoder pointer TMHP
Increment TR.

In steps S264 to S268, the data of 80H is stored in the FIFO memory.

In step S270, the encoder pointer TMHP
Increment TR.

In steps S274 to S304 (see FIG. 22 (7)) and steps S1088 to S1128 (see FIGS. 22 (8) and (9)), only 103 signals obtained by adding a line number to EOL are stored in the FIFO memory. Stored in The EOL in the present embodiment is a signal in which eleven 0s are continuous and one is one.

In step S1130, since the encoding has been completed,
Set 1 to the flag MHEND.

Step S1132 to Step S11 shown in FIG. 22 (10)
At 70, it waits for all data stored in the memory to be transmitted by the modem.

When a PIS signal is detected, an NSF signal is received and a retransmission start line number is input. Then, the retransmission start address is set in the pointer TMDPTR of the modem, and transmission is started from the data at that address. Here, if a fallback instruction is given, the transmission speed is reduced. If a DCN signal is received, the processing ends with an error. Further, if an NSF signal cannot be detected even after 30 seconds, an error end is made.

If SED = 0 after the RTC is transmitted from the modem, that is, 1.5 seconds after TRNEND becomes 1, it is determined that the image transmission has been completed, and the procedure proceeds to transmission of the procedure signal. Conversely, if SED = 1 after the lapse of 1.5 seconds, the process proceeds to the search for the PIS signal. If a PIS signal is detected within 2 seconds, error retransmission is performed. Even after 2 seconds, PIS
When no signal is detected, it is determined that the image transmission has been completed, and the procedure proceeds to transmission of the procedure signal.

Steps S306 to S326 shown in FIG. 22 (11)
Is a subroutine for detecting a retransmission request signal (ie, PIS signal) during transmission and setting the pointer TMHPTR of the modem to the retransmission start address (see steps S248, S348, and S1166).

As described above, the set of the retransmission start address is: 1) When the REVRS flag is 0; 1-1) TMHPTR> TMDPTR and retransmission address <
For TMDPTR 1-2) TMHPTR> TMDPTR and retransmission address> TMHPTR,
When retransmission address> TMHPTR (in this case, REVRS is set to 1) 2) When REVRS flag is 1 TMDPTR> TMHPTR, and retransmission address> TMHPTR
In the case of, the retransmission address is set in the modem pointer TMDPTR (step S318), and the process returns (step S320).
Otherwise, it is an error.

Steps S328 to S354 shown in FIG. 22 (12)
Until then, the encoder pointer TMHPTR is incremented.

Here, in step S330, the pointer TMHPTR of the encoder is incremented. When the high byte of TMHPTR is not incremented, the routine immediately returns. When the high byte of TMHPTR is incremented, the process proceeds to step S334.

In steps S334 to S338, the pointer TMHPTR of the encoder makes one round, and the pointer TM of the modem TM
Control so that it is not too close to DPTR. That is, the pointer TMHPTR of the encoder is
If it is more than 4098 away from TMDPTR, return.
At this time, it is checked whether or not the encoder pointer TMHPTR has reached the end of the FIFO memory, and if it has reached the end of the FIFO memory, the encoder pointer TMHPTR is checked.
To 8400H.

Encoder pointer TMHPTR is modem pointer TMDP
If the TR is not more than 4096 apart, the coding is interrupted and a wait state is entered. When the wait is performed, it is determined whether a retransmission request signal (that is, a PIS signal) is detected (step S340). Then, when the PIS signal is detected, the transmission is interrupted (step S342), and the NSF signal is received (step S344). Then, the retransmission start line number is input (step S346), and the pointer TMHP of the modem is input.
Set the retransmission address in TR.

Here, if a fallback instruction is given, the transmission speed is reduced. If a DCN signal is received,
The line is disconnected. Further, when an NSF signal cannot be detected even after a certain period of time (for example, 30 seconds) has elapsed, the line is disconnected.

The flowchart shown in FIG. 23 shows a detailed control process related to the transmission process (that is, the interrupt process) of the encoded data. In this embodiment, when a pulse (that is, a byte data request pulse) is generated on the signal line 22a, this interrupt processing is executed.

The main control here is to sequentially read data stored in the FIFO memory (steps S370 to S376),
The output is to the P / S conversion circuit 22 (steps S380 to S386, steps S390 to S396). At this time, control is performed so that the pointer TMDPTR of the modem does not overtake the pointer of the encoder. That is, when the data of 00H and 80H is detected while transmitting the encoded data, as described above, if the encoder pointer TMHPTR is not ahead of the modem pointer by a certain fixed amount, the file is transmitted and the encoding is performed. Wait for progress (step
S380 to step S392, step S404 to step S
410). Here, this does not apply when MHEND is 1 (that is, when all encoding of one document has been completed). When the modem pointer reaches the end of the FIFO memory, the modem pointer TMDPTR is set to the start address 8400H of the FIFO memory (steps S398 and S400).

When all the encoding is completed (MHEND = 1) and the modem has transmitted all the encoded data (TMHPTR = TMDPTR) (step S364), TRNEND is set to 1 (step S366), and the encoding is performed. The main processing routine (encoding processing routine) is notified that the transmission of all the data has been completed.

§15 Block Configuration of Receiving Side Device (Using FIG. 24) FIG. 24 is a block diagram showing the configuration of the receiving side of the facsimile apparatus to which the present invention is applied.

The conditions for performing error retransmission and the conditions for performing fallback have already been described in detail, and will not be described here. Only the processing after the reception of the actual image signal is started will be described below.

In FIG. 24, reference numeral 40 denotes the same network control unit (NCU) as 2 shown in FIG. 40a indicates a telephone line.

42 is a hybrid circuit similar to 4 shown in FIG. The signal transmitted to the signal line 54a passes through the signal line 40b,
The data is transmitted to the telephone line 40a via the network control device 40. Also, the signal sent from the other party's facsimile machine
After passing through the network control device 40, it is output to the signal line 42a.

44 is a circuit for receiving a signal on the signal line 42a and detecting whether or not there is a signal. When a signal of -43 dBm or more is received, a signal of signal level "1" is output to the signal line 44a, and when a signal of less than -43 dBm is received, a signal level of "0" is output to the signal line 44a. The signal of is output.

Reference numeral 46 denotes a demodulator that performs demodulation based on the known CCITT recommendation V27ter (differential phase modulation). The demodulator 46 is connected to the signal line 42
The signal of a is input, demodulated, and the demodulated data is
Output to

Reference numeral 48 denotes a serial-parallel conversion circuit that converts serial data into parallel data (hereinafter, abbreviated as an S / P conversion circuit). The S / P conversion circuit 48 generates a pulse on the signal line 48a when the 8-bit parallel data is completed, and outputs the received data to the signal line 48b. The control circuit 66 controls the signal line 4
By detecting the occurrence of a pulse in 8a, it is recognized that 1-byte data has been received.

50 indicates that when a pulse is generated on the signal line 66b,
This is a circuit that sends out NSF signals (see FIG. 17). The NSF signal includes a line number. The value output on the signal line 66a is set in this line number. The NSF signal includes fallback information. This fallback information is output to the signal line 66h. When the signal line 66h is at the "0" level, no fallback instruction is issued, and when the signal line 66h is at the "1" level, a fallback instruction is issued. When the transmission of the NSF signal ends, the NSF signal transmission circuit 50 generates a pulse on the signal line 50b.

52 is a retransmission request signal (that is, in this embodiment,
PIS signal). In other words, signal line 6
When a pulse is generated on 6c, the PIS signal (462H
This is a circuit that sends out the signal of z for 3 seconds. When the transmission of the PIS signal ends, a pulse is generated on the signal line 52b.

54 inputs the signal of the signal line 50a and the signal of the signal line 52a,
This is an addition circuit that outputs the result of the addition to the signal line 54a.

56 is an FI used to demodulate data sent from the other party's facsimile machine and store the demodulated data.
FO memory. This FIFO memory is the same as the FIFO memory on the transmitting side (see 18 in FIG. 19).

On the other hand, the decoder reads the data stored in the FIFO memory, decodes the data, and performs recording through the double buffer circuit 62. The demodulated data is written to the FIFO memory using the signal lines 66c to 66e. When a (write) pulse is generated on the signal line 66c, the byte data output on the signal line 66e is stored at the address output on the signal line 66d.

Further, data stored in the FIFO memory is read by three signal lines of the signal line 66f, the signal line 66g, and the signal line 56a. When a (read) pulse is generated on the signal line 66f, the data at the address output on the signal line 66g is output on the signal line 56a. In this embodiment, the addresses of the FIFO memory are 8400H to AFFFH.

Reference numeral 58 denotes a line number storage memory for storing a correctly received latest line number. When writing a line number to this line number storage memory 58,
The line number is output to the signal line 66h, and a (write) pulse is generated on the signal line 66i. On the other hand, when reading the correctly received latest line number, when a (read) pulse is generated on the signal line 66j, the correctly received latest line number is output on the signal line 66h.

60 reads the demodulated data from the FIFO memory,
This is a decoder that outputs the decoded data to the signal line 60c.
When preparation for decoding the demodulated 1-byte data is completed, a byte data request pulse is generated on the signal line 60a.
When the pulse is generated, the time control circuit 66 reads out one byte of demodulated data from the FIFO memory, and
Output to 66k. When the decoding of one line is completed, the decoder 60 generates a pulse on the signal line 60b. Then, one line of decoded data is output to the signal line 60c.

Reference numeral 62 denotes a double buffer circuit for writing the image signal of the next line in the other buffer memory while recording the image signal in one buffer. This buffer is the same as the double buffer of the transmitter (see 12 in FIG. 12). The two buffers are called BUF0 (buffer 0) and BUF1 (buffer 1). This buffer BUF
When the image data is clogged with 0, a signal of the signal level "1" is output to the signal line 62a (buffer 0 full).
When the image data is not clogged in the buffer of BUF0, the signal level “0” is set to the signal line 62a (buffer 0 full)
The signal of is output.

When image data is clogged in the buffer of BUF1, a signal of signal level "1" is output to the signal line 62b (buffer 1 full). When the image data is not clogged in the buffer of BUF1, a signal of signal level "0" is output to the signal line 62b (buffer 1 full).

The control circuit 66, which will be described later, recognizes that the buffer is empty and designates which buffer the data should be written to (ie, when the signal line 66m is at the signal level "0"
Write data to buffer 0; write data to buffer 1 when signal line 66m is at signal level "1")
Thereafter, the recording data is output to the signal line 66n, and a (write) pulse is generated on the signal line 66l.

The double buffer circuit 62 sets 1 to the buffer full of the designated buffer.

On the other hand, when the recording of the line data stored in a certain buffer is completed, the recording device 64 generates a recording request pulse on the signal line 64a.

Further, when the double buffer circuit 62 detects the recording request pulse, if the buffer is full of data,
The recording data is output to the signal line 62c. When all data in the buffer is output to the recording device 64, the buffer full corresponding to that buffer is dropped. Here, the buffers used are buffer 0, buffer 1, buffer 0, and buffer 1 alternately.

A recording device 64 generates a recording request pulse on a signal line 64a when the preparation for recording is completed. And the signal line 62c
The recording data output to is input to perform recording.

Reference numeral 66 denotes a control circuit, the operation of which will be described in detail in the following item §16.

§16 Explanation of the operation of the control circuit in the receiving-side device (using FIGS. 25 and 26) The control circuit 66 shown in FIG. 24 performs the following control.

Reception of transmission data is processed by the interrupt routine described above, and decoding is processed by the main routine.

In order to receive data, every time a pulse is generated on the signal line 48a, one byte of data is input and stored in the FIFO memory. At this time, the pointer RMDPTR of the modem is sequentially incremented. On the other hand, the modem pointer RMDPTR is
When the end of memory is reached, the modem pointer is set to the top of the FIFO memory. At this time, the REVRS flag is set to 1
Is set.

FIG. 25 is a flowchart showing a detailed control procedure concerning reception of demodulated data (that is, interrupt processing).

When a pulse is generated on the signal line 48a, the interrupt processing starts (step S600). In steps S602 to S606, demodulated data is input and stored in the FIFO memory.

In step S608, the pointer RMDPTR of the modem is incremented.

In step S610, it is determined whether or not the pointer of the modem has reached the end of the FIFO memory. If the end of the FIFO has been reached, 8400H is set to the pointer RMDPTR of the modem, and the REVRS flag is set to 1.

The main processing content of the main processing (decoding processing) is to first search for a line end code EOL. Two bytes following the EOL indicate a line number. If the line number has been incremented by less than 3 compared to the previous time, it is determined that image reception is good. At this time, the line number is updated each time a new line number is received. Therefore, when the line numbers are three or more larger than the previous time, it is determined that image reception is not good. Then, an NSF signal in which the PIS signal and the retransmission start line number are stored is transmitted to the transmitting device. At this time, control such as fallback is performed as described above. Then, the receiving device performs reception from the line number.

When the image data is correctly received, the image data is output to the double buffer every time one line of image data is prepared, and is recorded. Output to the double buffer is performed alternately with buffer 0 and buffer 1.

When the encoder pointer reaches the end of the FIFO, the encoder pointer is set at the beginning of the FIFO. At this time, the REVRS flag is set to 0.

FIGS. 26 (1) to (4) show the decoding process (main process).
5 is a flowchart showing in detail.

Steps S620 to S630 shown in FIG. 26 (1)
Represents various initializations.

In step S620, the modem pointer RMDPTR
Set 8400H.

In step S622, the encoder pointer RMHP
Set TR to 8400H.

In step S624, 1 is set to a flag BAF (a flag indicating to which buffer the recording data is to be stored).

In step S626, 0 is set to a flag REVRS indicating that the pointer of the modem has returned from the end of the FIFO to the beginning.

In steps S628 to S630, the line number is initialized (set to 0101H).

In steps S632 to S640, it is determined whether EOL has been found. If EOL is found, the process proceeds to step S642.

In steps S634 to S638, one-byte demodulated data is input from the FIFO memory.

In step S640, the encoding pointer is incremented. This will be described later (step
S720 or Step S734).

In steps S624 to S654, it is determined whether or not the control return signal RTC signal has been detected. Step S
In 642, the possibility of an RTC signal is:
It is determined whether the data after ignoring the 2-byte data following the EOL is the EOL. If there is a possibility of an RTC signal, the RTC signal is set in steps S644 to S652.
Determine whether the C signal has been detected. When detecting the RTC signal,
The image reception ends (step S564). Here, as the detection of the RTC signal, for example, “0” is 1 after “EOL”.
It is assumed that “1” is detected twice after one continuation. Also in this case, every time EOL is detected, the subsequent 2 bytes of data are ignored.

In steps S644 to S648, one-byte demodulated data is input from the FIFO memory.

In step S650, the encoder pointer RMHP
Increment TR. Here, when there is no possibility of detecting the RTC signal, that is, when the data after ignoring the 2-byte data following EOL is not EOL, the process proceeds to step S656.

In step S656, two bytes of data following the EOL signal, that is, the currently received line number, are input. In steps S658 and S660, the latest correctly received line number is input.

In step S662, it is determined whether the currently received line number is larger than the latest correctly received line number by three or more, that is, whether an image reception error has occurred. If the currently received line number is larger than the latest correctly received line number by 3 or more, that is, if an image reception error has occurred, the process proceeds to step S698.

If the currently received line number is larger than the latest correctly received line number by less than 3, that is, if the image reception is good, the process proceeds to step S664.

In steps S664 and S666, the currently received line number is stored in the line number storage memory 58.

Steps S668 to S680 shown in FIG. 26 (2)
In, demodulated data is input, decoded, and
Create line recording data.

In steps S668 to S672, one-byte demodulated data is input from the FIFO memory. Step S6
At 74, the encoder pointer RMHPTR is incremented.

When the decoder requests byte data (step S67)
6) One-byte data is sent to the decoder (step S678). Then, in a step S680, it is determined whether or not decoding of one line is completed. If the decoding of one line has not been completed, the process proceeds to step S668. On the other hand, when the decoding of one line is completed, the process proceeds to step S682.

In step S682, one line of decoded data is input, a corresponding buffer is selected and output to that buffer (steps S684 to S696). When writing one line of data to the buffer, buffer 0 and buffer 1 are alternately selected. Then, the process proceeds to a step S632 to decode the next line.

If the image reception is not good, the process proceeds to step S698 shown in FIG. 26 (3). First, a PIS signal is transmitted (steps S698 to S700), and the transmission of the transmitting device is interrupted. After that, the line number obtained by adding 1 to the latest correctly received line number is set in the NSF signal, and the NSF signal is set.
A signal is transmitted (steps S702 to S70)
6). At this time, control such as fallback is also performed as described above. And to the modem pointer RMDPTR
8400H, 8400H for encoder pointer RMHPTR, 1, REV for BAF
RS is set to 0, various initializations are performed, and image reception is performed again.

Steps S720 to S734 shown in FIG. 26 (4)
Is a subroutine for incrementing the pointer RMHPTR of the encoder. When incrementing the encoder pointer RMHPTR, it is necessary to control not to overtake the modem pointer RMDPTR (steps S722 to S724).

In step S726, the encoder pointer RMDP
Increment TR. Encoder pointer is FIFO
When the end of memory is reached, the pointer of the encoder is
The start address of the FIFO memory is set, and 0 is set in the REVRS flag (steps S728 to S732).

In addition, various timers are operating during the control, and for example, when the time is over, the line is disconnected.

§17 Other Embodiments When a facsimile apparatus having an automatic transmission function is configured, when image transmission fails, it is possible to control to select another line and perform automatic transmission.

Further, in the embodiments described so far, the original image is divided into a plurality of line information for transmission, but the area information obtained by dividing the image into a plurality of areas for each block is transmitted as one unit. Is also possible.

[Effects] As described above, according to the present invention, when it is desired to send image data quickly even if there is some error, the setting unit of the transmission-side facsimile apparatus sets the fixed line interval to an arbitrary value. If the value is set to 2 or more, and the same line number is added every several lines and at least one line of the transmitted image data can be correctly received, an error remains in the image data by not causing the receiving side facsimile apparatus to request an error retransmission. The first mode in which communication is continued without change can be selected. On the other hand, when it is desired to send correct image data without errors, the value of the fixed line interval set in the setting means of the transmitting facsimile apparatus is set to 1, and a different line number is added for each line and transmitted. If even one line of image data cannot be correctly received, a second mode in which communication is not continued with an error remaining in the image data can be selected by requesting the receiving-side facsimile apparatus to perform error retransmission. In short, the first mode and the second mode can be set according to the necessity for transmitting image data quickly even if there are some errors and for transmitting correct image data without errors. Facsimile communication system can be realized. Further, according to the present invention, even when the first mode is selected, at least one of the lines to which the same line number is added is correctly received, so that the received image is continuously largely lost and becomes unreadable. Can be prevented.

[Brief description of the drawings]

FIG. 1 is a diagram showing an HDLC frame format, FIG. 2 is a diagram showing a specific example of performing error retransmission using the HDLC frame data shown in FIG. 1, and FIG. 3 is a diagram showing two HDLC frames. FIG. 4 is a diagram showing an example of transmission of an HDLC frame when there is a delay in a line, and FIG. 5 is a schematic diagram showing a state in which a receiving-side device fails to receive a training signal in a conventional error retransmission method. 6 (1) to 6 (3) are waveform diagrams for explaining reception of a training signal and an image signal. FIG. 7 is a flowchart showing a conventionally known training reception / image signal reception control procedure. FIG. 9 is a schematic diagram for explaining a control procedure according to an embodiment of the present invention. FIGS. 9 (1) to (7) are bit configuration diagrams showing specific examples of line numbers. FIG. 10 is coded data and each line. Corresponding to the number FIG. 11 is a diagram showing an example in which a retransmission start address is stored in a memory, FIG. 11 is a block diagram showing a transmission side configuration of a facsimile apparatus according to the present embodiment, and FIG. 12 is to be executed by the control circuit 76 shown in FIG. 13 (1) and (2) are diagrams for explaining the relationship between the FIFO memory and various pointers. FIG. 14 is a diagram showing the number of bits and bytes transmitted in three seconds at each transmission speed. FIGS. 15 (1) and 15 (2) show the relationship between the FIFO memory and various pointers. FIG. 16 shows an example of image reception control focusing on error retransmission with fallback. Flowchart, FIG. 17 shows 300b / S for notifying retransmission start address and fallback presence / absence information from the receiving side to the transmitting side.
18 (1) to 18 (3) are diagrams for explaining a method of setting a retransmission start address, and FIG. 19 is a diagram showing an embodiment of a transmitting side in a facsimile apparatus to which the present invention is applied. FIG. 20 is a block diagram showing a retransmission start address storage memory, FIG. 21 is a flowchart showing a schematic encoding process (that is, an outline of a main process) of the control circuit 30 shown in FIG. 19, FIG. (1) to (12) are flowcharts showing the detailed encoding processing (that is, details of the main processing) of the control circuit 30 shown in FIG. 19, and FIG. 23 is controlled by the control circuit 30 shown in FIG. 24 is a flowchart showing a procedure for transmitting encoded data (ie, an interrupt process). FIG. 24 is a block diagram showing an embodiment of a receiving side in a facsimile apparatus to which the present invention is applied. FIG. 25 is a control diagram shown in FIG. Recovery controlled by circuit 66 26 (1) to (4) are flowcharts showing a decoding process (ie, a main process) controlled by the control circuit 66 shown in FIG. 24. . 2 ... NCU, 4 ... Hybrid circuit, 6 ... Retransmission request signal detection circuit, 8 ... Binary signal reception circuit, 10 ... Reader,
12: double buffer circuit, 14: line number counter circuit, 16: encoding circuit, 18: FIFO memory, 20: retransmission start address storage memory, 22: P / S conversion circuit, 24: modulator, 26: DCN signal Transmission circuit, 28 addition circuit, 30 control circuit, 40 NCU, 42 hybrid circuit, 44 signal detection circuit, 46 demodulator, 48 S / P conversion circuit, 50 NSF signal transmission circuit, 52 ... Retransmission request signal transmission circuit, 54 ... Addition circuit, 56
... FIFO memory, 58 ... Line number storage memory, 60 ... Decoder, 62 ... Double buffer circuit, 64 ... Recording device, 66 ... Control circuit, 67 ... NCU, 68 ... Hybrid circuit, 69 ... Binary signal transmission circuit, 70 ... Tonal signal transmission circuit, 71 ... Addition circuit, 72 ... Tonal signal detection circuit, 73 ... Binary signal detection circuit, 74 ... Start button, 75 ... Error retransmission mode selection switch, 76 ... Control circuit, 77 ... Mode conversion notification sound generation circuit .

Claims (1)

(57) [Claims] An adding unit for adding a line number to each line of the image data; a counting unit for increasing a value of the line number added by the adding unit at a fixed line interval; Setting means for setting an arbitrary value; transmitting means for transmitting image data to which a line number has been added by the adding means; and reception for receiving an error retransmission request signal designating a line number of image data for which error retransmission is requested. Means, a transmitting-side facsimile apparatus having retransmitting control means for causing the transmitting means to retransmit transmitted image data from a line number designated by the error retransmission request signal, a receiving means for receiving image data, Detecting means for detecting a line number added to the image data received by the receiving means; If the detected line number is equal to the line number detected immediately before or is a continuous value, it is determined that the received image data is normal, while the line number detected by the detection unit is normal. Is a value that is not continuous with the line number detected immediately before, a determining unit that determines that the received image data is an error; and that the received image data is determined to be an error by the determining unit. For example, a facsimile communication system comprising: a receiving-side facsimile apparatus having error retransmission request means for transmitting an error retransmission request signal designating a retransmission start line number.