JP2024010113A - metal oxide film - Google Patents

Abstract

To provide a metal oxide film having a novel structure; or provide a metal oxide film having high stability in physical property; or provide a semiconductor device to which the above-described metal oxide is applied and which has high reliability.SOLUTION: A metal oxide film includes In, Ga, and Zn. In a cross-sectional observation image thereof, observed are a plurality of first layers containing In atoms periodically arranged, and a plurality of second layers containing Ga atoms or Zn atoms periodically arranged. The metal oxide film includes a first region which has n (n is a natural number) second layers between a pair of the first layers and a second region which has m (m is a natural number other than n) second layers between another pair of the first layers.SELECTED DRAWING: Figure 1

Description

One embodiment of the present invention relates to a metal oxide film. The present invention also relates to a semiconductor device using the metal oxide film.

Note that in this specification, etc., semiconductor devices refer to all devices that can function by utilizing semiconductor characteristics, and include transistors, semiconductor circuits, storage devices, imaging devices, electro-optical devices, power generation devices (thin-film solar cells, (including organic thin film solar cells, etc.) and electronic equipment can also be said to be semiconductor devices.

2. Description of the Related Art A technique for constructing a transistor using a semiconductor film formed on a substrate having an insulating surface is attracting attention. The transistor is widely applied to electronic devices such as integrated circuits (ICs) and image display devices (also simply referred to as display devices). Although silicon-based semiconductor materials are widely known as semiconductor films that can be applied to transistors, metal oxides (oxide semiconductors) that exhibit semiconductor properties are attracting attention as other materials.

For example, Patent Document 1 discloses a technique for manufacturing a transistor using an amorphous oxide containing In, Zn, Ga, Sn, or the like as an oxide semiconductor.

Japanese Patent Application Publication No. 2006-165529

An object of one embodiment of the present invention is to provide a metal oxide film having a novel structure.

Alternatively, an object of one embodiment of the present invention is to provide a metal oxide film with highly stable physical properties.

Alternatively, an object of one embodiment of the present invention is to provide a highly reliable semiconductor device to which the above metal oxide is applied.

Note that the description of these issues does not preclude the existence of other issues. Note that one embodiment of the present invention does not need to solve all of these problems. In addition, problems other than these will become obvious from the description, drawings, claims, etc.
It is possible to extract problems other than these from the drawings, claims, etc.

One embodiment of the present invention includes a first layer containing In, Ga, and Zn, and in a cross-sectional observation image, a first layer in which In atoms are arranged periodically, and a second layer in which Ga atoms or Zn atoms are arranged periodically. A first region in which a plurality of , are observed, and has n (n is a natural number) second layers between a pair of first layers;
This is a metal oxide film having a second region having m (m is a natural number other than n) second layers between another pair of first layers.

Further, in the metal oxide film, the first region and the second region are adjacent to each other in a direction perpendicular to a plane parallel to the first layer, and the boundary between the first region and the second region is In one of said first
It is preferable that the two layers share the same layer.

Alternatively, the first region and the second region are adjacent to each other in a direction parallel to a plane parallel to the first layer, and at the boundary between the first region and the second region, one first region It is preferred that the layers are continuous.

Further, in the first region or the second region of the metal oxide film, the first layer is preferably parallel to the surface on which it is formed.

Further, it is preferable that no grain boundaries be observed between the first region and the second region in the metal oxide film.

Further, one embodiment of the present invention provides any of the above metal oxide films, a gate electrode, a gate insulating layer between the metal oxide film and the gate electrode, and a source electrically connected to the metal oxide film. A semiconductor device having an electrode and a drain electrode, and a channel formed in a metal oxide film.

Note that, in this specification and the like, the expression that the A plane is parallel to the B plane refers to a state in which the angle between the normal line of the A plane and the normal line of the B plane is −20° or more and 20° or less. Furthermore, in this specification and the like, the term "C-plane perpendicular to B-plane" refers to a state in which the angle between the normal line of C-plane and the normal line of B-plane is 70° or more and 110° or less. Furthermore, in this specification and the like, the expression "line C is approximately perpendicular to plane B" refers to a state in which the angle between line C and the normal to plane B is -20° or more and 20° or less.

According to the present invention, a metal oxide film having a novel structure can be provided. Alternatively, a metal oxide film with highly stable physical properties can be provided. Alternatively, a highly reliable semiconductor device using the above metal oxide can be provided.

FIG. 2 is a diagram illustrating a metal oxide film according to an embodiment. FIG. 2 is a diagram illustrating a metal oxide film according to an embodiment. FIG. 2 is a diagram illustrating a crystal structure of a metal oxide according to an embodiment. FIG. 3 is a diagram illustrating a crystal structure included in a metal oxide film according to an embodiment. FIG. 2 is a diagram illustrating an example configuration of a transistor according to an embodiment. FIG. 3 is a diagram illustrating an example of a method for manufacturing a transistor according to an embodiment. FIG. 2 is a diagram illustrating an example configuration of a transistor according to an embodiment. FIG. 1 is a diagram illustrating the configuration of a display panel according to an embodiment. FIG. 1 is a diagram illustrating a block diagram of an electronic device according to an embodiment. FIG. 1 is a diagram illustrating an external view of an electronic device according to an embodiment.

Embodiments will be described in detail using the drawings. However, those skilled in the art will easily understand that the present invention is not limited to the following description, and that the form and details thereof can be changed in various ways without departing from the spirit and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the contents described in the embodiments shown below.

In the configuration of the invention described below, the same parts or parts having similar functions are designated by the same reference numerals in different drawings, and repeated explanation thereof will be omitted. Furthermore, when referring to similar functions, the same hatch pattern may be used and no particular reference numeral may be attached.

In each figure described in this specification, the size of each structure, layer thickness, or area is as follows.
May be exaggerated for clarity. Therefore, it is not necessarily limited to that scale.

(Embodiment 1)
In this embodiment, a metal oxide film of one embodiment of the present invention will be described with reference to drawings.

[Crystal structure of metal oxide film]
A metal oxide film of one embodiment of the present invention includes a metal oxide containing two or more different metal elements. Further, as the metal oxide, an oxide whose crystal structure can take a layered structure and which can develop different periodic structures depending on the composition can be used.

Various periodic structures that occur due to differences in composition are also called homologous phases. For example, when a certain crystal structure has a layered structure in which a layer A containing metal A and a layer B containing metal B are arranged in a layered manner, the number of B layers sandwiched between a pair of A layers depends on the composition. Continuously changing. As a result, different periodic structures are realized depending on the composition. In this specification and the like, a structure that can assume different periodic structures depending on the composition is referred to as a homologous structure.

For example, an In-Ga-Zn-based oxide can have a homologous structure expressed as InGaO_ ₃ (ZnO) _m (m is a natural number). FIG. 3 shows an example of the crystal structure of an In--Ga--Zn based oxide. The crystal structure shown in FIG. 3(A) is a crystal structure expressed as InGaO_ ₃ (ZnO) _m (m=1). Moreover, the crystal structure shown in FIG. 3(B) is InGaO_ ₃ (ZnO) _m
It has a crystal structure expressed as (m=2). In addition, the crystal structure shown in FIG. 3(C) is InGa
It has a crystal structure expressed as O_ ₃ (ZnO) _m (m=3).

The metal oxide film of one embodiment of the present invention is characterized in that regions having different crystal structures (periodic structures) coexist in the film.

For example, when an In-Ga-Zn-based oxide is used as the metal oxide, a layer made of InO ₂ (also referred to as InO ₂ layer) and a layer made of oxides of Ga and Zn ((Ga, Zn
) It has a layered structure in which two layers (also referred to as O layer) are arranged in a layered manner.

Furthermore, the number of (Ga, Zn)O layers sandwiched between a pair of _two InO layers can take various values. For example, the structure shown in FIG. 4A has one layer of (Ga, Zn) between a pair of _two InO layers.
) has an O layer. Furthermore, the structure shown in FIG. 4(B) has two layers of (Ga) between a pair of _two InO layers.
, Zn)O layer (also referred to as (Ga, Zn) ₂ O ₂ layer). Further, the structure shown in FIG. 4C has three (Ga, Zn) O layers (also referred to as (Ga, Zn) ₃ O _three layers) between a pair of _two InO layers.

As described above, when an In-Ga-Zn-based oxide is used as the metal oxide film of one _embodiment of the present invention, Ga, Two or more crystal regions having different numbers of Zn)O layers are included.

The crystalline region contained in the metal oxide can be detected using, for example, a transmission electron microscope (TEM).
It can be observed using a method such as ssion Electron Microscopy). Further, by further analyzing the crystal region observed by TEM using techniques such as electron beam diffraction, the crystal structure can be specified.

Here, for cross-sectional observation of the metal oxide film, for example, scanning transmission electron microscopy (STEM: S
canning transmission electron microscopy
), when performing high-resolution observation, it is difficult to observe oxygen atoms, which are light elements, and only the arrangement of metal atoms can be confirmed.

Next, FIG. 1 shows an observed cross-sectional image of a metal oxide film according to one embodiment of the present invention.

Here, as an example of a metal oxide film, a sample was used in which an In--Ga--Zn based oxide film was formed to a thickness of about 50 nm on a quartz glass substrate. The conditions for forming the metal oxide film shown in FIG.
:Ga:Zn=1:1:1 (atomic ratio) using a sputtering method using an oxide target in an oxygen atmosphere (flow rate 45 sccm), pressure 0.4 Pa, direct current (DC) power supply 0.5 kW, The substrate temperature during film formation was set to room temperature. Furthermore, under a nitrogen atmosphere at a temperature of 650°C,
Heat treatment was performed for an hour. Furthermore, the metal oxide film after the heat treatment was sliced into thin sections by ion milling to prepare a sample for cross-sectional observation.

Cross-sectional observation was performed using a transmission electron microscope (Hitachi High-Technologies: HD-2700) at an accelerating voltage of 200 kV and a magnification of 12 million times using HAADF-STEM (High-Angle).
Annular Dark-Field Scanning Transmission
n Electron Microscopy) images were observed.

As shown in Figure 1, in a metal oxide film, there is a layer in which atoms (specifically electrons) observed with high brightness are arranged periodically, and a layer in which atoms observed with low brightness are arranged periodically. Multiple layers are observed. Here, atoms observed with high brightness are In atoms, and atoms observed with low brightness are Ga atoms or Zn atoms.

FIG. 1(B) shows an enlarged view of region 1 surrounded by a broken line in FIG. 1(A). It can be confirmed that there are two layers in which Ga atoms or Zn atoms are arranged periodically between a pair of layers in which In atoms are arranged periodically.

Here, as mentioned above, it is difficult to directly observe the O atoms constituting the metal oxide in the cross-sectional observation image, so the composition of the O atoms and the bonding state between the O atoms and the metal atoms can be determined from the cross-sectional observation image. It is difficult to know. Therefore, in the following, we will distinguish the layer of periodically arranged atoms (specifically electrons) obtained in the cross-sectional observation image from the layers such as the InO ₂ layer and the (Ga, Zn)O layer in the actual crystal structure. It shall be written as follows.

Specifically, in the following cross-sectional observation image, one layer in which a pair of In atoms are arranged periodically will be referred to as an In layer or a first layer. In addition, in the cross-sectional observation image, Ga atoms or Zn
One layer in which atoms are arranged periodically is referred to as a (Ga, Zn) layer or a second layer.

Furthermore, when metal oxides other than In-Ga-Zn-based oxides are used, the atoms with the highest brightness (those with the same brightness) among the plurality of periodically arranged layers observed in the cross-sectional observation image in order from the one containing the atom with the highest atomic number), the first layer, the second layer, and the third layer.
It shall be written as ``layer'', etc.

Next, FIG. 1(C) shows an enlarged view of region 2 surrounded by a broken line in FIG. 1(A). It can be confirmed that three (Ga, Zn) layers exist between the pair of In layers.

In this way, in the cross-sectional observation image of the metal oxide film of one embodiment of the present invention, a pair of first
A first region having n (n is a natural number) second layers between the layers, and m (m is a natural number other than n) second layers between the other pair of first layers. It is characterized by a mixture of the second region and the second region.

Note that the types of crystal structures in the crystal regions included in the metal oxide film are not limited to two types, and three or more crystal regions having different types of crystal structures may be included.

Further, in FIG. 1A, it can be confirmed that region 1 and region 2 are stacked in a direction perpendicular to a direction parallel to the In layer. Furthermore, if we focus on the boundary between region 1 and region 2, one In
You can confirm that the layers are shared.

By stacking regions with different crystal structures and providing two regions that share one In layer, grain boundaries do not occur between these regions, achieving high structural stability. has been done. Furthermore, defects in the metal oxide film due to the presence of grain boundaries can be reduced.

Furthermore, as shown in FIG. 1, in the upper layer of region 1, there is a region in which three layers (Ga, Zn) are present between a pair of In layers, similar to region 2; One In between
You can confirm that the layers are shared.

In this way, a plurality of regions having different crystal structures may be stacked while sharing the In layer. As a result, structural stability is obtained over a wide range in the metal oxide film,
A metal oxide film with reduced defects can be realized.

FIG. 2 is a cross-sectional observation image of another portion of the sample.

In the cross-sectional observation image shown in FIG. 2, there is a region 3 where two (Ga, Zn) layers exist between a pair of In layers, and a region 3 where there are three (Ga, Zn) layers between another pair of In layers. There is a mixture of areas 4 and 4, where the layer exists. Further, region 3 and region 4 are adjacent to each other in a direction parallel to a plane parallel to the In layer.

Furthermore, in FIG. 2, one In layer constituting region 3 extends to region 4, and I
It forms part of the n layer. That is, one In layer exists continuously in region 3 and region 4.

In this way, because the In layer exists continuously between adjacent regions with different crystal structures, grain boundaries do not occur between these regions, achieving high structural stability. There is.
Furthermore, defects in the metal oxide film due to the presence of grain boundaries can be reduced.

The metal oxide film of one embodiment of the present invention is a metal oxide film that achieves high structural stability.
By applying such a metal oxide film to a semiconductor layer in which a channel of a transistor is formed, a highly reliable transistor can be realized.

Further, the metal oxide film of one embodiment of the present invention has continuous crystal regions and no grain boundaries between the regions, so defects in the film are reduced. . By applying such a metal oxide film to a semiconductor layer of a transistor, trapping of carriers due to defects is suppressed, high field effect mobility can be realized, and a transistor can be realized in which fluctuations in electrical characteristics are suppressed. I can do it.

Note that a structure example of a transistor to which a metal oxide film of one embodiment of the present invention is applied will be described in a later embodiment.

[Method for forming metal oxide film]
A method for forming a metal oxide film according to this embodiment will be described below.

The metal oxide film of this embodiment can be formed by a sputtering method in an atmosphere containing oxygen, and then subjected to heat treatment. By setting the film-forming atmosphere to be an atmosphere containing oxygen, oxygen vacancies in the metal oxide film can be reduced, and a film containing crystalline regions can be formed by subsequent heat treatment.

By reducing oxygen vacancies in the metal oxide film of this embodiment, the film can have stable physical properties. In particular, when a semiconductor device is manufactured using a metal oxide film exhibiting semiconductor characteristics (oxide semiconductor film) as the metal oxide film of this embodiment, oxygen vacancies in the oxide semiconductor film are This causes fluctuations in electrical characteristics. Therefore, by manufacturing a semiconductor device using an oxide semiconductor film with reduced oxygen vacancies, the semiconductor device can have high reliability.

Note that in the metal oxide film of this embodiment, it is preferable to increase the oxygen partial pressure of the film-forming atmosphere because oxygen vacancies can be further reduced. More specifically, it is preferable that the oxygen partial pressure in the film-forming atmosphere is 33% or more.

The target used in the sputtering method is not limited to In--Ga--Zn based oxides, but may be any multi-component metal oxide that can have a homologous structure. For example, In-M
-Zn-based oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd, Hf, etc.) can be used.

Further, the composition of the metal oxide contained in the target used in the sputtering method is not particularly limited as long as it can have a homologous structure. For example, in the case of In--Ga--Zn based oxides, if the composition of Ga is larger than that of Zn, it is easier to form a spinel structure instead of a layered structure, so it is preferable to increase the content of Zn rather than Ga. In addition, Zn sublimes during film formation by sputtering, and the Zn composition in the formed metal oxide film may decrease, so the Zn composition may be lower than the desired metal oxide film composition. It is preferable to use a target with a high

Further, when forming a metal oxide film by sputtering, the film may be formed at room temperature without heating the surface to be formed, or may be heated. When heating, for example, 150℃ or higher, 3
The temperature may be set to 00°C or higher, 450°C or higher, or the like.

After forming the metal oxide film, heat treatment is performed. Crystalline regions are formed in the metal oxide film by rearranging the atoms in the film through the heat treatment.

At this time, since there is a relatively high degree of dynamic freedom near the film surface, atoms near the film surface first rearrange at an early stage, and a layer approximately parallel to the film surface is formed near the film surface. Ru. Thereafter, in the process of crystallization progressing from the film surface in the depth direction, a crystal region having a laminated structure in which a plurality of layers substantially parallel to the film surface are laminated is formed. That is, the first layer and the second layer included in the crystal region are arranged in a direction parallel to the film surface.

Here, in the metal oxide film before the heat treatment, there is a distribution in the metal element concentration. and,
It is thought that during the rearrangement of atoms during heat treatment, regions with a small number of (Ga, Zn) layers existing between a pair of In layers are formed in regions where the concentration of In atoms in the film is relatively high. It will be done. On the other hand, in a region where the concentration of In atoms in the film is relatively low, there are atoms between a pair of In layers (Ga, Zn
) A region with a large number of layers is formed. As a result, a metal oxide film having regions having different crystal structures can be formed. Note that this formation process is similar to that of In-Ga-Zn.
The same applies to multi-component metal oxides that can take a homologous structure other than oxides.

For example, a metal oxide film having regions with different concentrations of metal elements can be formed by forming the film at room temperature or a temperature below room temperature without heating the surface on which the film is formed.

The heat treatment is performed at 550°C or higher, preferably 600°C or higher, more preferably 650°C or higher. For example, heat treatment may be performed at 650° C. for 1 hour. The higher the temperature and the longer the heat treatment time, the larger the proportion of crystalline regions included in the metal oxide film can be.

The heat treatment can be performed, for example, under a nitrogen atmosphere or under a reduced pressure atmosphere. By performing the heat treatment in such an atmosphere, hydrogen in the metal oxide film can be effectively eliminated. Additionally, oxygen in the metal oxide film may also be desorbed during the above heat treatment.
Subsequently, it is preferable to further perform heat treatment in an oxygen atmosphere to reduce oxygen vacancies in the film.

In the above manner, a metal oxide film according to one embodiment of the present invention can be formed.

This embodiment mode can be implemented in appropriate combination with other embodiment modes described in this specification.

(Embodiment 2)
In this embodiment, a semiconductor device to which a metal oxide film (oxide semiconductor film) exhibiting semiconductor characteristics, which is one embodiment of the present invention, is applied will be described with reference to drawings. Here, a configuration example of a transistor will be described as an example of a semiconductor device.

[Example of transistor configuration]
FIG. 5A shows a schematic cross-sectional view of the transistor 100 illustrated below. The transistor 100 illustrated in this configuration example is a bottom gate transistor.

The transistor 100 includes a gate electrode 102 provided on a substrate 101 , an insulating layer 103 provided on the substrate 101 and the gate electrode 102 , and a gate electrode 102 provided on the insulating layer 103 .
The insulating layer 103 and the oxide semiconductor layer 10 have an oxide semiconductor layer 104 provided to overlap with the oxide semiconductor layer 104 and a pair of electrodes 105a and 105b in contact with the upper surface of the oxide semiconductor layer 104.
4. An insulating layer 106 covering the pair of electrodes 105a and 105b, and an insulating layer 10 on the insulating layer 106.
7 is provided.

The oxide semiconductor film of one embodiment of the present invention can be applied to the oxide semiconductor layer 104 of the transistor 100.

[Substrate 101]
Although there are no major restrictions on the material of the substrate 101, a material having at least enough heat resistance to withstand subsequent heat treatment is used. For example, a glass substrate, a ceramic substrate, a quartz substrate, a sapphire substrate, a YSZ (yttria stabilized zirconia) substrate, or the like may be used as the substrate 101. Further, it is also possible to apply a single crystal semiconductor substrate such as silicon or silicon carbide, a polycrystalline semiconductor substrate, a compound semiconductor substrate such as silicon germanium, an SOI substrate, etc.

Further, a semiconductor substrate or an SOI substrate on which a semiconductor element is provided may be used as the substrate 101. In that case, the transistor 100 is formed on the substrate 101 with an interlayer insulating layer interposed therebetween. At this time, at least one of the gate electrode 102, the electrode 105a, and the electrode 105b of the transistor 100 may be electrically connected to the semiconductor element by a connection electrode embedded in the interlayer insulating layer. A transistor 10 is formed on the semiconductor element via an interlayer insulating layer.
By providing 0, it is possible to suppress an increase in area due to adding the transistor 100.

Alternatively, a flexible substrate such as plastic may be used as the substrate 101, and the transistor 100 may be formed directly on the flexible substrate. Alternatively, a release layer may be provided between the substrate 101 and the transistor 100. The peeling layer can be used to form part or all of a transistor thereon and then to separate it from the substrate 101 and transfer it to another substrate. As a result, the transistor 100 can be transferred to a substrate with poor heat resistance or a flexible substrate.

[Gate electrode 102]
The gate electrode 102 can be formed using a metal selected from aluminum, chromium, copper, tantalum, titanium, molybdenum, and tungsten, an alloy containing the above-mentioned metals, an alloy that is a combination of the above-mentioned metals, or the like. can. Further, a metal selected from one or more of manganese and zirconium may be used. Further, the gate electrode 102 may have a single layer structure or a stacked structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is stacked on an aluminum film, a two-layer structure in which a titanium film is stacked on a titanium nitride film, and a two-layer structure in which a tungsten film is stacked on a titanium nitride film. A layer structure, a two-layer structure in which a tungsten film is laminated on a tantalum nitride film or a tungsten nitride film, a titanium film,
There is a three-layer structure in which an aluminum film is laminated on the titanium film, and a titanium film is further formed on top of the aluminum film. Alternatively, an alloy film made of a combination of aluminum and one or more metals selected from titanium, tantalum, tungsten, molybdenum, chromium, neodymium, and scandium, or a nitride film of these may be used.

Further, the gate electrode 102 is made of indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, or indium zinc oxide. A conductive material having translucency, such as indium tin oxide added with silicon oxide, can also be used. Further, it may also have a laminated structure of the above-mentioned conductive material having translucency and the above-mentioned metal.

Further, between the gate electrode 102 and the insulating layer 103, an In-Ga-Zn-based oxynitride semiconductor film, an In-Sn-based oxynitride semiconductor film, an In-Ga-based oxynitride semiconductor film, an In-Zn-based oxynitride semiconductor film, and an In-Zn-based oxynitride semiconductor film are provided. Oxynitride semiconductor film, Sn-based oxynitride semiconductor film, In-based oxynitride semiconductor film, metal nitride film (InN
, ZnN, etc.) may also be provided. These films have a work function of 5 eV, preferably 5.5 eV or more, which is larger than the electron affinity of the oxide semiconductor, so that the threshold voltage of the transistor using the oxide semiconductor is shifted positively. Therefore, a switching element with so-called normally-off characteristics can be realized. For example, when using an In-Ga-Zn-based oxynitride semiconductor film, an In-Ga-Zn-based oxynitride semiconductor film with a nitrogen concentration higher than that of the oxide semiconductor layer 104, specifically, 7 atomic % or more is used. .

[Insulating layer 103]
The insulating layer 103 functions as a gate insulating film.

The insulating layer 103 may be made of, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, hafnium oxide, gallium oxide, Ga-Zn metal oxide, silicon nitride, etc., and may be a stacked layer or a single layer. establish.

In addition, as the insulating layer 103, hafnium silicate (HfSiO _x ), hafnium silicate added with nitrogen (HfSi _x O _y N _z ), hafnium aluminate added with nitrogen (HfAl _x O _y N _z ), hafnium oxide, Gate leakage of transistors can be reduced by using high-k materials such as yttrium oxide.

[Pair of electrodes 105a, 105b]
A pair of electrodes 105a and 105b function as a source electrode or a drain electrode of the transistor.

The pair of electrodes 105a and 105b are made of aluminum, titanium, chromium,
A single metal such as nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or an alloy mainly composed of these metals can be used in a single layer structure or a laminated structure. For example, a single-layer structure of an aluminum film containing silicon, a two-layer structure in which a titanium film is laminated on an aluminum film, a two-layer structure in which a titanium film is laminated on a tungsten film, and a copper film on a copper-magnesium-aluminum alloy film. A two-layer structure in which a titanium film or a titanium nitride film is laminated, a three-layer structure in which an aluminum film or a copper film is laminated on top of the titanium film or titanium nitride film, and then a titanium film or a titanium nitride film is formed on top of that. There is a three-layer structure in which a molybdenum film or a molybdenum nitride film, an aluminum film or a copper film are stacked over the molybdenum film or molybdenum nitride film, and a molybdenum film or a molybdenum nitride film is further formed thereon. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

[Insulating layers 106, 107]
The insulating layer 106 is preferably an oxide insulating film containing more oxygen than the stoichiometric composition. In an oxide insulating film containing more oxygen than the stoichiometric composition, some oxygen is eliminated by heating. Oxide insulating films containing more oxygen than the stoichiometric composition can be produced using thermal desorption spectroscopy (TDS).
In ion spectroscopy) analysis, the amount of oxygen desorbed in terms of oxygen atoms was 1
．． 0×10 ¹⁸ atoms/cm ³ or more, preferably 3.0×10 ²⁰ atoms/cm
³ or more.

For example, as the insulating layer 106, silicon oxide, silicon oxynitride, or the like can be used.

Note that the insulating layer 106 is the same as the oxide semiconductor layer 1 when forming the insulating layer 107 that will be formed later.
It also functions as a damage mitigation film for 04.

Further, an oxide film that transmits oxygen may be provided between the insulating layer 106 and the oxide semiconductor layer 104.

As the oxide film that allows oxygen to pass through, silicon oxide, silicon oxynitride, or the like can be used. Note that in this specification, a silicon oxynitride film refers to a film whose composition contains more oxygen than nitrogen, and a silicon nitride oxide film refers to a film whose composition contains more nitrogen than oxygen. Refers to a membrane with a large amount of

For the insulating layer 107, an insulating film having a blocking effect against oxygen, hydrogen, water, etc. can be used. Providing the insulating layer 107 over the insulating layer 106 can prevent oxygen from diffusing to the outside from the oxide semiconductor layer 104 and preventing hydrogen, water, and the like from entering the oxide semiconductor layer 104 from the outside. Insulating films that have a blocking effect against oxygen, hydrogen, water, etc. include silicon nitride,
Examples include silicon nitride oxide, aluminum oxide, aluminum oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, hafnium oxide, and hafnium oxynitride.

[Example of method for manufacturing a transistor]
Next, an example of a method for manufacturing the transistor 100 illustrated in FIG. 5A will be described.

First, as shown in FIG. 6A, a gate electrode 102 is formed over a substrate 101, and an insulating layer 103 is formed over the gate electrode 102.

Here, a glass substrate is used as the substrate 101.

[Formation of gate electrode]
A method for forming the gate electrode 102 will be described below. Introduction, sputtering method, CVD method,
A conductive film is formed by a vapor deposition method or the like, and a resist mask is formed on the conductive film by a photolithography process using a first photomask. Next, a portion of the conductive film is etched using the resist mask to form the gate electrode 102. After that, the resist mask is removed.

Note that the gate electrode 102 may be formed by an electrolytic plating method, a printing method, an inkjet method, or the like instead of the above-described method.

[Formation of gate insulating layer]
The insulating layer 103 is formed by a sputtering method, a CVD method, a vapor deposition method, or the like.

When forming a silicon oxide film, a silicon oxynitride film, or a silicon nitride oxide film as the insulating layer 103, it is preferable to use a deposition gas containing silicon and an oxidizing gas as the source gas. Typical examples of deposition gases containing silicon include silane, disilane, trisilane, and fluorinated silane. Examples of the oxidizing gas include oxygen, ozone, dinitrogen monoxide, and nitrogen dioxide.

Further, when forming a silicon nitride film as the insulating layer 103, it is preferable to use a two-step formation method. First, a first silicon nitride film with few defects is formed by a plasma CVD method using a mixed gas of silane, nitrogen, and ammonia as a source gas. next,
The source gas is switched to a mixed gas of silane and nitrogen to form a second silicon nitride film that has a low hydrogen concentration and is capable of blocking hydrogen. With such a formation method, a silicon nitride film with few defects and hydrogen blocking properties can be formed as the insulating layer 103.

Furthermore, when forming a gallium oxide film as the insulating layer 103, MOCVD (Metal
It can be formed using an organic chemical vapor deposition method.

[Formation of oxide semiconductor layer]
Next, as shown in FIG. 6B, an oxide semiconductor layer 104 is formed over the insulating layer 103.

A method for forming the oxide semiconductor layer 104 will be described below. First, an oxide semiconductor film is formed by the method illustrated in Embodiment 1. Subsequently, a resist mask is formed over the oxide semiconductor film by a photolithography process using a second photomask. Next, a portion of the oxide semiconductor film is etched using the resist mask to form the oxide semiconductor layer 104. After that, the resist mask is removed.

Note that the heat treatment illustrated in Embodiment 1 may be performed immediately after forming the oxide semiconductor film, or may be performed after etching a portion of the oxide semiconductor film.

Here, the oxide semiconductor has a large energy gap of 3.0 eV or more, and a transistor in which an oxide semiconductor film obtained by processing the oxide semiconductor under appropriate conditions and sufficiently reducing its carrier density is applied. In this case, the leakage current (off current) between the source and drain in the off state can be made extremely low compared to a conventional transistor using silicon.

When a large amount of hydrogen is contained in the oxide semiconductor film, part of the hydrogen becomes a donor by combining with the oxide semiconductor, and generates electrons that are carriers. This causes the threshold voltage of the transistor to shift in the negative direction. Therefore, after forming an oxide semiconductor film, it is necessary to perform dehydration treatment (dehydrogenation treatment) to remove hydrogen or moisture from the oxide semiconductor film to achieve high purity so as to contain as few impurities as possible. preferable.

Note that when the oxide semiconductor film is subjected to dehydration treatment (dehydrogenation treatment), oxygen may also be reduced from the oxide semiconductor film at the same time. Therefore, it is preferable to add or supply oxygen to the oxide semiconductor film, which has been simultaneously reduced by dehydration treatment (dehydrogenation treatment) on the oxide semiconductor film, to compensate for oxygen vacancies in the oxide semiconductor film. . In this specification and the like, the case where oxygen is supplied to the oxide semiconductor film is sometimes referred to as oxygenation treatment.

In this way, the oxide semiconductor film becomes i-type (intrinsic) or i-type by removing hydrogen or moisture through dehydration treatment and filling oxygen vacancies through oxygenation treatment. The oxide semiconductor film can be substantially i-type (intrinsic) as close to as possible.
Note that "substantially intrinsic" means that there are very few carriers derived from donors in the oxide semiconductor film (nearly zero), and the carrier density is 1 x 10 ¹⁷ /cm ³ or less, 1 x 10 ¹⁶ /cm ³ or less, It means that it is 1×10 ¹⁵ /cm ³ or less, 1×10 ¹⁴ /cm ³ or less, or 1×10 ¹³ /cm ³ or less.

Further, in this way, a transistor including an i-type or substantially i-type oxide semiconductor film can achieve extremely excellent off-current characteristics. For example, when a transistor using an oxide semiconductor film is in an off state, the drain current per 1 μm of channel width is 1×10 ^-18 A or less, preferably 1×10 ^-21 A or less at room temperature (about 25°C). , more preferably 1×10
⁻²⁴ A or less, or 1×10 ⁻¹⁵ A or less at 85° C., preferably 1×10 ⁻¹⁸ A or less, more preferably 1×10 ⁻²¹ A or less. Note that in the case of an n-channel transistor, the off-state of a transistor refers to a state in which the gate voltage is sufficiently lower than the threshold voltage. Specifically, if the gate voltage is lower than the threshold voltage by 1V or more, 2V or more, or 3V or more, the transistor is turned off.

[Formation of a pair of electrodes]
Next, as shown in FIG. 6(C), a pair of electrodes 105a and 105b are formed.

A method for forming the pair of electrodes 105a and 105b will be described below. First, a conductive film is formed by sputtering, CVD, vapor deposition, or the like. Next, a resist mask is formed on the conductive film by a photolithography process using a third photomask. Next, a portion of the conductive film is etched using the resist mask to form a pair of electrodes 105a and 105b. After that, the resist mask is removed.

Note that as shown in FIG. 6C, a portion of the upper part of the oxide semiconductor layer 104 may be etched during etching of the conductive film, resulting in a thin film. Therefore, when forming the oxide semiconductor layer 104, it is preferable to set the thickness of the oxide semiconductor film to be thick in advance.

[Formation of insulating layer]
Next, as shown in FIG. 6D, the oxide semiconductor layer 104 and the pair of electrodes 105a and 10
An insulating layer 106 is formed on the insulating layer 5b, and then an insulating layer 107 is formed on the insulating layer 106.

When a silicon oxide film or a silicon oxynitride film is formed as the insulating layer 106, a deposition gas containing silicon and an oxidizing gas are preferably used as the source gas. Typical examples of deposition gases containing silicon include silane, disilane, trisilane, and fluorinated silane. Examples of the oxidizing gas include oxygen, ozone, dinitrogen monoxide, and nitrogen dioxide.

For example, a substrate placed in an evacuated processing chamber of a plasma CVD apparatus is maintained at a temperature of 180°C or more and 260°C or less, more preferably 200°C or more and 240°C or less, and raw material gas is introduced into the processing chamber. The pressure is set at 100 Pa or more and 250 Pa or less, more preferably 100 Pa or more and 200 Pa or less, and the electrode provided in the processing chamber is set at 0.17 W/cm ² or more and 0.5 W/cm ² or less, more preferably 0.25 W/cm ² or more and 0. .35W/ ^cm2
A silicon oxide film or a silicon oxynitride film is formed under the following high-frequency power supply conditions.

As a film forming condition, by supplying high frequency power with the above power density in a reaction chamber with the above pressure, the decomposition efficiency of the raw material gas in the plasma increases, oxygen radicals increase, and oxidation of the raw material gas progresses, so that oxides are The oxygen content in the insulating film becomes higher than the stoichiometric ratio. However, when the substrate temperature is at the above-mentioned temperature, the bonding force between silicon and oxygen is weak, so that part of the oxygen is desorbed by heating. As a result, it is possible to form an oxide insulating film that contains more oxygen than the stoichiometric composition and in which part of the oxygen is released by heating.

Further, in the case where an oxide insulating film is provided between the oxide semiconductor layer 104 and the insulating layer 106, the oxide insulating film serves as a protective film for the oxide semiconductor layer 104 in the step of forming the insulating layer 106. As a result, the insulating layer 106 can be formed using high-frequency power with high power density while reducing damage to the oxide semiconductor layer 104.

For example, a substrate placed in an evacuated processing chamber of a plasma CVD apparatus is maintained at a temperature of 180°C or more and 400°C or less, more preferably 200°C or more and 370°C or less, and a source gas is introduced into the processing chamber. The pressure at is 20 Pa or more and 250 Pa or less, more preferably 1
A silicon oxide film or a silicon oxynitride film can be formed as the oxide insulating film under the conditions that the pressure is 00 Pa or more and 250 Pa or less, and high frequency power is supplied to an electrode provided in the processing chamber. Further, by setting the pressure in the processing chamber to 100 Pa or more and 250 Pa or less, damage to the oxide semiconductor layer 104 can be reduced when forming the oxide insulating layer.

As the raw material gas for the oxide insulating film, it is preferable to use a deposition gas containing silicon and an oxidizing gas. Typical examples of deposition gases containing silicon include silane, disilane, trisilane, and fluorinated silane. Examples of the oxidizing gas include oxygen, ozone, dinitrogen monoxide, and nitrogen dioxide.

The insulating layer 107 can be formed by a sputtering method, a CVD method, or the like.

When a silicon nitride film or a silicon nitride oxide film is formed as the insulating layer 107, a deposition gas containing silicon, an oxidizing gas, and a gas containing nitrogen are preferably used as the source gas. Typical examples of deposition gases containing silicon include silane, disilane, trisilane, and fluorinated silane. Examples of the oxidizing gas include oxygen, ozone, dinitrogen monoxide, and nitrogen dioxide. Gases containing nitrogen include nitrogen, ammonia, and the like.

After forming the insulating layer 106 and the insulating layer 107, heat treatment is preferably performed. Oxygen released by the insulating layer 106 due to the heat treatment is supplied to the oxide semiconductor layer 104, and the oxide semiconductor layer 1
Oxygen vacancies in 04 can be reduced.

Through the above steps, the transistor 100 can be formed.

[Modified example of transistor 100]
An example of a structure of a transistor that partially differs from the transistor 100 will be described below.

[Modification 1]
FIG. 5B shows a schematic cross-sectional view of the transistor 110 illustrated below. The transistor 110 is different from the transistor 100 in that the structure of the oxide semiconductor layer is different.

The oxide semiconductor layer 114 included in the transistor 110 is configured by stacking an oxide semiconductor layer 114a and an oxide semiconductor layer 114b.

Note that the boundaries between the oxide semiconductor layer 114a and the oxide semiconductor layer 114b may be unclear, so these boundaries are indicated by broken lines in figures such as FIG. 5B.

The oxide semiconductor film of one embodiment of the present invention can be applied to one or both of the oxide semiconductor layer 114a and the oxide semiconductor layer 114b.

For example, the oxide semiconductor layer 114a is typically made of In-Ga oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr, La, Ce, Nd , or Hf). Further, when the oxide semiconductor layer 114a is an In-M-Zn oxide, I
The atomic ratio of n and M is preferably less than 50 atomic % for In and 50 atomic % for M.
ic% or more, more preferably In is less than 25 atomic%, and M is 75 atomic%.
% or more. Further, for example, for the oxide semiconductor layer 114a, a material having an energy gap of 2 eV or more, preferably 2.5 eV or more, and more preferably 3 eV or more is used.

For example, the oxide semiconductor layer 114b contains In or Ga, and typically contains In-Ga.
oxide, In-Zn oxide, In-M-Zn oxide (M is Al, Ti, Ga, Y, Zr,
La, Ce, Nd, or Hf), and the energy at the bottom of the conduction band is closer to the vacuum level than that of the oxide semiconductor layer 114a, and is typically the same as the energy at the bottom of the conduction band of the oxide semiconductor layer 114b. , the difference in energy from the lower end of the conduction band of the oxide semiconductor layer 114a is 0.05
It is preferable that the voltage is not less than eV, not less than 0.07 eV, not less than 0.1 eV, or not less than 0.15 eV, and not more than 2 eV, not more than 1 eV, not more than 0.5 eV, or not more than 0.4 eV.

For example, when the oxide semiconductor layer 114b is an In--M--Zn oxide, the atomic ratio of In and M is preferably 25 atomic % or more for In and less than 75 atomic % for M, more preferably, In M is 34 atomic% or more, and M is less than 66 atomic%.

As the oxide semiconductor layer 114a, for example, In:Ga:Zn=1:1:1 or 3:1:
An In--Ga--Zn oxide having an atomic ratio of 2 can be used. In addition, the oxide semiconductor layer 1
As 14b, for example, In--Ga--Zn oxide having an atomic ratio of In:Ga:Zn=1:3:4, 1:3:6, 1:6:8, or 1:6:10 can be used. can. Note that the atomic ratios of the oxide semiconductor layer 114a and the oxide semiconductor layer 114b each include a fluctuation of plus or minus 20% of the above atomic ratio as an error.

By using an oxide with a higher Ga content that functions as a stabilizer than in the oxide semiconductor layer 114a for the oxide semiconductor layer 114b provided as an upper layer, the oxide semiconductor layer 1
Release of oxygen from the oxide semiconductor layer 14a and the oxide semiconductor layer 114b can be suppressed.

Note that the composition is not limited to these, and a material with an appropriate composition may be used depending on the required semiconductor characteristics and electrical characteristics (field effect mobility, threshold voltage, variation, etc.) of the transistor. In addition, in order to obtain the required semiconductor characteristics of the transistor, the carrier density, impurity concentration, defect density, atomic ratio of metal element and oxygen of the oxide semiconductor layer 114a and the oxide semiconductor layer 114b,
It is preferable to set the interatomic distance, density, etc. to appropriate values.

Note that although a structure in which two oxide semiconductor layers are stacked as the oxide semiconductor layer 114 is illustrated above, a structure in which three or more oxide semiconductor layers are stacked may be used.

[Modification 2]
FIG. 5C shows a schematic cross-sectional view of the transistor 120 illustrated below. The transistor 120 is different from the transistor 100 and the transistor 1 in that the structure of the oxide semiconductor layer is different.
It is different from 10.

The oxide semiconductor layer 124 included in the transistor 120 is configured by stacking an oxide semiconductor layer 124a, an oxide semiconductor layer 124b, and an oxide semiconductor layer 124c in this order.

The oxide semiconductor layer 124a and the oxide semiconductor layer 124b are provided in a stacked manner over the insulating layer 103. Further, the oxide semiconductor layer 124c is provided in contact with the top surface of the oxide semiconductor layer 124b, and the top surface and side surfaces of the pair of electrodes 105a and 105b.

Among the oxide semiconductor layer 124a, the oxide semiconductor layer 124b, and the oxide semiconductor layer 124c,
The oxide semiconductor film of one embodiment of the present invention can be applied to one, two, or all of them.

For example, as the oxide semiconductor layer 124b, the oxide semiconductor layer 11 illustrated in Modification Example 1 above
A configuration similar to 4a can be used. Further, for example, the oxide semiconductor layers 124a, 124
As c, a structure similar to that of the oxide semiconductor layer 114b illustrated in Modification 1 above can be used.

For example, by using an oxide with a high Ga content that functions as a stabilizer for the oxide semiconductor layer 124a provided below the oxide semiconductor layer 124b and the oxide semiconductor layer 124c provided above, the oxide semiconductor Release of oxygen from the layer 124a, the oxide semiconductor layer 124b, and the oxide semiconductor layer 124c can be suppressed.

Further, for example, when a channel is mainly formed in the oxide semiconductor layer 124b, an oxide with a high In content is used for the oxide semiconductor layer 124b, and a pair of electrodes 105a and 105b are provided in contact with the oxide semiconductor layer 124b. By providing this, the on-state current of the transistor 120 can be increased.

[Other configuration examples of transistors]
A structure example of a top-gate transistor to which the oxide semiconductor film of one embodiment of the present invention can be applied will be described below.

In addition, in the following, components with the same configuration or similar functions as above,
The same reference numerals will be given, and duplicate content will be omitted.

[Configuration example]
FIG. 7A shows a schematic cross-sectional view of a top-gate transistor 150 illustrated below.

The transistor 150 includes an oxide semiconductor layer 10 over a substrate 101 provided with an insulating layer 151.
4, a pair of electrodes 105a and 105b in contact with the upper surface of the oxide semiconductor layer 104, an insulating layer 103 provided on the oxide semiconductor layer 104, a pair of electrodes 105a and 105b, and an insulating layer 1
A gate electrode 102 is provided over the oxide semiconductor layer 104 and overlaps with the oxide semiconductor layer 104. In addition, the insulating layer 10
An insulating layer 152 is provided covering the gate electrode 3 and the gate electrode 102 .

The oxide semiconductor film illustrated in Embodiment 1 can be applied to the oxide semiconductor layer 104.

The insulating layer 151 has a function of suppressing diffusion of impurities from the substrate 101 to the oxide semiconductor layer 104. Further, it may have a function of supplying oxygen to the oxide semiconductor layer 104 by heating. For example, it may have a structure similar to that of the insulating layer 106 or 107, or a stacked structure thereof.

The insulating layer 152 is an insulating layer from which oxygen is released by heating, and has a function of supplying oxygen to the oxide semiconductor layer 104. For example, the structure can be similar to that of the insulating layer 106 described above.

Further, the insulating layer 153 is an insulating layer that has a blocking effect against oxygen, hydrogen, water, and the like. For example, the structure can be similar to that of the insulating layer 107 described above.

Note that as the insulating layer 152, an insulating layer having an effect of blocking oxygen, hydrogen, water, or the like may be used. In that case, a configuration may be adopted in which the insulating layer 153 is not provided.

[Modification 3]
An example of a structure of a transistor that partially differs from the transistor 150 will be described below.

FIG. 7B shows a schematic cross-sectional view of a transistor 160 illustrated below. The transistor 160 is different from the transistor 150 in that the structure of the oxide semiconductor layer is different.

The oxide semiconductor layer 164 included in the transistor 160 includes an oxide semiconductor layer 164a, an oxide semiconductor layer 164b, and an oxide semiconductor layer 164c stacked in this order.

Among the oxide semiconductor layer 164a, the oxide semiconductor layer 164b, and the oxide semiconductor layer 164c,
The oxide semiconductor film exemplified in Embodiment 1 can be applied to one, two, or all of them.

For example, as the oxide semiconductor layer 164b, the oxide semiconductor layer 11 illustrated in Modification Example 1 above
A configuration similar to 4a can be used. Further, for example, the same structure as the oxide semiconductor layer 114b illustrated in Modification Example 1 can be used as the oxide semiconductor layer 164a and the oxide semiconductor layer 164c.

For example, by using an oxide with a high Ga content that functions as a stabilizer for the oxide semiconductor layer 164a provided below the oxide semiconductor layer 164b and the oxide semiconductor layer 164c provided above, the oxide semiconductor Release of oxygen from the layer 164a, the oxide semiconductor layer 164b, and the oxide semiconductor layer 164c can be suppressed.

[Modification 4]
Below, a configuration example of a transistor that partially differs from the transistor 150 and the transistor 160 will be described.

The transistor 170 illustrated in FIG. 7C differs from the transistor 150 and the transistor 160 in that the structures of an oxide semiconductor layer, a gate insulating layer, and the like are different.

Of the oxide semiconductor layers 164 included in the transistor 170, the oxide semiconductor layer 164c is provided to cover the oxide semiconductor layer 164b and the ends of the electrodes 105a and 105b.

Furthermore, the edges of the oxide semiconductor layer 164c and the insulating layer 103 are processed using the same photomask so that they substantially coincide with the edges of the gate electrode 102.

Further, the insulating layer 152 is provided in contact with side surfaces of the insulating layer 103 and the oxide semiconductor layer 164c.

In the transistor illustrated in this embodiment, the metal oxide film illustrated in Embodiment 1 is applied to a semiconductor layer in which a channel is formed. Therefore, trapping of carriers due to defects is suppressed, high field effect mobility can be achieved, and fluctuations in electrical characteristics are suppressed, resulting in a highly reliable transistor.

This embodiment mode can be implemented in appropriate combination with other embodiment modes described in this specification.

(Embodiment 3)
In this embodiment, a configuration example of a display panel according to one embodiment of the present invention will be described.

[Configuration example]
FIG. 8(A) is a top view of a display panel according to one embodiment of the present invention, and FIG. 8(B) is a top view of a display panel that can be used when a liquid crystal element is applied to a pixel of a display panel according to one embodiment of the present invention. FIG. 2 is a circuit diagram for explaining a pixel circuit. Further, FIG. 8C is a circuit diagram for explaining a pixel circuit that can be used when an organic EL element is applied to a pixel of a display panel according to one embodiment of the present invention.

A transistor placed in the pixel portion can be formed according to Embodiment Mode 2. Furthermore, since the transistor can easily be an n-channel transistor, a part of the drive circuit that can be configured with an n-channel transistor is formed over the same substrate as the transistor of the pixel portion. In this way, by using the transistor described in Embodiment 2 in the pixel portion and the driver circuit, a highly reliable display device can be provided.

An example of a block diagram of an active matrix display device is shown in FIG. 8(A). A pixel portion 501, a first scanning line driving circuit 502, a second scanning line driving circuit 503, and a signal line driving circuit 504 are provided on a substrate 500 of the display device. In the pixel portion 501, a plurality of signal lines are arranged extending from a signal line driving circuit 504, and a plurality of scanning lines are arranged extending from a first scanning line driving circuit 502 and a second scanning line driving circuit 503. It is located. Note that pixels each having a display element are provided in a matrix in the intersection area of the scanning line and the signal line. Further, the substrate 500 of the display device is connected to a timing control circuit (also referred to as a controller or control IC) via a connection portion such as an FPC (Flexible Printed Circuit).

In FIG. 8A, a first scan line driver circuit 502, a second scan line driver circuit 503, and a signal line driver circuit 504 are formed over the same substrate 500 as the pixel portion 501. Therefore, the number of externally provided components such as drive circuits is reduced, so that costs can be reduced. In addition, the board 5
If a drive circuit is provided outside the 00, it becomes necessary to extend the wiring, and the number of connections between the wirings increases. When driving circuits are provided on the same substrate 500, the number of connections between the wirings can be reduced, and reliability or yield can be improved.

[LCD panel]
Further, an example of the circuit configuration of a pixel is shown in FIG. 8(B). Here, a pixel circuit that can be applied to pixels of a VA type liquid crystal display panel is shown.

This pixel circuit can be applied to a structure in which one pixel has a plurality of pixel electrode layers. Each pixel electrode layer is connected to a different transistor, and each transistor is configured to be driven by a different gate signal. This makes it possible to independently control signals applied to individual pixel electrode layers of pixels designed in a multi-domain manner.

The gate wiring 512 of the transistor 516 and the gate wiring 513 of the transistor 517 are separated so that different gate signals can be applied to them. On the other hand, the source electrode layer or drain electrode layer 514 that functions as a data line is commonly used by the transistor 516 and the transistor 517. The transistors described in Embodiment 2 can be used as appropriate for the transistors 516 and 517. Thereby, a highly reliable liquid crystal display panel can be provided.

The shapes of a first pixel electrode layer electrically connected to the transistor 516 and a second pixel electrode layer electrically connected to the transistor 517 will be described. The shapes of the first pixel electrode layer and the second pixel electrode layer are separated by a slit. The first pixel electrode layer has a V-shaped expanding shape, and the second pixel electrode layer is formed to surround the outside of the first pixel electrode layer.

The gate electrode of the transistor 516 is connected to the gate wiring 512, and the gate electrode of the transistor 517 is connected to the gate wiring 512.
The gate electrode is connected to the gate wiring 513. Gate wiring 512 and gate wiring 51
By applying different gate signals to transistors 516 and 517, the operating timings of transistors 516 and 517 can be made different, thereby controlling the alignment of the liquid crystal.

Further, a storage capacitor may be formed by the capacitor wiring 510, a gate insulating film functioning as a dielectric, and a capacitor electrode electrically connected to the first pixel electrode layer or the second pixel electrode layer.

In the multi-domain structure, one pixel includes a first liquid crystal element 518 and a second liquid crystal element 519. The first liquid crystal element 518 is composed of a first pixel electrode layer, a counter electrode layer, and a liquid crystal layer therebetween, and the second liquid crystal element 519 is composed of a second pixel electrode layer, a counter electrode layer, and a liquid crystal layer therebetween. Consists of.

Note that the pixel circuit shown in FIG. 8(B) is not limited to this. For example, a switch, a resistive element, a capacitive element, a transistor, a sensor, a logic circuit, or the like may be newly added to the pixel shown in FIG. 8(B).

[Organic EL panel]
Another example of the circuit configuration of the pixel is shown in FIG. 8(C). Here, a pixel structure of a display panel using organic EL elements is shown.

In an organic EL element, by applying a voltage to a light emitting element, electrons are injected from one of a pair of electrodes and holes are injected from the other into a layer containing a luminescent organic compound, thereby causing a current to flow. Then, by recombining electrons and holes, the luminescent organic compound forms an excited state,
Light is emitted when the excited state returns to the ground state. Due to this mechanism, such a light emitting element is called a current excitation type light emitting element.

FIG. 8C is a diagram showing an example of an applicable pixel circuit. Here, an example is shown in which two n-channel transistors are used in one pixel. Note that the metal oxide film of one embodiment of the present invention can be used for a channel formation region of an n-channel transistor. Furthermore, digital time gray scale driving can be applied to the pixel circuit.

The configuration of an applicable pixel circuit and the operation of a pixel when digital time gradation driving is applied will be described.

The pixel 520 includes a switching transistor 521, a driving transistor 522, a light emitting element 524, and a capacitor 523. In the switching transistor 521, a gate electrode layer is connected to a scanning line 526, a first electrode (one of a source electrode layer and a drain electrode layer) is connected to a signal line 525, and a second electrode (a source electrode layer and a drain electrode layer) is connected to a signal line 525. ) is connected to the gate electrode layer of the driving transistor 522. Drive transistor 522
The gate electrode layer is connected to the power line 527 via the capacitor 523, the first electrode is connected to the power line 527, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 524. . The second electrode of the light emitting element 524 corresponds to the common electrode 528. The common electrode 528 is electrically connected to a common potential line formed on the same substrate.

As the switching transistor 521 and the driving transistor 522, the transistors described in Embodiment 2 can be used as appropriate. Thereby, a highly reliable organic EL display panel can be provided.

The potential of the second electrode (common electrode 528) of the light emitting element 524 is set to a low power supply potential. In addition,
The low power supply potential is a potential lower than the high power supply potential set to the power supply line 527, for example, GN
D, 0V, etc. can be set as the low power supply potential. A high power supply potential and a low power supply potential are set so as to be equal to or higher than the forward threshold voltage of the light emitting element 524, and the difference in potential is set to be equal to or higher than the forward threshold voltage of the light emitting element 524.
4, a current is applied to the light emitting element 524 to cause it to emit light. Note that the light emitting element 5
The forward voltage of 24 refers to the voltage for achieving desired brightness, and includes at least the forward threshold voltage.

Note that the capacitive element 523 can be omitted by substituting the gate capacitance of the driving transistor 522. Regarding the gate capacitance of the driving transistor 522, a capacitance may be formed between the channel formation region and the gate electrode layer.

Next, the signals input to the driving transistor 522 will be explained. In the case of the voltage input voltage driving method, a video signal is input to the driving transistor 522 so that the driving transistor 522 is either sufficiently turned on or turned off. Note that in order to operate the driving transistor 522 in a linear region, a voltage higher than the voltage of the power supply line 527 is applied to the gate electrode layer of the driving transistor 522. Further, a voltage equal to or higher than the sum of the power supply line voltage and the threshold voltage Vth of the driving transistor 522 is applied to the signal line 525.

When analog gradation driving is performed, the light emitting element 5 is connected to the gate electrode layer of the driving transistor 522.
A voltage greater than or equal to the sum of the forward voltage of the transistor 24 and the threshold voltage Vth of the driving transistor 522 is applied. Note that a video signal is input so that the driving transistor 522 operates in a saturation region, and a current flows through the light emitting element 524. Further, in order to operate the driving transistor 522 in a saturation region, the potential of the power supply line 527 is set higher than the gate potential of the driving transistor 522. By using an analog video signal, a current corresponding to the video signal can be caused to flow through the light emitting element 524, and analog gradation driving can be performed.

Note that the configuration of the pixel circuit is not limited to the pixel configuration shown in FIG. 8(C). For example, in Figure 8 (
A switch, a resistive element, a capacitive element, a sensor, a transistor, a logic circuit, or the like may be added to the pixel circuit shown in C).

This embodiment mode can be implemented in appropriate combination with other embodiment modes described in this specification.

(Embodiment 4)
In this embodiment, structural examples of a semiconductor device and an electronic device using a metal oxide film of one embodiment of the present invention will be described.

FIG. 9 is a block diagram of an electronic device including a semiconductor device to which a metal oxide film of one embodiment of the present invention is applied.

FIG. 10 is an external view of an electronic device including a semiconductor device to which a metal oxide film of one embodiment of the present invention is applied.

The electronic devices shown in FIG. 9 include an RF circuit 901, an analog baseband circuit 902, a digital baseband circuit 903, a battery 904, a power supply circuit 905, an application processor 906, a flash memory 910, a display controller 911, and a memory circuit 91.
2, a display 913, a touch sensor 919, an audio circuit 917, a keyboard 918, etc.

The application processor 906 has a CPU 907, a DSP 908, and an interface (IF) 909. Further, the memory circuit 912 can be configured with SRAM or DRAM.

By applying the transistor described in Embodiment 2 to the memory circuit 912, a highly reliable electronic device that can write and read information can be provided.

Furthermore, by applying the transistor described in Embodiment 2 to a register included in the CPU 907 or the DSP 908, a highly reliable electronic device that can write and read information can be provided.

Note that when the off-leakage current of the transistor described in Embodiment 2 is extremely small,
It is possible to provide a memory circuit 912 that is capable of long-term memory retention, is capable of long-term memory retention, and has sufficiently reduced power consumption. Also, during the power gating period, the CPU 907 or DSP 90 can store the state before power gating in a register or the like.
8 can be provided.

The display 913 also includes a display section 914, a source driver 915, and a gate driver 9.
It is made up of 16.

The display section 914 has a plurality of pixels arranged in a matrix. The pixel includes a pixel circuit, and the pixel circuit is electrically connected to a gate driver 916.

The transistor described in Embodiment 2 can be used for the pixel circuit or the gate driver 916 as appropriate. This makes it possible to provide a highly reliable display.

Examples of electronic devices include television devices (also called televisions or television receivers), computer monitors, cameras such as digital cameras and digital video cameras, digital photo frames, and mobile phones (mobile phones, mobile phones, etc.). (also referred to as devices), portable game machines, personal digital assistants, audio playback devices, and large game machines such as pachinko machines.

FIG. 10A shows a portable information terminal including a main body 1001, a casing 1002, and a display section 10.
03a, 1003b, etc. The display section 1003b is a touch panel, and by touching keyboard buttons 1004 displayed on the display section 1003b, screen operations and character input can be performed. Of course, the display section 1003a may be configured as a touch panel. By manufacturing a liquid crystal panel or an organic light-emitting panel using the transistor described in Embodiment 2 as a switching element and applying it to the display portions 1003a and 1003b, a highly reliable portable information terminal can be obtained.

The portable information terminal shown in FIG. 10(A) has the function of displaying various information (still images, videos, text images, etc.), the function of displaying a calendar, date or time, etc. The computer may have a function to manipulate or edit the information, a function to control processing by various software (programs), and the like. Further, a configuration may be adopted in which external connection terminals (earphone terminal, USB terminal, etc.), a recording medium insertion section, etc. are provided on the back surface or side surface of the casing.

Further, the portable information terminal shown in FIG. 10(A) may be configured to be able to transmit and receive information wirelessly. It is also possible to wirelessly purchase and download desired book data from an electronic book server.

FIG. 10B shows a portable music player, and a main body 1021 is provided with a display section 1023, a fixing section 1022 for wearing on the ear, a speaker, operation buttons 1024, an external memory slot 1025, and the like. By manufacturing a liquid crystal panel or an organic light-emitting panel using the transistor described in Embodiment 2 as a switching element, and applying it to the display portion 1023,
A more reliable portable music player can be obtained.

Furthermore, if the portable music player shown in FIG. 10(B) is equipped with an antenna, a microphone function, and a wireless function, and is linked to a mobile phone, it is possible to have a wireless hands-free conversation while driving a car or the like.

FIG. 10C shows a mobile phone, which is composed of two casings, a casing 1030 and a casing 1031. The housing 1031 includes a display panel 1032, a speaker 1033, a microphone 1034, a pointing device 1036, a camera lens 1037, an external connection terminal 1038, and the like. The housing 1030 also includes a solar cell 1040 for charging a mobile phone, an external memory slot 1041, and the like. Also, the antenna is located in the housing 1.
It is built inside 031. The transistor described in Embodiment 2 is used in the display panel 103.
By applying 2, a highly reliable mobile phone can be obtained.

Further, the display panel 1032 includes a touch panel, and in FIG. 10C, a plurality of operation keys 1035 whose images are displayed are indicated by dotted lines. Note that a booster circuit for boosting the voltage output by the solar cell 1040 to the voltage required for each circuit is also implemented.

For example, a power transistor used in a power supply circuit such as a booster circuit can also be formed by setting the thickness of the metal oxide film of the transistor described in Embodiment 2 to 2 μm or more and 50 μm or less.

The display direction of the display panel 1032 changes as appropriate depending on the mode of use. Furthermore, since a camera lens 1037 is provided on the same surface as the display panel 1032, videophone calls are possible. The speaker 1033 and microphone 1034 are capable of not only voice calls, but also video calls, recording, playback, and the like. Furthermore, the housing 1030 and the housing 1031 slide,
It is possible to change the state from the unfolded state to the overlapping state as shown in FIG. 10(C), and it is possible to reduce the size to be suitable for carrying.

The external connection terminal 1038 can be connected to various cables such as an AC adapter and a USB cable, and can perform charging and data communication with a personal computer or the like. Furthermore, by inserting a recording medium into the external memory slot 1041, it is possible to store and move a larger amount of data.

In addition to the above functions, the device may also have an infrared communication function, a television reception function, etc.

FIG. 10(D) shows an example of a television device. The television device 1050 includes a display section 1053 built into a housing 1051. The display unit 1053 can display images. Further, a CPU is built into a stand 1055 that supports the housing 1051. By applying the transistor described in Embodiment 2 to the display portion 1053 and the CPU, the television device 1050 can have high reliability.

The television device 1050 can be operated using an operation switch included in the housing 1051 or a separate remote control device. Further, the remote control device may be provided with a display unit that displays information output from the remote control device.

Note that the television device 1050 is configured to include a receiver, a modem, and the like. The receiver can receive general television broadcasts, and can be connected to a wired or wireless communication network via a modem, allowing one-way (sender to receiver) or two-way (sender to receiver) It is also possible to communicate information between recipients or between recipients.

The television device 1050 also includes an external connection terminal 1054 and a storage medium playback/recording unit 1.
052, with an external memory slot. The external connection terminal 1054 can be connected to various cables such as a USB cable, and data communication with a personal computer or the like is possible. In the storage medium reproduction/recording section 1052, a disk-shaped recording medium can be inserted, and data stored in the recording medium can be read and written to the recording medium. It is also possible to display images, videos, etc. stored in an external memory 1056 inserted into an external memory slot on the display unit 1053.

Furthermore, when the off-leakage current of the transistor described in Embodiment 2 is extremely small,
By applying the transistor to the external memory 1056 and the CPU, the television device 1050 can have high reliability and sufficiently reduced power consumption.

100 Transistor 101 Substrate 102 Gate electrode 103 Insulating layer 104 Oxide semiconductor layer 105a Electrode 105b Electrode 106 Insulating layer 107 Insulating layer 110 Transistor 114 Oxide semiconductor layer 114a Oxide semiconductor layer 114b Oxide semiconductor layer 120 Transistor 124 Oxide semiconductor layer 124a Oxide semiconductor layer 124b Oxide semiconductor layer 124c Oxide semiconductor layer 150 Transistor 151 Insulating layer 152 Insulating layer 153 Insulating layer 160 Transistor 164 Oxide semiconductor layer 164a Oxide semiconductor layer 164b Oxide semiconductor layer 164c Oxide semiconductor layer 170 Transistor 500 Substrate 501 Pixel portion 502 Scanning line drive circuit 503 Scanning line drive circuit 504 Signal line drive circuit 510 Capacitor wiring 512 Gate wiring 513 Gate wiring 514 Drain electrode layer 516 Transistor 517 Transistor 518 Liquid crystal element 519 Liquid crystal element 520 Pixel 521 Switching transistor 522 Drive Transistor 523 Capacitive element 524 Light emitting element 525 Signal line 526 Scanning line 527 Power line 528 Common electrode 901 RF circuit 902 Analog baseband circuit 903 Digital baseband circuit 904 Battery 905 Power supply circuit 906 Application processor 907 CPU
908 DSP
910 Flash memory 911 Display controller 912 Memory circuit 913 Display 914 Display section 915 Source driver 916 Gate driver 917 Audio circuit 918 Keyboard 919 Touch sensor 1001 Main body 1002 Housing 1003a Display section 1003b Display section 1004 Keyboard button 1021 Main body 1022 Fixed section 1023 Display section 1024 Operation buttons 1025 External memory slot 1030 Housing 1031 Housing 1032 Display panel 1033 Speaker 1034 Microphone 1035 Operation keys 1036 Pointing device 1037 Camera lens 1038 External connection terminal 1040 Solar battery cell 1041 External memory slot 1050 Television device 1051 Housing 1052 Storage medium playback/recording section 1053 Display section 1054 External connection terminal 1055 Stand 1056 External memory

Claims (1)

Contains In, Ga, and Zn,
In the cross-sectional observation image, a plurality of first layers in which In atoms are arranged periodically and a plurality of second layers in which Ga atoms or Zn atoms are arranged periodically are observed,
a first region having n (n is a natural number) said second layers between a pair of said first layers;
a second region having m (m is a natural number other than n) second layers between another pair of the first layers;
Metal oxide film.

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