JP2021036626A - Lead frame and semiconductor device - Google Patents

Abstract

To provide a lead frame, and a semiconductor device that can alleviate the stress generated at the corners during a drop test of a semiconductor device and prevent cracks from occurring in a solder provided at a terminal.SOLUTION: A lead frame 10 includes a die pad 11, a plurality of lead portions 12A and 12B provided around the die pad 11 and including terminal portions 53 and 63 and inner leads 51 and 61, respectively, and a hanging lead 14 connected to the die pad 11. Terminal portions 53 and 63 of the plurality of lead portions 12A and 12B are arranged along a plurality of rows in a plan view. The hanging lead 14 includes a thin-walled region 14a thinned from the back surface side, and a corner pad 18 thicker than the thin-walled region 14a is provided at the outer end of the hanging lead 14.SELECTED DRAWING: Figure 1

Description

The present invention relates to lead frames and semiconductor devices.

In recent years, there has been a demand for miniaturization and thinning of semiconductor devices mounted on substrates. In order to meet such demands, a so-called QFN is conventionally configured by using a lead frame, sealing a semiconductor element mounted on the mounting surface with a sealing resin, and exposing a part of the lead on the back surface side. Various (Quad Flat Non-lead) type semiconductor devices have been proposed.

However, in the case of a QFN having a conventional general structure, the package becomes larger as the number of terminals increases, so that there is a problem that it becomes difficult to secure mounting reliability. On the other hand, as a technique for realizing a multi-pin QFN, a package in which external terminals are arranged in two rows is being developed (for example, Patent Document 1). Such a package is also called a DR-QFN (Dual Row QFN) package.

Japanese Unexamined Patent Publication No. 2006-19767

In recent years, in producing a DR-QFN package, it has been required to increase the number of lead portions (number of pins) without changing the chip size. On the other hand, conventionally, a method of increasing the package size has been adopted in order to increase the number of pins.

By the way, as one of the durability tests for packages used for mobile devices, for example, a drop test is performed in which the package is mounted on a mounting substrate and then dropped to confirm the durability of the package. However, when the package becomes large, the weight of the package increases, so that the stress at the time of dropping becomes large, and there is a problem that the solder connecting the package and the mounting substrate is liable to crack during the drop test. At this time, the stress tends to be concentrated on the corners of the package, and cracks tend to occur in the solder provided at the terminals near the corners. On the other hand, a method of embedding an underfill between the package and the mounting board to firmly connect the package and the mounting board has been adopted, but there is a problem that it leads to an increase in cost.

The present invention has been made in consideration of such a point, and it is possible to alleviate the stress generated at the corner portion during the drop test of the semiconductor device and prevent the solder provided at the terminal portion from being cracked. It is an object of the present invention to provide a possible lead frame and semiconductor device.

The present invention is a lead frame for manufacturing a semiconductor device, and includes a die pad on which a semiconductor element is mounted, and an inner lead provided around the die pad and extending inward from the terminal portion, respectively. A plurality of lead portions, the terminal portions of the plurality of lead portions, include a plurality of lead portions arranged along a plurality of rows in a plan view, and hanging leads connected to the die pad. The hanging lead is a lead frame having a thin-walled region thinned from the back surface side, and a corner pad thicker than the thin-walled region is provided at an outer end portion of the hanging lead. is there.

The present invention is a lead frame characterized in that the inner lead is thinner than the terminal portion.

The present invention is a lead frame characterized in that the area of the corner pad is larger than the area of the terminal portion.

The present invention is a lead frame characterized in that a stretched portion extending from the corner pad toward the terminal portion side is connected to the corner pad, and the stretched portion is thinned from the back surface side.

The present invention is a lead frame characterized in that a through hole is formed in the hanging lead.

The present invention is a lead frame characterized in that the corner pad reaches the outer peripheral edge of the semiconductor device.

The present invention is a lead frame characterized in that the corner pad is located inside the outer peripheral edge of the semiconductor device.

The present invention is a lead frame characterized in that a non-through hole or a notch is formed on the back surface of the corner pad.

The present invention is a lead frame characterized in that a plurality of corner pads are provided at the outer end portion of the hanging reed.

The present invention is a lead frame characterized in that a dummy pad thicker than the thin-walled region is provided at a position between the die pad and the corner pad in the hanging reed.

The present invention is a lead frame characterized in that a groove is formed on the back surface of the dummy pad.

The present invention is a lead frame characterized in that a groove is formed at a corner portion of the die pad.

The present invention is a semiconductor device, which is a plurality of lead portions including a die pad and an inner lead provided around the die pad and extending inward from the terminal portion, respectively, and the plurality of lead portions. The terminal portions of the above are a plurality of lead portions arranged along a plurality of rows in a plan view, a hanging lead connected to the die pad, a semiconductor element mounted on the die pad, and the semiconductor element. A sealing resin that seals a connecting member that electrically connects the inner lead of each lead portion, the die pad, the plurality of lead portions, the hanging lead, the semiconductor element, and the connecting member. The hanging lead has a thin-walled region thinned from the back surface side, and a corner pad thicker than the thin-walled region is provided at the outer end of the hanging lead. It is a semiconductor device.

According to the present invention, it is possible to alleviate the stress generated in the corner portion during the drop test of the semiconductor device and prevent the solder provided in the terminal portion from being cracked.

FIG. 1 is a plan view showing a lead frame according to an embodiment of the present invention. FIG. 2 is a bottom view showing a lead frame according to an embodiment of the present invention. FIG. 3 is a cross-sectional view showing a lead frame according to an embodiment of the present invention (cross-sectional view taken along line III-III of FIG. 1). FIG. 4 is an enlarged plan view (partially enlarged view of FIG. 1) showing a lead frame according to an embodiment of the present invention. FIG. 5 is a cross-sectional view showing a hanging lead and a corner pad (cross-sectional view taken along line VV of FIG. 4). FIG. 6 is a cross-sectional view showing a corner pad and an extended portion (VI-VI line cross-sectional view of FIG. 4). FIG. 7 is a plan view showing a semiconductor device according to an embodiment of the present invention. FIG. 8 is a sectional view showing a semiconductor device according to an embodiment of the present invention (FIG. VIII-VIII sectional view of FIG. 7). 9 (a)-(e) are cross-sectional views showing a method of manufacturing a lead frame according to an embodiment of the present invention. 10 (a)-(e) are cross-sectional views showing a method of manufacturing a semiconductor device according to an embodiment of the present invention. 11 (a) is an enlarged bottom view showing a lead frame according to a modified example (modified example 1) of the embodiment of the present invention, and FIG. 11 (b) is a sectional view taken along line XI-XI of FIG. 11 (a). .. FIG. 12 (a) is an enlarged bottom view showing a lead frame according to a modified example (modified example 2) of the embodiment of the present invention, and FIG. 12 (b) is a sectional view taken along line XII-XII of FIG. 12 (a). .. FIG. 13 is an enlarged bottom view showing a lead frame according to a modified example (modified example 3) of the embodiment of the present invention. FIG. 14 is an enlarged bottom view showing a lead frame according to a modified example (modified example 4) of the embodiment of the present invention. FIG. 15 is an enlarged bottom view showing a lead frame according to a modified example (modified example 5) of the embodiment of the present invention. FIG. 16 is an enlarged bottom view showing a lead frame according to a modified example (modified 6) of the embodiment of the present invention. FIG. 17 (a) is an enlarged bottom view showing a lead frame according to a modified example (modified example 7) of the embodiment of the present invention, and FIG. 17 (b) is a sectional view taken along line XVII-XVII of FIG. 17 (a). .. FIG. 18 is an enlarged bottom view showing a lead frame according to a modified example (modified example 8) of the embodiment of the present invention. FIG. 19 is an enlarged bottom view showing a lead frame according to a modified example (modified example 9) of the embodiment of the present invention.

Hereinafter, an embodiment of the present invention will be described with reference to FIGS. 1 to 10. In each of the following figures, the same parts are designated by the same reference numerals, and some detailed description may be omitted.

Configuration of Lead Frame First, the outline of the lead frame according to the present embodiment will be described with reference to FIGS. 1 to 6. 1 to 6 are diagrams showing lead frames according to the present embodiment.

As shown in FIGS. 1 to 3, the lead frame 10 includes one or a plurality of unit lead frames 10a. Each unit lead frame 10a is provided around a planar rectangular die pad 11 on which the semiconductor element 21 (described later) is mounted, and a plurality of elongated first portions that are provided around the die pad 11 and connect the semiconductor element 21 and an external circuit (not shown). It includes one lead portion 12A and a second lead portion 12B. The unit lead frame 10a is a region corresponding to the semiconductor device 20 (described later), and is a region located inside the virtual line in FIGS. 1 and 2. Further, the virtual lines of FIGS. 1 and 2 correspond to the outer peripheral edge of the semiconductor device 20.

The plurality of unit lead frames 10a are connected to each other via a support lead (support member) 13. The support lead 13 supports the die pad 11, the first lead portion 12A, and the second lead portion 12B, and extends along the X direction and the Y direction, respectively. The support reed 13 is not half-etched and has the same thickness as the metal substrate before processing (metal substrate 31 described later). Here, the X direction and the Y direction are two directions parallel to each side of the die pad 11 in the plane of the lead frame 10, and the X direction and the Y direction are orthogonal to each other. Further, the Z direction is a direction perpendicular to both the X direction and the Y direction.

The die pad 11 has a substantially square shape in a plane, and a semiconductor element 21 described later is mounted on the surface thereof. The planar shape of the die pad 11 is not limited to a square, but may be a polygon such as a rectangle. Further, suspension leads 14 are connected to the four corners of the die pad 11, and the die pad 11 is connected and supported by the support leads 13 via the four suspension leads 14. In the present specification, the “front surface” refers to the surface on which the semiconductor element 21 is mounted, and the “back surface” refers to the surface on the opposite side of the “front surface” and is mounted on an external mounting board (not shown). The side to be connected.

The die pad 11 has a die pad thick portion 11a located at the center and a die pad thin portion 11b formed over the entire periphery of the die pad thick portion 11a. Of these, the die pad thick portion 11a is not half-etched and has the same thickness as the metal substrate before processing (metal substrate 31 described later). Specifically, the thickness of the die pad thick portion 11a can be 80 μm or more and 200 μm or less, although it depends on the configuration of the semiconductor device 20. On the other hand, the die pad thin-walled portion 11b is formed to be thin-walled from the back surface side by half etching. In addition, half etching means etching the material to be etched halfway in the thickness direction thereof. The thickness of the material to be etched after half-etching is, for example, 30% or more and 70% or less, preferably 40% or more and 60% or less of the thickness of the material to be etched before half-etching. By providing the die pad thin portion 11b in this way, it is possible to prevent the die pad 11 from being separated from the sealing resin 23 (described later).

Each of the first lead portions 12A and each second lead portion 12B is connected to the semiconductor element 21 via a bonding wire 22 as described later, and is arranged between the first lead portion 12A and the die pad 11 via a space. .. Each of the first lead portions 12A and each second lead portion 12B extends from the support lead 13.

The first lead portions 12A and the second lead portions 12B are alternately arranged along the periphery of the die pad 11. The adjacent first lead portions 12A and second lead portions 12B have a shape that is electrically insulated from each other after the semiconductor device 20 (described later) is manufactured. Further, the first lead portion 12A and the second lead portion 12B have a shape that is electrically insulated from the die pad 11 after the semiconductor device 20 is manufactured. External terminals 17A and 17B electrically connected to an external mounting board (not shown) are formed on the back surfaces of the first lead portion 12A and the second lead portion 12B, respectively. Each of the external terminals 17A and 17B is exposed to the outside from the semiconductor device 20 after the semiconductor device 20 (described later) is manufactured.

In this case, the plurality of external terminals 17A and 17B of the first lead portion 12A and the second lead portion 12B are arranged along the plurality of rows (two rows) in a plan view. Specifically, the external terminals 17A and 17B are alternately arranged in a staggered manner in a plan view so as to be located inside and outside between the adjacent first lead portions 12A and the second lead portions 12B. Each external terminal 17A is located inside (die pad 11 side), and each external terminal 17B is located outside (support lead 13 side). The plurality of external terminals 17A and the plurality of external terminals 17B are arranged on different straight lines, and the straight line on which the plurality of external terminals 17A are arranged and the straight line on which the plurality of external terminals 17B are arranged are parallel to each other. Further, around the die pad 11, the first lead portion 12A having the inner outer terminal 17A and the second lead portion 12B having the outer outer terminal 17B are alternately arranged over the entire circumference. As a result, the problems that the external terminals 17A and 17B of the first lead portion 12A and the second lead portion 12B are short-circuited to the adjacent first lead portion 12A and the second lead portion 12B are prevented.

Next, the configurations of the first lead portion 12A and the second lead portion 12B will be further described.

As shown in FIGS. 1 to 3, the first lead portion 12A having the inner external terminal 17A has an inner lead 51, a connection lead 52, and a terminal portion 53. Of these, the inner lead 51 extends inward (on the die pad 11 side) from the terminal portion 53, and a bonding region 15 is formed at the tip portion thereof. The bonding region 15 is a region electrically connected to the semiconductor element 21 via the bonding wire 22 as described later, and serves as an internal terminal. Therefore, a plating portion for improving the adhesion with the bonding wire 22 may be provided on the bonding region 15. In addition, each inner lead 51 has a portion extending at a right angle to the support lead 13 and a portion extending at an angle with respect to the support lead 13 in a plan view.

The connection lead 52 extends from the terminal portion 53 to the outside (support lead 13 side), and its base end portion is connected to the support lead 13. The connection lead 52 extends perpendicular to the support lead 13 to which the connection lead 52 is connected. An external terminal 17A is formed on the back surface of the terminal portion 53.

The inner lead 51 and the connecting lead 52 of the first lead portion 12A are each thinned by half etching from the back surface side. On the other hand, the terminal portion 53 has the same thickness as the die pad thick portion 11a and the support lead 13 of the die pad 11 without being half-etched. As described above, since the thickness of the inner lead 51 and the connection lead 52 is thinner than the thickness of the terminal portion 53, the narrow first lead portion 12A can be formed with high accuracy, and the semiconductor device is small and has a large number of pins. 20 can be obtained.

On the other hand, the second lead portion 12B having the outer outer terminal 17B has an inner lead 61 and a terminal portion 63. Of these, the inner lead 61 extends inward (on the die pad 11 side) from the terminal portion 63, and a bonding region 15 is formed at the tip portion thereof.
The bonding region 15 is a region electrically connected to the semiconductor element 21 via the bonding wire 22, and serves as an internal terminal. Therefore, a plating portion for improving the adhesion with the bonding wire 22 may be provided on the bonding region 15. Each inner lead 61 has a portion extending at a right angle to the support lead 13 and a portion extending at an angle with respect to the support lead 13 in a plan view.

The terminal portion 63 is connected to the support lead 13 on the proximal end side thereof, and extends perpendicularly to the support lead 13.

The inner lead 61 of the second lead portion 12B is formed to be thin by half etching from the back surface side. Further, the terminal portion 63 has the same thickness as the die pad thick portion 11a and the support lead 13 of the die pad 11 without being half-etched. As described above, since the thickness of the inner reed 61 is thinner than the thickness of the terminal 63, the narrow second reed portion 12B can be formed with high accuracy, and a small semiconductor device 20 having a large number of pins can be obtained. be able to.

Next, the configuration of the suspension lead 14 and its surroundings will be described with reference to FIGS. 4 to 6.

As shown in FIG. 4, the suspension lead 14 is connected to the die pad thin-walled portion 11b of the die pad 11, and extends substantially linearly from the corner portion of the die pad 11 toward the corner portion of the unit lead frame 10a. In this case, the suspension lead 14 is inclined at an angle of about 45 ° in the plane with respect to the X direction and the Y direction.

The hanging lead 14 has a thin-walled region 14a thinned by half-etching from the back surface side. The thickness of the thin-walled region 14a is substantially the same as the thickness of the die-pad thin-walled portion 11b of the die pad 11, and specifically, it can be 55 μm or more and 105 μm or less.

Further, a corner pad 18 thicker than the thin region 14a is provided at the outer end (support lead 13 side) end of the suspension lead 14. In this case, the planar shape of the corner pad 18 is substantially square, and each side thereof is parallel to the X direction or the Y direction. Further, the corner pad 18 reaches the outer peripheral edge of the unit lead frame 10a (that is, the outer peripheral edge of the semiconductor device 20), and two sides of the corner pad 18 orthogonal to each other are connected to the support lead 13. The planar shape of the corner pad 18 is not limited to a square, but may be a polygon such as a rectangle, a circle, an ellipse, or the like.

As shown in FIGS. 5 and 6, the corner pad 18 is not half-etched and has the same thickness as the metal substrate before processing (metal substrate 31 described later). That is, the back surface of the corner pad 18 is exposed to the outside from the back surface of the semiconductor device 20 after the semiconductor device 20 is manufactured. In this case, the corner pad 18 is soldered to an external mounting board (not shown). Further, the corner pad 18 may be used as, for example, a ground (GND) terminal.

As shown in FIG. 4, the area of the corner pad 18 is larger than the area of each of the external terminals 17A and 17B. The width w ₁ (length parallel to the X direction or the Y direction) of the corner pad 18 may be, for example, 180 μm or more and 500 μm or less. As a result, it is possible to alleviate the stress generated at the corners of the semiconductor device 20 during the drop test of the semiconductor device 20 and prevent the external terminals 17A and 17B from peeling off from the sealing resin 23.

Further, the corner pad 18 is connected to an extension portion 19 extending from the corner pad 18 toward the terminal portions 53 and 63. In this case, a total of two extending portions 19 extend from one corner pad 18, one in each of the X direction and the Y direction. Further, the extension portion 19 is also connected to the support lead 13 and the suspension lead 14. The planar shape of the stretched portion 19 is rectangular, but the shape is not limited to this, and a polygonal shape or the like may be used. The width w ₂ (length parallel to the X direction or the Y direction) of the stretched portion 19 may be the same as or wider than _{the width w 1 of the corner pad 18 (w 2} ≧ w ₁ ), specifically. , 180 μm or more and 500 μm or less may be used.

As shown in FIG. 6, the stretched portion 19 is thinned by half etching from the back surface side. Therefore, in the cross section shown in FIG. 6, the corner pad 18 and the stretched portion 19 are formed in a stepped shape from the back surface side. Further, the stretched portion 19 is continuously formed with respect to the thin-walled region 14a of the suspension lead 14, and has substantially the same thickness as the thin-walled region 14a.

As shown in FIGS. 4 and 5, a through hole 14b is formed in the region of the suspension lead 14 on the corner pad 18 side. The through hole 14b penetrates the suspension lead 14 in the thickness direction. The planar shape of the through hole 14b is circular, but is not limited to this, and may be an elliptical shape, a polygonal shape, or the like. By forming the through hole 14b in the suspension lead 14 in this way, the sealing resin 23 (described later) enters the through hole 14b, and the suspension lead 14 and the sealing resin 23 can be firmly connected.

Further, the suspension lead 14 has a first portion 14c having a substantially uniform width along the longitudinal direction, and a second portion 14d whose width gradually increases from the first portion 14c toward the through hole 14b side. doing. In this case, the first portion 14c and the second portion 14d both form a part of the thin-walled region 14a. By providing the second portion 14d, which is wider than the first portion 14c, it is possible to prevent the strength of the thin-walled region 14a from decreasing around the through hole 14b.

The lead frame 10 described above is composed of a metal such as copper, a copper alloy, and a 42 alloy (Ni 42% Fe alloy) as a whole. The thickness of the lead frame 10 can be 80 μm or more and 200 μm or less, although it depends on the configuration of the semiconductor device 20 to be manufactured.

In the present embodiment, the first lead portion 12A and the second lead portion 12B are arranged along all four sides of the die pad 11, but the present invention is not limited to this, and for example, the die pads 11 face each other. It may be arranged along only two sides.

Further, in the present embodiment, the case where the external terminals 17A of the first lead portion 12A and the external terminals 17B of the second lead portion 12B are arranged in two rows in a staggered manner has been described as an example, but the present invention is limited to this. Instead, the external terminals may be arranged in three or more rows.

Configuration of Semiconductor Device Next, the semiconductor device according to the present embodiment will be described with reference to FIGS. 7 and 8. 7 and 8 are diagrams showing a semiconductor device (DR-QFN (Dual Row QFN) type) according to the present embodiment.

As shown in FIGS. 7 and 8, the semiconductor device (semiconductor package) 20 includes a die pad 11, a plurality of first lead portions 12A and a plurality of second lead portions 12B arranged around the die pad 11, and a die pad 11. The semiconductor element 21 mounted above and a plurality of bonding wires (connecting members) 22 for electrically connecting the first lead portion 12A or the second lead portion 12B and the semiconductor element 21 are provided. Suspension leads 14 are connected to the four corners of the die pad 11, and corner pads 18 and extension portions 19 are provided at the outer ends of the suspension leads 14. The die pad 11, the first lead portion 12A, the second lead portion 12B, the hanging lead 14, the corner pad 18, the stretched portion 19, the semiconductor element 21, and the bonding wire 22 are resin-sealed with the sealing resin 23.

Of these, the die pad 11, the first lead portion 12A, the second lead portion 12B, the suspension lead 14, and the corner pad 18 are manufactured from the lead frame 10 described above.
The configurations of the die pad 11, the first lead portion 12A, the second lead portion 12B, the suspension lead 14, the corner pad 18, and the extension portion 19 are described in FIGS. 1 to 6 except for a region not included in the semiconductor device 20. Since it is the same as that shown in the above, detailed description thereof will be omitted here.

Further, as the semiconductor element 21, various semiconductor elements generally used in the past can be used, and the present invention is not particularly limited, but for example, an integrated circuit, a large-scale integrated circuit, a transistor, a thyristor, a diode, or the like can be used. it can. Each of the semiconductor elements 21 has a plurality of electrodes 21a to which the bonding wires 22 are attached. Further, the semiconductor element 21 is fixed to the surface of the die pad 11 with an adhesive 24 such as a die bonding paste.

Each bonding wire 22 is made of a highly conductive material such as gold or copper. One end of each bonding wire 22 is connected to the electrode 21a of the semiconductor element 21, and the other end is connected to the bonding region 15 of each first lead portion 12A or second lead portion 12B. The bonding region 15 may be provided with a plating portion that improves adhesion to the bonding wire 22.

As the sealing resin 23, a thermosetting resin such as a silicone resin or an epoxy resin, or a thermoplastic resin such as a PPS resin can be used. The thickness of the entire sealing resin 23 can be about 300 μm or more and 1200 μm or less. Further, one side of the sealing resin 23 (one side of the semiconductor device 20) can be, for example, 8 mm or more and 16 mm or less. In FIG. 7, the display of the portion of the sealing resin 23 located on the surface side of the die pad 11, the first lead portion 12A, and the second lead portion 12B is omitted.

Method for Manufacturing Lead Frame Next, the method for manufacturing the lead frame 10 shown in FIGS. 1 to 6 will be described with reference to FIGS. 9 (a) and 9 (e). 9 (a)-(e) are cross-sectional views (corresponding to FIG. 3) showing a method of manufacturing the lead frame 10.

First, as shown in FIG. 9A, a flat metal substrate 31 is prepared. As the metal substrate 31, a substrate made of a metal such as copper, a copper alloy, or a 42 alloy (Ni 42% Fe alloy) can be used. It is preferable to use a metal substrate 31 which has been subjected to a cleaning treatment by degreasing or the like on both sides thereof.

Next, photosensitive resists 32a and 33a are applied to the entire front and back surfaces of the metal substrate 31, and the resists 32a and 33a are dried (FIG. 9B). As the photosensitive resists 32a and 33a, conventionally known ones can be used.

Subsequently, the metal substrate 31 is exposed to a photomask and developed to form etching resist layers 32 and 33 having desired openings 32b and 33b (FIG. 9C).

Next, the metal substrate 31 is etched with a corrosion solution using the etching resist layers 32 and 33 as corrosion resistant films (FIG. 9 (d)). As a result, the outer shapes of the die pad 11, the first lead portion 12A, the second lead portion 12B, the suspension lead 14, the corner pad 18, and the extension portion 19 are formed. At this time, by appropriately adjusting the shapes of the etching resist layers 32 and 33, a thin-walled thin-walled region 14a is formed on the back surface of the hanging lead 14, and the outer end of the hanging lead 14 is more than the thin-walled region 14a. A thick corner pad 18 is formed (see FIGS. 1 to 3). The corrosion liquid can be appropriately selected according to the material of the metal substrate 31 to be used. For example, when copper is used as the metal substrate 31, an aqueous ferric chloride solution is usually used and both sides of the metal substrate 31 are used. Can be spray etched from.

Then, by peeling off and removing the etching resist layers 32 and 33, the lead frame 10 shown in FIGS. 1 to 6 can be obtained. (Fig. 9 (e)).

In the above description, the case where spray etching is performed from both sides of the metal substrate 31 has been described as an example, but the present invention is not limited to this. For example, two-step spray etching may be performed on each side of the metal substrate 31. Specifically, first, a first etching resist layer is provided on the entire front surface side of the metal substrate 31, and a second etching resist layer having a predetermined pattern is formed on the back surface side, and only the back surface side of the metal substrate 31 is formed. Etching is applied. Next, the first and second etching resist layers are removed, and a sealing layer made of an etching-resistant resin is provided on the back surface side of the metal substrate 31. Subsequently, a third etching resist layer having a predetermined pattern is formed on the surface side of the metal substrate 31, and in this state, only the surface side of the metal substrate 31 is etched. After that, the outer shape of the lead frame 10 is formed by peeling off the sealing layer on the back surface side. By performing spray etching on each side of the metal substrate 31 in this way, it is possible to easily avoid deformation of the first lead portion 12A and the second lead portion 12B.

Manufacturing Method of Semiconductor Device Next, the manufacturing method of the semiconductor device 20 shown in FIGS. 7 and 8 will be described with reference to FIGS. 10A and 10E.

First, for example, the lead frame 10 is manufactured by the method shown in FIGS. 9 (a)-(e) (FIG. 10 (a)).

Next, the semiconductor element 21 is mounted on the die pad 11 of the lead frame 10. In this case, the semiconductor element 21 is placed and fixed on the die pad 11 by using an adhesive 24 such as a die bonding paste (diaattachment step) (FIG. 10 (b)).

Next, each electrode 21a of the semiconductor element 21 and the bonding region 15 of each of the first lead portions 12A and the second lead portion 12B are electrically connected to each other by a bonding wire (connecting member) 22 (wire bonding step). ) (Fig. 10 (c)).

Next, the sealing resin 23 is formed by injection molding or transfer molding a thermosetting resin or a thermoplastic resin on the lead frame 10 (FIG. 10 (d)). In this way, the lead frame 10, the first lead portion 12A, the second lead portion 12B, the suspension lead 14, the corner pad 18, the stretched portion 19, the semiconductor element 21, and the bonding wire 22 are sealed.

Next, the lead frame 10 is separated for each semiconductor device 20 by dicing the sealing resin 23 between the semiconductor elements 21. At this time, the lead frame 10 and the sealing resin 23 between the semiconductor devices 20 may be cut while rotating a blade (not shown) made of, for example, a diamond grindstone.

In this way, the semiconductor device 20 shown in FIGS. 7 and 8 is obtained (FIG. 10 (e)).

By the way, the semiconductor device 20 produced in this way is connected to a mounting substrate (not shown). At this time, the semiconductor device 20 is connected to the mounting substrate by solder provided on the corner pads 18 in addition to the terminal portions 53 and 63. After that, a drop test is performed in which the semiconductor device 20 connected to the mounting substrate is dropped.

According to the present embodiment, the suspension lead 14 has a thin-walled region 14a thinned from the back surface side, and a corner pad 18 thicker than the thin-walled region 14a is provided at the outer end of the suspension lead 14. ing. As a result, when the semiconductor device 20 is connected to a mounting substrate (not shown) and a drop test is performed, stress is mainly applied to the corner pad 18. Therefore, the stress at the time of dropping does not concentrate on the terminal portions 53 and 63. As a result, it is possible to prevent a problem that cracks occur in the solder provided on the terminal portions 53 and 63 during the drop test. Further, since no special step for forming the corner pad 18 is required, there is no possibility that the manufacturing cost will increase as compared with the case where the underfill is embedded between the semiconductor device 20 and the mounting substrate, for example.

Further, according to the present embodiment, since the area of the corner pad 18 is larger than the area of the terminal portions 53 and 63, the adhesion strength between the semiconductor device 20 and the mounting substrate can be further increased. In particular, in the DR-QFN type semiconductor device 20 as in the present embodiment, the die pad 11 and the terminal portions 53 and 63 are separated from each other. Therefore, in such a semiconductor device 20, the connection area between the semiconductor device 20 and the mounting substrate tends to be smaller than the total area of the semiconductor device 20. According to this embodiment, the semiconductor device 20 can be connected to the mounting board by using not only the terminal portions 53 and 63 but also the corner pads 18, so that the adhesion strength between the semiconductor device 20 and the mounting board can be increased. Can be done.

Further, according to the present embodiment, the corner pad 18 is connected to the stretched portion 19 extending from the corner pad 18 toward the terminal portions 53 and 63, and the stretched portion 19 is thinned from the back surface side. This makes it possible to prevent the corner pad 18 from easily falling off from the sealing resin 23.

Further, according to the present embodiment, since the suspension lead 14 is formed with the through hole 14b, the adhesion between the suspension lead 14 and the sealing resin 23 can be improved.

Further, according to the present embodiment, the corner pad 18 reaches the outer peripheral edge of the semiconductor device 20. As a result, when the semiconductor device 20 is connected to a mounting substrate (not shown) and a drop test is performed, the stress applied to the semiconductor device 20 is concentrated on the corner pads 18, and cracks are generated in the solder provided on the terminal portions 53 and 63. It is possible to prevent this from happening more reliably.

Modification Example Next, a modification of the lead frame according to the present embodiment will be described with reference to FIGS. 11 to 19. In FIGS. 11 to 19, the same parts as those in the embodiments shown in FIGS. 1 to 10 are designated by the same reference numerals, and detailed description thereof will be omitted.

Modification 1
11 (a) and 11 (b) are views showing a modified example (modified example 1) of the present embodiment. In FIGS. 11A and 11B, a non-through hole 41 is formed on the back surface of the corner pad 18. The non-through hole 41 is formed from the back surface side by half etching, and does not penetrate to the front surface side. The depth of the non-through hole 41 is, for example, 30% or more and 70% or less of the thickness of the corner pad 18. The thickness of the corner pad 18 in the non-through hole 41 may be substantially the same as the thickness of the thin-walled region 14a. The planar shape of the non-through hole 41 is circular, but is not limited to this, and may be a polygon such as a square or a rectangle, or an ellipse. The non-through hole 41 is located inside the outer peripheral edge of the unit lead frame 10a (that is, the outer peripheral edge of the semiconductor device 20), and is located inside the outer peripheral edge of the corner pad 18 over the entire circumference. In FIGS. 11A and 11B, by providing the non-through hole 41 on the back surface of the corner pad 18, the contact area between the back surface of the corner pad 18 and the solder increases, and the semiconductor device 20 is mounted on the mounting substrate. It can be adhered more firmly.

Modification 2
12 (a) and 12 (b) are views showing a modified example (modified example 2) of the present embodiment. In FIGS. 12A and 12B, a notch 42 is formed on the back surface of the corner pad 18. The notch 42 is formed from the back surface side by half etching, and does not penetrate to the front surface side. The depth of the notch 42 is, for example, 30% or more and 70% or less of the thickness of the corner pad 18. The thickness of the corner pad 18 in the notch 42 may be substantially the same as the thickness of the thin region 14a. The planar shape of the cutout portion 42 is circular, but is not limited to this, and may be a polygon such as a square or a rectangle, or an ellipse. Unlike the non-through hole 41 (modification example 1), the cutout portion 42 is located from the inside to the outside of the outer peripheral edge of the unit lead frame 10a (that is, the outer peripheral edge of the semiconductor device 20). That is, a part of the cutout portion 42 is located in the corner pad 18, and the remaining portion is located in the support lead 13. In FIGS. 12A and 12B, by providing the notch 42 on the back surface of the corner pad 18, the contact area between the back surface of the corner pad 18 and the solder is increased, and the semiconductor device 20 is attached to the mounting substrate. Can be firmly adhered. Further, when dicing the support reed 13, the contact area between the blade and the metal can be reduced, so that the load and wear of the blade can be reduced.

Modification 3
FIG. 13 is a partially enlarged bottom view showing a modified example (modified example 3) of the present embodiment. In FIG. 13, the corner pad 18 is located inside the outer peripheral edge of the unit lead frame 10a (that is, the outer peripheral edge of the semiconductor device 20). The outside of the corner pad 18 (opposite the through hole 14b) is formed thinly from the back surface side by half etching. The distance _{L 1} between the outer edge of the outer peripheral edge and the unit lead frames 10a of the corner pads 18 may be, for example 50μm or 300μm or less. In this case, the metal constituting the lead frame 10 can be prevented from being exposed at the corners of the semiconductor device 20. As a result, the load and wear of the blade when dicing the support lead 13 can be reduced.

Modification 4
FIG. 14 is a partially enlarged bottom view showing a modified example (modified example 4) of the present embodiment. In FIG. 14, a plurality (three) corner pads 18a to 18c are provided at the outer end of the suspension lead 14. In this case, the suspension lead 14 is provided with a corner pad 18a located on the outer peripheral edge of the unit lead frame 10a and two corner pads 18b and 18c located between the corner pad 18a and the terminal portions 53 and 63. ing. As a result, the stress generated at the corners during the drop test of the semiconductor device 20 can be further relaxed. The number of corner pads 18a to 18c provided on each suspension lead 14 is not limited to three, and may be two or four or more.

Modification 5
FIG. 15 is a partially enlarged bottom view showing a modified example (modified example 5) of the present embodiment. In FIG. 15, a dummy pad 43 thicker than the thin region 14a is provided at a position between the die pad 11 and the corner pad 18 in the hanging lead 14. In this case, the dummy pad 43 is located in the middle of the thin-walled region 14a, and is located closer to the corner pad 18 than the intermediate position between the die pad 11 and the corner pad 18. The dummy pad 43 is not half-etched, has the same thickness as the metal substrate 31 before processing, and projects from the thin-walled region 14a to the back surface side. The planar shape of the dummy pad 43 is square, and each side thereof is parallel to the X direction or the Y direction. The planar shape of the corner pad 18 is not limited to a square, but may be a polygon such as a rectangle, a circle, an ellipse, or the like. Further, the dummy pad 43 may have the same planar shape as the corner pad 18, or may have a different planar shape. By providing the dummy pad 43 on the suspension lead 14 in this way, the semiconductor device 20 can be connected to the mounting board at a position inside the corner pad 18, so that the adhesion strength between the semiconductor device 20 and the mounting board is strong. Can be further enhanced.

Modification 6
FIG. 16 is a partially enlarged bottom view showing a modified example (modified example 6) of the present embodiment. In FIG. 16, the suspension lead 14 is provided with two dummy pads 43 and 44. In this case, in addition to the dummy pad 43 similar to that shown in FIG. 15 (modification example 5), the dummy pad 44 is also provided near the corner portion of the die pad 11. These two dummy pads 43 and 44 may have the same planar shape as each other, or may have different planar shapes from each other.
By providing the dummy pad 44 on the suspension lead 14 in this way, the semiconductor device 20 can be connected to the mounting board even at a position near the corner portion of the die pad 11, so that the adhesion strength between the semiconductor device 20 and the mounting board is strong. Can be further enhanced. Other configurations are the same as those shown in FIG. 15 (Modification 5).

Modification 7
17 (a) and 17 (b) are views showing a modified example (modified example 7) of the present embodiment. In FIGS. 17A and 17B, a groove 45 is formed on the back surface of the dummy pad 43. The groove 45 is formed from the back surface side by half etching, and does not penetrate to the front surface side.
The depth of the groove 45 is, for example, 30% or more and 70% or less of the thickness of the dummy pad 43, and the thickness of the dummy pad 43 in the groove 45 may be substantially the same as the thickness of the thin region 14a. The planar shape of the groove 45 is an annular square shape, but is not limited to this, and may be a polygonal shape such as a rectangle, a ring shape such as a circle or an ellipse, or a non-ring shape. Further, the groove 45 is located inside the outer peripheral edge of the dummy pad 43 over the entire circumference. In FIGS. 17A and 17B, by providing the groove 45 on the back surface of the dummy pad 43, the contact area between the back surface of the dummy pad 43 and the solder increases, and the semiconductor device 20 and the mounting substrate become stronger. Can be brought into close contact. Other configurations are the same as those shown in FIG. 15 (Modification 5).

Modification 8
FIG. 18 is a partially enlarged bottom view showing a modified example (modified example 8) of the present embodiment. In FIG. 18, a groove 46 is formed on the back surface of the dummy pad 44. In this case, the configuration of the groove 46 is substantially the same as the configuration of the groove 45 (FIGS. 17A and 17B) of the dummy pad 43 described above. In FIG. 18, by providing the groove 46 on the back surface of the dummy pad 44, the contact area between the back surface of the dummy pad 44 and the solder is increased, and the semiconductor device 20 and the mounting substrate can be more firmly adhered to each other. Other configurations are the same as those shown in FIGS. 15 to 17 (Modified Examples 5 to 7).

Modification 9
FIG. 19 is a partially enlarged bottom view showing a modified example (modified example 9) of the present embodiment. In FIG. 19, a groove 47 is formed in the vicinity of the corner portion of the die pad 11. The groove 47 is located inside the outer peripheral edge of the die pad thick portion 11a. The distance _{L 2} between the outer edge of the outer peripheral edge and the die pad thick portion 11a of the groove 47 may be, for example 50μm or 300μm or less. In this case, the configuration of the groove 47 is substantially the same as the groove 45 (FIGS. 17A and 17B) of the dummy pad 43 described above. In FIG. 19, by providing the groove 47 near the corner portion of the die pad 11, the contact area between the back surface of the die pad 11 and the solder is increased, and the semiconductor device 20 and the mounting substrate can be more firmly adhered to each other. The grooves 47 may be provided in all of the vicinity of the four corners of the die pad 11, or may be provided only in the vicinity of some of the corners.

It is also possible to appropriately combine a plurality of components disclosed in each of the above-described embodiments and modifications as necessary. Alternatively, some components may be deleted from all the components shown in the above embodiments and modifications.

10 Lead frame 11 Die pad 12A 1st lead part 12B 2nd lead part 13 Support lead (support member)
14 Suspended lead 14a Thin area 17A External terminal 17B External terminal 18 Corner pad 19 Stretched part 20 Semiconductor device 21 Semiconductor element 22 Bonding wire (connecting member)
23 Sealing resin

Claims (5)

A lead frame for manufacturing semiconductor devices,
Die pads on which semiconductor elements are mounted and
A plurality of lead portions provided around the die pad, each including a terminal portion and an inner lead extending inward from the terminal portion, and the terminal portions of the plurality of lead portions are along a plurality of rows in a plan view. With multiple reeds arranged in
With a hanging reed connected to the die pad
The hanging lead has a thin-walled region thinned from the back surface side.
A lead frame in which the hanging lead is thicker than the thin-walled region and is provided with a dummy pad protruding from the thin-walled region to the back surface side. A part of the lead portion located at the end of the row extends adjacent to the suspended lead in a plan view.
The lead frame according to claim 1, wherein the dummy pad is provided on the corner portion side of the lead frame with respect to a portion in which the lead portion extends adjacent to the suspended lead. A part of the lead portion located at the end of the row extends adjacent to the suspended lead in a plan view.
The lead frame according to claim 1 or 2, wherein the dummy pad is provided on the die pad side of the hanging reed with respect to a portion where the lead portion extends adjacent to the suspended lead. The lead frame according to any one of claims 1 to 3, wherein two dummy pads are provided on one hanging lead. The lead frame according to any one of claims 1 to 4, wherein a groove is formed on the back surface of the dummy pad.

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