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JP2010166061A - Method of manufacturing electronic device and method of manufacturing electronic module - Google Patents

Method of manufacturing electronic device and method of manufacturing electronic module Download PDF

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JP2010166061A
JP2010166061A JP2010018334A JP2010018334A JP2010166061A JP 2010166061 A JP2010166061 A JP 2010166061A JP 2010018334 A JP2010018334 A JP 2010018334A JP 2010018334 A JP2010018334 A JP 2010018334A JP 2010166061 A JP2010166061 A JP 2010166061A
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electrode
electronic device
substrate
mounting side
resin
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JP2010166061A5 (en
JP5494947B2 (en
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Atsushi Ono
淳 小野
Sachihiro Kobayashi
祥宏 小林
Shojiro Kitamura
昇二郎 北村
Masataka Matsunaga
雅敬 松永
Akitoshi Hara
明稔 原
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Miyazaki Epson Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched

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  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic device and an electronic module for accurately standing a component. <P>SOLUTION: The electronic device 1 includes an outline configuration including first and second surfaces 44, 46 being opposed each other and a mounting side face 48 coupled to the first and second surfaces 44, 46. An electronic component 30 includes a polyhedral contour and is disposed such that a face of the largest area directs toward a first or second substrate 10, 26. The first and second surfaces 44, 46 refer to the surfaces of the first and second substrates 10, 26 on the opposite side of a resin 40, respectively. A mounting side face 48 includes an exposed surface 42 of the resin 40 between the first and the second substrate 10, 26 and side faces of the first and the second substrate 10, 26 adjacent to the exposed surface 42. A first electrode 16 is disposed adjacently to the mounting side face 48 in the first surface 44. A second electrode 28 is disposed adjacently to the mounting side face 48 in the second surface 46. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、電子デバイスの製造方法及び電子モジュールの製造方法に関する。   The present invention relates to an electronic device manufacturing method and an electronic module manufacturing method.

加速度センサ、ジャイロセンサ又は慣性センサのようなセンサ素子には、センシングを行う軸があるため、横置きの素子であっても縦置きにしなければならない場合があり、しかも、正確に立たせる必要がある。特許文献１には、リードフレームを使用して横置きの素子を縦置きにパッケージングすることが開示されているが、曲がりやすいリードでは精度良く立たせることが難しいだけでなく、ワイヤボンディングを接続してからリードを曲げるので接続信頼性に劣る。特許文献２には、回路基板に端子を差し込んでディップ法によってはんだ付けを行うことが開示されているが、精度良く立たせることは難しい。このような問題は、センサ素子に限らず、正確に素子を立たせる要求のある全ての電子デバイスについて生じ得る。   Sensor elements such as accelerometers, gyro sensors, or inertial sensors have sensing axes, so even horizontal elements may need to be placed vertically, and they must stand up accurately. is there. Patent Document 1 discloses that a horizontally placed element is packaged vertically using a lead frame, but it is difficult not only to bend easily with a bendable lead but also to connect wire bonding. Then, since the lead is bent, the connection reliability is poor. Patent Document 2 discloses that a terminal is inserted into a circuit board and soldering is performed by a dip method, but it is difficult to stand up with high accuracy. Such a problem may occur not only for sensor elements but also for all electronic devices that require the elements to stand up accurately.

特開平１０−２５３６５２号公報Japanese Patent Laid-Open No. 10-253652 特開２００４−３６１１７５号公報JP 2004-361175 A

本発明は、精度良く素子を立たせることができる電子デバイス及び電子モジュール並びにこれらの製造方法を提供することを目的とする。   An object of this invention is to provide the electronic device and electronic module which can make an element stand up with sufficient precision, and these manufacturing methods.

（１）本発明に係る電子デバイスは、
相互に反対を向く第１及び第２の表面と、前記第１及び第２の表面に接続する搭載側面と、を含む外形形状を有する電子デバイスであって、
第１の電極を有する第１の基板と、
第２の電極を有する第２の基板と、
前記第１及び第２の基板の間に配置された樹脂と、
前記樹脂によって封止された電気素子であって、多面体の外形形状を有して最も広い面が前記第１、第２の基板の一方を向くように配置されている電気素子と、
を有し、
前記第１の表面は、前記第１の基板の前記樹脂とは反対側の面であり、
前記第２の表面は、前記第２の基板の前記樹脂とは反対側の面であり、
前記搭載側面は、前記樹脂の前記第１及び第２の基板の間での露出面と、前記第１及び第２の基板の前記露出面に隣接する側面と、を含み、
前記第１の電極は、前記第１の表面で前記搭載側面に隣接する端部に配置され、前記電気素子に電気的に接続され、
前記第２の電極は、前記第２の表面で前記搭載側面に隣接する端部に配置されている。本発明によれば、電子デバイスの第１及び第２の表面に第１及び第２の電極が設けられているが、これらは搭載側面に隣接する端部に配置されているので、搭載側面を下にして配置しても電気的な接続が可能である。これにより、最も広い面が第１又は第２の基板を向くように配置（横置き）されている電気素子を、搭載側面を下にすることで、立てて実装（縦置き実装）することが可能になる。 (1) An electronic device according to the present invention includes:
An electronic device having an outer shape including first and second surfaces facing each other and a mounting side surface connected to the first and second surfaces,
A first substrate having a first electrode;
A second substrate having a second electrode;
A resin disposed between the first and second substrates;
An electrical element sealed with the resin, having an outer shape of a polyhedron and having the widest surface facing one of the first and second substrates; and
Have
The first surface is a surface of the first substrate opposite to the resin;
The second surface is a surface of the second substrate opposite to the resin;
The mounting side surface includes an exposed surface of the resin between the first and second substrates, and a side surface adjacent to the exposed surface of the first and second substrates,
The first electrode is disposed at an end adjacent to the mounting side surface on the first surface, and is electrically connected to the electric element,
The second electrode is disposed at an end adjacent to the mounting side surface on the second surface. According to the present invention, the first and second electrodes are provided on the first and second surfaces of the electronic device, but these are disposed at the end adjacent to the mounting side surface. Electrical connection is possible even when placed below. Thereby, it is possible to vertically mount (vertical mounting) an electric element arranged (laterally placed) so that the widest surface faces the first or second substrate by placing the mounting side down. It becomes possible.

（２）この電子デバイスにおいて、
前記第１及び第２の電極は、それぞれ、前記搭載側面の一部を構成する部分を有してもよい。 (2) In this electronic device,
Each of the first and second electrodes may have a portion constituting a part of the mounting side surface.

（３）この電子デバイスにおいて、
前記第１の電極は、前記第１の表面の周縁から間隔をあけて配置され、
前記第２の電極は、前記第２の表面の周縁から間隔をあけて配置されていてもよい。 (3) In this electronic device,
The first electrode is spaced from the periphery of the first surface;
The second electrode may be disposed at a distance from a peripheral edge of the second surface.

（４）この電子デバイスにおいて、
前記第１の電極は、前記第１の表面で前記搭載側面に隣接して配置され、
前記第２の電極は、前記第２の表面で前記搭載側面に隣接して配置されていてもよい。 (4) In this electronic device,
The first electrode is disposed adjacent to the mounting side surface on the first surface;
The second electrode may be disposed adjacent to the mounting side surface on the second surface.

（５）この電子デバイスにおいて、
前記第１及び第２の電極は、それぞれ、前記第１及び第２の基板の前記側面上に至る側面電極部を有していてもよい。 (5) In this electronic device,
Each of the first and second electrodes may have a side electrode portion that reaches the side surfaces of the first and second substrates.

（６）この電子デバイスにおいて、
前記第１及び第２の電極は、それぞれ、前記第１及び第２の基板の前記側面を避けて前記第１及び第２の表面のみに配置されていてもよい。 (6) In this electronic device,
The first and second electrodes may be disposed only on the first and second surfaces, respectively, avoiding the side surfaces of the first and second substrates.

（７）この電子デバイスにおいて、
前記第１及び第２の表面は平行であり、
前記第１の電極と前記第２の電極は、前記第１及び第２の表面の中間にある前記第１及び第２の表面に平行な面を基準面として、面対称の位置にあってもよい。 (7) In this electronic device,
The first and second surfaces are parallel;
The first electrode and the second electrode may be in a plane-symmetrical position with a plane parallel to the first and second surfaces intermediate between the first and second surfaces as a reference plane. Good.

（８）この電子デバイスにおいて、
前記第１の電極と前記第２の電極は、同一の表面形状を有していてもよい。 (8) In this electronic device,
The first electrode and the second electrode may have the same surface shape.

（９）この電子デバイスにおいて、
前記第２の電極は、前記電気素子に電気的に絶縁されていてもよい。 (9) In this electronic device,
The second electrode may be electrically insulated from the electric element.

（１０）この電子デバイスにおいて、
前記第２の電極は、前記電気素子に電気的に接続されていてもよい。 (10) In this electronic device,
The second electrode may be electrically connected to the electric element.

（１１）この電子デバイスにおいて、
前記電気素子は、慣性センサ素子であってもよい。 (11) In this electronic device,
The electrical element may be an inertial sensor element.

（１２）本発明に係る電子モジュールは、
上記電子デバイスと、
第１及び第２の配線を有する回路基板と、
を含み、
前記電子デバイスは、前記搭載側面を前記回路基板に向けて回路基板に搭載され、
前記第１及び第２の電極は、それぞれ、ろう材によって前記第１及び第２の配線と接合されている。本発明によれば、電子デバイスの第１及び第２の表面に第１及び第２の電極が設けられているが、これらは搭載側面に隣接する端部に配置されているので、搭載側面を下にして配置しても電気的な接続が可能である。これにより、最も広い面が第１又は第２の基板を向くように配置（横置き）されている電気素子を、搭載側面を下にすることで、立てて実装（縦置き実装）することが可能になる。 (12) An electronic module according to the present invention includes:
The electronic device;
A circuit board having first and second wirings;
Including
The electronic device is mounted on a circuit board with the mounting side facing the circuit board,
The first and second electrodes are joined to the first and second wirings by a brazing material, respectively. According to the present invention, the first and second electrodes are provided on the first and second surfaces of the electronic device, but these are disposed at the end adjacent to the mounting side surface. Electrical connection is possible even when placed below. Thereby, it is possible to vertically mount (vertical mounting) an electric element arranged (laterally placed) so that the widest surface faces the first or second substrate by placing the mounting side down. It becomes possible.

（１３）本発明に係る電子デバイスの製造方法は、
相互に反対を向く第１及び第２の表面と、前記第１及び第２の表面に接続する搭載側面と、を含む外形形状を有する電子デバイスの製造方法であって、
第１の電極を有する第１の基板と第２の電極を有する第２の基板との間に、多面体の外形形状を有する電気素子を、最も広い面が前記第１、第２の基板の一方を向くように配置し、前記第１の電極と前記電気素子を電気的に接続する工程と、
前記第１及び第２の基板の間で、樹脂によって前記電気素子を封止する工程と、
前記第１及び第２の基板並びに前記樹脂を、一体的に、断面が平坦になるように切断する工程と、
を含み、
前記第１の表面は、前記第１の基板の前記樹脂とは反対側の面の一部から形成し、
前記第２の表面は、前記第２の基板の前記樹脂とは反対側の面の一部から形成し、
前記搭載側面は、前記樹脂の切断によって生じる露出面と、前記第１及び第２の基板の切断によって生じる側面と、から形成し、
前記第１の基板を、前記第１の電極が、前記第１の表面で前記搭載側面に隣接する端部に配置されるように切断し、
前記第２の基板を、前記第２の電極が、前記第２の表面で前記搭載側面に隣接する端部に配置されるように切断する。本発明に従って得られた電子デバイスによれば、第１及び第２の表面に第１及び第２の電極が設けられているが、これらは搭載側面に隣接する端部に配置されているので、搭載側面を下にして配置しても電気的な接続が可能である。これにより、最も広い面が第１又は第２の基板を向くように配置（横置き）されている電気素子を、搭載側面を下にすることで、立てて実装（縦置き実装）することが可能になる。 (13) An electronic device manufacturing method according to the present invention includes:
A method of manufacturing an electronic device having an outer shape including first and second surfaces facing opposite to each other and a mounting side surface connected to the first and second surfaces,
Between the first substrate having the first electrode and the second substrate having the second electrode, an electric element having an outer shape of a polyhedron is formed, and the widest surface is one of the first and second substrates. A step of electrically connecting the first electrode and the electric element;
Sealing the electrical element with a resin between the first and second substrates;
Cutting the first and second substrates and the resin integrally so as to have a flat cross section;
Including
The first surface is formed from a part of the surface of the first substrate opposite to the resin,
The second surface is formed from a part of the surface of the second substrate opposite to the resin,
The mounting side surface is formed from an exposed surface generated by cutting the resin and a side surface generated by cutting the first and second substrates,
Cutting the first substrate such that the first electrode is disposed at an end adjacent to the mounting side surface on the first surface;
The second substrate is cut so that the second electrode is disposed at an end portion adjacent to the mounting side surface on the second surface. According to the electronic device obtained according to the present invention, the first and second surfaces are provided with the first and second electrodes, but these are arranged at the end adjacent to the mounting side surface, Electrical connection is possible even with the mounting side facing down. Thereby, it is possible to vertically mount (vertical mounting) an electric element arranged (laterally placed) so that the widest surface faces the first or second substrate by placing the mounting side down. It becomes possible.

（１４）この電子デバイスの製造方法において、
前記第１の基板を、前記第１の電極が切断される位置で切断して、前記第１の電極を、前記第１の表面で前記搭載側面に隣接するように配置し、
前記第２の基板を、前記第２の電極が切断される位置で切断して、前記第２の電極を、前記第２の表面で前記搭載側面に隣接するように配置してもよい。 (14) In this electronic device manufacturing method,
Cutting the first substrate at a position where the first electrode is cut, and placing the first electrode adjacent to the mounting side surface on the first surface;
The second substrate may be cut at a position where the second electrode is cut, and the second electrode may be disposed adjacent to the mounting side surface on the second surface.

（１５）この電子デバイスの製造方法において、
前記第１の基板を、前記第１の電極を避けて切断して、前記第１の電極を、前記第１の表面の周縁から間隔をあけて配置し、
前記第２の基板を、前記第２の電極を避けて切断して、前記第２の電極を、前記第２の表面の周縁から間隔をあけて配置してもよい。 (15) In this electronic device manufacturing method,
Cutting the first substrate away from the first electrode, and placing the first electrode spaced from the periphery of the first surface;
The second substrate may be cut so as to avoid the second electrode, and the second electrode may be arranged at a distance from the periphery of the second surface.

（１６）本発明に係る電子モジュールの製造方法は、
（ａ）上記電子デバイスであって、複数の前記第１の電極及び複数の前記第２の電極を有する電子デバイスを用意する工程と、
（ｂ）複数の第１のランド及び複数の第２のランドを有する回路基板を用意する工程と、
（ｃ）前記電子デバイスを、前記搭載側面を前記回路基板に向けて、前記回路基板に搭載し、前記複数の第１の電極及び前記複数の第２の電極を、ろう接合によって、前記複数の第１のランド及び前記複数の第２のランドに接合する工程と、
を含み、
前記電子デバイスの前記第１及び第２の表面は平行であり、前記複数の第１の電極と前記複数の第２の電極は、前記第１及び第２の表面の中間にある前記第１及び第２の表面に平行な面を基準面として、面対称の位置にあり、
前記複数の第１のランドと前記複数の第２のランドは線対称の位置に配列され、
前記（ｃ）工程で、前記ろう接合時のセルフアライメント効果によって、前記電子デバイスの前記回路基板に対する位置合わせを行う。 (16) An electronic module manufacturing method according to the present invention includes:
(A) providing the electronic device having the plurality of first electrodes and the plurality of second electrodes;
(B) preparing a circuit board having a plurality of first lands and a plurality of second lands;
(C) The electronic device is mounted on the circuit board with the mounting side surface facing the circuit board, and the plurality of first electrodes and the plurality of second electrodes are bonded to each other by brazing. Bonding to a first land and the plurality of second lands;
Including
The first and second surfaces of the electronic device are parallel, and the plurality of first electrodes and the plurality of second electrodes are intermediate between the first and second surfaces. The plane parallel to the second surface is a plane that is symmetrical with respect to the reference plane,
The plurality of first lands and the plurality of second lands are arranged in line-symmetric positions,
In the step (c), the electronic device is aligned with the circuit board by the self-alignment effect during the brazing.

図１は、図３（Ａ）に示す電子デバイスのI-I線断面図である。FIG. 1 is a cross-sectional view taken along line II of the electronic device shown in FIG. 図２は、図３（Ａ）に示す電子デバイスのII-II線断面図である。FIG. 2 is a cross-sectional view of the electronic device shown in FIG. 図３（Ａ）〜図３（Ｃ）は、それぞれ、本発明の実施の形態に係る電子デバイスの平面図、側面図及び底面図である。3A to 3C are a plan view, a side view, and a bottom view, respectively, of the electronic device according to the embodiment of the present invention. 図４は、第１の電極及びその周辺の詳細を示す拡大斜視図である。FIG. 4 is an enlarged perspective view showing details of the first electrode and its periphery. 図５は、第１の電極及びその周辺の詳細の変形例を示す拡大斜視図である。FIG. 5 is an enlarged perspective view showing a modified example of details of the first electrode and its surroundings. 図６は、本発明の実施の形態に係る電子デバイスの搭載例を示す断面図である。FIG. 6 is a cross-sectional view showing an example of mounting the electronic device according to the embodiment of the present invention. 図７は、本発明の実施の形態に係る電子モジュールの断面図である。FIG. 7 is a cross-sectional view of the electronic module according to the embodiment of the present invention. 図８は、本発明に係る電子デバイスの製造方法を説明する図である。FIG. 8 is a diagram for explaining a method of manufacturing an electronic device according to the present invention. 図９は、切断工程の第１の変形例を説明する図である。FIG. 9 is a diagram for explaining a first modification of the cutting step. 図１０は、切断工程の第２の変形例を説明する図である。FIG. 10 is a diagram for explaining a second modification of the cutting process. 図１１は、電子デバイスの第１の変形例を示す側面図である。FIG. 11 is a side view showing a first modification of the electronic device. 図１２（Ａ）は、図１１に示す電子デバイスの断面図であり、図１２（Ｂ）は、図１１に示す電子デバイスの変形例の断面図である。12A is a cross-sectional view of the electronic device shown in FIG. 11, and FIG. 12B is a cross-sectional view of a modification of the electronic device shown in FIG. 図１３（Ａ）及び図１３（Ｂ）は、本発明の実施の形態に係る電子モジュールの製造方法を説明する図である。FIGS. 13A and 13B are diagrams for explaining a method of manufacturing an electronic module according to an embodiment of the present invention. 本発明の実施の形態に係る電子デバイスの製造方法の第１の変形例を説明する図である。It is a figure explaining the 1st modification of the manufacturing method of the electronic device which concerns on embodiment of this invention. 本発明の実施の形態に係る電子デバイスの製造方法の第１の変形例を説明する図である。It is a figure explaining the 1st modification of the manufacturing method of the electronic device which concerns on embodiment of this invention. 本発明の実施の形態に係る電子デバイスの製造方法の第２の変形例を説明する図である。It is a figure explaining the 2nd modification of the manufacturing method of the electronic device which concerns on embodiment of this invention. 本発明の実施の形態に係る電子デバイスの製造方法の第２の変形例を説明する図である。It is a figure explaining the 2nd modification of the manufacturing method of the electronic device which concerns on embodiment of this invention. 本発明の実施の形態に係る電子デバイスの製造方法の第２の変形例を説明する図である。It is a figure explaining the 2nd modification of the manufacturing method of the electronic device which concerns on embodiment of this invention.

図１及び図２は、それぞれ、本発明の実施の形態に係る電子デバイス１の断面図である。図３（Ａ）〜図３（Ｃ）は、それぞれ、本発明の実施の形態に係る電子デバイス１の平面図、側面図及び底面図である。なお、図１は、図３（Ａ）に示す電子デバイス１のI-I
線断面図であり、図２は、図３（Ａ）に示す電子デバイス１のII-II線断面図である。 1 and 2 are cross-sectional views of an electronic device 1 according to an embodiment of the present invention. 3A to 3C are a plan view, a side view, and a bottom view, respectively, of the electronic device 1 according to the embodiment of the present invention. Note that FIG. 1 shows the II of the electronic device 1 shown in FIG.
FIG. 2 is a sectional view taken along the line II-II of the electronic device 1 shown in FIG.

電子デバイス１は、第１の基板１０を有する。第１の基板１０は、ガラスエポキシ等の有機材料及び無機材料の混合材料、樹脂等の有機材料、鉄系材料（鉄にニッケルが４２％含有された合金である４２アロイを含む。）又は銅系材料などの金属、セラミックス又はガラス等の無機材料などの材料から構成されている。半導体装置組立用のリードフレームを第１の基板１０として使用してもよい。第１の基板１０は、相互に対向する２つの表面１２と、側面１４（厚みを定義する面）とを含む。２つの表面１２は平行（つまり厚みが一定）であり、側面１４は２つの表面１２に対して直角になっている。   The electronic device 1 has a first substrate 10. The first substrate 10 is a mixed material of an organic material such as glass epoxy and an inorganic material, an organic material such as a resin, an iron-based material (including 42 alloy that is an alloy containing 42% nickel in iron), or copper. It is comprised from materials, such as metals, such as a system material, inorganic materials, such as ceramics or glass. A lead frame for assembling a semiconductor device may be used as the first substrate 10. The first substrate 10 includes two surfaces 12 facing each other and side surfaces 14 (surfaces that define the thickness). The two surfaces 12 are parallel (that is, have a constant thickness), and the side surface 14 is perpendicular to the two surfaces 12.

第１の基板１０は、１つ又は複数の第１の電極１６を有する。図４は、第１の電極１６及びその周辺の詳細を示す拡大斜視図である。第１の電極１６は、第１の基板１０の一方の面（図１では下面）に形成された表面電極部１８を有し、この表面電極部１８の表面（図４では下面）及び側面（厚みを定義する面）並びに第１の基板１０の面によって段が形
成される。変形例として、第１の電極１６の表面と第１の基板１０の面が面一になっていてもよい。第１の基板１０の縁部には切り欠き２０（側面１４から見ると凹部）が形成されている。切り欠き２０の内面は曲面（例えば貫通丸穴の内壁面の一部（半円未満））であってもよいし、複数の平面から形成されてもよい。第１の電極１６は、側面１４（切り欠き２０の内面）に至るように形成されている。つまり、第１の電極１６は、切り欠き２０の内面に側面電極部２２を有する。側面電極部２２は、第１の基板１０の側面１４（切り欠き２０に隣接する部分）から突出しないようになっており、側面１４と面一の部分及び側面１４から窪んだ部分を有する。第１の基板１０は、配線パターン２４を有する。配線パターン２４は、第１の基板１０の第１の電極１６とは反対側の面に形成されている。配線パターン２４と第１の電極１６は、側面電極部２２を介して電気的に接続されている。 The first substrate 10 has one or more first electrodes 16. FIG. 4 is an enlarged perspective view showing details of the first electrode 16 and its periphery. The first electrode 16 has a surface electrode portion 18 formed on one surface (the lower surface in FIG. 1) of the first substrate 10, and the surface (lower surface in FIG. 4) and side surfaces ( A step is formed by the surface defining the thickness) and the surface of the first substrate 10. As a modification, the surface of the first electrode 16 and the surface of the first substrate 10 may be flush with each other. A cutout 20 (recessed when viewed from the side surface 14) is formed at the edge of the first substrate 10. The inner surface of the cutout 20 may be a curved surface (for example, a part of the inner wall surface of the through-round hole (less than a semicircle)) or may be formed from a plurality of planes. The first electrode 16 is formed so as to reach the side surface 14 (the inner surface of the notch 20). That is, the first electrode 16 has the side electrode portion 22 on the inner surface of the notch 20. The side electrode portion 22 does not protrude from the side surface 14 (the portion adjacent to the notch 20) of the first substrate 10, and has a portion that is flush with the side surface 14 and a portion that is recessed from the side surface 14. The first substrate 10 has a wiring pattern 24. The wiring pattern 24 is formed on the surface of the first substrate 10 opposite to the first electrode 16. The wiring pattern 24 and the first electrode 16 are electrically connected via the side electrode part 22.

変形例として、図５に示すように、第１の電極１１６の側面電極部１２２の全体が、第１の基板１１０の側面１１４（切り欠き１２０に隣接する部分）と面一になっていてもよい。   As a modified example, as shown in FIG. 5, even if the entire side electrode portion 122 of the first electrode 116 is flush with the side surface 114 (a portion adjacent to the notch 120) of the first substrate 110. Good.

電子デバイス１は、第２の基板２６を有する。第２の基板２６は、第２の電極２８を有する。第２の基板２６及び第２の電極２８には、上述した第１の基板１０及び第１の電極１６の内容を適用することができる。ただし、第２の電極２８は、電気素子３０と電気的に接続されない絶縁されたダミー電極であってもよい点は第１の電極１６と異なる。第１の電極１６を有する第１の基板１０と、第２の電極２８を有する第２の基板２６は、同一の構成を有していてもよい。第１及び第２の基板１０，２６は、第１及び第２の電極１６，２８が反対を向くように、間隔をあけて対向するように配置されており、第１及び第２の電極１６，２８が面対称になるように配置されていてもよい。その場合、第１の基板１０の一辺に沿って並ぶ複数の第１の電極１６と、第２の基板２６の一辺に沿って並ぶ複数の第２の電極２８とが面対称の位置に配置されていれば、これ以外に、例えば図３（Ｃ）に示すように第１の基板１０に電極があってもよい。また、第１及び第２の電極１６，２８は同一の表面形状（少なくとも表面電極部１８において同一）になっている。   The electronic device 1 has a second substrate 26. The second substrate 26 has a second electrode 28. The contents of the first substrate 10 and the first electrode 16 described above can be applied to the second substrate 26 and the second electrode 28. However, the second electrode 28 is different from the first electrode 16 in that it may be an insulated dummy electrode that is not electrically connected to the electric element 30. The first substrate 10 having the first electrode 16 and the second substrate 26 having the second electrode 28 may have the same configuration. The first and second substrates 10 and 26 are disposed so as to face each other with a gap therebetween so that the first and second electrodes 16 and 28 face in opposite directions. , 28 may be arranged in plane symmetry. In that case, the plurality of first electrodes 16 arranged along one side of the first substrate 10 and the plurality of second electrodes 28 arranged along one side of the second substrate 26 are arranged at plane-symmetric positions. In addition, for example, an electrode may be provided on the first substrate 10 as shown in FIG. Further, the first and second electrodes 16 and 28 have the same surface shape (at least in the surface electrode portion 18).

電子デバイス１は、電気素子３０を有する。電気素子３０は、素子片３２（例えば圧電振動片）及びこれを封止するパッケージ３４（例えばセラミックスからなる。）を含み、さらにＩＣ３５が封止されていてもよい。図１の例では、パッケージ３４は、ベース３６及び蓋３８を含み、ベース３６が第１の基板１０に固定されている。電気素子３０は、慣性センサ（例えば、直線加速度を測定する加速度センサ又は角速度を測定するジャイロセンサなど）である。慣性センサには方位依存性がある。例えば、加速度センサでは検出軸の方向に沿った加速度が検出され、ジャイロセンサでは回転軸を中心とする角速度が検出される。機能を適正に果たすには、これらの軸を正確な方向に向けて電気素子３０を配置する必要がある。そのため、電気素子３０は、多面体の外形形状を有して最も広い面が第１又は第２の基板１０，２６を向くように配置されている。なお、素子片３２は、電気素子３０の外形（パッケージ３４の外形）に対して正確に配置されている。例えば、加速度センサの素子片３２の検出軸が電気素子３０の最も広い面と平行になるように配置されたり、ジャイロセンサの素子片３２の検出回転軸が電気素子３０の最も広い面と直交するように配置されたりしている。電気素子３０は、第１の電極１６に電気的に接続されている。電気素子３０の端子が、第１の基板１０の配線パターン２４に電気的に接続されている。図１に示すように電気素子３０の端子と配線パターン２４が対向してもよいし、両者が対向しない（同じ方向を向く）形態であってもよく、後者の場合はワイヤによって電気的接続を図ってもよい。第２の電極２８は、電気素子３０に電気的に接続されない絶縁としてもよいし、電気素子３０に電気的に接続されていてもよい。   The electronic device 1 has an electrical element 30. The electric element 30 includes an element piece 32 (for example, a piezoelectric vibrating piece) and a package 34 (for example, made of ceramics) for sealing the element piece 32, and the IC 35 may be further sealed. In the example of FIG. 1, the package 34 includes a base 36 and a lid 38, and the base 36 is fixed to the first substrate 10. The electric element 30 is an inertial sensor (for example, an acceleration sensor that measures linear acceleration or a gyro sensor that measures angular velocity). An inertial sensor has an orientation dependency. For example, the acceleration sensor detects acceleration along the direction of the detection axis, and the gyro sensor detects angular velocity about the rotation axis. In order to perform the function properly, it is necessary to arrange the electric element 30 with these axes oriented in the correct direction. Therefore, the electric element 30 has a polyhedral outer shape and is arranged so that the widest surface faces the first or second substrate 10 or 26. The element piece 32 is accurately arranged with respect to the outer shape of the electric element 30 (the outer shape of the package 34). For example, the acceleration sensor element piece 32 is arranged so that the detection axis of the electric sensor element 30 is parallel to the widest surface of the electric element 30, or the gyro sensor element piece 32 detection axis of rotation is perpendicular to the widest surface of the electric element 30. It is arranged like that. The electric element 30 is electrically connected to the first electrode 16. A terminal of the electric element 30 is electrically connected to the wiring pattern 24 of the first substrate 10. As shown in FIG. 1, the terminal of the electric element 30 and the wiring pattern 24 may be opposed to each other, or may not be opposed to each other (facing in the same direction). You may plan. The second electrode 28 may be insulated not electrically connected to the electric element 30, or may be electrically connected to the electric element 30.

電子デバイス１は、第１及び第２の基板１０，２６の間に配置された樹脂４０を有する
。樹脂４０によって電気素子３０が封止されている。樹脂４０は電気的に絶縁体である。樹脂４０によって第１及び第２の基板１０，２６が接着されている。樹脂４０は、第１の基板１０の第１の電極１６とは反対の面と、第２の基板２６の第２の電極２８とは反対の面に密着しており、第１及び第２の基板１０，２６のこれら以外の面（及びその上の第１及び第２の電極１６，２８並びに側面電極部２２）には接触していない。第１及び第２の基板１０，２６の間で樹脂４０は露出している。この露出面４２は、第１及び第２の基板１０，２６の２つの表面１２に対して直角（第１及び第２の基板１０，２６の側面１４に平行）になっている。さらに、樹脂４０の露出面４２と第１及び第２の基板１０，２６の側面１４は面一になっている。 The electronic device 1 has a resin 40 disposed between the first and second substrates 10 and 26. The electric element 30 is sealed with the resin 40. The resin 40 is an electrical insulator. The first and second substrates 10 and 26 are bonded by the resin 40. The resin 40 is in close contact with the surface of the first substrate 10 opposite to the first electrode 16 and the surface of the second substrate 26 opposite to the second electrode 28. Other surfaces of the substrates 10 and 26 (and the first and second electrodes 16 and 28 and the side electrode portion 22 thereon) are not in contact with each other. The resin 40 is exposed between the first and second substrates 10 and 26. The exposed surface 42 is perpendicular to the two surfaces 12 of the first and second substrates 10 and 26 (parallel to the side surfaces 14 of the first and second substrates 10 and 26). Further, the exposed surface 42 of the resin 40 and the side surfaces 14 of the first and second substrates 10 and 26 are flush with each other.

電子デバイス１は、相互に反対を向く第１及び第２の表面４４，４６と、第１及び第２の表面４４，４６に接続する搭載側面４８と、を含む外形形状を有する。第１の表面４４は、第１の基板１０の樹脂４０とは反対側の面である。第２の表面４６は、第２の基板２６の樹脂４０とは反対側の面である。搭載側面４８は、樹脂４０の第１及び第２の基板１０，２６の間での露出面４２と、第１及び第２の基板１０，２６の露出面４２に隣接する側面１４と、を含む。搭載側面４８は平坦な面である。搭載側面４８は、搭載時の底面であり、これとは反対の搭載上端面４９も平坦な面である。   The electronic device 1 has an outer shape including first and second surfaces 44 and 46 facing opposite to each other, and a mounting side surface 48 connected to the first and second surfaces 44 and 46. The first surface 44 is the surface opposite to the resin 40 of the first substrate 10. The second surface 46 is a surface opposite to the resin 40 of the second substrate 26. The mounting side surface 48 includes an exposed surface 42 of the resin 40 between the first and second substrates 10 and 26 and a side surface 14 adjacent to the exposed surface 42 of the first and second substrates 10 and 26. . The mounting side surface 48 is a flat surface. The mounting side surface 48 is a bottom surface at the time of mounting, and the mounting upper end surface 49 opposite to this is also a flat surface.

第１の電極１６は、第１の表面４４で搭載側面４８に隣接する端部に（隣接して）配置されている。第２の電極２８は、第２の表面４６で搭載側面４８に隣接する端部に（隣接して）配置されている。第１及び第２の電極１６，２８は、それぞれ、搭載側面４８の一部を構成する部分（側面電極部２２）を有する。第１及び第２の表面４４，４６は平行である。少なくとも１つの第１の電極１６と少なくとも１つの第２の電極２８は、第１又は第２の表面４４，４６に関して（第１及び第２の表面４４，４６に平行な面（図示せず）を基準面として）、面対称の位置に配置されている。   The first electrode 16 is disposed on (adjacent to) the end portion adjacent to the mounting side surface 48 on the first surface 44. The second electrode 28 is disposed on (adjacent to) the end portion adjacent to the mounting side surface 48 on the second surface 46. Each of the first and second electrodes 16 and 28 has a portion (side electrode portion 22) that constitutes a part of the mounting side surface 48. The first and second surfaces 44, 46 are parallel. At least one first electrode 16 and at least one second electrode 28 are relative to the first or second surface 44, 46 (a plane parallel to the first and second surfaces 44, 46 (not shown)). Are arranged in plane symmetry.

図６は、本発明の実施の形態に係る電子デバイスの搭載例を示す断面図である。なお、図６に示す電子デバイス１の断面は図１に示す電子デバイス１の断面に対応する。上述した電子デバイス１は、配線５６を有する回路基板５０に搭載してもよい。この場合、第１の電極１６を回路基板５０に向けて回路基板５０に搭載してある（横置き）。第１の電極１６は、ろう材５８によって配線５６と接合される。   FIG. 6 is a cross-sectional view showing an example of mounting the electronic device according to the embodiment of the present invention. The cross section of the electronic device 1 shown in FIG. 6 corresponds to the cross section of the electronic device 1 shown in FIG. The electronic device 1 described above may be mounted on the circuit board 50 having the wiring 56. In this case, the first electrode 16 is mounted on the circuit board 50 facing the circuit board 50 (horizontal placement). The first electrode 16 is joined to the wiring 56 by a brazing material 58.

図７は、本発明の実施の形態に係る電子モジュールの断面図である。なお、図７に示す電子モジュールに含まれる電子デバイス１の断面は図２に示す電子デバイス１の断面に対応する。   FIG. 7 is a cross-sectional view of the electronic module according to the embodiment of the present invention. The cross section of the electronic device 1 included in the electronic module shown in FIG. 7 corresponds to the cross section of the electronic device 1 shown in FIG.

電子モジュールは、上述した電子デバイス１と、第１及び第２の配線５２，５４を有する回路基板５０と、を含む。電子デバイス１は、搭載側面４８を回路基板５０に向けて、搭載上端面４９を上に向けて、回路基板５０に搭載してもよい（縦置き）。この場合、搭載上端面４９が平坦になっていると、吸着マウンタを使用して搭載することが可能になる。第１及び第２の電極１６，２８は、それぞれ、ろう材５８によって第１及び第２の配線５２，５４と接合（及び電気的接続）されている。詳しくは、第１及び第２の電極１６，２８の側面電極部２２がそれぞれ第１及び第２の配線５２，５４に対向し、ろう材５８によって、電子デバイス１の回路基板５０との対向方向（例えば重力方向）の接合がなされている。また、第１及び第２の電極１６，２８の表面電極部１８がそれぞれ第１及び第２の配線５２，５４の上で立ち上がっている。そして、樹脂４０の露出面４２と第１及び第２の電極１６、２８の側面１４が、電子デバイス１の回路基板５０に水平な方向（例えば重力方向に直交する方向）に移動しないように支持がされる。この支持は、電子デバイス１の両面（第１及び第２の表面４４，４６）にてなされるので安定した支持が可能になる。この効果は、第１及び第２の電極１６，２８が面対称の配置であると一層高まる。   The electronic module includes the electronic device 1 described above and a circuit board 50 having first and second wirings 52 and 54. The electronic device 1 may be mounted on the circuit board 50 with the mounting side surface 48 facing the circuit board 50 and the mounting upper end surface 49 facing up (vertically placed). In this case, if the mounting upper end surface 49 is flat, the mounting can be performed using the suction mounter. The first and second electrodes 16 and 28 are joined (and electrically connected) to the first and second wirings 52 and 54 by a brazing material 58, respectively. Specifically, the side electrode portions 22 of the first and second electrodes 16 and 28 face the first and second wirings 52 and 54, respectively, and the brazing material 58 faces the circuit board 50 of the electronic device 1. (For example, the direction of gravity) is joined. Further, the surface electrode portions 18 of the first and second electrodes 16 and 28 rise on the first and second wirings 52 and 54, respectively. The exposed surface 42 of the resin 40 and the side surfaces 14 of the first and second electrodes 16 and 28 are supported so as not to move in a horizontal direction (for example, a direction orthogonal to the direction of gravity) with respect to the circuit board 50 of the electronic device 1. Is done. Since this support is performed on both surfaces (first and second surfaces 44 and 46) of the electronic device 1, stable support is possible. This effect is further enhanced when the first and second electrodes 16 and 28 are arranged in plane symmetry.

本実施の形態によれば、電子デバイス１の第１及び第２の表面４４，４６に第１及び第２の電極１６，２８が設けられているが、これらは搭載側面４８に隣接しているので、搭載側面４８を下にして配置しても電気的な接続が可能である。これにより、最も広い面が第１又は第２の基板１０，２６を向くように配置（横置き）されている電気素子３０を、搭載側面４８を下にすることで、図７に示すように立てて実装（縦置き実装）することが可能になる。   According to the present embodiment, the first and second electrodes 16 and 28 are provided on the first and second surfaces 44 and 46 of the electronic device 1, but these are adjacent to the mounting side surface 48. Therefore, electrical connection is possible even if it is arranged with the mounting side surface 48 facing down. As a result, the electric element 30 arranged (laterally placed) with the widest surface facing the first or second substrate 10, 26 is placed on the mounting side surface 48 as shown in FIG. It is possible to mount upright (vertical mounting).

図８は、本発明の実施の形態に係る電子デバイス１の製造方法を説明する図である。   FIG. 8 is a diagram for explaining a method of manufacturing the electronic device 1 according to the embodiment of the present invention.

図８（Ａ）に示すように、第１の基板１０に電気素子３０を搭載する。ここで、電気素子３０は、最も広い面が第１の基板１０を向くように配置する。また、第１の電極１６と電気素子３０を電気的に接続する。   As shown in FIG. 8A, the electric element 30 is mounted on the first substrate 10. Here, the electric element 30 is arranged so that the widest surface faces the first substrate 10. Further, the first electrode 16 and the electric element 30 are electrically connected.

図８（Ｂ）に示すように、第２の基板２６を、第１の基板１０及び電気素子３０の上方に間隔をあけて配置する。間隔をあけるために、第１及び第２の基板１０，２６の間にスペーサ（図示せず）を配置してもよい。   As shown in FIG. 8B, the second substrate 26 is disposed above the first substrate 10 and the electric element 30 with a space therebetween. A spacer (not shown) may be disposed between the first and second substrates 10 and 26 in order to leave a space.

以上のプロセスによって、第１の電極１６を有する第１の基板１０と第２の電極２８を有する第２の基板２６との間に、多面体の外形形状を有する電気素子３０を、最も広い面が第１又は第２の基板１０，２６を向くように配置し、第１の電極１６と電気素子３０を電気的に接続する。   By the above process, the electric element 30 having a polyhedral outer shape is formed between the first substrate 10 having the first electrode 16 and the second substrate 26 having the second electrode 28 on the widest surface. It arrange | positions so that it may face the 1st or 2nd board | substrates 10 and 26, and the 1st electrode 16 and the electric element 30 are electrically connected.

図８（Ｃ）に示すように、第１及び第２の基板１０，２６の間で、樹脂４０（厳密にはこの時点は樹脂前駆体）によって電気素子３０を封止する。封止は、トランスファーモールドを適用してもよいがこれに限定されるものではない。   As shown in FIG. 8C, the electric element 30 is sealed between the first and second substrates 10 and 26 by a resin 40 (strictly, at this time, a resin precursor). For the sealing, a transfer mold may be applied, but is not limited thereto.

図８（Ｄ）に示すように、第１及び第２の基板１０，２６並びに樹脂４０を一体的に切断する。切断にはダイサ等のカッタを使用することができる。第１の基板１０は、第１の電極１６が、第１の表面４４で搭載側面４８に隣接して配置されるように切断する。第２の基板２６は、第２の電極２８が、第２の表面４６で搭載側面４８に隣接して配置されるように切断する。第１及び第２の基板１０，２６並びに樹脂４０は、断面が平坦になるように、また、断面が第１の基板１０（又は第２の基板２６）の２つ表面１２に対して直角になるように切断する。   As shown in FIG. 8D, the first and second substrates 10 and 26 and the resin 40 are integrally cut. A cutter such as a dicer can be used for cutting. The first substrate 10 is cut so that the first electrode 16 is disposed adjacent to the mounting side surface 48 on the first surface 44. The second substrate 26 is cut so that the second electrode 28 is disposed adjacent to the mounting side surface 48 at the second surface 46. The first and second substrates 10 and 26 and the resin 40 have a flat cross section, and the cross section is perpendicular to the two surfaces 12 of the first substrate 10 (or the second substrate 26). Cut so that

切断によって、複数の電子デバイス１が、隣同士の電子デバイス１の切断面が対向した状態で得られる。対向した切断面は、搭載側面４８と搭載上端面４９（図３（Ａ）〜図３（Ｃ）参照）であってもよいし、搭載側面４８同士であってもよいし、搭載上端面４９同士であってもよい。いずれの場合であっても、対向する切断面の一方が平坦であれば、他方も平坦になる。   By cutting, a plurality of electronic devices 1 are obtained in a state where the cut surfaces of the adjacent electronic devices 1 face each other. The opposed cut surfaces may be the mounting side surface 48 and the mounting upper end surface 49 (see FIGS. 3A to 3C), the mounting side surfaces 48, or the mounting upper end surface 49. It may be between each other. In either case, if one of the opposing cut surfaces is flat, the other is flat.

図９は、切断工程の第１の変形例を説明する図である。この例では、第１の基板２００及び第１の電極２０２並びに図示しない第２の基板、第２の電極及び樹脂を一体的に切断して、複数の電子デバイス２０４を得る。これによれば、第１の電極２０２及び第２の電極（図示せず）を切断するので、これらの切断端部まで各電極が配置される形状となる。したがって、回路基板に対して、搭載側面を下にして縦置きに実装するにあたって、回路基板のランドに第１の電極２０２及び第２の電極が各々極めて近接する状態となる。このため、例えば、はんだによる接合において、第１の電極２０２及び第２の電極に対して、はんだが立ち上がりやすく、実装に好都合となる。   FIG. 9 is a diagram for explaining a first modification of the cutting step. In this example, the first substrate 200 and the first electrode 202 and the second substrate, the second electrode, and the resin (not shown) are integrally cut to obtain a plurality of electronic devices 204. According to this, since the 1st electrode 202 and the 2nd electrode (not shown) are cut | disconnected, it becomes a shape by which each electrode is arrange | positioned to these cutting | disconnection edge parts. Accordingly, when the circuit board is mounted vertically with the mounting side down, the first electrode 202 and the second electrode are in close proximity to the land of the circuit board. For this reason, for example, in joining by solder, the solder is likely to rise with respect to the first electrode 202 and the second electrode, which is convenient for mounting.

図１０は、切断工程の第２の変形例を説明する図である。この例では、第１の基板２１０並びに図示しない第２の基板及び樹脂を一体的に切断して、複数の電子デバイス２１２を得るが、第１の電極２１４及び第２の電極（図示せず）を切断しない。したがって、切断面に第１の電極２１２又は第２の電極（図示せず）のバリが発生しない。   FIG. 10 is a diagram for explaining a second modification of the cutting process. In this example, the first substrate 210 and the second substrate (not shown) and the resin are integrally cut to obtain a plurality of electronic devices 212. The first electrode 214 and the second electrode (not shown) Do not cut. Therefore, burrs of the first electrode 212 or the second electrode (not shown) do not occur on the cut surface.

電子デバイス１の第１の表面４４は、第１の基板１０の樹脂４０とは反対側の面の一部から形成する。電子デバイス１の第２の表面４６は、第２の基板２６の樹脂４０とは反対側の面の一部から形成する。電子デバイス１の搭載側面４８は、樹脂４０の切断によって生じる露出面４２と、第１及び第２の基板１０，２６の切断によって生じる側面１４と、から形成する。   The first surface 44 of the electronic device 1 is formed from a part of the surface opposite to the resin 40 of the first substrate 10. The second surface 46 of the electronic device 1 is formed from a part of the surface of the second substrate 26 opposite to the resin 40. The mounting side surface 48 of the electronic device 1 is formed from the exposed surface 42 generated by cutting the resin 40 and the side surface 14 generated by cutting the first and second substrates 10 and 26.

本発明に係る電子デバイス１の製造方法は、上記プロセスを含み、さらに、上述した電子デバイス１の構成から自明な方法を適用することができる。   The manufacturing method of the electronic device 1 according to the present invention includes the above-described process, and can further apply a method that is obvious from the configuration of the electronic device 1 described above.

図１１は、電子デバイスの第１の変形例を示す側面図である。この例では、電子デバイスは、図４に示すような側面電極部２２を有していない。つまり、第１及び第２の電極２２２，２２４は、それぞれ、第１及び第２の基板２２６，２２８の側面２３０，２３２を避けて第１及び第２の表面２３４，２３６のみに配置されている。   FIG. 11 is a side view showing a first modification of the electronic device. In this example, the electronic device does not have the side electrode part 22 as shown in FIG. That is, the first and second electrodes 222 and 224 are disposed only on the first and second surfaces 234 and 236, respectively, avoiding the side surfaces 230 and 232 of the first and second substrates 226 and 228, respectively. .

図１２（Ａ）は、図１１に示す電子デバイスの断面図である。この例では、第１及び第２の電極２２２，２２４の側面２３８，２４０は、それぞれ、第１及び第２の基板２２６，２２８の側面２３０，２３２と面一になっている。詳しくは、第１の電極２２２は、第１の表面２３４で搭載側面２４２に隣接して配置され、第２の電極２２４は、第２の表面２３６で搭載側面２４２に隣接して配置されている。この形状は、図９に示す切断工程によって得られる。   FIG. 12A is a cross-sectional view of the electronic device shown in FIG. In this example, the side surfaces 238 and 240 of the first and second electrodes 222 and 224 are flush with the side surfaces 230 and 232 of the first and second substrates 226 and 228, respectively. Specifically, the first electrode 222 is disposed adjacent to the mounting side 242 at the first surface 234, and the second electrode 224 is disposed adjacent to the mounting side 242 at the second surface 236. . This shape is obtained by the cutting process shown in FIG.

図１２（Ｂ）は、図１１に示す電子デバイスの変形例の断面図である。この例では、第１及び第２の電極２５２，２５４は、それぞれ、第１及び第２の基板２２６，２２８の端部から間隔をあけて配置されている。詳しくは、第１の電極２５２は、第１の表面２３４の周縁から間隔をあけて配置され、第２の電極２５４は、第２の表面２３６の周縁から間隔をあけて配置されている。この形状は、図１０に示す切断工程によって得られる。   FIG. 12B is a cross-sectional view of a modification of the electronic device shown in FIG. In this example, the first and second electrodes 252 and 254 are arranged at intervals from the ends of the first and second substrates 226 and 228, respectively. Specifically, the first electrode 252 is spaced from the periphery of the first surface 234 and the second electrode 254 is spaced from the periphery of the second surface 236. This shape is obtained by the cutting process shown in FIG.

図１３（Ａ）及び図１３（Ｂ）は、本発明の実施の形態に係る電子モジュールの製造方法を説明する図である。   FIGS. 13A and 13B are diagrams for explaining a method of manufacturing an electronic module according to an embodiment of the present invention.

本実施の形態では、図１３（Ａ）に示すように、複数の第１のランド３０２及び複数の第２のランド３０４を有する回路基板３００を用意する。複数の第１のランド３０２と複数の第２のランド３０４は線対称の位置に配列（例えば平行に配列）されている。詳しくは、第１グループの複数の第１のランド３１２と、第１グループの複数の第２のランド３１４が、線Ｌ１を基準として線対称の位置に配列されている。第２グループの複数の第１のランド３２２と、第２グループの複数の第２のランド３２４が、線Ｌ２を基準として線対称の位置に配列されている。線Ｌ１，Ｌ２は直角に配置されている。 In this embodiment, as illustrated in FIG. 13A, a circuit board 300 including a plurality of first lands 302 and a plurality of second lands 304 is prepared. The plurality of first lands 302 and the plurality of second lands 304 are arranged in line-symmetric positions (for example, arranged in parallel). Specifically, a plurality of first lands 312 of the first group, a plurality of second lands 314 of the first group are arranged in a position axisymmetric line L 1 as a reference. A plurality of first lands 322 of the second group, the plurality of second lands 324 of the second group are arranged in a position axisymmetric line L 2 as a reference. The lines L 1 and L 2 are arranged at right angles.

本実施の形態では、図１３（Ｂ）に示すように、複数の第１の電極３３２及び複数の第２の電極３３４をそれぞれ有する第１及び第２の電子デバイス３４２，３４４を用意する。第１及び第２の電子デバイス３４２，３４４のそれぞれにおいて、第１及び第２の表面３５２，３５４は平行であり、複数の第１の電極３３２と複数の第２の電極３３４は、第１及び第２の表面３５２，３５４の中間にある第１及び第２の表面３５２，３５４に平行な面（線Ｌ１，Ｌ２を含む面Ｓ１，Ｓ２）を基準面として、面対称の位置にある。また、第１の電極３３２と第２の電極３３４は同一形状の表面を有する。 In this embodiment mode, as shown in FIG. 13B, first and second electronic devices 342 and 344 each having a plurality of first electrodes 332 and a plurality of second electrodes 334 are prepared. In each of the first and second electronic devices 342, 344, the first and second surfaces 352, 354 are parallel, and the plurality of first electrodes 332 and the plurality of second electrodes 334 are the first and second surfaces 352, 354, respectively. as the first and (plane S 1, S 2 containing the lines L 1, L 2) reference surface plane parallel to the second surface 352, 354 in the middle of the second surface 352 and 354, the position of plane symmetry It is in. The first electrode 332 and the second electrode 334 have the same surface.

図１３（Ｂ）に示すように、第１及び第２の電子デバイス３４２，３４４を、搭載側面（図の裏面側）を回路基板３００に向けて、回路基板３００に搭載し、複数の第１の電極３３２及び複数の第２の電極３３４を、ろう接合によって、複数の第１のランド３０２及び複数の第２のランド３０４に接合する。本実施の形態によれば、ろう接合時のセルフアライメント効果によって、第１及び第２の電子デバイス３４２，３４４の回路基板３００に対する位置合わせを行うことができる。なお、第１のランド３０２と第１の電極３３２の、線Ｌ１に沿った方向の幅が同じであり、第２のランド３０４と第２の電極３３４の、線Ｌ２に沿った方向の幅が同じであるとセルフアライメント効果が高い。 As shown in FIG. 13B, the first and second electronic devices 342 and 344 are mounted on the circuit board 300 with the mounting side surfaces (the back side in the figure) facing the circuit board 300, and a plurality of first devices are mounted. The plurality of electrodes 332 and the plurality of second electrodes 334 are joined to the plurality of first lands 302 and the plurality of second lands 304 by brazing. According to the present embodiment, the first and second electronic devices 342 and 344 can be aligned with the circuit board 300 by the self-alignment effect at the time of brazing. Incidentally, the first lands 302 and the first electrode 332, a width along the line L 1 are the same, the second land 304 of the second electrode 334, the direction of along the line L 2 When the width is the same, the self-alignment effect is high.

次に、本発明の実施の形態に係る電子デバイスの製造方法の第１の変形例を説明する。この例では、図１４（Ａ）に示すように、上型４１０及び下型４１２を使用する。上型４１０には、吸着口４１４を介して、エア吸着によって第２の基板４１６を吸着する。第２の基板４１６の穴４１８に上型４１０のピン４２０を入れて第２の基板４１６の位置合わせをする。下型４１２には離型シート４２２を配置する。図１４（Ｂ）に示すように、離型シート４２２の上に第１の基板４２４を配置する。第１の基板４２４の穴４１８に下型４１２のピン４２０を入れて第１の基板４２４の位置合わせをする。第１の基板４２４の上に複数の電気素子３０を配置する。図１４（Ｃ）に示すように、第１及び第２の基板４２４，４１６の間に電気素子３０が配置されるように、上型４１０及び下型４１２をクランプし、通気孔４２６を介してキャビティの排気を行う。図１４（Ｄ）に示すように、注入口４２８からキャビティにモールド樹脂４３０を注入し、図１５（Ａ）に示すように、モールド樹脂４３０をキュアする。図１５（Ｂ）に示すように上型４１０及び下型４１２を開き、図１５（Ｃ）に示すように、第１及び第２の基板４２４，４１６の間で複数の電気素子３０が封止された封止体４３２を取り出す。図１５（Ｄ）に示すように、封止体４３２に一体化している不要な樹脂部分４３４を除去する（ゲートブレーク又はランナーブレーク）。その後、図１５（Ｅ）に示すように、ダイシングを行う。その他の詳細は、上述した製造方法で説明した内容が該当する。   Next, a first modification of the electronic device manufacturing method according to the embodiment of the present invention will be described. In this example, an upper mold 410 and a lower mold 412 are used as shown in FIG. The upper mold 410 adsorbs the second substrate 416 by air adsorption through the adsorption port 414. The pins 420 of the upper mold 410 are inserted into the holes 418 of the second substrate 416 to align the second substrate 416. A release sheet 422 is disposed on the lower mold 412. As shown in FIG. 14B, the first substrate 424 is disposed over the release sheet 422. The pins 420 of the lower mold 412 are inserted into the holes 418 of the first substrate 424 to align the first substrate 424. A plurality of electrical elements 30 are arranged on the first substrate 424. As shown in FIG. 14C, the upper mold 410 and the lower mold 412 are clamped so that the electric element 30 is disposed between the first and second substrates 424 and 416, and the air holes 426 are interposed. Exhaust the cavity. As shown in FIG. 14D, the mold resin 430 is injected into the cavity from the injection port 428, and the mold resin 430 is cured as shown in FIG. As shown in FIG. 15B, the upper mold 410 and the lower mold 412 are opened, and as shown in FIG. 15C, the plurality of electric elements 30 are sealed between the first and second substrates 424 and 416. The sealed body 432 thus taken out is taken out. As shown in FIG. 15D, the unnecessary resin portion 434 integrated with the sealing body 432 is removed (gate break or runner break). Thereafter, dicing is performed as shown in FIG. The other details correspond to the contents described in the manufacturing method described above.

次に、本発明の実施の形態に係る電子デバイスの製造方法の第２の変形例を説明する。この例では、図１６（Ａ）に示すように、下型５１２に離型シート５２２をセットし、その上に第１の基板５２４をセットする。第１の基板５２４の穴５１８に下型５１２のピン５２０を入れて第１の基板５２４の位置合わせをする。第１の基板５２４の上に複数の電気素子３０を配置する。図１６（Ｂ）に示すように、上型５１０及び下型５１２をクランプし、通気孔５２６を介してキャビティの排気を行う。図１６（Ｃ）に示すように、注入口５２８を介してキャビティにモールド樹脂５３０を注入し、図１６（Ｄ）に示すように、モールド樹脂５３０をキュアする。図１７（Ａ）に示すように上型５１０及び下型５１２を開き、図１７（Ｂ）に示すように、複数の電気素子３０が封止された封止体５３２を取り出す。図１７（Ｃ）に示すように、封止体５３２に一体化している不要な樹脂部分５３４を除去する（ゲートブレーク又はランナーブレーク）。図１７（Ｄ）に示すように、下プレス型５３６に封止体５３２をセットする。封止体５３２の一部である第１の基板５２４の穴５１８に下プレス型５３６のピン５２１を入れて第１の基板５２４の位置合わせをする。図１８（Ａ）に示すように、封止体５３２の上に貼り合せ用シート５３８を配置する。貼り合せ用シート５３８は、例えば、熱可塑性樹脂（エポキシ樹脂等）であって、封止体５３２の上に配置した時点では接着力又は粘着力が発現していなくてもよい。貼り合せ用シート５３８を介して、封止体５３２上に第２の基板５１６を配置する。第２の基板５１６の穴５１８に下プレス型５３６のピン５２１を入れて第２の基板５１６の位置合わせを行う。図１８（Ｂ）に示すように、上プレス型５４０及び下プレス型５３６によって、貼り合せ用シート５３８を介して、第２の基板５１６と封止体５３２の間に圧力を加え、同時に熱を加える。こうして、貼り合せ用シート５３８に接着力を発現させ、第２の基板５１６を封止体５３２に熱圧着する。図１８（Ｃ）に示すように、第１及び第２の基
板５２４，５１６の間で複数の電気素子３０が封止された中間体５４２を取り出し、図１８（Ｄ）に示すように、ダイシングを行う。その他の詳細は、上述した製造方法で説明した内容が該当する。 Next, a second modification of the electronic device manufacturing method according to the embodiment of the present invention will be described. In this example, as shown in FIG. 16A, a release sheet 522 is set on a lower mold 512, and a first substrate 524 is set thereon. The pin 520 of the lower mold 512 is inserted into the hole 518 of the first substrate 524 to align the first substrate 524. A plurality of electrical elements 30 are arranged on the first substrate 524. As shown in FIG. 16B, the upper mold 510 and the lower mold 512 are clamped, and the cavity is exhausted through the vent hole 526. As shown in FIG. 16C, the mold resin 530 is injected into the cavity through the injection port 528, and the mold resin 530 is cured as shown in FIG. As shown in FIG. 17A, the upper mold 510 and the lower mold 512 are opened, and as shown in FIG. 17B, the sealing body 532 in which the plurality of electric elements 30 are sealed is taken out. As shown in FIG. 17C, the unnecessary resin portion 534 integrated with the sealing body 532 is removed (gate break or runner break). As shown in FIG. 17D, the sealing body 532 is set on the lower press die 536. The pin 521 of the lower press mold 536 is inserted into the hole 518 of the first substrate 524 which is a part of the sealing body 532 to align the first substrate 524. As shown in FIG. 18A, a bonding sheet 538 is provided over the sealing body 532. The bonding sheet 538 is, for example, a thermoplastic resin (epoxy resin or the like), and does not have to exhibit an adhesive force or an adhesive force when it is disposed on the sealing body 532. The second substrate 516 is disposed over the sealing body 532 with the bonding sheet 538 interposed therebetween. The pin 521 of the lower press die 536 is inserted into the hole 518 of the second substrate 516 to align the second substrate 516. As shown in FIG. 18B, pressure is applied between the second substrate 516 and the sealing body 532 via the bonding sheet 538 by the upper press die 540 and the lower press die 536, and heat is simultaneously applied. Add. Thus, an adhesive force is developed in the bonding sheet 538, and the second substrate 516 is thermocompression bonded to the sealing body 532. As shown in FIG. 18C, the intermediate body 542 in which the plurality of electric elements 30 are sealed between the first and second substrates 524 and 516 is taken out, and as shown in FIG. 18D, dicing is performed. I do. The other details correspond to the contents described in the above-described manufacturing method.

本発明は、上述した実施の形態に限定されるものではなく、種々の変形が可能である。例えば、本発明は、実施の形態で説明した構成と実質的に同一の構成（例えば、機能、方法及び結果が同一の構成、あるいは目的及び結果が同一の構成）を含む。また、本発明は、実施の形態で説明した構成の本質的でない部分を置き換えた構成を含む。また、本発明は、実施の形態で説明した構成と同一の作用効果を奏する構成又は同一の目的を達成することができる構成を含む。また、本発明は、実施の形態で説明した構成に公知技術を付加した構成を含む。   The present invention is not limited to the above-described embodiments, and various modifications can be made. For example, the present invention includes configurations that are substantially the same as the configurations described in the embodiments (for example, configurations that have the same functions, methods, and results, or configurations that have the same purposes and results). In addition, the invention includes a configuration in which a non-essential part of the configuration described in the embodiment is replaced. In addition, the present invention includes a configuration that exhibits the same operational effects as the configuration described in the embodiment or a configuration that can achieve the same object. Further, the invention includes a configuration in which a known technique is added to the configuration described in the embodiment.

１…電子デバイス、 １０…第１の基板、 １２…表面、 １４…側面、 １６…第１の電極、 １８…表面電極部、 ２０…切り欠き ２２…側面電極部、 ２４…配線パターン、 ２６…第２の基板、 ２８…第２の電極、 ３０…電気素子、 ３２…素子片、
３４…パッケージ、 ３６…ベース、 ３８…蓋 ４０…樹脂、 ４２…露出面、 ４４…第１の表面、 ４６…第２の表面、 ４８…搭載側面、 ５０…回路基板、 ５２…第１の配線、 ５４…第２の配線、 ５６…配線、 ５８…ろう材 DESCRIPTION OF SYMBOLS 1 ... Electronic device, 10 ... 1st board | substrate, 12 ... Surface, 14 ... Side surface, 16 ... 1st electrode, 18 ... Surface electrode part, 20 ... Notch 22 ... Side electrode part, 24 ... Wiring pattern, 26 ... Second substrate 28 ... second electrode 30 ... electric element 32 ... element piece,
34 ... Package, 36 ... Base, 38 ... Lid 40 ... Resin, 42 ... Exposed surface, 44 ... First surface, 46 ... Second surface, 48 ... Mounting side surface, 50 ... Circuit board, 52 ... First wiring 54 ... second wiring 56 ... wiring 58 ... brazing material

Claims (4)

相互に反対を向く第１及び第２の表面と、前記第１及び第２の表面に接続する搭載側面と、を含む外形形状を有する電子デバイスの製造方法であって、
第１の電極を有する第１の基板と第２の電極を有する第２の基板との間に、多面体の外形形状を有する電気素子を、最も広い面が前記第１、第２の基板の一方を向くように配置し、前記第１の電極と前記電気素子を電気的に接続する工程と、
前記第１及び第２の基板の間で、樹脂によって前記電気素子を封止する工程と、
前記第１及び第２の基板並びに前記樹脂を、一体的に、断面が平坦になるように切断する工程と、
を含み、
前記第１の表面は、前記第１の基板の前記樹脂とは反対側の面の一部から形成し、
前記第２の表面は、前記第２の基板の前記樹脂とは反対側の面の一部から形成し、
前記搭載側面は、前記樹脂の切断によって生じる露出面と、前記第１及び第２の基板の切断によって生じる側面と、から形成し、
前記第１の基板を、前記第１の電極が、前記第１の表面で前記搭載側面に隣接する端部に配置されるように切断し、
前記第２の基板を、前記第２の電極が、前記第２の表面で前記搭載側面に隣接する端部に配置されるように切断する電子デバイスの製造方法。 A method of manufacturing an electronic device having an outer shape including first and second surfaces facing opposite to each other and a mounting side surface connected to the first and second surfaces,
Between the first substrate having the first electrode and the second substrate having the second electrode, an electric element having an outer shape of a polyhedron is formed, and the widest surface is one of the first and second substrates. A step of electrically connecting the first electrode and the electric element;
Sealing the electrical element with a resin between the first and second substrates;
Cutting the first and second substrates and the resin integrally so as to have a flat cross section;
Including
The first surface is formed from a part of the surface of the first substrate opposite to the resin,
The second surface is formed from a part of the surface of the second substrate opposite to the resin,
The mounting side surface is formed from an exposed surface generated by cutting the resin and a side surface generated by cutting the first and second substrates,
Cutting the first substrate such that the first electrode is disposed at an end adjacent to the mounting side surface on the first surface;
A method for manufacturing an electronic device, wherein the second substrate is cut so that the second electrode is disposed at an end portion adjacent to the mounting side surface on the second surface. 請求項１に記載された電子デバイスの製造方法において、
前記第１の基板を、前記第１の電極が切断される位置で切断して、前記第１の電極を、前記第１の表面で前記搭載側面に隣接するように配置し、
前記第２の基板を、前記第２の電極が切断される位置で切断して、前記第２の電極を、前記第２の表面で前記搭載側面に隣接するように配置する電子デバイスの製造方法。 In the manufacturing method of the electronic device according to claim 1,
Cutting the first substrate at a position where the first electrode is cut, and placing the first electrode adjacent to the mounting side surface on the first surface;
A method of manufacturing an electronic device, wherein the second substrate is cut at a position where the second electrode is cut, and the second electrode is disposed adjacent to the mounting side surface on the second surface. . 請求項１に記載された電子デバイスの製造方法において、
前記第１の基板を、前記第１の電極を避けて切断して、前記第１の電極を、前記第１の表面の周縁から間隔をあけて配置し、
前記第２の基板を、前記第２の電極を避けて切断して、前記第２の電極を、前記第２の表面の周縁から間隔をあけて配置する電子デバイスの製造方法。 In the manufacturing method of the electronic device according to claim 1,
Cutting the first substrate away from the first electrode, and placing the first electrode spaced from the periphery of the first surface;
A method of manufacturing an electronic device, wherein the second substrate is cut while avoiding the second electrode, and the second electrode is disposed at a distance from a peripheral edge of the second surface. （ａ）請求項１から３のいずれか１項に記載された電子デバイスの製造方法で製造された電子デバイスであって、複数の前記第１の電極及び複数の前記第２の電極を有する電子デバイスを用意する工程と、
（ｂ）複数の第１のランド及び複数の第２のランドを有する回路基板を用意する工程と、
（ｃ）前記電子デバイスを、前記搭載側面を前記回路基板に向けて、前記回路基板に搭載し、前記複数の第１の電極及び前記複数の第２の電極を、ろう接合によって、前記複数の第１のランド及び前記複数の第２のランドに接合する工程と、
を含み、
前記電子デバイスの前記第１及び第２の表面は平行であり、前記複数の第１の電極と前記複数の第２の電極は、前記第１及び第２の表面の中間にある前記第１及び第２の表面に平行な面を基準面として、面対称の位置にあり、
前記複数の第１のランドと前記複数の第２のランドは線対称の位置に配列され、
前記（ｃ）工程で、前記ろう接合時のセルフアライメント効果によって、前記電子デバイスの前記回路基板に対する位置合わせを行う電子モジュールの製造方法。 (A) An electronic device manufactured by the method for manufacturing an electronic device according to any one of claims 1 to 3, comprising a plurality of the first electrodes and a plurality of the second electrodes. Preparing a device;
(B) preparing a circuit board having a plurality of first lands and a plurality of second lands;
(C) The electronic device is mounted on the circuit board with the mounting side surface facing the circuit board, and the plurality of first electrodes and the plurality of second electrodes are bonded to each other by brazing. Bonding to a first land and the plurality of second lands;
Including
The first and second surfaces of the electronic device are parallel, and the plurality of first electrodes and the plurality of second electrodes are intermediate between the first and second surfaces. The plane parallel to the second surface is a plane that is symmetrical with respect to the reference plane,
The plurality of first lands and the plurality of second lands are arranged in line-symmetric positions,
In the step (c), an electronic module manufacturing method in which the electronic device is aligned with the circuit board by a self-alignment effect at the time of the brazing.
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