JP2008098476A - Solid-state imaging apparatus, and imaging apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve optical characteristics and to efficiently array pixels by contriving the arrangement of a charge voltage conversion part and a transistor group. <P>SOLUTION: The solid-state imaging apparatus comprises a plurality of pixels 11 including photoelectric conversion parts 12 for converting an incident light quantity to electric signals and forming an oblique grid array inclined to a scanning direction, and a charge voltage conversion part 13 for converting a signal charge read from the photoelectric conversion part 12 arranged between the two pixels 11A and 11B adjacent to each other in the diagonal direction of the pixels among the plurality of pixels 11 to a voltage. The charge voltage conversion part 13 is shared by the two pixels 11A and 11B, and a set of the transistor group 21 is arranged in a shared block 16 constituted of a pixel pair 14 comprising the two pixels 11A and 11B adjacent each other in the diagonal direction and a pixel pair 14 adjacent to the pixel pair and having wiring 15 connecting the charge voltage conversion parts 13 of the respective pixel pairs 14. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device and an imaging device.

  With the spread of digital cameras in recent years, higher resolutions are required even for cameras with popular prices. In addition to digital cameras, video cameras, mobile phone cameras, and the like are also required to have high resolution. In general, since the optical size (outer dimensions of the solid-state imaging device) does not change, the increase in the number of pixels is synonymous with the miniaturization of pixels.

  Pixel miniaturization is directly linked to a decrease in the number of photons entering the pixel, thereby causing an absolute sensitivity decrease that cannot be covered by an improvement in quantum efficiency. This is the same for both CCD image sensors and CMOS image sensors. However, in general, a CMOS image sensor is more difficult to condense because the metal wiring is higher (thick), and the sensitivity is lower accordingly.

  In such a situation, a technique for increasing sensitivity while suppressing a decrease in resolution from the viewpoint of image processing has been proposed. This technique will be described with reference to FIG.

  As shown in FIG. 8, it is known that the so-called honeycomb pixel arrangement can suppress the deterioration of the spatial resolution in the vertical and horizontal directions even if the actual number of pixels is half that of the pixel 111. . Since the number of pixels can be halved in the same effective pixel region, the area per unit pixel increases and the sensitivity can be improved. Since there are many vertical and horizontal lines in the artificial space and the image data is represented by XY coordinates, the spatial resolution of these two axes is important in the sense of resolution. It can be said that the scene is highly sensitive.

  However, the honeycomb pixel array is not suitable for integration. In general, image data has a data array with two axes, vertical and horizontal, and pixels of a square lattice image sensor have an array according to the data array. Along with this, control (driving / reading) is also performed in the vertical and horizontal directions. On the other hand, in the honeycomb pixel arrangement, the pixels are arranged in a diagonal square lattice, so that the arrangement of the control elements becomes zigzag.

  For example, in the case of a general square lattice pixel arrangement in a CMOS image sensor, wiring can be performed efficiently by changing the metal wiring layers of the vertical and horizontal axes. On the other hand, in the honeycomb pixel array, the pixels in the adjacent row and the adjacent column enter between the pixels in the same row or the same column, so that the wiring has to be arranged in a zigzag manner. For this reason, it may be difficult to connect to an element such as a transistor formed on the silicon surface in a portion where the wiring overlaps.

  The honeycomb pixel array has a problem that the wiring density is high as described above. Therefore, it is necessary to keep the metal opening large by reducing the number of wirings. For this purpose, sharing of pixel transistors is effective (for example, see Patent Document 1).

  However, the technique disclosed in Patent Document 1 cannot avoid deterioration of characteristics in a fine pixel. That is, in the technique disclosed in Patent Document 1, as shown in FIG. 9A, the transfer gate TG of the charge-voltage conversion unit is arranged in the side portion of the pixel 111, and the readout characteristics are excellent. There is a problem of pressing the light spot area. Further, even if a shared portion of the floating diffusion FD that is a charge-voltage converter is disposed between the pixels, it is difficult to ensure a sufficient photodiode PD area if the pixel transistor is shared between the two pixels.

  Further, in the pixel group in which a plurality of pixels are arranged in a two-dimensional square array, as shown in FIG. 9B, the floating diffusion FD that is a shared charge-voltage conversion unit is connected to the corner of the pixel 111 via the transfer gate TG. It is arranged in the part. By disposing the transfer gate TG between two diagonally adjacent pixels at the corners of the pixels 111, the distance from the condensing center of the pixel 111 to the transfer gate TG can be increased. A decrease in sensitivity due to light absorption can be suppressed.

JP 2004-128193 A

  The problem to be solved is that in the so-called honeycomb pixel arrangement, the charge-voltage conversion unit is arranged on the side portion of the pixel, and although it has excellent readout characteristics, it has a problem of pressing the condensing spot area. In addition, even if a shared portion of a charge-voltage conversion unit (for example, floating diffusion: FD) that is a charge-voltage conversion unit is arranged between pixels, if a pixel transistor is shared between two pixels, a photoelectric conversion unit (for example, photo It is difficult to ensure a sufficient area of the diode (PD).

  An object of the present invention is to devise the arrangement of transistor groups such as a charge-voltage converter, a transfer transistor, an amplifying transistor, and a reset transistor to improve optical characteristics and enable efficient pixel arrangement.

  The solid-state imaging device of the present invention includes a photoelectric conversion unit that converts an incident light amount into an electric signal, and includes a plurality of pixels that form an oblique grid array inclined with respect to a scanning direction, and a diagonal of the pixels among the plurality of pixels. A charge-voltage conversion unit that converts a signal charge read from the photoelectric conversion unit disposed between two adjacent pixels in a direction into a voltage, and the charge-voltage conversion unit is shared by the two pixels. A shared block comprising a pixel pair composed of two pixels adjacent to each other in the diagonal direction and a pixel pair adjacent to the pixel pair, and having a wiring connecting the charge-voltage conversion unit of each pixel pair One set of transistor groups is arranged in each.

  In the solid-state imaging device of the present invention, the charge voltage conversion unit that converts the signal charge read from the photoelectric conversion unit into a voltage is disposed between two pixels that are adjacent to each other in the diagonal direction of the pixel. A condensing spot area is ensured while obtaining. In addition, since a shared block having two pixel pairs and a wiring connecting the charge-voltage converters of each pixel pair is provided, and a set of transistor groups is arranged in the shared block, pixels between four pixels The transistor is shared, and the light receiving area of the photoelectric conversion unit is sufficiently secured. In addition, it is difficult to secure a sufficient light receiving area of the photoelectric conversion unit with two pixels, and when the number of pixels exceeds four, the capacitance in the charge voltage conversion unit (for example, floating diffusion) increases, thereby converting in charge-voltage conversion. The efficiency is extremely lowered, and the accuracy in voltage detection is deteriorated. Therefore, the pixel transistor is shared between the four pixels.

  The imaging device of the present invention includes a condensing optical unit that collects incident light, a solid-state imaging device that receives and photoelectrically converts the light collected by the condensing optical unit, and a signal that processes the photoelectrically converted signal The solid-state imaging device includes a photoelectric conversion unit that converts the amount of incident light into an electrical signal, a plurality of pixels that form an oblique grid array that is inclined with respect to a scanning direction, and the pixel among the plurality of pixels A charge-voltage conversion unit that converts a signal charge read from the photoelectric conversion unit disposed between two pixels adjacent to each other in the diagonal direction of the pixel into a voltage, and the charge-voltage conversion unit is connected to the two pixels. Wiring that is composed of a pixel pair composed of two pixels that are shared and are adjacent to each other in the diagonal direction, and a pixel pair that is adjacent to the pixel pair, and that connects the charge-voltage conversion unit of each pixel pair A set of transistors in a shared block having Characterized in that it is location.

  In the imaging apparatus of the present invention, since the solid-state imaging apparatus of the present invention is used, the light receiving area of the photoelectric conversion unit of each pixel is sufficiently secured as described above.

  According to the solid-state imaging device of the present invention, since the light receiving area of the photoelectric conversion unit of each pixel is sufficiently secured, the sensitivity can be increased while maintaining the resolution, and thus there is an advantage that the optical characteristics are improved. In addition, since the pixel transistor is shared between the four pixels, wiring can be simplified and an efficient pixel arrangement can be provided.

  According to the imaging device of the present invention, since the solid-state imaging device of the present invention is used, there are advantages that the same effects as described above can be obtained and that pixel characteristics such as high sensitivity can be achieved.

  An embodiment (first example) according to the solid-state imaging device of the present invention will be described with reference to a plan layout diagram of FIG. 1 and an enlarged view of a shared block of FIG. 1 and 2 show the arrangement of transistors such as amplifiers for maximizing the characteristics optically or electrically.

  As shown in FIGS. 1 and 2, the solid-state imaging device 1 includes a plurality of pixels 11 having a photoelectric conversion unit (for example, a photodiode) 12 that converts incident light into an electrical signal. The plurality of pixels 11 have a so-called honeycomb pixel arrangement in which the pixels 11 are arranged shifted in the row direction or the column direction with respect to adjacent pixels. Here, as an example, an oblique square lattice pixel array inclined in the direction of 45 degrees oblique to the scanning direction is used. The signal charges read from the photoelectric conversion units 12 (12A) and 12 (12B) are converted into voltages between two pixels 11 (11A) and 11 (11B) that are adjacent to each other in the diagonal direction among the plurality of pixels 11. The charge voltage conversion unit 13 is disposed, and the charge voltage conversion unit 13 is shared by the two pixels 11A and 11B. Further, a pixel pair 14 (14A) composed of two pixels 11A and 11B adjacent to each other in the diagonal direction (vertical direction or horizontal direction, vertical direction in the drawing), and a pixel pair 14 adjacent to the pixel pair 14A. (14B) and a common block 16 having a control signal line 15 to which the charge-voltage converters 13 (13A) and 31 (31B) of the pixel pairs 14A and 14B are connected. A pair of transistor groups 21 is arranged in the shared block 16.

  The transistor group 21 includes, for example, an amplification transistor TrA, a reset transistor TrR, and a selection transistor TrS that are signal amplification means. That is, one transistor group 21 is formed of four pixels. The layout includes four rows of pixels in one block. The transfer gate TG of each photoelectric conversion unit 12 is arranged at the corner of the photoelectric conversion unit 12, and the charge-voltage conversion unit 13 between the pixels 11 </ b> A and 11 </ b> B adjacent in the vertical direction (diagonal direction of the photoelectric conversion unit 12). Share the floating diffusion FD. A transfer gate TG is provided between the floating diffusion FD and the photoelectric conversion unit 12.

  The shared blocks 16 are two-dimensionally arranged at equal pitches in the vertical and horizontal directions. The plurality of transistors constituting the transistor group 21 to be accessed simultaneously are arranged in a line in the oblique direction. As can be seen at a glance, since the region A where the transfer gate TG is present and the region B where the transistor group 21 such as an amplifier is clearly separated, wiring is possible without complicated control wires. . In the drawing, each line (transfer gate line TG1, transfer gate line TG2, reset line RST, select line SEL, transfer gate line TG3, transfer gate line TG4, etc.) is shown by a straight line. It arrange | positions so that the part 12 top may be avoided.

  Next, an embodiment (second example) according to the solid-state imaging device of the present invention will be described with reference to a plan layout diagram of FIG.

  The solid-state imaging device 2 of the second embodiment is an improvement of the solid-state imaging device 1 of the first embodiment. In the solid-state imaging device 1, as shown in part C in FIG. 1, there are portions where the transistor groups 21 and 21 are arranged on both sides of the photoelectric conversion unit 12. As a result, if the light receiving area of the photoelectric conversion unit 12 is to be equalized, it must be matched with the photoelectric conversion unit having a small light receiving surface, which leads to a decrease in the saturation charge amount. In addition, as shown in FIG. 3, when a general Bayer arrangement is made to have a color arrangement extending 45 degrees, even in pixels of the same color, such as pixels A and B, the orientation of the photoelectric conversion unit (for example, photodiode) 12 is aligned. It is different. In the shared configuration, since shading changes depending on the orientation of the photoelectric conversion unit 12, it is necessary to have a shading correction table for each color in two directions.

  Therefore, in the solid-state imaging device 2 of the second embodiment, as shown in FIG. 4, the configuration of the unit block is almost the same as that of the first embodiment. The feature of the second embodiment is that transistor groups 21 such as amplifiers and resets are arranged on a straight line in an oblique direction. As a result, the ineffective area on the semiconductor surface, which is a problem of the solid-state imaging device 1 of the first embodiment, can be reduced, and the light receiving area of the photoelectric conversion unit 12 can be maximized. As for the color arrangement, as shown in FIG. 5, even in the diagonal Bayer arrangement, the same color is the same orientation as the pixel A and the pixel B, and the number of shading tables can be suppressed.

  In the layout configuration of the solid-state imaging device 2, the readout directions of the photoelectric conversion units 12 arranged in the same row are two directions, so that the number of control signal wirings 15 to the transfer gate TG is increased and all the control wirings ( The transfer gate line TG1, the transfer gate line TG2, the reset line RST, the select line SEL, the transfer gate line TG3, the transfer gate line TG4, etc.) pass over the transistor group 21 including the pixel transistor array, so that the lines are limited. That is. For this reason, in the solid-state imaging device 2 of the second embodiment, the transfer gates TG and TG of the photoelectric conversion units 12A and 12B in the same row are locally connected by the first-layer metal wiring, and further by the second-layer metal wiring. By performing the horizontal wiring, the increase in the density of the metal wiring is suppressed. In this case, as shown in FIG. 6, the shared block 16 is arranged, and the reset line RST and the select line SEL have different control lines between columns.

  In the solid-state imaging devices 1 and 2 of the present invention, signals read from the photoelectric conversion units 12 (12A) and 12 (12B) between two pixels 11 (11A) and 11 (11B) adjacent in the diagonal direction of the pixels. Since the charge-voltage conversion unit 13 for converting the charge into the voltage is arranged, a condensing spot area is ensured while obtaining high reading characteristics. The shared block 16 includes two pairs of pixels 14 (14A) and 14 (14B) and a control signal wiring 15 to which the charge voltage conversion units 13A and 13B of the pixel pairs 14A and 14B are connected. Since a set of transistor groups 21 is arranged in 16, the pixel transistors are shared among the four pixels, and a light receiving area of the photoelectric conversion unit 12 is sufficiently secured. In addition, it is difficult to secure a sufficient light receiving area of the photoelectric conversion unit when sharing two pixels, and charge-voltage is increased due to an increase in charge-voltage conversion unit (for example, floating diffusion) capacitance when sharing more than four pixels. Conversion efficiency in conversion is extremely lowered, and accuracy in voltage detection is deteriorated. Therefore, the pixel transistor is shared between the four pixels. Therefore, since the light receiving area of the photoelectric conversion unit 12 of each pixel is sufficiently secured, the sensitivity can be increased while maintaining the resolution, and thus there is an advantage that the optical characteristics are improved. In addition, since the pixel transistor is shared between the four pixels, wiring can be simplified and an efficient pixel arrangement can be provided.

  Next, an embodiment (example) according to the imaging apparatus of the present invention will be described with reference to the block diagram of FIG.

  As illustrated in FIG. 7, the imaging device 50 includes a solid-state imaging device (not shown) in the imaging unit 51. An imaging optical system 52 that forms an image is provided on the light condensing side of the imaging unit 51, and the imaging unit 51 has an image of a signal that is photoelectrically converted by a driving circuit that drives the imaging unit 51 and a solid-state imaging device. A signal processing unit 53 having a signal processing circuit or the like for processing is connected. The image signal processed by the signal processing unit can be stored by an image storage unit (not shown). In such an imaging device 50, the solid-state imaging device 1 or the solid-state imaging device 2 described in the above embodiment can be used as the solid-state imaging device.

  Since the imaging device 50 of the present invention uses the solid-state imaging device 1 or the solid-state imaging device 2 of the present invention, the area of the photoelectric conversion portion of each pixel is sufficiently secured as described above. Therefore, there is an advantage that pixel characteristics such as high sensitivity can be achieved.

  The imaging device 50 of the present invention is not limited to the above configuration, and can be applied to any configuration as long as the imaging device uses a solid-state imaging device.

  The solid-state imaging devices 1 and 2 may be formed as a single chip, or may be a module-shaped configuration having an imaging function in which an imaging unit and a signal processing unit or an optical system are packaged together. May be. Further, the present invention can be applied not only to a solid-state imaging device but also to an imaging device. In this case, an effect of improving the image quality can be obtained as the imaging device. Here, the imaging device indicates, for example, a camera or a portable device having an imaging function. “Imaging” includes not only capturing an image during normal camera shooting but also includes fingerprint detection in a broad sense.

1 is a plan layout diagram illustrating an embodiment (first example) according to a solid-state imaging device of the present invention. It is an enlarged view of a shared block. FIG. 2 is a plan layout diagram illustrating an example of a color arrangement of the solid-state imaging device according to the first embodiment. It is the plane layout figure which showed one embodiment (2nd Example) which concerns on the solid-state imaging device of this invention. It is the plane layout figure which showed the example of a color arrangement | sequence of the solid-state imaging device of 2nd Example. It is the wiring diagram which showed the example of wiring of the solid-state imaging device of 2nd Example. It is the block diagram which showed one Embodiment (Example) which concerns on the imaging device of this invention. It is the plane layout figure which showed an example of the general honeycomb pixel arrangement | sequence. It is the plane layout figure which showed an example of the shared state of the conventional charge voltage conversion part.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Solid-state imaging device, 11 ... Pixel, 12 ... Photoelectric conversion part, 13 ... Charge voltage conversion part, 14 ... Pixel pair, 15 ... Signal control wiring, 16 ... Shared block, 21 ... Transistor group

Claims (6)

A plurality of pixels including a photoelectric conversion unit that converts an incident light amount into an electrical signal, and forming an oblique grid array inclined with respect to the scanning direction;
A charge-voltage converter that converts a signal charge read from the photoelectric converter disposed between two pixels adjacent to each other in the diagonal direction of the plurality of pixels into a voltage;
The charge-voltage converter is shared by the two pixels,
A common block including a pixel pair composed of two pixels adjacent in the diagonal direction and a pixel pair adjacent to the pixel pair, and having a wiring connecting the charge-voltage converters of the pixel pairs. A solid-state imaging device, wherein a set of transistors is arranged. 2. The solid-state imaging device according to claim 1, wherein a signal amplifying unit is arranged in a pixel pair composed of two pixels adjacent in the diagonal direction. The set of transistors performs transfer of charge from the photoelectric conversion unit to the charge-voltage conversion unit, amplification of signal charge of the charge-voltage conversion unit, and reset of signal charge of the charge-voltage conversion unit. The solid-state imaging device according to claim 1. The solid-state imaging device according to claim 3, wherein the shared blocks are arranged at equal pitches in a vertical direction and a horizontal direction. A plurality of transistors constituting the transistor group are arranged in a line in an oblique direction,
The solid-state imaging device according to claim 3, wherein the shared blocks are arranged at an equal pitch. A condensing optical unit that condenses incident light;
A solid-state imaging device that receives and photoelectrically converts light collected by the condensing optical unit; and
A signal processing unit for processing the photoelectrically converted signal,
The solid-state imaging device
A plurality of pixels including a photoelectric conversion unit that converts an incident light amount into an electrical signal, and forming an oblique grid array inclined with respect to the scanning direction;
A charge-voltage conversion unit that converts a signal charge read from the photoelectric conversion unit disposed between two pixels adjacent to each other in the diagonal direction of the plurality of pixels into a voltage;
The charge-voltage converter is shared by the two pixels,
A common block including a pixel pair composed of two pixels adjacent in the diagonal direction and a pixel pair adjacent to the pixel pair, and having a wiring connecting the charge-voltage converters of the pixel pairs. An image pickup apparatus in which a set of transistors is arranged.

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