JP2007067077A - Nitride semiconductor device and method of manufacturing same - Google Patents
Nitride semiconductor device and method of manufacturing same Download PDFInfo
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Abstract
Description
本発明は、窒化物半導体素子およびその製造方法に関する。より詳細には、窒化物半導体と熱膨張係数の異なる基板上に作製した、表面が平滑でクラックのない高品質な窒化物半導体素子、および、その製造方法に関する。 The present invention relates to a nitride semiconductor device and a method for manufacturing the same. More specifically, the present invention relates to a high-quality nitride semiconductor device having a smooth surface and no cracks, which is manufactured on a substrate having a thermal expansion coefficient different from that of a nitride semiconductor, and a method for manufacturing the same.
窒化物半導体は、Ｂ、Ａｌ、Ｇａ、もしくはＩｎ等のＩＩＩ 族元素のうちの少なくとも一つ以上の元素ならびにＶ族元素である窒素の化合物である。一般式は、ＡｌaＢbＧａcＩｎ1-a-b-cＮ（０≦ａ≦１，０≦ｂ≦１，０≦ｃ≦１）により表される。窒化物半導体は、電界効果トランジスタ等の電子デバイス、または、可視光領域から紫外光領域の短波長帯における発光デバイスの活性材料として、近年盛んに研究および技術開発が行われている。一般的に、これらの窒化物半導体は、サファイア、窒化珪素、シリコン等の異種基板の上にヘテロエピタキシー技術を使用して作製される。特にシリコン基板は、大面積である、結晶性が良い、放熱性に優れる、へき開が容易である、プロセス技術が成熟している、さらに、低価格であるなどの多くの魅力的な特徴を備えている。 The nitride semiconductor is a compound of nitrogen that is at least one element of group III elements such as B, Al, Ga, or In and a group V element. General formula is represented by Al a B b Ga c In 1 -abc N (0 ≦ a ≦ 1,0 ≦ b ≦ 1,0 ≦ c ≦ 1). Nitride semiconductors have been actively studied and developed in recent years as active materials for electronic devices such as field effect transistors or light emitting devices in the short wavelength band from the visible light region to the ultraviolet light region. Generally, these nitride semiconductors are fabricated using heteroepitaxy technology on a dissimilar substrate such as sapphire, silicon nitride, or silicon. In particular, silicon substrates have many attractive features such as large area, good crystallinity, excellent heat dissipation, easy cleavage, mature process technology, and low price. ing.
しかしながら、窒化物半導体およびシリコン基板では、格子定数や熱膨張係数が大きく異なる。このため、シリコン基板上に作製された窒化物半導体には、クラック（ミクロンサイズの幅の割れ）や貫通転位等の欠陥が多数存在するという問題があった。特に、窒化物半導体の熱膨張係数は、シリコン基板に比較して非常に大きい。このため、高温の結晶成長工程から室温にまで冷却する過程において、窒化物半導体に大きな引っ張り歪が生じ、高密度のクラックが発生することが大きな問題となっていた。
そこで、シリコン基板および窒化物半導体層の間にバッファ層を挿入し、上述したクラックや貫通転位を低減することが通例となっている。このようなバッファ層の例として、ＡｌＮから成る第１のバッファ層およびＧａＮから成る第２のバッファ層を交互に複数積層した超格子状の多層膜（以下、ＡｌＮ系格子バッファ層とする）が提案されている(非特許文献１)。
However, the lattice constant and the thermal expansion coefficient differ greatly between the nitride semiconductor and the silicon substrate. For this reason, the nitride semiconductor fabricated on the silicon substrate has a problem that there are many defects such as cracks (micron-sized width cracks) and threading dislocations. In particular, the thermal expansion coefficient of a nitride semiconductor is very large compared to a silicon substrate. For this reason, in the process of cooling from the high-temperature crystal growth step to room temperature, a large tensile strain is generated in the nitride semiconductor, and a high-density crack is generated.
Therefore, it is customary to insert a buffer layer between the silicon substrate and the nitride semiconductor layer to reduce the above-described cracks and threading dislocations. As an example of such a buffer layer, there is a superlattice multilayer film (hereinafter referred to as an AlN-based lattice buffer layer) in which a plurality of first buffer layers made of AlN and second buffer layers made of GaN are alternately stacked. It has been proposed (Non-Patent Document 1).
上記の非特許文献１においては、バッファ層の第１のバッファ層としてはＡｌＮを用い、第２のバッファ層としてＧａＮ を用いることが開示されている。しかしながら、上記の非特許文献１においては、形成される窒化物半導体の表面の平坦性およびクラック発生の防止を両立する最適な条件については、十分に開示されていない。 Non-Patent Document 1 discloses that AlN is used as the first buffer layer of the buffer layer and GaN is used as the second buffer layer. However, the above-mentioned Non-Patent Document 1 does not sufficiently disclose the optimum conditions for achieving both the flatness of the surface of the formed nitride semiconductor and the prevention of cracks.
図１は、従来技術による窒化物半導体素子の断面図である。この本窒化物半導体素子において、ＡｌＮ系超格子バッファ層の組成は、第１のバッファ層はＡｌxＧａ1-xＮとし、第２のバッファ層はＡｌyＧａ1-yＮと表す。図１に示すように、（１１１）の主方位面を有する３インチ径のシリコン基板１１上に、ＡｌＮ（すなわち、ｘ＝１）から成り５ｎｍの厚さを持つ第１のバッファ層１２ａが形成されている。さらに、第１のバッファ層の上にはＧａＮ（すなわち、ｙ＝０）から成り２０ｎｍの厚さを持つ第２のバッファ層１２ｂが形成されている。第１のバッファ層および第２のバッファ層を各々２０層ずつ交互に積層して、ＡｌＮ系超格子バッファ層１２が構成される。さらに、このバッファ層１２の上に、１μｍの厚さのＧａＮから成る窒化物半導体層１３を成長させた。 FIG. 1 is a cross-sectional view of a conventional nitride semiconductor device. In this nitride semiconductor device, the composition of the AlN-based superlattice buffer layer is expressed as Al x Ga 1-x N for the first buffer layer and Al y Ga 1-y N for the second buffer layer. As shown in FIG. 1, a first buffer layer 12a made of AlN (ie, x = 1) and having a thickness of 5 nm is formed on a 3-inch diameter silicon substrate 11 having a (111) main orientation plane. Has been. Further, a second buffer layer 12b made of GaN (ie, y = 0) and having a thickness of 20 nm is formed on the first buffer layer. The AlN-based superlattice buffer layer 12 is configured by alternately stacking 20 first buffer layers and 20 second buffer layers. Further, a nitride semiconductor layer 13 made of GaN having a thickness of 1 μm was grown on the buffer layer 12.
図２は、上述の窒化物半導体素子の高分解能Ｘ線回折装置（ＨＲ−ＸＲＤ）によるθ−２θスキャンチャートを示す。当業者にはよく知られているように、このスキャンチャートによって、バッファ層１２における超格子層の界面状態を把握することが出来る。バッファ層１２内の各界面が原子層レベルで平滑な超格子である場合には、サテライトピークが観測される。図２においては、０次ピークのみしか観察されず、サテライトピークはほとんど見られない（後述する図５と比較することにより理解される）。すなわち、ＡｌＮ系超格子バッファ層１２内における第１のバッファ層１２ａ（ＡｌＮ）および第２のバッファ層１２ｂ（ＧａＮ）の界面が荒れていることが分かった。一方、ＧａＮから成る窒化物半導体層１３の表面を原子間力顕微鏡（ＡＦＭ）で観察したところ、確かにクラックは全くなかったが、平均二乗根（ＲＭＳ）粗さは１５ｎｍもあった。 FIG. 2 shows a θ-2θ scan chart by the high-resolution X-ray diffractometer (HR-XRD) for the nitride semiconductor device described above. As is well known to those skilled in the art, the interface state of the superlattice layer in the buffer layer 12 can be grasped by this scan chart. When each interface in the buffer layer 12 is a smooth superlattice at the atomic layer level, satellite peaks are observed. In FIG. 2, only the 0th order peak is observed, and the satellite peak is hardly observed (understandable by comparing with FIG. 5 described later). That is, it was found that the interface between the first buffer layer 12a (AlN) and the second buffer layer 12b (GaN) in the AlN-based superlattice buffer layer 12 was rough. On the other hand, when the surface of the nitride semiconductor layer 13 made of GaN was observed with an atomic force microscope (AFM), there was certainly no crack, but the mean square root (RMS) roughness was 15 nm.
次に、上述の図１と同じ構成において、バッファ層１２である第１のバッファ層および第２のバッファ層の組成をそれぞれ変化させた。すなわち、（１１１）の主方位面を有する３インチ径のシリコン基板１１上に、５ｎｍの厚さのＡｌＮ（すなわち、ｘ＝１）から成る第１のバッファ層１２ａを形成し、さらに２０ｎｍの厚さのＡｌ0.7Ｇａ0.3Ｎ（すなわち、ｙ＝０．７）から成る第２のバッファ層１２ｂを形成した。この第１のバッファ層および第２のバッファ層を、各々２０層ずつ交互に積層してＡｌＮ系超格子バッファ層１２を構成した。さらに、このバッファ層１２の上に１μｍの厚さのＧａＮから成る窒化物半導体層１３を成長させた。この窒化物半導体層１３の表面を原子間力顕微鏡（ＡＦＭ）で観察したところ、平均二乗根（ＲＭＳ）粗さは０．２５ｎｍであり、原子層レベルにおいて平滑であった。ところが、この窒化物半導体層１３表面には高密度のクラックが発生していた。 Next, in the same configuration as in FIG. 1 described above, the compositions of the first buffer layer and the second buffer layer, which are the buffer layers 12, were changed. That is, a first buffer layer 12a made of AlN (ie, x = 1) having a thickness of 5 nm is formed on a 3-inch diameter silicon substrate 11 having a (111) main orientation plane, and further a thickness of 20 nm. A second buffer layer 12b made of Al 0.7 Ga 0.3 N (ie, y = 0.7) was formed. The first buffer layer and the second buffer layer were alternately stacked to form an AlN-based superlattice buffer layer 12. Further, a nitride semiconductor layer 13 made of GaN having a thickness of 1 μm was grown on the buffer layer 12. When the surface of the nitride semiconductor layer 13 was observed with an atomic force microscope (AFM), the mean square root (RMS) roughness was 0.25 nm, which was smooth at the atomic layer level. However, high-density cracks occurred on the surface of the nitride semiconductor layer 13.
以上述べたように、シリコン基板上に、表面が平滑で、しかも、クラックのない窒化物半導体を得るためには、ＡｌＮ系超格子バッファ層において、ＡｌxＧａ1-xＮから成る第１のバッファ層のＡｌ組成ｘおよびＡｌyＧａ1-yＮから成る第２のバッファ層のＡｌ組成ｙが大きな影響を与えるにも関わらず、その詳細は明らかではなかった。 As described above, in order to obtain a nitride semiconductor having a smooth surface and no cracks on a silicon substrate, the AlN-based superlattice buffer layer includes the first Al x Ga 1-x N layer. Although the Al composition x of the buffer layer and the Al composition y of the second buffer layer made of Al y Ga 1-y N have a great influence, the details are not clear.
本発明においては、これら第１のバッファ層および第２のバッファ層のＡｌ組成ｘおよびｙに関して、その値を厳密に規定することにより、窒化物半導体のクラック発生を抑えながら、バッファ層の超格子の界面および窒化物半導体の表面を原子層レベルで平坦化することが可能であることを見出した。逆に、ｘおよびｙの値によっては、超格子の界面や窒化物半導体の表面が荒れたり、窒化物半導体にクラックが発生したりしてしまうことも分かった。 In the present invention, the values of the Al compositions x and y of the first buffer layer and the second buffer layer are strictly defined, thereby suppressing the generation of cracks in the nitride semiconductor and the superlattice of the buffer layer. It has been found that the interface and the surface of the nitride semiconductor can be planarized at the atomic layer level. Conversely, it has been found that depending on the values of x and y, the interface of the superlattice and the surface of the nitride semiconductor are roughened, or cracks are generated in the nitride semiconductor.
本発明は、このような目的を達成するために、請求項１に記載の発明は、基板と、前記基板上に形成され、ＡｌxＧａ1-xＮ（０．５≦ｘ≦１）から成る第１のバッファ層と、ＡｌyＧａ1-yＮ（０．０１≦ｙ≦０．２）から成る第２のバッファ層とを交互に各々複数層を積層して形成されたＡｌＮ系超格子バッファ層と、前記ＡｌＮ系超格子バッファ層上に形成された窒化物半導体層とを備えたことを特徴とする。 In order to achieve the above object, the present invention provides a substrate according to claim 1, formed on the substrate, and made of Al x Ga 1-x N (0.5 ≦ x ≦ 1). A first buffer layer and a second buffer layer made of Al y Ga 1-y N (0.01 ≦ y ≦ 0.2) are formed by alternately laminating a plurality of layers. A lattice buffer layer and a nitride semiconductor layer formed on the AlN-based superlattice buffer layer are provided.
請求項２に記載の発明は、請求項１に記載の発明であって、前記基板の熱膨張係数は、前記窒化物半導体層の熱膨張係数より小さいことを特徴とする。 The invention according to claim 2 is the invention according to claim 1, characterized in that a thermal expansion coefficient of the substrate is smaller than a thermal expansion coefficient of the nitride semiconductor layer.
請求項３に記載の発明は、請求項１または請求項２に記載の発明であって、前記第１のバッファ層の厚さは０．５ｎｍ以上１００ｎｍ以下であり、前記第２のバッファ層の厚さは２ｎｍ以上８０ｎｍ以下であることを特徴とする。 Invention of Claim 3 is invention of Claim 1 or Claim 2, Comprising: The thickness of the said 1st buffer layer is 0.5 nm or more and 100 nm or less, The said 2nd buffer layer of The thickness is 2 nm or more and 80 nm or less.
請求項４に記載の発明は、請求項１から請求項３のいずれかに記載の発明であって、前記窒化物半導体層の格子定数は、前記ＡｌＮ系超格子バッファ層の格子定数よりも大きいことを特徴とする。 The invention according to claim 4 is the invention according to any one of claims 1 to 3, wherein a lattice constant of the nitride semiconductor layer is larger than a lattice constant of the AlN-based superlattice buffer layer. It is characterized by that.
請求項５に記載の発明は、基板と、前記基板上に形成されたＡｌＮ系超格子バッファ層と、前記ＡｌＮ系超格子バッファ層の上に形成された窒化物半導体層とからなる窒化物半導体素子の製造方法であって、前記基板上に、ＡｌxＧａ1-xＮ（０．５≦ｘ≦１）の組成を持つ第１のバッファ層を形成するステップと、前記第１のバッファ層の上に、ＡｌyＧａ1-yＮ（０．０１≦ｙ≦０．２）の組成を持つ第２のバッファ層を形成するステップと、前記第１のバッファ層を形成するステップと前記第２のバッファ層を形成するステップを交互に繰り返して前記ＡｌＮ系超格子バッファ層を形成するステップとを備えたことを特徴とする。 The invention according to claim 5 is a nitride semiconductor comprising a substrate, an AlN-based superlattice buffer layer formed on the substrate, and a nitride semiconductor layer formed on the AlN-based superlattice buffer layer. A method for manufacturing an element, comprising: forming a first buffer layer having a composition of Al x Ga 1-x N (0.5 ≦ x ≦ 1) on the substrate; and the first buffer layer Forming a second buffer layer having a composition of Al y Ga 1-y N (0.01 ≦ y ≦ 0.2), forming the first buffer layer, and the first Forming the AlN-based superlattice buffer layer by alternately repeating the steps of forming the second buffer layer.
以上に記述したように、本発明によれば、窒化物半導体と格子定数や熱膨張係数が大きく異なる基板、特に窒化物半導体よりも熱膨張係数が小さい基板上に、表面が原子層レベルで平滑で、しかも、クラックのない窒化物半導体を形成することができる。また、本発明によれば、界面が平滑で、しかも、結晶性の良いＡｌＮ系超格子バッファ層を作製することができる。窒化物半導体を使用した信頼性の高い電子デバイス・光デバイス等を作成することができる。 As described above, according to the present invention, the surface is smoothed at the atomic layer level on a substrate having a lattice constant or thermal expansion coefficient significantly different from that of a nitride semiconductor, particularly on a substrate having a smaller thermal expansion coefficient than that of a nitride semiconductor. In addition, a nitride semiconductor having no cracks can be formed. In addition, according to the present invention, an AlN superlattice buffer layer having a smooth interface and good crystallinity can be produced. A highly reliable electronic device / optical device using a nitride semiconductor can be produced.
以下、図面を参照しながら本発明の実施の形態を詳細に説明する。
［実施例１］
図３は、本発明にかかる窒化物半導体素子の断面図を示す。この窒化物半導体素子においては、直径が３インチで、（１１１）から±５度以内の主方位面を持つシリコン基板３１上に、ＡｌＮ系超格子バッファ層１２が形成されている。このバッファ層３２は、厚さが５ｎｍのＡｌＮから成る第１のバッファ層３２ａおよび厚さが２０ｎｍのＡｌ0.04Ｇａ0.96Ｎから成る第２のバッファ層３２ｂを、各々交互に２０層積ずつ積層して構成されている。さらに、このバッファ層３２の上に、厚さが１μｍのＧａＮから成る窒化物半導体層３３を形成した。
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
[Example 1]
FIG. 3 shows a cross-sectional view of a nitride semiconductor device according to the present invention. In this nitride semiconductor device, an AlN-based superlattice buffer layer 12 is formed on a silicon substrate 31 having a diameter of 3 inches and a main orientation plane within ± 5 degrees from (111). In this buffer layer 32, a first buffer layer 32a made of AlN having a thickness of 5 nm and a second buffer layer 32b made of Al 0.04 Ga 0.96 N having a thickness of 20 nm are alternately laminated in 20 layers. Configured. Further, a nitride semiconductor layer 33 made of GaN having a thickness of 1 μm was formed on the buffer layer 32.
図４は、上述の窒化物半導体層の表面の原子間力顕微鏡（ＡＦＭ）による像を示す。観察した表面は極めて滑らかで、単原子層からなるしま模様状のステップが明瞭に観察され、ＲＭＳ粗さは０．１ｎｍであった。また、光学顕微鏡により窒化物半導体層３３の表面を観察したところ、直径３インチのシリコン基板の全面にわたってクラックは存在しなかった。 FIG. 4 shows an image of the surface of the nitride semiconductor layer described above by an atomic force microscope (AFM). The observed surface was very smooth, and a stripe pattern step consisting of a monoatomic layer was clearly observed, and the RMS roughness was 0.1 nm. Further, when the surface of the nitride semiconductor layer 33 was observed with an optical microscope, no cracks existed on the entire surface of the silicon substrate having a diameter of 3 inches.
図５は、この窒化物半導体層３３のＨＲ−ＸＲＤによるθ−２θスキャンチャートを示す。窒化物半導体３３のＧａＮから発生する鋭いピークと共に、ＡｌＮ系超格子バッファ層３２から発生する５〜６次までにわたるサテライトピークが明瞭に観察されている。これは、第１のバッファ層３２ａおよび第２のバッファ層３２ｂの結晶性が高く、しかもこの２つの層の界面が非常に平坦であることを示している。第２のバッファ層３２ｂをＧａＮではなく、Ａｌを４％含むＡｌ0.04Ｇａ0.96Ｎとすることにより、ＡｌＮから成る第１のバッファ層３２ａに対する第２のバッファ層の濡れ性が良くなったために、このような界面の平坦性を向上させる効果を得ることができる。 FIG. 5 shows a θ-2θ scan chart of the nitride semiconductor layer 33 by HR-XRD. Along with a sharp peak generated from GaN of the nitride semiconductor 33, a satellite peak extending from the 5th to 6th order generated from the AlN-based superlattice buffer layer 32 is clearly observed. This indicates that the crystallinity of the first buffer layer 32a and the second buffer layer 32b is high, and the interface between the two layers is very flat. Since the second buffer layer 32b is not GaN but Al 0.04 Ga 0.96 N containing 4% Al, the wettability of the second buffer layer with respect to the first buffer layer 32a made of AlN is improved. Such an effect of improving the flatness of the interface can be obtained.
［実施例２］
本実施例においては、図３と同様な構造の窒化物半導体素子において、ＡｌyＧａ1-yＮから成る第２のバッファ層３２ｂのＡｌ組成ｙを様々に変化させた。そして、ＧａＮから成る窒化物半導体層３３の表面のＲＭＳ粗さをＡＦＭによって、また、クラックの密度を光学顕微鏡によって、それぞれ評価をした。
[Example 2]
In the present embodiment, in the nitride semiconductor device having the same structure as that of FIG. 3, the Al composition y of the second buffer layer 32b made of Al y Ga 1-y N was changed variously. Then, the RMS roughness of the surface of the nitride semiconductor layer 33 made of GaN was evaluated by AFM, and the density of cracks was evaluated by an optical microscope.
図６は、窒化物半導体層の表面のＲＭＳ粗さと第２のバッファ層のＡｌ組成ｙとの関係を示す。ｙの値が０．０１以上の場合おいて、ＲＭＳ粗さは０．３ｎｍ以下となっており、原子層レベルで滑らかな窒化物半導体３３の表面が得られていることが分かる。実施例１において記述したように、第２のバッファ層３２ｂが十分な組成（０．０１以上）のＡｌを含むことによって、第１のバッファ層３２ａおよび第２のバッファ層３２ｂの間の濡れ性がよくなり、お互いの界面が平滑になっている。その平滑さがそのままバッファ層３２の上の窒化物半導体層３３に受け継がれ、原子層レベルで滑らかな窒化物半導体層３３の表面が得られる。 FIG. 6 shows the relationship between the RMS roughness of the surface of the nitride semiconductor layer and the Al composition y of the second buffer layer. When the value of y is 0.01 or more, the RMS roughness is 0.3 nm or less, and it can be seen that a smooth surface of the nitride semiconductor 33 is obtained at the atomic layer level. As described in Example 1, when the second buffer layer 32b contains Al having a sufficient composition (0.01 or more), the wettability between the first buffer layer 32a and the second buffer layer 32b. And the interface between each other is smooth. The smoothness is directly inherited by the nitride semiconductor layer 33 on the buffer layer 32, and a smooth surface of the nitride semiconductor layer 33 is obtained at the atomic layer level.
図７は、窒化物半導体層表面のクラック密度と第２のバッファ層のＡｌ組成ｙとの関係を示す。ｙの値が０から０．２の範囲の場合、３インチ径の全面積にわたって窒化物半導体層表面には、クラックは存在しなかった。ところが、ｙの値が０．２よりも大きくなると、クラック密度は急激に大きくなった。この理由は、第１のバッファ層３２ａの格子定数と第２のバッファ層３２ｂの格子定数の差が小さくなり過ぎて、ＧａＮから成る窒化物半導体層３３およびシリコン基板３１の間の熱膨張係数差による歪を、効果的に分散することができなくなるためである。 FIG. 7 shows the relationship between the crack density on the surface of the nitride semiconductor layer and the Al composition y of the second buffer layer. When the value of y was in the range of 0 to 0.2, no crack was present on the surface of the nitride semiconductor layer over the entire area of 3 inches diameter. However, when the value of y was larger than 0.2, the crack density rapidly increased. This is because the difference between the lattice constant of the first buffer layer 32 a and the lattice constant of the second buffer layer 32 b becomes too small, and the difference in thermal expansion coefficient between the nitride semiconductor layer 33 made of GaN and the silicon substrate 31. This is because the distortion caused by the above cannot be effectively dispersed.
以上述べたように、原子層レベルで、平坦で、しかも、クラックのない窒化物半導体層を得るためには、第２のバッファ層３２ｂのＡｌyＧａ1-yＮのＡｌ組成ｙが、少なくとも０．０１≦ｙ≦０．２の範囲にあることが望ましい。 As described above, in order to obtain a nitride semiconductor layer that is flat at the atomic layer level and has no cracks, the Al composition y of Al y Ga 1-y N in the second buffer layer 32b is at least It is desirable that the range is 0.01 ≦ y ≦ 0.2.
なお、ＧａＮから成る窒化物半導体３３は、ＡｌＮ系超格子バッファ層３２よりも格子定数が大きい。この場合、窒化物半導体層３３の成長中には、この窒化物半導体層内に圧縮歪が生じる。成長工程を終了した後の冷却過程においては、前述したようにシリコン基板との間の熱膨張係数差により、ＧａＮ窒化物半導体には引っ張り歪が生じる。成長中に生じた前述の圧縮歪はこの引っ張り歪の一部を相殺し、クラック発生を抑止するように作用する。同様な歪の相殺効果は、格子定数がＡｌＮ系超格子バッファ層３２よりも大きくなるような組成範囲を持つＡｌaＢbＧａcＩｎ1-a-b-cＮを窒化物半導体層３３として用いる場合でも得られる。この場合も、図６、図７に示したような、表面のＲＭＳ粗さおよびクラック密度と、第２のバッファ層３２ｂのＡｌ組成ｙとの関係が得られた。 The nitride semiconductor 33 made of GaN has a larger lattice constant than the AlN-based superlattice buffer layer 32. In this case, during the growth of the nitride semiconductor layer 33, compressive strain is generated in the nitride semiconductor layer. In the cooling process after finishing the growth process, tensile strain occurs in the GaN nitride semiconductor due to the difference in thermal expansion coefficient with the silicon substrate as described above. The aforementioned compressive strain generated during the growth acts to cancel a part of the tensile strain and suppress the generation of cracks. A similar strain canceling effect can be obtained even when Al a B b Ga c In 1-abc N having a composition range in which the lattice constant is larger than that of the AlN-based superlattice buffer layer 32 is used as the nitride semiconductor layer 33. It is done. Also in this case, the relationship between the RMS roughness and crack density of the surface and the Al composition y of the second buffer layer 32b as shown in FIGS. 6 and 7 was obtained.
また、第１のバッファ層３２ａと第２のバッファ層３２ｂの厚さについて考えると、薄すぎる場合には熱膨張係数差に起因する歪のエネルギーをＡｌＮ系超格子バッファ層３２中で効果的に分散することが出来ず、クラックが発生してしまう。逆に、厚過ぎる場合には成長中に格子緩和が起こり、貫通転位が増える結果となってしまう。詳細な検討を行った結果、第１のバッファ層３２ａの厚さは０．５ｎｍ以上１００ｎｍ以下、第２のバッファ層３２ｂの厚さは２ｎｍ以上８０ｎｍ以下であることが望ましいことが分かった。上記の厚さの範囲内では、窒化物半導体３３の表面にはクラックは全くなく、貫通転位密度は６×１０7ｃｍ-2以下であった。したがって、窒化物半導体を用いた電子素子や発光素子の高品質な構成材料として使用することができる。 Considering the thicknesses of the first buffer layer 32a and the second buffer layer 32b, when the thickness is too thin, the strain energy caused by the difference in thermal expansion coefficient is effectively increased in the AlN-based superlattice buffer layer 32. It cannot be dispersed and cracks occur. On the other hand, if it is too thick, lattice relaxation occurs during growth, resulting in an increase in threading dislocations. As a result of detailed examination, it has been found that the thickness of the first buffer layer 32a is preferably 0.5 nm to 100 nm and the thickness of the second buffer layer 32b is preferably 2 nm to 80 nm. Within the above thickness range, there was no crack on the surface of the nitride semiconductor 33, and the threading dislocation density was 6 × 10 7 cm −2 or less. Therefore, it can be used as a high-quality constituent material for electronic devices and light-emitting devices using nitride semiconductors.
［実施例３］
次に、本実施例においては、図３と同様な構成の窒化物半導体素子において、第１のバッファ層のＡｌの組成ｘについて検討する。直径が３インチで、（１１１）から±５度以内の主方位面を持つシリコン基板３１上に、ＡｌＮ系超格子バッファ層３２が形成された。バッファ層３２は、厚さが５ｎｍのＡｌxＧａ1-xＮから成る第１のバッファ層３２ａおよび厚さが２０ｎｍのＡｌ0.01Ｇａ0.99Ｎから成る第２のバッファ層３２ｂを、各々２０層ずつ交互に積層し構成した。さらに、バッファ層３２に上に、厚さが１μｍのＧａＮから成る窒化物半導体層３３を形成した。本実施例においては、第１のバッファ層３２ａのＡｌ組成ｘを様々に変化させた。
[Example 3]
Next, in the present example, the Al composition x of the first buffer layer in the nitride semiconductor device having the same configuration as in FIG. 3 will be examined. An AlN-based superlattice buffer layer 32 was formed on a silicon substrate 31 having a diameter of 3 inches and a main orientation plane within ± 5 degrees from (111). The buffer layer 32 includes a first buffer layer 32a made of Al x Ga 1-x N having a thickness of 5 nm and a second buffer layer 32b made of Al 0.01 Ga 0.99 N having a thickness of 20 nm. Layered alternately. Further, a nitride semiconductor layer 33 made of GaN having a thickness of 1 μm was formed on the buffer layer 32. In the present embodiment, the Al composition x of the first buffer layer 32a was variously changed.
図８は、窒化物半導体層の表面のＲＭＳ粗さおよび第１のバッファ層３２ａのＡｌ組成ｘの関係を示す。ｘの値に関係なく、ＲＭＳ粗さが０．３ｎｍ以下となっており、原子層レベルで滑らかなＧａＮ窒化物半導体層３３の表面が得られている。すなわち、Ａｌ0.01Ｇａ0.99Ｎから成る第２のバッファ層３２ｂのＡｌ組成は０．０１であり、実施例２において述べた０．０１≦ｙ≦０．２の好適な範囲内にあるため、第１のバッファ層３２ａのＡｌxＧａ1-xＮのＡｌ組成ｘに関係なく、平滑な表面が得られる。 FIG. 8 shows the relationship between the RMS roughness of the surface of the nitride semiconductor layer and the Al composition x of the first buffer layer 32a. Regardless of the value of x, the RMS roughness is 0.3 nm or less, and a smooth surface of the GaN nitride semiconductor layer 33 is obtained at the atomic layer level. That is, since the Al composition of the second buffer layer 32b made of Al 0.01 Ga 0.99 N is 0.01 and is within the preferred range of 0.01 ≦ y ≦ 0.2 described in the second embodiment, A smooth surface can be obtained regardless of the Al composition x of Al x Ga 1-x N in one buffer layer 32a.
図９は、窒化物半導体層の表面のクラック密度および第１のバッファ層３２ａのＡｌ組成ｘの関係を示す。ｘの値が０．５から１の範囲において、３インチ径のシリコン基板全面積にわたってクラックは存在しなかった。ところが、ｘの値が０．５よりも小さくなると、クラック密度が急激に大きくなっている。この理由は、実施例２と同様に、ｘの値が０．５よりも小さくなると、第１のバッファ層３２ａの格子定数および第２のバッファ層３２ｂの格子定数の差が小さくなり過ぎて、窒化物半導体層３３およびシリコン基板３１の間の熱膨張係数差による歪を、効果的に分散することができなくなるためである。 FIG. 9 shows the relationship between the crack density on the surface of the nitride semiconductor layer and the Al composition x of the first buffer layer 32a. In the range of x from 0.5 to 1, no cracks existed over the entire area of the 3-inch diameter silicon substrate. However, when the value of x is smaller than 0.5, the crack density is rapidly increased. The reason for this is that, as in Example 2, when the value of x is smaller than 0.5, the difference between the lattice constant of the first buffer layer 32a and the lattice constant of the second buffer layer 32b becomes too small. This is because the strain due to the difference in thermal expansion coefficient between the nitride semiconductor layer 33 and the silicon substrate 31 cannot be effectively dispersed.
以上述べたように、原子層レベルで平坦であり、しかも、クラックのない窒化物半導体を得るために、第１のバッファ層３２ａのＡｌxＧａ1-xＮのＡｌ組成ｘは、少なくとも０．５≦ｘ≦１の範囲にあることが望ましい。 As described above, in order to obtain a nitride semiconductor that is flat at the atomic layer level and has no cracks, the Al composition x of Al x Ga 1-x N of the first buffer layer 32a is at least 0. It is desirable that the range is 5 ≦ x ≦ 1.
なお、実施例２の場合と同様に、窒化物半導体層３３として、ＡｌＮ系超格子バッファ層３２よりも格子定数が大きな窒化物半導体ＡｌaＢbＧａcＩｎ1-a-b-cＮを用いた場合でも、図９に示したように、表面のＲＭＳ粗さおよびクラック密度と、第１のバッファ層３２ａのＡｌxＧａ1-xＮのＡｌ組成ｘとの関係が得られた。また、第１のバッファ層３２ａの厚さが０．５ｎｍ以上１００ｎｍ以下、および、第２のバッファ層３２ｂの厚さが２ｎｍ以上８０ｎｍ以下の範囲にあることが望ましい。 Similarly to the case of Example 2, as the nitride semiconductor layer 33, even if the lattice constant of AlN-based superlattice buffer layer 32 with a large nitride semiconductor Al a B b Ga c In 1 -abc N As shown in FIG. 9, the relationship between the RMS roughness and crack density of the surface and the Al composition x of Al x Ga 1-x N of the first buffer layer 32a was obtained. Further, it is desirable that the thickness of the first buffer layer 32a be in the range of 0.5 nm to 100 nm and the thickness of the second buffer layer 32b be in the range of 2 nm to 80 nm.
実施例１から実施例３においては基板としてシリコンを用いたが、これに限るものではない。基板と窒化物半導体層との熱膨張係数に差異がある場合に、本発明の構成による窒化物半導体素子により、表面が原子層レベルで平滑であり、しかも、クラックのない窒化物半導体素子を形成することができる。特に、窒化物半導体よりも熱膨張係数が小さい基板、例えば、炭化珪素（ＳｉＣ）等を用いた場合に、本発明の効果は高い。 In Examples 1 to 3, silicon is used as the substrate, but the present invention is not limited to this. When there is a difference in the thermal expansion coefficient between the substrate and the nitride semiconductor layer, the nitride semiconductor element according to the configuration of the present invention forms a nitride semiconductor element with a smooth surface at the atomic layer level and without cracks. can do. In particular, the effect of the present invention is high when a substrate having a smaller thermal expansion coefficient than that of a nitride semiconductor, such as silicon carbide (SiC), is used.
［窒化物半導体素子の製造方法］
以下、本発明の窒化物半導体素子の製造方法の一例を記述する。本発明においては、一般の結晶成長装置、すなわち、液層成長装置や気相成長装置を用いることができる。結晶品質、薄膜の膜厚制御性、大量生産性、または、大面積化への適応性等を考えると、有機金属気相成長法（Metal Organic Chemical Vapor Deposition：ＭＯＣＶＤ）を用いることにより、本発明の効果を特に発揮できる。製造方法は以下の手順の通りである。
１．直径が３インチで、（１１１）から±５度以内に主方位面を持つシリコン基板を、アセトンやアルコール類のような有機溶媒中で超音波洗浄した後、ＭＯＣＶＤ装置の反応炉内に設置する。
２．基板温度を１０００〜１２００℃に上げ、キャリアガスとして少なくとも水素を流しながら基板をクリーニングする。この工程において、シリコン基板の自然酸化膜が除去され、清浄なシリコンの表面が得られる。
３．引続き、基板温度を７００〜１２００℃に変化させ、原料ガスであるアンモニア、トリメチルガリウム（ＴＭＧ）、および、トリメチルアルミニウム（ＴＭＡ）を適量流し、第１のバッファ層であるＡｌxＧａ1-xＮ（０．５≦ｘ≦１）を０．５ｎｍ以上１００ｎｍ以下の厚さで堆積させる。なお、第１のバッファ層がＡｌＮ（すなわち、ｘ＝１）でない場合、シリコンの表面がＴＭＧと反応しないように、５〜１００ｎｍの厚さのＡｌＮをまず成長させてから、第１のバッファ層を堆積させるとさらに好ましい結果が得られる。
４．引続き、アンモニア、ＴＭＧおよびＴＭＡの流量を適宜変化させ、第２のバッファ層であるＡｌyＧａ1-yＮ（０．０１≦ｙ≦０．２）を２ｎｍ以上８０ｎｍ以下の厚さで堆積させる。
５．同様にして、第１のバッファ層と第２のバッファ層を交互に１０〜１００層積層し、ＡｌＮ系超格子バッファ層を形成する。
６．最後に、原料ガスとして、アンモニア、ＴＭＡ、ＴＭＧ、トリエチルボロン、および、トリメチルインジウム等を反応炉内に流して、窒化物半導体ＡｌaＢbＧａcＩｎ1-a-b-cＮを成長させる。この時、すべての原料ガスの流量を適宜調整して、窒化物半導体ＡｌaＢbＧａcＩｎ1-a-b-cＮの格子定数が前記ＡｌＮ系超格子バッファ層の格子定数よりも大きくなるように、各ＩＩＩ族元素の組成ａ、ｂ、ｃを調整する。
[Nitride Semiconductor Device Manufacturing Method]
Hereinafter, an example of the manufacturing method of the nitride semiconductor device of the present invention will be described. In the present invention, a general crystal growth apparatus, that is, a liquid layer growth apparatus or a vapor phase growth apparatus can be used. In view of crystal quality, thin film thickness controllability, mass productivity, or adaptability to large area, the present invention is achieved by using metal organic chemical vapor deposition (MOCVD). The effect of can be demonstrated especially. The manufacturing method is as follows.
1. A silicon substrate having a diameter of 3 inches and having a main orientation surface within ± 5 degrees from (111) is ultrasonically cleaned in an organic solvent such as acetone or alcohol, and then placed in a reactor of a MOCVD apparatus. .
2. The substrate temperature is raised to 1000 to 1200 ° C., and the substrate is cleaned while flowing at least hydrogen as a carrier gas. In this step, the natural oxide film on the silicon substrate is removed, and a clean silicon surface is obtained.
3. Subsequently, the substrate temperature is changed to 700 to 1200 ° C., and appropriate amounts of ammonia, trimethylgallium (TMG), and trimethylaluminum (TMA) as source gases are flown, and Al x Ga 1-x N as the first buffer layer. (0.5 ≦ x ≦ 1) is deposited at a thickness of 0.5 nm to 100 nm. If the first buffer layer is not AlN (ie, x = 1), an AlN film having a thickness of 5 to 100 nm is first grown so that the silicon surface does not react with TMG, and then the first buffer layer is formed. More favorable results can be obtained by depositing.
4). Subsequently, the flow rates of ammonia, TMG, and TMA are appropriately changed, and Al y Ga 1-y N (0.01 ≦ y ≦ 0.2) as the second buffer layer is deposited to a thickness of 2 nm to 80 nm. .
5. Similarly, 10 to 100 first buffer layers and second buffer layers are alternately stacked to form an AlN-based superlattice buffer layer.
6). Finally, ammonia, TMA, TMG, triethylboron, trimethylindium, or the like is flowed into the reaction furnace as a source gas to grow the nitride semiconductor Al a B b Ga c In 1-abc N. At this time, the flow rate of all the source gases is adjusted as appropriate so that the lattice constant of the nitride semiconductor Al a B b Ga c In 1-abc N is larger than the lattice constant of the AlN-based superlattice buffer layer. The composition a, b, c of each group III element is adjusted.
以上、詳細に述べたように、本発明によれば、窒化物半導体と格子定数や熱膨張係数が大きく異なる基板、特に窒化物半導体よりも熱膨張係数が小さい基板上に、表面が原子層レベルで平滑で、しかも、クラックのない窒化物半導体を形成することができる。また、本発明によれば、界面が平滑で、しかも、結晶性の良いＡｌＮ系超格子バッファ層を作製することができる。窒化物半導体を使用した信頼性の高い電子デバイス・光デバイス等を作成することができる。 As described above in detail, according to the present invention, the surface of the nitride semiconductor is greatly different from that of a nitride semiconductor, particularly on a substrate having a smaller thermal expansion coefficient than that of a nitride semiconductor. Thus, a nitride semiconductor which is smooth and free from cracks can be formed. In addition, according to the present invention, an AlN superlattice buffer layer having a smooth interface and good crystallinity can be produced. A highly reliable electronic device / optical device using a nitride semiconductor can be produced.
１１、３１ シリコン基板
１２、３２ ＡｌＮ系超格子バッファ層
１２ａ、３２ａ 第１のバッファ層
１２ｂ、３２ｂ 第２のバッファ層
１３、３３ 窒化物半導体層
11, 31 Silicon substrate 12, 32 AlN-based superlattice buffer layer 12a, 32a First buffer layer 12b, 32b Second buffer layer 13, 33 Nitride semiconductor layer
Claims (5)
前記基板上に形成され、ＡｌxＧａ1-xＮ（０．５≦ｘ≦１）から成る第１のバッファ層と、ＡｌyＧａ1-yＮ（０．０１≦ｙ≦０．２）から成る第２のバッファ層とを交互に各々複数層を積層して形成されたＡｌＮ系超格子バッファ層と、
前記ＡｌＮ系超格子バッファ層上に形成された窒化物半導体層と、
を備えたことを特徴とする窒化物半導体素子。 A substrate,
A first buffer layer formed on the substrate and made of Al x Ga 1-x N (0.5 ≦ x ≦ 1); and Al y Ga 1-y N (0.01 ≦ y ≦ 0.2). An AlN-based superlattice buffer layer formed by alternately laminating a plurality of layers, and a second buffer layer comprising:
A nitride semiconductor layer formed on the AlN-based superlattice buffer layer;
A nitride semiconductor device comprising:
前記基板上に、ＡｌxＧａ1-xＮ（０．５≦ｘ≦１）の組成を持つ第１のバッファ層を形成するステップと、
前記第１のバッファ層の上に、ＡｌyＧａ1-yＮ（０．０１≦ｙ≦０．２）の組成を持つ第２のバッファ層を形成するステップと、
前記第１のバッファ層を形成するステップおよび前記第２のバッファ層を形成するステップを交互に繰り返して前記ＡｌＮ系超格子バッファ層を形成するステップと、
を備えたことを特徴とする窒化物半導体素子の製造方法。
A method for manufacturing a nitride semiconductor device comprising a substrate, an AlN-based superlattice buffer layer formed on the substrate, and a nitride semiconductor layer formed on the AlN-based superlattice buffer layer,
Forming a first buffer layer having a composition of Al x Ga 1-x N (0.5 ≦ x ≦ 1) on the substrate;
Forming a second buffer layer having a composition of Al y Ga 1-y N (0.01 ≦ y ≦ 0.2) on the first buffer layer;
Forming the AlN-based superlattice buffer layer by alternately repeating the step of forming the first buffer layer and the step of forming the second buffer layer;
A method for manufacturing a nitride semiconductor device, comprising:
Priority Applications (1)
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