JP4084539B2 - Method for producing crystal growth substrate of group III nitride compound semiconductor - Google Patents

Description

BACKGROUND OF THE INVENTION
The present invention relates to a method for manufacturing a group III nitride compound semiconductor crystal growth substrate using silicon (Si 2 ) as a base substrate serving as a base for the crystal growth substrate.
[0001]
[Prior art]
As exemplified in FIG. 3, it is generally known that when gallium nitride (GaN) is crystal-grown on a silicon substrate and then cooled to room temperature, many dislocations and cracks are formed in the GaN growth layer.
[0002]
[Problems to be solved by the invention]
In this way, when a large number of dislocations and cracks enter the growth layer, when a device is fabricated on the growth layer, a large number of lattice defects, dislocations, deformations, cracks, etc. occur in the device, causing deterioration of device characteristics. It becomes.
Also, when the silicon (Si) substrate is removed and only the growth layer is left to obtain an independent substrate, a large area (1 cm ² or more) is obtained due to the above-described dislocations and cracks. Absent.
[0003]
The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to obtain a high-quality crystal growth substrate having a low density of dislocations and cracks.
[0004]
[Means for Solving the Problems]
In order to solve the above problems, the following means are effective.
That is, the first means is a group III nitride on the base substrate in the manufacturing process of the group III nitride compound semiconductor crystal growth substrate using silicon (Si 2 ) as the base substrate serving as the base of the crystal growth substrate. When a substrate layer made of a physical compound semiconductor is grown to a thickness equal to or greater than the thickness of the base substrate, and then the base substrate and the substrate layer are cooled at a cooling rate of 50 ° C./min or less , The base substrate is peeled off from the substrate layer by stress , and the remaining substrate layer is used as a crystal growth substrate.
[0005]
The second means is to grow the substrate layer by 50 μm or more in the first means.
[0006]
The third means is to form the base substrate in a thickness of 50 μm or more and 300 μm or less in the first or second means.
[0007]
By means of the following, it is possible to solve the above problems.
[0008]
[Operation and effect of the invention]
When growing a substrate layer made of a Group III nitride compound semiconductor on the base substrate (Si board), the crystal growth temperature of the substrate layer (III nitride compound semiconductor), crystal growth with less distortion Advances. However, since the thermal expansion coefficient differs greatly between silicon and a group III nitride compound semiconductor such as GaN, large distortion occurs in the substrate when the substrate is cooled to substantially room temperature after the completion of crystal growth. As illustrated, dislocations and cracks occur in the substrate layer.
[0009]
However, according to the means of the present invention, with respect to the base substrate (Si board), because a relatively thick substrate layer (III nitride compound semiconductor) is formed than prior art, the base substrate (Si board ) , The substrate layer becomes relatively strong, and the generation density of dislocations and cracks in the substrate layer decreases.
[0010]
At this time, the tensile stress that has been applied almost uniformly to the entire substrate layer (group III nitride compound semiconductor) that has been formed relatively thin in the prior art is on the base substrate side of the substrate layer that is formed thick and strong. Since it is easy to concentrate on the interface, and dislocations and cracks are less likely to occur in the thick and strong substrate layer, the compressive stress is reduced when the base substrate and the substrate layer are cooled to approximately room temperature due to these actions. The base substrate that receives the detachment peels from the interface of the substrate layer that receives the tensile stress.
[0011]
In addition, since these actions are based on the difference in thermal expansion coefficient, more generally, the stress that causes the base substrate to peel from the interface with the substrate layer can be obtained by a temperature change caused by heating or the like.
[0012]
The thickness of the substrate layer (Group III nitride compound semiconductor) for crystal growth is desirably 50 μm or more. The thicker the thickness, the more the tensile stress on the substrate layer is relaxed and the generation density of dislocations and cracks in the substrate layer can be reduced. At the same time, the substrate layer can be strengthened. It becomes easy to concentrate on the interface.
[0013]
The thickness of the base substrate (Si board), the following is preferable 300 [mu] m. The thinner the thickness is, the more the tensile stress on the substrate layer is relaxed and the dislocation density and crack generation density of the substrate layer are reduced. However, when the thickness of the base substrate (Si board) and less than 50 [mu] m, there is a problem in absolute strength of the underlying substrate itself, it is difficult to maintain high productivity. Therefore, in order to ensure the quality and productivity of the crystal growth substrate to produce the thickness of the base substrate (Si board), the following is desirable 300μm least 50 [mu] m.
[0014]
Moreover, relatively, the thickness of the substrate layer where crystal growth (III nitride compound semiconductor), either equal to the thickness of the base substrate (Si board), or it is desirable to more. With such a setting, the tensile stress on the substrate layer is easily relaxed, and the occurrence of dislocations and cracks in the substrate layer can be significantly suppressed as compared with the conventional case. This effect becomes greater as the substrate layer is relatively thickened.
[0015]
The substrate layer is grown between the (III nitride compound semiconductor) and a base substrate (Si board), or on the substrate layer after crystal growth, for example, silicon carbide (SiC) Alternatively, a buffer layer made of a group III nitride compound semiconductor having an arbitrary mixed crystal ratio may be formed. In addition to GaN, AlN, and SiC, these substrate layers and buffer layers are made by adding indium (In) to GaN, AlN, and SiC so as not to affect the composition ratio, or InN, Al _x. Ga _1-x N (0 <x <1), In _x Ga _1-x N (0 <x <1), Al _x In _{1 -x} N (0 <x <1), Al _x Ga _y In _{1- xy N (0 <x <1,0} <y <1,0 <x + y <1) may be formed from such other general formula _{Al x Ga y in 1-xy} N (0 ≦ x ≦ 1, In binary, ternary or quaternary group III nitride semiconductors of 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1), some of the group III elements are boron (B), thallium (Tl), etc. Or a semiconductor in which part of nitrogen is replaced by phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), or the like You may form from.
[0016]
In addition, any group III nitride compound semiconductor layer to be laminated including these substrate layer and buffer layer has an n-type dopant such as Si or a p-type dopant such as calcium (Ca) or Mg. May be added. These additives (dopants) may be added at a suitable ratio of both n-type and p-type to one layer. In addition, each of these semiconductor layers may have a superlattice structure including a junction of two or more kinds of semiconductors.
[0017]
Further, the buffer layer may be repeatedly formed in a multiple layer in a substrate layer made of a group III nitride compound semiconductor, for example, GaN, grown on the base substrate. This layer is called an intermediate layer, and a plurality of intermediate layers formed repeatedly in multiple layers are called multiple intermediate layers. These intermediate layers can have the same composition as the buffer layer. That is, for example, AlN, GaN, and other binary, ternary, and quaternary AlGaInN can be used.
[0018]
In addition, you may form these buffer layers at low temperature of 300 to 900 degreeC other than what is formed at 900 to 1200 degreeC. This temperature range is desirably 1000 ° C. to 1150 ° C., and more desirably 1050 ° C. to 1100 ° C.
[0019]
Alternatively, the buffer layer can use the HVPE method, the MBE method, or the like in addition to the MOCVD method. Sputtering can also be used.
In addition, a buffer layer made of AlN can be formed by reactive sputtering using a DC magnetron sputtering apparatus using high-purity metallic aluminum and nitrogen gas as raw materials.
[0020]
Other, metallic aluminum, metallic gallium, using metal indium, nitrogen gas or ammonia gas, the general formula _{Al x Ga y In 1-xy} N (0 ≦ x ≦ 1,0 ≦ y ≦ 1,0 ≦ x + y ≦ 1, A buffer layer having an arbitrary composition ratio can be formed. In addition to sputtering, vapor deposition, ion plating, laser ablation, and ECR can be used. The buffer layer formed by these physical vapor deposition methods is preferably performed at 200 to 600 ° C. More preferably, it is 300-500 degreeC, More preferably, it is 400-500 degreeC.
[0021]
When physical vapor deposition methods such as these sputtering methods are used, the thickness of the buffer layer is preferably 100 to 3000 mm. More preferably, it is 100 to 2000 mm, and most preferably 100 to 300 mm.
[0022]
Further, a lateral growth (ELO) method or the like can be used for crystal growth of an arbitrary semiconductor layer grown on the base substrate of the Si substrate. As these lateral growth (ELO) methods, a protective film is used in which a substrate or a buffer layer is partially exposed by etching or the like, and a semiconductor crystal is laterally grown on the etched layer such as the buffer layer. And a method using a protective film in which a protective film layer is formed on a substrate, a buffer layer or the like, and a semiconductor crystal is laterally grown on the exposed substrate or buffer layer or the like.
[0023]
For the protective film used for ELO, a material in which a group III nitride compound semiconductor is difficult to grow is useful. Specifically, for example, oxides such as silicon oxide (SiO _x ), silicon nitride (Si _x N _y ), titanium oxide (TiO _x ), zirconium oxide (ZrO _x ), nitrides, multilayer films of these, or A metal having a melting point of 1200 ° C. or higher.
[0024]
That is, the protective film used for ELO can withstand the growth temperature of group III nitride at 600 to 1100 ° C., and the group III nitride compound semiconductor does not grow or is difficult to grow thereon. It must be a thing. The film formation can be performed by vapor deposition such as vapor deposition, CVD, or sputtering.
By these means relating to ELO, the number of occurrences of cracks can be further reduced.
[0025]
DETAILED DESCRIPTION OF THE INVENTION
Hereinafter, the present invention will be described based on specific examples. However, the present invention is not limited to the following examples.
FIG. 1 shows a substrate layer (nitride) made of gallium nitride (GaN) on a substantially circular base substrate 101 made of silicon (Si) by a metal organic chemical vapor deposition (MOVPE). FIG. 2 is a schematic cross-sectional view of a sample (substrate 100) obtained by crystal growth of a semiconductor layer 102, and illustrates a manufacturing process (one step) of a crystal growth substrate in the present embodiment.
[0026]
In this vapor phase growth, ammonia (NH ₃ ) gas, carrier gas (H ₂ , N ₂ ), trimethylgallium (Ga (CH ₃ ) ₃ ) gas (hereinafter referred to as “TMG”), and trimethylaluminum (Al (CH _{3 3} ) Gas (hereinafter referred to as “TMA”) was used. The outline of the manufacturing procedure is shown below.
First, the single crystal base substrate 101 made of silicon (Si) was cleaned by organic cleaning and heat treatment, and mounted on a susceptor mounted in a reaction chamber of a MOVPE apparatus. However, the mounted base substrate 101 has four types of thicknesses of about 50 μm, about 100 μm, about 200 μm, and about 500 μm.
Next, the base substrate 101 was baked at a temperature of 1100 ° C. while flowing H ₂ into the reaction chamber at normal pressure.
[0027]
Thereafter, H ₂ , NH ₃ , TMG, and TMA are supplied to form an AlGaN layer, the temperature of the base substrate 101 is maintained at 1100 ° C., and H ₂ , NH _3, and TMG are supplied to supply gallium nitride (GaN ) Is grown, and then the base substrate 101 and the substrate layer 102 are cooled at a cooling rate of 50 ° C./min or less.
[0028]
The crack density of the GaN growth layer obtained by the above procedure was measured. FIG. 2 is a graph illustrating the relationship between the crack density of this crystal growth substrate and the thickness of the underlying substrate (Si substrate) in this example.
[0029]
For example, FIG. 2 exemplifies the measurement result (marked with ◆) for a sample in which the film thickness of the substrate layer (GaN growth layer) is set to approximately 7 μm, but as can be seen from this figure, the thickness of the Si substrate As the thickness is reduced, the crack density is remarkably reduced with the reduction. Further, from this figure, it can be seen that the crack density is 1 cm ⁻¹ or less in the substrate layer (層) having a film thickness of 200 μm, and thus a GaN substrate having 1 cm ² or more can be obtained.
[0030]
Further, for example, in FIG. 2, the crack density of each sample when the substrate layer (GaN growth layer) is set to 7 μm, 50 μm, and 200 μm and a base substrate (Si substrate) of about 200 μm is used. As can be seen from this figure, the crack density increases as the thickness of the substrate layer (GaN growth layer) increases with respect to the same Si substrate thickness. Can be seen to decrease significantly.
[0031]
That is, when the thickness of the substrate layer is 50 μm or more, a useful large-area GaN substrate can be obtained.
On the contrary, in the experiment in which the thickness of the substrate layer was kept at about 7 μm, for example, the substrate layer partially peeled off, but only a small area was obtained.
Further, when the thickness of the substrate layer is kept at about 2 to 3 μm as in the prior art, the substrate layer hardly peeled from the base substrate.
[0032]
In the above embodiment, the substrate layer (nitride semiconductor layer) 102 made of gallium nitride (GaN) is crystal-grown on the base substrate (Si substrate) by metal organic compound vapor phase epitaxy (MOVPE). The measurement results of the sample (substrate 100) are illustrated, but crystal growth methods such as liquid phase growth (LPE) and halide vapor phase growth (HVPE) are also effective in forming a thick substrate layer. It is.
For example, with respect to substrates obtained by other crystal growth methods represented by these, the effects and advantages of the present invention can be obtained by means of the present invention, in substantially the same manner as in the above embodiments.
[Brief description of the drawings]
FIG. 1 is a schematic cross-sectional view of a substrate illustrating a manufacturing process of a crystal growth substrate of the present invention.
FIG. 2 is a graph illustrating the relationship between the crack density of a substrate layer (GaN growth layer) and the thickness of a base substrate (Si substrate).
FIG. 3 is a schematic cross-sectional view of a substrate illustrating a manufacturing process of a conventional crystal growth substrate.
[Explanation of symbols]
100 ... Substrate 101 ... Underlying substrate (Si substrate)
102 ... Substrate layer (nitride semiconductor layer)

Claims (3)

A method of manufacturing a crystal growth substrate of a group III nitride compound semiconductor using silicon (Si ) as a base substrate to be a base of a crystal growth substrate,
Growing a substrate layer made of a group III nitride compound semiconductor on the base substrate to a thickness greater than that of the base substrate ,
Thereafter, when the base substrate and the substrate layer are cooled at a cooling rate of 50 ° C./min or less, by peeling the base substrate from the substrate layer due to stress on the base substrate side interface of the substrate layer, A method for producing a crystal growth substrate of a group III nitride compound semiconductor, wherein the remaining substrate layer is used as the crystal growth substrate.   2. The method for producing a group III nitride compound semiconductor crystal growth substrate according to claim 1, wherein the substrate layer is grown by 50 [mu] m or more.   3. The method for producing a group III nitride compound semiconductor crystal growth substrate according to claim 1, wherein the base substrate is formed to have a thickness of 50 μm or more and 300 μm or less.

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