JP2006238007A - データ発生装置 - Google Patents
データ発生装置 Download PDFInfo
- Publication number
- JP2006238007A JP2006238007A JP2005049069A JP2005049069A JP2006238007A JP 2006238007 A JP2006238007 A JP 2006238007A JP 2005049069 A JP2005049069 A JP 2005049069A JP 2005049069 A JP2005049069 A JP 2005049069A JP 2006238007 A JP2006238007 A JP 2006238007A
- Authority
- JP
- Japan
- Prior art keywords
- data
- parallel
- trigger signal
- reference clock
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000006243 chemical reaction Methods 0.000 claims abstract description 14
- 238000001514 detection method Methods 0.000 claims abstract description 11
- 230000004044 response Effects 0.000 claims abstract description 10
- 230000003111 delayed effect Effects 0.000 claims description 10
- 238000005070 sampling Methods 0.000 claims description 2
- 238000010586 diagram Methods 0.000 description 10
- 238000000034 method Methods 0.000 description 5
- 230000006870 function Effects 0.000 description 3
- 230000010363 phase shift Effects 0.000 description 2
- 230000008707 rearrangement Effects 0.000 description 2
- 230000001360 synchronised effect Effects 0.000 description 2
- 230000008901 benefit Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000008569 process Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M9/00—Parallel/series conversion or vice versa
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/02—Digital function generators
- G06F1/025—Digital function generators for functions having two-valued amplitude, e.g. Walsh functions
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
【解決手段】トリガ検出回路8は、トリガ信号と基準クロックの位相関係を示す位相情報を生成する。データ・パターン発生回路10では、トリガ信号に応じて、基準クロックに従って並列データを発生する。データ・シフト回路11は、位相情報に応じて、並列データ中のデータを所定順序に従って基準クロックに対してシフトしたシフト並列データに変換する。並直列変換回路16は、シフト並列データを直列データに変換する。
【選択図】図3
Description
Q0=D0、Q1=D1、Q2=D2、Q3=D3
Q0=D_D3、Q1=D0、Q2=D1、Q3=D2
Q0=D_D2、Q1=D_D3、Q2=D0、Q3=D1
これによって、入力された元の並列データに比較して、基準クロックの位相に換算して180度(並列データの全4データの内の2データ分)だけ遅れた順序に並べ替え(シフト)が行われた並列データ(シフト並列データ)を出力することになる。
Q0=D_D1、Q1=D_D2、Q2=D_D3、Q3=D0
10 データ・パターン発生回路
11 シフト回路
12 クロック発生回路
14 ゲート回路
16 シリアル変換回路
20 位相シフト回路
22〜28 フリップフロップ
30 反転回路
32〜38 フリップフロップ
40 デコーダ
42〜46 フリップフロップ
48〜54 マルチプレクサ
56〜62 フリップフロップ
Claims (3)
- 並列データを所定順序に従って直列データに変換し、トリガ信号に応じて出力するデータ発生装置において、
上記トリガ信号と基準クロックの位相関係を示す位相情報を生成するトリガ検出手段と、
上記トリガ信号に応じて、上記基準クロックに従って並列データを発生するデータ発生手段と、
上記位相情報に応じて、上記並列データ中のデータを上記所定順序に従って上記基準クロックに対してシフトしたシフト並列データに変換するデータ・シフト手段と、
上記シフト並列データを直列データに変換する並直列変換手段とを具えるデータ発生装置。 - 上記データ・シフト手段は、上記並列データのデータを上記基準クロックの1クロック遅延した遅延データを生成する手段を有し、現在のクロックで受けたデータと、上記遅延データと組み合わせて上記シフト並列データを生成することを特徴とする請求項1記載のデータ発生装置。
- 上記トリガ検出手段は、互いに位相が異なる異位相クロックを上記基準クロックから上記並列データのビット数だけ生成し、上記異位相クロックで上記トリガ信号をサンプリングすることによって、上記位相情報を生成することを特徴とする請求項1又は2記載のデータ発生装置。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005049069A JP4192228B2 (ja) | 2005-02-24 | 2005-02-24 | データ発生装置 |
US11/359,010 US7295139B2 (en) | 2005-02-24 | 2006-02-21 | Triggered data generator |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005049069A JP4192228B2 (ja) | 2005-02-24 | 2005-02-24 | データ発生装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006238007A true JP2006238007A (ja) | 2006-09-07 |
JP4192228B2 JP4192228B2 (ja) | 2008-12-10 |
Family
ID=36970247
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005049069A Active JP4192228B2 (ja) | 2005-02-24 | 2005-02-24 | データ発生装置 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7295139B2 (ja) |
JP (1) | JP4192228B2 (ja) |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7292500B2 (en) * | 2005-07-29 | 2007-11-06 | Agere Systems Inc. | Reducing read data strobe latency in a memory system |
US7245240B1 (en) * | 2006-03-07 | 2007-07-17 | Altera Corporation | Integrated circuit serializers with two-phase global master clocks |
JP4192229B2 (ja) * | 2006-04-21 | 2008-12-10 | テクトロニクス・インターナショナル・セールス・ゲーエムベーハー | データ発生装置 |
WO2008064028A2 (en) * | 2006-11-13 | 2008-05-29 | Qualcomm Incorporated | High speed serializer apparatus |
TW200926612A (en) * | 2007-12-07 | 2009-06-16 | Univ Nat Chiao Tung | Multi-mode parallelism data exchange method and its device |
JP2009231896A (ja) * | 2008-03-19 | 2009-10-08 | Fujitsu Ltd | 受信装置および受信方法 |
CN110601698B (zh) * | 2018-06-13 | 2022-09-20 | 瑞昱半导体股份有限公司 | 串行器/解串器实体层电路 |
US11493951B2 (en) * | 2020-11-17 | 2022-11-08 | Rockwell Collins, Inc. | Precision latency control |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4631484A (en) * | 1984-12-21 | 1986-12-23 | Allied Corporation | Multimode pulse generator |
US4729024A (en) * | 1985-03-19 | 1988-03-01 | Canon Kabushiki Kaisha | Synchronizing pulse signal generation device |
JPS63155340A (ja) * | 1986-12-19 | 1988-06-28 | Fujitsu Ltd | 記憶装置の読出し方式 |
US5224129A (en) * | 1990-10-31 | 1993-06-29 | Tektronix, Inc. | Method of synchronizing signals of a pulse generator |
US5249132A (en) * | 1990-10-31 | 1993-09-28 | Tektronix, Inc. | Digital pulse generator |
US5208598A (en) * | 1990-10-31 | 1993-05-04 | Tektronix, Inc. | Digital pulse generator using leading and trailing edge placement |
US6130566A (en) * | 1996-10-30 | 2000-10-10 | Yokomizo; Akira | Digital wave shaping circuit, frequency multiplying circuit, and external synchronizing method, and external synchronizing circuit |
US6111925A (en) * | 1998-03-25 | 2000-08-29 | Vanguard International Semiconductor Corporation | Clock synchronized delay scheme using edge-triggered delay lines and latches with one clock lock time |
-
2005
- 2005-02-24 JP JP2005049069A patent/JP4192228B2/ja active Active
-
2006
- 2006-02-21 US US11/359,010 patent/US7295139B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
JP4192228B2 (ja) | 2008-12-10 |
US7295139B2 (en) | 2007-11-13 |
US20060202875A1 (en) | 2006-09-14 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4446070B2 (ja) | Dll回路、それを使用する半導体装置及び遅延制御方法 | |
JPH04217115A (ja) | 少くとも1つのクロック位相出力と基準クロックの間の位相関係を変えるための集積回路 | |
JP4846788B2 (ja) | データ信号発生装置 | |
JP4423454B2 (ja) | 信号発生装置 | |
US7295139B2 (en) | Triggered data generator | |
JP2001148690A (ja) | クロック発生装置 | |
US20050270073A1 (en) | Glitch-free clock switching apparatus | |
US20020174374A1 (en) | High speed phase selector | |
JP2005167317A (ja) | 発振器、周波数逓倍器、及び試験装置 | |
JP4192229B2 (ja) | データ発生装置 | |
JP3508762B2 (ja) | 分周回路 | |
US6788127B2 (en) | Circuit for variably delaying data | |
JP2017081089A (ja) | 同期化装置 | |
KR100418017B1 (ko) | 데이터 및 클럭 복원회로 | |
JP2007243964A (ja) | パルス発生回路、半導体集積回路、及び、そのテスト方法 | |
JP2737607B2 (ja) | クロック切替回路 | |
JP2004258888A (ja) | 半導体集積回路 | |
KR100902049B1 (ko) | 주파수 조정 장치 및 이를 포함하는 dll 회로 | |
JP2007124285A (ja) | Pll回路及びこれを用いた通信装置 | |
JP3132583B2 (ja) | 位相検出回路 | |
JP2022156708A (ja) | クロック同期回路、半導体装置、及びクロック同期方法 | |
KR20220101899A (ko) | 그룹 제어 회로 및 이를 포함하는 반도체 메모리 장치 | |
KR100206154B1 (ko) | 이동통신 시스템에서의 위상 가변회로 | |
KR20040031343A (ko) | 클럭간 동기 회로 | |
JP2004127289A (ja) | クロック発生器 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20070220 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20080819 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20080827 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20080827 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20080828 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 Ref document number: 4192228 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20111003 Year of fee payment: 3 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20121003 Year of fee payment: 4 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20131003 Year of fee payment: 5 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313113 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |
|
R250 | Receipt of annual fees |
Free format text: JAPANESE INTERMEDIATE CODE: R250 |