JP2006261299A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device capable of reinforcing a substrate without causing a short circuit or exfoliation of a resin layer, and to provide the semiconductor device. <P>SOLUTION: The manufacturing method of the semiconductor device B includes steps of forming re-wiring 6 in a wafer 1 level, forming an electrode terminal 7, sealing with resin, and finally dividing into individual pieces. A first resin layer 2 is formed by sealing at least the re-wiring 6 and the electrode terminal 7 formed on the side of the principal plane 1c of the wafer 1 with first resin. When the first resin layer 2 is formed, first dicing is done from the rear face 1b of the wafer 1 to the principal plane 1c of the wafer 1 or the middle of the first resin layer 2. A second resin layer 3 is formed by continuously sealing a groove defined by the first dicing and the rear face 1b of the wafer 1 with second resin. In addition, second dicing is done to divide the semiconductor device B into individual pieces while leaving the second resin layer 3 covering a side face 1a defined by the first dicing. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a semiconductor device manufacturing method and a semiconductor device in which packaging is performed at a wafer level and separated into pieces at the final stage.

  In recent years, for example, as a device such as a portable terminal device has become multifunctional and highly functional, a semiconductor device used for the device is required to be small, thin, and capable of processing at high speed. As a semiconductor device that meets this demand, a semiconductor device called a so-called WL-CSP (Wafer Level Chip Size Package) has attracted attention. This WL-CSP is a resin for protecting the IC (integrated circuit) formed mainly on the main surface of the wafer from the formation of rewiring and electrode terminals at the wafer level and from heat, light, physical impact, etc. It is manufactured up to sealing (packaging) and separated into individual pieces at the final stage. As a result, the size of the semiconductor device after packaging can be made substantially equal to that of the IC chip, and the size can be greatly reduced.

  However, in the conventional WL-CSP (semiconductor device), the wafer is cut (diced) at the final stage and separated into individual semiconductor devices. Therefore, the substrate of the separated semiconductor device (separated into individual pieces) The main surface of the wafer was sealed with resin, while the side surface of the substrate was in a state where the cut surface was exposed. The exposed side face has a problem that it is easily damaged when a physical impact or the like is applied during the manufacturing process. In addition, when the side surface is exposed, moisture may enter from between the main surface of the substrate and the resin layer, and rewiring and electrode terminals may be oxidized and corroded.

  On the other hand, there is also a semiconductor device that is manufactured by coating a side surface of a substrate or a side surface and a back surface with a resin in addition to the main surface of the substrate at the stage of separation. In this way, the semiconductor device whose outer surface of the substrate is coated with resin is strengthened so as to prevent the substrate from being damaged, and for example, chipping or the like generated on the substrate at the time of dicing can be covered. There is also an advantage that can be omitted.

  In general, as shown in FIG. 12, the manufacture of the semiconductor device A in which the side surface 1a and the back surface 1b of the substrate 1 are covered with the resin layers 2 and 3 as shown in FIG. 11 starts with a plurality of ICs 4 on the main surface 1c side. A rewiring 6 electrically connected to the IC 4 through the pad electrode 5 is formed, and a copper-made columnar electrode terminal (metal post) 7 is formed on the rewiring 6, for example. It is formed.

  Next, as shown in FIG. 13, after fixing the resin plate 9 (second resin layer 3) on which the dicing tape 8 made of an elastic material is attached to the back surface 1b of the wafer 1, from the main surface 1c side of the wafer 1, First dicing is performed in a direction orthogonal to the main surface 1c. In the first dicing, the dicing depth T1 is set to the middle of the dicing tape 8 in the thickness direction. Further, the groove 10 defined by the first dicing and the main surface 1c side of the wafer 1 are sealed with the first resin. This first resin portion is used as the first resin layer 2, and the first resin layer 2 is formed with such a thickness that the metal post 7 formed on the main surface 1 c of the wafer 1 is embedded.

  Further, as shown in FIG. 14, the surface 2a of the first resin layer 2 is polished to expose the upper surface 7a of the metal post 7, and the bumps of the protruding electrodes that serve as entrances and exits for electricity and signals are exposed on the exposed upper surface 7a. 11 is attached. Then, the substantially central portion in the width direction of the groove 10 defined by the first dicing and filled with the first resin is diced again from the surface 2a side of the first resin layer 2 (second dicing). At this time, the second dicing is performed so that the first resin layer 2 remains on the side surface (cut surface) 1a of the substrate (divided wafer) 1 defined by the first dicing. I do. In addition, the dicing depth T2 of the second dicing is set to a level where the dicing tape 8 is slightly cut from the surface 2a of the first resin layer 2, whereby the semiconductor device A is singulated.

Finally, the dicing tape 8 is removed to complete the manufacture of the semiconductor device A as shown in FIG. The semiconductor device A has excellent impact resistance because the side surface 1a and the back surface 1b are covered with the first resin layer 2 and the resin plate 9 (second resin layer 3) in addition to the main surface 1c of the substrate 1. It is assumed.
JP 2001-144121 A

  However, in the above semiconductor device manufacturing method, since the rewiring and the metal post are exposed during the first dicing, there is a problem that particles scattered due to dicing adhere to the rewiring and the metal post. When particles adhere to the rewiring or metal post, an electrical short circuit occurs or the adhesion of the first resin layer decreases, allowing moisture to enter from the interface between the substrate and the first resin layer. There was a problem that wiring and the like were oxidized and corroded.

  Further, in the above method for manufacturing a semiconductor device, a dicing tape is attached to hold the wafer during the first dicing. Since this dicing tape is an elastic body, there is a problem in that the wafer is easily displaced during dicing and groove bending is likely to occur, and the dimensional accuracy of the separated semiconductor device is reduced.

  As a countermeasure against this, there is a technique in which, for example, a metal plate is attached instead of the dicing tape, and dicing is performed while holding the wafer firmly. However, this method of attaching the metal plate has a problem in that the manufacturing cost increases because it takes time to attach the metal plate and separate the semiconductor device.

  Furthermore, in the above method for manufacturing a semiconductor device, the resin layer covering the side surface of the substrate is a first resin layer formed continuously with the main surface of the substrate. In recent years, along with a demand for thinning a semiconductor device, the back surface side of the substrate is polished to form the semiconductor device as thin as possible. At this time, for example, since the polishing is performed along the back surface of the substrate while rotating the disc-shaped polishing member, the force on the side where the first resin layer is peeled off at the end of the first resin layer covering the side surface of the substrate Will act. For this reason, the 1st resin layer which coat | covered the side surface might peel off with grinding | polishing. Moreover, since the 1st resin layer which coat | covered the side surface is continuously formed with the 1st resin layer of the main surface side, there existed a problem that a main surface part also peeled with peeling of a side surface part. Thus, when the 1st resin layer of the main surface side peels, the problem that IC, rewiring, etc. which were formed in the main surface of a board | substrate will be damaged arises.

  In view of the above circumstances, an object of the present invention is to provide a method of manufacturing a semiconductor device and a semiconductor device that can reinforce a substrate without causing an electrical short circuit or peeling of a resin layer.

  In order to achieve the above object, the present invention provides the following means.

  According to a method of manufacturing a semiconductor device of the present invention, a wafer having a plurality of integrated circuits formed on a main surface is prepared, and a rewiring electrically connected to the integrated circuit is formed through pad electrodes. In a manufacturing method of a semiconductor device in which an electrode terminal is formed on a wiring and then the wafer is diced into individual pieces, at least the rewiring formed on the main surface side of the wafer and the electrode terminal are first The first resin layer is formed by sealing with the resin, and the first dicing is performed from the back surface side of the wafer to the main surface of the wafer or the middle of the first resin layer at the stage of forming the first resin layer. The groove formed by the first dicing and the back surface of the wafer are continuously sealed with a second resin to form a second resin layer, and the groove is defined by the first dicing. Coated side Wherein while leaving a second resin layer that, singulating a second time dicing.

  In the semiconductor device manufacturing method of the present invention, the wafer may be exposed by polishing the second resin layer sealing the back surface of the substrate.

  Furthermore, the semiconductor device of the present invention includes a substrate having an integrated circuit on a main surface, a rewiring electrically connected to the integrated circuit via a pad electrode, an electrode terminal formed on the rewiring, A first resin layer having a thickness ranging from the main surface of the substrate to the upper surface of the electrode terminal and sealing the main surface side of the substrate; and an upper surface of the electrode terminal exposed on the upper surface of the first resin layer In a semiconductor device including a protruding electrode to be mounted, a second resin layer that continuously covers the back surface of the substrate and the side surface orthogonal to the back surface is formed.

  In the semiconductor device of the present invention, the end of the second resin layer on the main surface side of the substrate is located closer to the surface of the first resin layer than the main surface of the substrate. Desirably it is in intimate contact with the layer.

  Furthermore, the semiconductor device of the present invention includes a substrate having an integrated circuit on a main surface, a rewiring electrically connected to the integrated circuit via a pad electrode, an electrode terminal formed on the rewiring, A first resin layer having a thickness ranging from the main surface of the substrate to the upper surface of the electrode terminal and sealing the main surface side of the substrate; and an upper surface of the electrode terminal exposed on the upper surface of the first resin layer In a semiconductor device including a protruding electrode to be mounted, a second resin layer that covers a side surface of the substrate is formed.

  According to the method for manufacturing a semiconductor device of the present invention, since rewiring and electrode terminals (metal posts) are already sealed with the first resin layer at the first dicing, it is possible to prevent particles from adhering. For this reason, there is no possibility of causing an electrical short circuit accompanying the adhesion of particles and a decrease in adhesion of the first resin layer.

  In the first dicing, since the dicing depth is from the back surface of the wafer to the main surface of the wafer or the middle of the first resin layer, dicing can be performed in a state where the wafer is securely fixed by the first resin layer. it can. For this reason, dicing can be performed without causing groove bending and the like, and the dimensional accuracy of the semiconductor device can be ensured.

  Furthermore, according to the semiconductor device manufacturing method of the present invention, when the second resin layer sealing the back surface of the substrate is polished to expose the wafer, the second resin layer is formed in the groove defined by the first dicing. Polishing can be performed with the resin layer filled. For this reason, the side surface of the substrate and the second resin layer can be polished without being separated by polishing, and the semiconductor device can be suitably reduced in thickness.

  Further, since the second resin layer is a resin layer that continuously covers the side surface and the back surface of the substrate, the end portion of the second resin layer that covers the side surface of the substrate is positioned on the main surface side of the substrate. Can do. As a result, even when the second resin layer formed on the back surface side of the substrate is polished, for example, when the separated semiconductor device is obtained, the second resin layer covering the substrate side surface is peeled off from the side surface. It is possible to reduce the thickness of the semiconductor device without applying the force on the side to be operated.

  In addition, according to the semiconductor device of the present invention, the second resin layer covering the substrate side surface and the first resin layer covering the main surface of the substrate are not continuously formed. Even when the resin layer is peeled off, it is possible to prevent the first resin layer from being peeled off. Therefore, it is possible to prevent the IC and rewiring from being damaged.

  Further, the end of the second resin layer on the main surface side of the substrate is located closer to the surface of the first resin layer than the main surface of the substrate and is in close contact with the first resin layer, whereby the first resin It is possible to prevent moisture from entering from the interface between the layer and the second resin layer. Further, at this time, since the upper surface on the end side of the second resin layer and the side surface on the substrate side are in close contact with the first resin layer, even when the second resin layer is peeled off from the side surface of the substrate, The fear of inducing peeling of the first resin layer can be eliminated.

  In addition, according to the semiconductor device of the present invention, a thinned semiconductor device can be provided by forming the second resin layer covering the substrate only on the side surface of the substrate.

  The semiconductor device B and the method for manufacturing the same according to the first embodiment of the present invention will be described below with reference to FIGS. The semiconductor device B shown in the present embodiment is used by being mounted on a device such as a portable terminal device, for example, and particularly relates to a WL-CSP that is subjected to rewiring or resin sealing at the wafer level. .

As shown in FIG. 1, the semiconductor device B according to the present invention includes a thin plate-like substrate (an individual wafer) 1 having an integrated circuit 4 on a main surface 1 c, and an integrated circuit 4 via a pad electrode 5. A rewiring 6 that is electrically connected, a columnar electrode terminal (metal post) 7 formed on the rewiring 6, and a thickness from the main surface 1c of the substrate 1 to the upper surface 7a of the electrode terminal 7 1 includes a first resin layer 2 that seals the main surface 1c side, and a protruding electrode (bump) 11 that is mounted on the upper surface 7a of the electrode terminal 7 exposed on the surface 2a of the first resin layer 2. Yes. Further, a second resin layer 3 is formed continuously on the side surface 1a and the back surface 1b of the substrate 1, and the end 3a of the second resin layer 3 on the main surface 1c side of the substrate 1 is formed. Is positioned within the thickness Z range of the first resin layer 2, and the end surface 3 b and the side surface 3 c on the substrate 1 side are in close contact with the first resin layer 2.
Here, the first resin layer 2 and the second resin layer 3 are formed of, for example, the same epoxy resin, and the bumps 11 are formed of, for example, gold plating or solder plating.

  Next, a method for manufacturing the semiconductor device B having the above configuration will be described with reference to FIGS.

  First, as shown in FIG. 2, a rectangular plate-like wafer 1 having an integrated circuit 4 formed on the main surface 1 c is prepared, a rewiring 6 connected to the pad electrode 5, and a columnar metal on the rewiring 6. Posts 7 are formed. Further, the rewiring 6 and the metal post 7 are sealed with the first resin to form the first resin layer 2. Further, the first resin layer 2 is formed so that the upper surface 7a of the metal post 7 is buried, and the surface 2a side of the first resin layer 2 is polished later, so that the surface 2a of the first resin layer 2 has a metal The upper surface 7a of the post 7 is exposed.

  Next, as shown in FIG. 3, the wafer 1 is turned upside down, and the first dicing is performed from the back surface 1b side with a thin blade grindstone, for example, in accordance with the size of the semiconductor device B to be separated. At this time, the dicing depth T3 is set from the back surface 1b of the wafer 1 to the middle of the first resin layer 2, and the groove 10 is defined by the first dicing. At the stage of the first dicing, the wafer 1 having the integrated circuit 4 and the rewiring 6 on the main surface 1c is integrated with the first resin layer 2 leaving a strong thickness, and is separated into individual pieces. It has not been. For this reason, the wafer 1 can be diced without being displaced during the first dicing, and no groove bending or the like occurs.

  Next, as shown in FIG. 4, the defined groove 10 is filled with the second resin, and the back surface 1 b side of the wafer is sealed with the second resin to form the second resin layer 3.

  When the second resin is cured, the top of the wafer 1 is returned to its original position, and the surface 2a side of the first resin layer 2 is polished on the surface 2a of the first resin layer 2 as shown in FIG. A second resin layer in which the upper surface 7a of the metal post 7 is exposed and formed, bumps 11 are mounted on the upper surface 7a of the metal post 7 located on the same plane as the surface 2a, and the back surface 1b side of the wafer 1 is sealed. The dicing tape 8 is affixed to the outer surface 3d.

  Next, as shown in FIG. 6, a thin blade whetstone that is thinner than the thin blade whetstone used to define the groove 10 is prepared, and the first time from the central portion in the width direction of the groove 10 on the surface 2 a side of the first resin layer 2. The second dicing is performed while leaving the second resin layer 3 covered on the cut surface (side surface 1a of the substrate 1) 1a. At this time, the dicing depth T4 is from the surface 2a of the first resin layer 2 to the middle of the dicing tape 8, and the semiconductor device B is separated into pieces at this stage. In the second dicing, the cutting load is reduced because the resin of the first resin layer 2 and the second resin layer 3 is diced. Thus, no groove bending occurs even if dicing is performed with the wafer 1 held by the dicing tape 8.

  Finally, the dicing tape 8 is pulled so as to be stretched, and the semiconductor device B held in a state of being stuck to the dicing tape 8 and separated into pieces is peeled off. Thereby, the manufacture of the semiconductor device B shown in FIG. 1 is completed.

  Therefore, in the manufacturing method of the semiconductor device B, since the rewiring 6 and the metal post 7 are already resin-sealed and the first resin layer 2 is formed at the first dicing, the particles accompanying the dicing are regenerated. Dicing can be performed without adhering to the wiring 6 or the metal post 7. Thereby, it can prevent that the electrical short circuit and the fall of the adhesiveness of the 1st resin layer 2 are caused.

  Further, since the first dicing performed from the back surface 1b side of the wafer 1 is performed halfway through the first resin layer 2, the wafer 1 can be diced without being displaced. As a result, it is possible to prevent the occurrence of groove bending and the like, and to ensure the dimensional accuracy of the semiconductor device B. Further, since the second dicing is dicing of the resin of the first resin layer 2 and the second resin layer 3, even if the dicing is performed with the wafer 1 held by the dicing tape 8, groove bending or the like occurs. Dicing can be performed without any problem.

  Further, according to the semiconductor device B, the second resin layer 3 covering the side surface 1a and the back surface 1b of the substrate 1 is continuously formed, whereas the second resin layer 3 covering the side surface 1a. And the first resin layer 2 covering the main surface 1c are not continuously formed, so that even when the second resin layer 3 covering the side surface 1a is peeled off, peeling of the first resin layer 2 is induced. There can be no fear.

  The thickness Z of the first resin layer 2 is such that the end 3a of the second resin layer 3 that is in close contact with the first resin layer 2 is closer to the surface 2a of the first resin layer 2 than the main surface 1c of the substrate 1. Since the end surface 3b of the end portion 3a of the second resin layer 3 and the side surface 3c on the substrate 1 side are in close contact with each other, moisture can be prevented from entering from the interface and the side surface 1a of the substrate 1 is covered. Even when the second resin layer 3 to be peeled is peeled off, there is no possibility of inducing peeling of the first resin layer 2.

  Therefore, in the manufacturing method of the semiconductor device B and the semiconductor device B, the integrated circuit 4 and the rewiring 6 can be prevented from being damaged while the substrate 1 is strengthened. Therefore, the highly reliable semiconductor device B can be provided. .

  In addition, this invention is not limited to said 1st Embodiment, In the range which does not deviate from the meaning, it can change suitably. For example, in the first embodiment, the resin of the second resin layer 3 has been described as being the same epoxy resin as the resin of the first resin layer 2, but each resin has a different filler content, for example. The epoxy resin having different characteristics may be used, and different resins other than the epoxy resin may be used. Further, the dicing depth T3 of the first dicing is described up to the middle of the first resin layer 2. However, the dicing depth T3 of the first dicing may be up to the main surface 1c of the wafer 1, In this case, the end 3a of the second resin layer 3 that is in close contact with the first resin layer 2 is in close contact with the first resin layer 2 only at the end surface 3b.

  Further, the semiconductor device B manufactured in the first embodiment is polished by polishing the second resin layer 3 formed on the back surface 1b side of the substrate 1 or the second resin layer 3 and the substrate 1. It may be possible to reduce the thickness. When this polishing is performed, the second resin layer 3 is continuously formed from the back surface 1b of the substrate 1 to the cut surface (side surface) 1a defined by the first dicing. The contact between the first resin layer 2 and the second resin layer 3 does not come into contact. For this reason, it is assumed that there is no fear that the second resin layer 3 covering the side surface 1a is peeled off by polishing.

  Next, with reference to FIGS. 7 to 10, a method for manufacturing a semiconductor device C according to the second embodiment of the present invention and a semiconductor device C manufactured by this method will be described.

  Similar to the first embodiment shown in FIGS. 1 to 6, the second embodiment of the present invention is used by being mounted on a device such as a portable terminal device, and is particularly suitable for rewiring and resin at the wafer level. The present invention relates to WL-CSP to be sealed. Here, components similar to those of the configuration of the semiconductor device B and the manufacturing method thereof according to the first embodiment are denoted by the same reference numerals, and detailed description thereof is omitted.

  In the semiconductor device C of the second embodiment, as shown in FIG. 7, the second resin layer 3 is not formed on the back surface 1b of the substrate 1 as compared to the semiconductor device B shown in the first embodiment. On the other hand, the second resin layer 3 is formed on the side surface 1a of the substrate 1, and the side surface 1a of the substrate 1 is covered and protected.

  Next, with reference to FIGS. 2 to 4 and FIGS. 7 to 9, a method for manufacturing the semiconductor device C having the above-described configuration will be described.

  As in the first embodiment, first, a wafer 1 on which the integrated circuit 4 shown in FIG. 2 of the first embodiment is formed is prepared, and a rewiring 6 connected to the pad electrode 5 is provided on the main surface 1c side. Then, the metal post 7 embedded in the first resin layer 2 is formed.

  Next, as shown in FIG. 3, the first dicing is performed from the back surface 1 b side of the wafer 1 to the middle of the first resin layer 2 to define the grooves 10. Further, as shown in FIG. 4, the defined groove 10 is filled with the second resin, and the back surface 1 b side of the wafer 1 is sealed with the second resin to form the second resin layer 3.

  When the resin is cured, as shown in FIG. 8, the second resin layer 3 on the back surface 1b side of the wafer 1 is polished and removed, and the back surface 1b of the wafer 1 is exposed. At this time, since the groove 10 defined by the first dicing is filled with the second resin, the adhesive surface between the cut surface (side surface) 1a and the second resin is peeled off by polishing. There is no, and it will be in the state contact | adhered firmly. Further, as shown in FIG. 9, bumps 11 are mounted on the upper surface 7 a of the metal post 7, and a dicing tape 8 is attached to the exposed back surface 1 b of the wafer 1.

  Next, as shown in FIG. 10, the second resin layer 3 is coated on the cut surface (side surface 1 a of the substrate 1) 1 a defined by the first dicing of the wafer 1 from the surface 2 a side of the first resin layer 2. The second dicing is performed while leaving the state in the above state. At this time, the dicing depth T5 is set to the middle of the dicing tape 8. Finally, the dicing tape 8 is peeled to complete the manufacture of the separated semiconductor device C.

  Therefore, in the manufacturing method of the semiconductor device C described above, the second resin layer 3 on the back surface 1b side of the wafer 1 is formed in a state where the groove 10 defined by the first dicing is filled with the second resin. The semiconductor device C can be thinned by polishing. At this time, since the second resin is filled in the groove 10 in a cured state, it is possible to prevent the second resin from being peeled off from the cut surface 1a of the wafer 1 by the first dicing. It becomes possible to form the second resin layer 3 firmly adhered to 1a.

  In addition, this invention is not limited to said 2nd Embodiment, In the range which does not deviate from the meaning, it can change suitably. For example, in the second embodiment, the second resin layer 3 sealing the back surface 1b of the wafer 1 is completely removed by polishing to expose the back surface 1b. However, the present invention is not limited to this, and the second resin layer 3 is polished by polishing. The thickness of the semiconductor device C may be reduced by reducing the thickness of the semiconductor device C and remaining. In this case, since the second resin layer 3 is formed on the back surface 1b of the substrate 1, the substrate 1 can be strengthened to give impact resistance. Further, the wafer 1 itself may be polished in addition to the second resin layer 3 on the back surface 1b side of the wafer 1 to further reduce the thickness of the semiconductor device C.

1 is a cross-sectional view of a semiconductor device according to a first embodiment of the present invention. FIG. 2 is a diagram illustrating a state in which rewiring or the like is formed on a wafer and a first resin layer is formed in the manufacturing process of the semiconductor device of FIG. 1. FIG. 2 is a diagram showing a state where first dicing is performed in the manufacturing process of the semiconductor device of FIG. 1. FIG. 8 is a diagram showing a state where sealing is performed with a second resin in the manufacturing process of the semiconductor device of FIG. 1. FIG. 2 is a diagram showing a state where protruding electrodes and a dicing tape are attached in the manufacturing process of the semiconductor device of FIG. 1. FIG. 2 is a diagram illustrating a state where second dicing is performed in the manufacturing process of the semiconductor device of FIG. 1. It is sectional drawing of the semiconductor device which concerns on 2nd Embodiment of this invention. FIG. 8 is a diagram showing a state where a second resin layer on the back surface of the wafer is removed in the manufacturing process of the semiconductor device of FIG. 7. FIG. 8 is a diagram showing a state where protruding electrodes and a dicing tape are attached in the manufacturing process of the semiconductor device of FIG. 7. FIG. 8 is a diagram illustrating a state where second dicing is performed in the manufacturing process of the semiconductor device of FIG. 7. It is sectional drawing of the conventional semiconductor device. FIG. 12 is a diagram showing a state in which rewiring and the like are formed on the wafer in the manufacturing process of the semiconductor device of FIG. 11. FIG. 12 is a diagram illustrating a state in which a first resin layer is formed in the manufacturing process of the semiconductor device of FIG. 11. FIG. 12 is a diagram illustrating a state where the second dicing is performed in the manufacturing process of the semiconductor device of FIG. 11.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Wafer (substrate), 1a ... Side surface (cut surface), 1b ... Back surface, 1c ... Main surface, 2 ... 1st resin layer, 2a ... Front surface, 3 ... Second resin layer, 3a ... end, 4 ... integrated circuit (IC), 5 ... pad electrode, 6 ... rewiring, 7 ... electrode terminal (metal post), 7a ..Upper surface, 8 ... dicing tape, 10 ... groove, 11 ... projection electrode (bump), A, B, C ... semiconductor device, Z ... thickness of the first resin layer

Claims (5)

A wafer having a plurality of integrated circuits formed on the main surface is prepared, and a rewiring electrically connected to the integrated circuit via a pad electrode is formed, and an electrode terminal is formed on the rewiring. In the method of manufacturing a semiconductor device for dicing the wafer into pieces,
At least the rewiring and the electrode terminal formed on the main surface side of the wafer are sealed with a first resin to form a first resin layer, and the first resin layer is formed, The first dicing is performed from the back surface side of the wafer to the main surface of the wafer or the middle of the first resin layer, and the groove defined by the first dicing and the back surface of the wafer are continuously connected with the second resin. Sealing and forming a second resin layer, and performing the second dicing and dividing into individual pieces while leaving the second resin layer covering the side surface defined by the first dicing. A method of manufacturing a semiconductor device. In the manufacturing method of the semiconductor device according to claim 1,
A method of manufacturing a semiconductor device, comprising: polishing the second resin layer sealing the back surface of the wafer to expose the wafer. A substrate having an integrated circuit on a main surface, a rewiring electrically connected to the integrated circuit via a pad electrode, an electrode terminal formed on the rewiring, and a thickness from the main surface of the substrate A semiconductor comprising: a first resin layer that extends to an upper surface of the electrode terminal and seals a main surface side of the substrate; and a protruding electrode that is mounted on the upper surface of the electrode terminal exposed on the upper surface of the first resin layer. In the device
A semiconductor device, wherein a second resin layer that continuously covers a back surface of the substrate and a side surface orthogonal to the back surface is formed. The semiconductor device according to claim 3.
An end of the second resin layer on the main surface side of the substrate is located closer to the surface of the first resin layer than the main surface of the substrate and is in close contact with the first resin layer. A semiconductor device. A substrate having an integrated circuit on a main surface, a rewiring electrically connected to the integrated circuit via a pad electrode, an electrode terminal formed on the rewiring, and a thickness from the main surface of the substrate A semiconductor comprising: a first resin layer that extends to an upper surface of the electrode terminal and seals a main surface side of the substrate; and a protruding electrode that is mounted on the upper surface of the electrode terminal exposed on the upper surface of the first resin layer. In the device
A semiconductor device, wherein a second resin layer covering the side surface of the substrate is formed.

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