JP2006134962A - Manufacturing method of semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To control a ridge shape and ridge height by controlling the stabilization of wet etching which follows dry etching in the manufacture of a semiconductor device having a ridge shaped part. <P>SOLUTION: The controlability of ridge shape and ridge width can be improved by removing the reaction product 9 of dry etching by its oxidization so as to raise the stability of the wet etching following it. Moreover, wet etching is performed to a necessary minimum so as to strictly control the ridge width since side etching can be minimized by wet etching. Therefore, it is made possible to obtain a semiconductor laser device with little variation in the level angle of radiation of a laser beam. Further, the ridge height becomes strictly controllable by making wet etching stop by use of an etching stop layer 5. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a method for manufacturing a semiconductor device such as a semiconductor laser device having a ridge-shaped portion effective for stabilizing wet etching performed after dry etching.

  Conventionally, in forming a ridge-shaped portion in a semiconductor device such as a semiconductor laser device having a ridge-shaped portion, a mask that covers the portion that becomes the ridge-shaped portion is formed on the semiconductor layer, and etching is performed by wet etching or dry etching. A method of processing is generally used.

  In dry etching, since etching can be controlled anisotropically, a ridge shape close to vertical can be obtained. Therefore, the ridge shape pattern formed by dry etching is almost the same as the mask pattern.

  However, when it is necessary to stop etching at a predetermined depth with respect to the semiconductor layer, the dry etching has a sufficiently large selection ratio as an underlying layer with the semiconductor layer constituting the ridge-shaped portion. It may not be easy to form an appropriate semiconductor layer that can be used as an etching stop layer, and control in the depth direction may not be sufficient.

  On the other hand, in the wet etching, the depth direction is strictly controlled by forming an etching stop layer that can obtain a large selection ratio between the semiconductor layer constituting the ridge-shaped portion and the underlying semiconductor layer. be able to.

  However, in wet etching, etching is isotropic and side etching occurs during etching. Therefore, the ridge shape pattern formed by wet etching is different from the mask pattern, and process management is required to control the side etching amount.

  Therefore, in a semiconductor device such as a semiconductor laser device having a ridge-shaped portion, when it is necessary to strictly control the width and height of the ridge-shaped portion, for example, as described in Patent Document 1, dry etching and wet A method of combining dry etching and wet etching is used in order to make use of the advantages by compensating for the respective disadvantages of etching. Specifically, the method is as follows.

  First, an etching stop layer effective for wet etching is formed by crystal growth so that the required height of the ridge-shaped portion can be obtained.

  Next, dry etching is performed to the extent that the required depth of the ridge shape portion is slightly insufficient, that is, immediately before the etching stop layer, to form a ridge shape portion having the same shape as the mask pattern.

  Thereafter, etching is performed up to the etching stop layer by wet etching.

  According to the above method, the height of the ridge-shaped portion can be strictly controlled by stopping the wet etching using the etching stop layer.

  Also, by performing dry etching to a level that is slightly less than the required ridge shape depth and minimizing wet etching to the minimum necessary, side etching by wet etching can be minimized. By reducing the difference between the pattern obtained and the mask pattern, it is possible to strictly control the width of the ridge-shaped portion.

Patent Document 2 also describes a method of combining dry etching and wet etching.
JP 2002-198614 A (page 6) JP-A-6-124927 (pages 1 to 8)

  However, in dry etching, as described in, for example, Patent Document 2, reaction products are deposited on the sidewalls of the ridge-shaped portion during dry etching. Due to the reaction product, the side etching of wet etching becomes unstable, the side etching proceeds and the side etching does not proceed, and the ridge shape is not stabilized.

FIG. 3 shows a cross section of a ridge-shaped portion when wet etching is performed after dry etching as an example of the prior art. In the example of FIG. 3, a ridge-shaped portion 14 composed of a GaAs layer 12 and an AlGaAs layer 13 as semiconductor layers is formed on an etching stopper layer 11, and a mask 15 composed of SiO ₂ is formed thereon.

  As shown in FIG. 3A, the side surface of the ridge-shaped portion 14 is formed in the vertical direction after dry etching, but after wet etching, the type of etching solution, the temperature of the etching solution, and the etching time are all the same. 3, depending on the reaction product deposited on the side wall of the ridge-shaped portion 14, various ridge shapes may be formed as shown in FIGS. 3B to 3D. Thus, the ridge width defined by the width E at the top of the ridge and the width F at the bottom of the ridge in FIG. 3 cannot be substantially matched.

  In order to remove reaction products deposited on the side walls of the ridge-shaped portion during dry etching, when the reaction products are removed by wet etching as a post-dry etching process, the reaction products are removed from the semiconductor layer. Therefore, it is difficult to remove only the reaction product. Accordingly, the semiconductor layer is simultaneously etched by wet etching performed as a post-dry etching process, and the ridge shape and the etching depth are changed. As a result, in addition to the process management for controlling the etching amount of the wet etching performed after the dry etching post-treatment, the process management for controlling the etching amount of the wet etching performed as the post-dry etching treatment is also required. As a result, the shape of the ridge-shaped portion tends to vary, and wet etching cannot be stabilized.

  The present invention solves the above-described conventional problems, and when manufacturing a semiconductor device having a ridge-shaped portion or the like, the wet etching following the dry etching can be stably controlled, and the ridge shape and the ridge height can be easily achieved. Another object of the present invention is to provide a method for manufacturing a semiconductor device that can be accurately controlled.

  The semiconductor device manufacturing method of the present invention includes a semiconductor layer forming step of forming a semiconductor layer on a substrate or a substrate portion, and a mask for forming a mask for forming a ridge or / and a groove-shaped portion on the semiconductor layer. In a method for manufacturing a semiconductor device, comprising: a forming step; and a ridge or / and groove shape portion forming step for forming the ridge or / and groove shape portion by dry etching using the mask and subsequent wet etching. / And the groove shape portion forming step includes a reaction product oxidation step of oxidizing a reaction product formed on the surface of the etched portion by the dry etching between the dry etching and the subsequent wet etching, and an oxidation step. A reaction product removing step for removing the reaction product, thereby achieving the above object.

  Preferably, the reaction product oxidation step in the method for manufacturing a semiconductor device of the present invention is performed by irradiating with ultraviolet rays in an atmosphere containing at least one of oxygen and ozone.

  Further preferably, in the reaction product oxidation step in the method of manufacturing a semiconductor device of the present invention, the substrate temperature is set within a range of room temperature to 300 ° C.

  Further preferably, in the reaction product oxidation step in the method of manufacturing a semiconductor device of the present invention, the substrate temperature is set within a range of 150 ° C. or higher and 250 ° C. or lower.

  Further preferably, the reaction product oxidation step in the method of manufacturing a semiconductor device of the present invention is performed in a plasma containing oxygen gas.

  Further preferably, the reaction product removal step in the method of manufacturing a semiconductor device of the present invention is performed using an etching solution that does not etch the semiconductor layer.

  Further preferably, in the method of manufacturing a semiconductor device according to the present invention, the method further includes a step of forming an etching stop layer on the substrate or the substrate portion as a base layer of the semiconductor layer, and the ridge or / and groove shape portion forming step. Uses the etching stop layer to stop etching during the wet etching.

  Further preferably, in the step of forming a ridge or / and groove shape portion in the method for manufacturing a semiconductor device of the present invention, an etching residual thickness of the semiconductor layer is set to 50 nm or more and 200 nm or less during the dry etching.

  Further preferably, in the step of forming a ridge or / and groove shape portion in the method for manufacturing a semiconductor device of the present invention, the remaining etching thickness of the semiconductor layer is set to 50 nm or more and 100 nm or less during the dry etching.

  Still preferably, in a method for manufacturing a semiconductor device according to the present invention, in the substrate portion, a first cladding layer, an active layer, and a second cladding layer are formed in this order on the substrate.

  Further preferably, the substrate in the method for manufacturing a semiconductor device of the present invention is made of GaAs or InP.

  Further preferably, the semiconductor layer in the method for manufacturing a semiconductor device of the present invention includes at least one of GaAs, AlGaAs, InP, GaInP, AlGaInP, and InGaAsP.

  Further preferably, the ridge or / and groove shape portion forming step in the method of manufacturing a semiconductor device of the present invention uses a chlorine-based gas during the dry etching.

  Further preferably, the ridge or / and groove shape forming step in the method of manufacturing a semiconductor device of the present invention uses hydrofluoric acid during the wet etching.

  The operation of the present invention will be described below with the above configuration.

  In the present invention, when a ridge or / and groove shape portion is formed by dry etching and subsequent wet etching, it is formed on the surface of the etched portion (side surface of the ridge or / and groove shape portion) by dry etching. The reaction product formed is oxidized and removed.

  Although it is difficult to remove only the reaction product, which is a mixture of the semiconductor layer material and dry etching gas material, the reaction product is oxidized using an etchant that does not etch the semiconductor layer. Only things can be removed. Thereby, the subsequent wet etching is not affected by the reaction product, thereby improving the dimensional stability and improving the controllability of the ridge or / and groove shape, ridge or / and groove width and depth. be able to.

  The oxidation of the reaction product can be performed by irradiating with ultraviolet rays in an atmosphere containing at least one of oxygen and ozone. If the substrate temperature at this time is too high, the semiconductor layer constituting the ridge-shaped portion or the like is also oxidized, making it difficult to remove the oxide film. If the substrate temperature is too low, the oxidation process takes time. Therefore, the substrate temperature is preferably room temperature or higher and 300 ° C. or lower, more preferably 150 ° C. or higher and 250 ° C. or lower.

  The oxidation of the reaction product can also be performed in a plasma containing oxygen gas.

  For removal of the reaction product, an etching solution such as buffered hydrofluoric acid that does not etch the semiconductor layer forming the ridge-shaped portion can be used.

  The wet etching can be strictly controlled by stopping the height of the ridge-shaped portion and the depth of the groove-shaped portion by using an etching stop layer.

  If the remaining dry etching thickness is too large, the amount of wet etching will increase and it will be difficult to control the width of the ridge or / and the groove shape, and if it is too thin, the in-plane distribution and etching of the semiconductor layer thickness will be difficult. It is feared that etching is performed beyond the etching stop layer due to the in-plane distribution. Therefore, the remaining etching thickness is preferably such that the thickness of the flat portion adjacent to both sides of the ridge-shaped portion is not less than 50 nm and not more than 200 nm, and more preferably not less than 50 nm and not more than 100 nm.

  As described above, according to the present invention, by oxidizing and removing the reaction product of dry etching, the stability of subsequent wet etching is improved, and the ridge, groove shape, ridge, groove width, ridge height, The controllability of the groove depth can be improved.

  In addition, the wet etching is stopped using an etching stop layer, whereby the height of the ridge shape portion and the depth of the groove shape portion can be strictly controlled.

  Furthermore, by minimizing the wet etching, the ridge and the groove width can be strictly controlled by minimizing the side etching by the wet etching.

  Hereinafter, a case where an embodiment of a manufacturing method of a semiconductor device of the present invention is applied to a manufacturing method of a semiconductor laser device will be described in detail with reference to the drawings. In the following embodiments, a red semiconductor laser device in which an AlGaInP-based multilayer structure is provided on a GaAs substrate will be described as an example. However, the present invention is not limited to this, and semiconductor layers such as GaAs, AlGaAs, and InP can be used. , GaInP, AlGaInP, InGaAsP, and the like may be included. Further, the substrate is not limited to the GaAs substrate, and for example, an InP substrate may be used. Furthermore, here, a case where the present invention is applied to a semiconductor laser device having a ridge-shaped portion will be described. However, the present invention is not limited to this. For example, at least one of a ridge-shaped portion and a groove-shaped portion (ridge or / and groove-shaped) The present invention can also be applied to a semiconductor device such as a semiconductor laser device having a portion.

  FIG. 1 is a cross-sectional view of an essential part showing a configuration example in an embodiment of a semiconductor laser device of the present invention.

  As shown in FIG. 1, the semiconductor laser device 10 includes an AlGaInP first clad layer 2 (lower clad layer), a GaInP / AlGaInP multiple quantum well active layer 3 (active layer), and an AlGaInP as a substrate portion on a GaAs substrate 1. A second cladding layer 4 (upper cladding layer) and a GaInP etching stop layer 5 are sequentially provided in this order, and a ridge shape comprising an AlGaInP third cladding layer 6b (semiconductor layer) and a GaAs cap layer 7a (contact layer) thereon. Part (ridge stripe shape part) is provided.

  At the time of forming this ridge-shaped portion, as a post-dry etching treatment of the characteristic configuration of this embodiment, a reaction product formed on the surface of the etched portion (particularly the side surface of the ridge-shaped portion) is oxidized by dry etching, The product oxide is removed. Thereby, the stability of wet etching is improved, and the controllability of the ridge shape, ridge width and height is improved.

  Further, the semiconductor laser device 10 is provided with an insulating layer 21 so as to cover at least the side surface of the third cladding layer 6b and the etching stop layer 5 of the ridge-shaped portion, and further, the upper surface of the cap layer 7a as a contact layer. The electrodes 22 and 23 are provided on the lower surface of the GaAs substrate 1, respectively. A thick electrode layer 24 is provided so as to embed these insulating layer 21 and electrode 22. In this case, the electrode 22 and the electrode layer 24 are electrically connected.

Hereinafter, a method of manufacturing the semiconductor laser device of the present embodiment configured as described above will be described with reference to FIG.

2A and 2B are main part cross-sectional views showing respective manufacturing steps of the semiconductor laser device of FIG. 1, wherein FIG. 2A is a main part cross-sectional view showing a state in which a SiO ₂ mask as an etching mask is patterned, and FIG. The main part sectional view showing the state immediately after the dry etching, (c) is the main part sectional view showing the state after the dry etching treatment of the characteristic configuration of this embodiment, and (d) is the main part showing the state after the wet etching. FIG.

First, as shown in FIG. 2 (a), a first cladding layer 2 made of at least AlGaInP and a multiple of AlGaInP and GaInP are formed on a GaAs substrate 1 by a crystal growth apparatus such as an MOCVD crystal growth apparatus or an MBE crystal growth apparatus. An active layer 3 having a quantum well structure, a second cladding layer 4 made of AlGaInP, an etching stop layer 5 made of GaInP, a third cladding layer 6 made of AlGaInP, and a cap layer 7 made of GaAs are sequentially grown in this order. A striped pattern SiO ₂ mask 8 is formed thereon as an etching mask for forming a ridge-shaped portion.

  Next, as shown in FIG. 2B, the third cladding layer 6 is etched to a depth that leaves about 100 nm by dry etching using a chlorine-based gas. The remaining dry etching thickness (thickness from the etching stop layer 5 to the surface of the third cladding layer 6 after dry etching) A at this time is preferably 50 nm to 200 nm. If the remaining thickness of the dry etching is increased, it is necessary to increase the etching amount by the subsequent wet etching, and the amount of the side etching is increased, so that it becomes difficult to control the ridge width. On the contrary, if the remaining thickness of dry etching is too thin, there is a concern that etching is performed beyond the etching stop layer 5 due to the in-plane distribution of the thickness of the semiconductor layer and the in-plane distribution of etching. Therefore, the remaining thickness of dry etching is more desirably 50 nm or more and 100 nm or less.

At this time, the ridge width can be controlled to the width of the SiO ₂ mask 8 because the shape of the ridge-shaped portion composed of the third clad layer 6a and the cap layer 7a formed by dry etching can be controlled so as to stand substantially vertically. It becomes equal, and the dimension variation by dry etching does not arise.

  Thereafter, as a post-dry etching process, ultraviolet rays are irradiated while purging oxygen and ozone at a substrate temperature of 200 ° C., and particularly during the dry etching, the side walls of the ridge-shaped portion (the third cladding layer 6a and the cap layer 7a) and their adjacent sides. The reaction product 9 adhering to the flat portion (etched portion; attached to the flat portion but overwhelmingly to the side wall) is oxidized. The substrate temperature at this time is effective within the range of room temperature to 300 ° C., but when the substrate temperature exceeds 300 ° C., it is deposited on the side wall of the ridge-shaped portion (the third cladding layer 6a and the cap layer 7a). Not only the reaction product 9 but also the third cladding layer 6a and the cap layer 7a are entirely oxidized, making it difficult to remove the oxide film. Further, when processing at a substrate temperature of 100 ° C. or lower, the processing time required to sufficiently oxidize the reaction product 9 becomes long. For this reason, the substrate temperature during processing is more preferably 150 to 250 ° C.

Further, as shown in FIG. 2C, the oxidized reaction product 9 and the SiO ₂ mask 8 are removed with buffered hydrofluoric acid.

  At this time, the third cladding layer 6 is hardly etched by the buffered hydrofluoric acid. Therefore, in this post-dry etching process, the ridge width and the etching depth are equal to those after dry etching, and the ridge shape does not change after dry etching.

  Subsequently, as shown in FIG. 2D, the third cladding layer 6a is wet-etched to the etching stop layer 5 with hydrofluoric acid.

At this time, as a result of the post-dry etching treatment, the reaction product 9 attached to the side walls of the ridge-shaped portion (the third cladding layer 6a and the cap layer 7a) is removed, and the underlying crystals of the reaction product 9 are exposed. Therefore, the etching rate of wet etching is stabilized. Further, since the etching stop layer 5 made of GaInP is hardly etched by hydrofluoric acid, which is an etching solution, the etching depth is determined by the layer thickness during crystal growth, and variations due to etching do not occur. Also, with respect to the widths B and C of the ridge-shaped portion (the third cladding layer 6b and the cap layer 7a), most of the etching is performed by dry etching, and the amount of side etching by wet etching can be reduced. Subsequent ridge widths B and C have a small change from the width of the SiO ₂ mask 8, and the ridge width can be controlled with high accuracy.

  As described above, according to the present embodiment, the dry etching reaction product 9 is oxidized and removed, thereby improving the stability of the subsequent wet etching and improving the controllability of the ridge shape and the ridge width. Can be made. Further, by minimizing the wet etching, the ridge width can be strictly controlled by minimizing the side etching by the wet etching. Therefore, it is possible to obtain a semiconductor laser device with little variation in the horizontal radiation angle of the laser light. In addition, the ridge height can be strictly controlled by stopping the wet etching using the etching stop layer 5.

  In the above-described embodiment, the oxidation treatment of the reaction product 9 after the dry etching is performed by irradiating ultraviolet rays in an atmosphere containing at least one of oxygen and ozone. Even if the reaction product 9 is oxidized in a plasma containing oxygen gas, the same effect can be obtained.

  Moreover, in the said embodiment, a semiconductor layer is formed on the board | substrate part in which the 1st clad layer, the active layer, and the 2nd clad layer were formed in this order on the board | substrate, The dry etching using a mask and subsequent wet etching are used. Although the ridge stripe shape portion is formed in the semiconductor layer, the ridge stripe shape portion is not limited to this, but the semiconductor layer is simply formed on the substrate, and dry etching using a mask and subsequent wet etching are performed on the semiconductor layer. The present invention can also be applied to the case of forming.

  As mentioned above, although this invention has been illustrated using preferable embodiment of this invention, this invention should not be limited and limited to this embodiment. It is understood that the scope of the present invention should be construed only by the claims. It is understood that those skilled in the art can implement an equivalent range based on the description of the present invention and the common general technical knowledge from the description of specific preferred embodiments of the present invention. Patents, patent applications, and documents cited herein should be incorporated by reference in their entirety, as if the contents themselves were specifically described herein. Understood.

  In the field of a semiconductor device having a ridge or / and groove shape portion such as a semiconductor laser device and a method for manufacturing the same, the present invention is to strictly control the ridge or / and groove width and ridge height or groove depth. A post-dry etching post-treatment step that oxidizes and removes a reaction product of dry etching between dry etching and wet etching when forming a ridge or / and groove shape portion by dry etching and subsequent wet etching. By doing so, the stability of the subsequent wet etching can be improved, and the controllability of the ridge or / and groove shape and ridge or / and groove width can be improved. In addition, the ridge height or the groove depth can be strictly controlled by stopping the wet etching using an etching stop layer. Furthermore, by minimizing the wet etching, the ridge or / and the groove width can be strictly controlled by minimizing the side etching by the wet etching. Therefore, a semiconductor device such as a semiconductor laser device in which the ridge or / and groove shape, ridge or / and groove width and ridge height or groove depth are easily and accurately controlled can be stably manufactured.

It is principal part sectional drawing which shows the structural example in one Embodiment of the semiconductor laser apparatus of this invention. A fragmentary cross-sectional views showing manufacturing steps of the semiconductor laser device of FIG. 1, (a) is a fragmentary cross-sectional view showing a state in which the patterning of the SiO ₂ mask as an etching mask, (b) is after dry etching The principal part sectional view showing a state, (c) is a principal part sectional view showing the state after dry etching, and (d) is the principal part sectional view showing the state after wet etching. FIG. 10 is a cross-sectional view of a main part showing a ridge-shaped part formed by dry etching and wet etching in a manufacturing process of a conventional semiconductor laser device, where (a) is a main part cross-sectional view showing a state after dry etching; ) To (d) are cross-sectional views of the main parts showing various ridge shapes when wet etching is performed.

Explanation of symbols

1 GaAs substrate 2 AlGaInP first clad layer 3 GaInP / AlGaInP multiple quantum well active layer 4 AlGaInP second clad layer 5 GaInP etching stop layer 6, 6b AlGaInP third clad layer 7, 7a GaAs cap layer 8 SiO ₂ mask 9 Reaction generation Item 10 Semiconductor laser device A Dry etching remaining thickness B ridge upper width C ridge lower width

Claims (14)

A semiconductor layer forming step of forming a semiconductor layer on the substrate or the substrate portion, a mask forming step of forming a mask for forming a ridge or / and a groove-shaped portion on the semiconductor layer, and a dry process using the mask In a method for manufacturing a semiconductor device, comprising the step of forming a ridge or / and a groove-shaped portion by etching and subsequent wet etching to form the ridge or / and the groove-shaped portion.
The ridge or / and groove shape portion forming step includes
Between the dry etching and the subsequent wet etching,
A reaction product oxidation step of oxidizing the reaction product formed on the surface of the etched portion by the dry etching;
A method for manufacturing a semiconductor device, comprising: a reaction product removing step of removing an oxidized reaction product.   The method of manufacturing a semiconductor device according to claim 1, wherein the reaction product oxidation step is performed by irradiating ultraviolet rays in an atmosphere containing at least one of oxygen and ozone.   The method for manufacturing a semiconductor device according to claim 2, wherein in the reaction product oxidation step, the substrate temperature is set within a range of room temperature to 300 ° C.   The method for manufacturing a semiconductor device according to claim 2, wherein in the reaction product oxidation step, the substrate temperature is set in a range of 150 ° C. or more and 250 ° C. or less.   The method of manufacturing a semiconductor device according to claim 1, wherein the reaction product oxidation step is performed in a plasma containing oxygen gas.   The method of manufacturing a semiconductor device according to claim 1, wherein the reaction product removing step is performed using an etchant that does not etch the semiconductor layer. A step of forming an etching stop layer on the substrate or the substrate portion as a base layer of the semiconductor layer;
2. The method of manufacturing a semiconductor device according to claim 1, wherein in the ridge or / and groove shape portion forming step, the etching is stopped using the etching stop layer during the wet etching.   8. The method of manufacturing a semiconductor device according to claim 1, wherein, in the ridge or / and groove shape portion forming step, an etching residual thickness of the semiconductor layer is set to 50 nm or more and 200 nm or less during the dry etching.   8. The method of manufacturing a semiconductor device according to claim 1, wherein, in the step of forming the ridge or / and the groove-shaped portion, the remaining etching thickness of the semiconductor layer is set to 50 nm to 100 nm during the dry etching.   2. The method of manufacturing a semiconductor device according to claim 1, wherein the substrate portion includes a first cladding layer, an active layer, and a second cladding layer formed in this order on the substrate.   The method for manufacturing a semiconductor device according to claim 1, wherein the substrate is made of GaAs or InP.   The method of manufacturing a semiconductor device according to claim 1, wherein the semiconductor layer includes at least one of GaAs, AlGaAs, InP, GaInP, AlGaInP, and InGaAsP.   10. The method of manufacturing a semiconductor device according to claim 1, wherein the ridge or / and the groove-shaped portion forming step uses a chlorine-based gas during the dry etching.   10. The method of manufacturing a semiconductor device according to claim 1, wherein the ridge or / and groove shape portion forming step uses hydrofluoric acid during the wet etching.

Images