JP2006128283A - Laminated ceramic capacitor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a laminated ceramic capacitor which can prevent defects, such as cracks or delamination caused therein, even if a dielectric layer and an internal electrode layer are made thin and turned into high lamination, and which can be made high in capacity with less variation in the capacity, and to provide its manufacturing method. <P>SOLUTION: The width W1 of a joint connected to the external electrode 5 of internal electrode layers 9a and 9b, and the width W2 of a facing part facing the joint in the same plane of the internal electrode layers 9a and 9b, have the relation W1>W2. A width W gradually decreases, from the joint part toward its tip end, and when the adjoining internal electrode layers 9a and 9b are projected in the vertical direction to the plane of the internal electrode layers 9a and 9b, the profile of the projection drawing of the two layers crosses a side 10 where the width W gradually decreases from the jointing part toward the facing part. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a multilayer ceramic capacitor and a method for manufacturing the same, and more particularly, to a small size and high capacity multilayer ceramic capacitor and a method for manufacturing the same.

  In the multilayer ceramic capacitor, as shown in FIG. 7A, a capacitor body 105 is formed by alternately laminating dielectric layers 101 and internal electrode layers 103, and internal electrode layers are formed on opposing end surfaces of the capacitor body 105. 103 is derived, and external electrodes 107 are formed in these portions. Here, as shown in FIG. 7B, the internal electrode layer 103 extends from the vicinity of one end surface in the direction of the external electrode 107 formed so as to oppose (hereinafter referred to as the longitudinal direction) to the other end surface. The external electrodes 107 of the dielectric layer 101 are formed with substantially the same width and prevent short circuit between the opposing internal electrode layers 103 and ensure insulation from the other external electrodes 107 having different potentials. A margin portion 109 in which the internal electrode layer 103 is not formed is provided at an edge portion in three directions other than the side.

By the way, as shown in FIG. 8, such a multilayer ceramic capacitor generally has a plurality of internal electrode patterns 123 using ceramic paste on a ceramic green sheet 121 obtained by applying a ceramic slurry using a screen printing machine or the like. Next, a ceramic pattern 124 is formed by a ceramic paste around the entire periphery between the internal electrode patterns 123. Next, a plurality of ceramic green sheets 121 on which the internal electrode pattern 123 and the ceramic pattern 124 are formed are stacked and fired to form the capacitor body 105. Finally, the external electrode is formed on the opposing end surface of the capacitor body 105. By forming 107, a multilayer ceramic capacitor is formed (for example, Patent Document 1).
JP 2000-311831 A

  However, the internal electrode layer 103 as disclosed in the above publication is substantially the same from the vicinity of one end surface to the other end surface in the direction of the external electrode 107 (hereinafter referred to as the longitudinal direction) formed so as to face each other. In the multilayer ceramic capacitor formed with a width, there is a problem that when the internal electrode pattern formed on the green sheet at the time of manufacture is misaligned, the variation in capacitance tends to increase.

  In the multilayer ceramic capacitor disclosed in the above publication, the boundary between the portion where the internal electrode layers 103 overlap with each other via the dielectric layer 101 (effective portion 111) and the portion where the internal electrode layer 103 does not overlap (non-effective portion 113). Although it is known that internal stress occurs in the portion Bo, when the margin portion 109 is reduced, the effective area of the internal electrode layer 103 is increased, so that the capacitance of the multilayer ceramic capacitor is increased. The insulation near the external electrode 107 is likely to be lowered, and the strength of the margin portion 109 at the boundary portion Bo is lowered. Therefore, the margin portion is increased due to an increase in internal stress due to thermal stress during mounting, electrostriction during voltage application, or the like. 109 has a problem that cracks and delamination easily occur.

  On the other hand, when the margin portion 109 is widened, although the strength of the margin portion 109 can be increased and cracks and delamination due to an increase in internal stress can be prevented, the effective area of the internal electrode layer 103 is reduced. Even if a device is used to eliminate the step of the internal electrode layer 103, there is a problem that the capacitance of the multilayer ceramic capacitor can be kept low.

  Therefore, the present invention can prevent defects such as cracks and delamination generated in the multilayer ceramic capacitor even when the dielectric layer and the internal electrode layer are thinned and highly laminated, and has high capacity and small capacity variation. An object of the present invention is to provide a multilayer ceramic capacitor that can be used.

  The multilayer ceramic capacitor of the present invention is (1) a plurality of dielectric layers and a plurality of internal electrode layers are alternately laminated to form a substantially rectangular parallelepiped capacitor body. An external electrode electrically connected to the internal electrode layer is formed, each layer of the internal electrode layer is connected to one of the external electrodes, and each layer of the adjacent internal electrode layer is on the end surface opposite to each other. In the multilayer ceramic capacitor connected to the external electrode, the width W1 of the connection portion of the internal electrode layer connected to the external electrode, and the width W2 of the tip portion of the internal electrode layer opposite to the connection portion Is a relationship of W1> W2, the width gradually decreases from the connection portion of the internal electrode layer toward the tip portion, and two adjacent internal electrode layers are projected in a direction perpendicular to the internal electrode surface. The above Wherein the contour of the projection of the layers intersect on the side where the width gradually decreases toward the tip portion from said connecting portion. As a result, an ineffective layer having half the number of stacked internal electrode layers is formed around the internal electrode layer except for the intersection.

  According to such a configuration, even when printing is shifted in the width direction, the variation of the effective area can be suppressed smaller than in the case of the rectangular internal electrode, so that a multilayer capacitor with small capacitance variation can be obtained. In addition, at the boundary portion between the margin portion and the internal electrode laminated portion excluding the intersection point, the margin portion is adjacent to an ineffective layer having half the number of laminated internal electrodes. Internal stress due to strain or the like can be suppressed. In addition, since the width of the margin portion becomes the largest at the intersection, it is possible to increase resistance to cracks and delamination due to internal stress.

  In the multilayer ceramic capacitor, (2) when two layers of the adjacent internal electrode layers are projected in a direction perpendicular to the internal electrode layer surface, the respective contours of the projections of the two layers extend from the connection portion to the tip portion. Crossing on the side where the width gradually decreases toward the surface, and having two intersections, and (3) the distance between the side where the width in the one internal electrode layer gradually decreases and the side surface of the capacitor body is the internal electrode A structure that gradually increases from the connecting portion toward the tip portion is desirable.

  In such a structure, (4) when the two adjacent internal electrode layers are projected, the distance between the intersection between the sides where the width gradually decreases from the connection portion toward the tip portion and the side surface of the capacitor body is the intersection point. It is desirable that the distance is larger than the distance between the other portion and the side surface.

  Furthermore, the ratio of the width W1 of the connection portion connected to the external electrode of the internal electrode layer to the width W2 of the facing portion facing the connection portion on the same surface of the internal electrode layer is W1 / W2 ≧ 1. A relationship of 1 is desirable. Thus, by increasing the ratio of the width W1 of the connection portion connected to the external electrode of the internal electrode layer and the width W2 of the facing portion facing the connection portion on the same surface of the internal electrode layer, When the two adjacent internal electrode layers are projected, the distance between the side where the width gradually decreases from the connection portion toward the facing portion and the side surface of the capacitor body is the width of the side margin portion in the vicinity of the intersection Therefore, the strength of the side margin near the intersection can be improved, and cracks due to thermal stress during mounting, electrostriction during voltage application, and the like can be further suppressed.

  In the multilayer ceramic capacitor, it is preferable that the dielectric layer has a thickness of 4 μm or less and the internal electrode layer has a thickness of 1.5 μm or less. The multilayer ceramic capacitor of the present invention can maintain the shape of the internal electrode layer even when the thickness of the dielectric layer and the internal electrode layer is reduced as described above, and further, by changing the width of the internal electrode layer, And high reliability can be obtained.

  Furthermore, in the multilayer ceramic capacitor, it is desirable that the number of layers is 100 or more. In addition, since the multilayer ceramic capacitor of the present invention can alleviate the level difference caused by the internal electrode layers, it can maintain small size, high capacity, and high reliability even when it has 100 layers or more.

(Construction)
The multilayer ceramic capacitor of the present invention will be described in detail. FIG. 1 is a longitudinal sectional view of a multilayer ceramic capacitor. As shown in FIG. 1, the multilayer ceramic capacitor 1 is configured by forming external electrodes 5 at both ends of a capacitor body 3.

  The capacitor body 3 includes a plurality of dielectric layers 7 and a plurality of internal electrode layers 9a and 9b that are alternately stacked. One end of each of the internal electrode layers 9a and 9b is led to one of both end surfaces in the longitudinal direction of the capacitor body 3 and connected to one external electrode 5, and the other end is connected to the other external electrode 5 so as to keep insulation. It is separated from the end face of the main body 3 by a predetermined end margin 11.

  The internal electrode layers 9a and 9b that are alternately stacked via the dielectric layers 7 are formed at the end portion of the effective portion 13 and the effective portion 13 that overlap in the stacking direction, and are led to the end surface of the capacitor body 3. The ineffective portion 15 is configured.

  FIG. 2 is a cross-sectional view taken along line AA in FIG. 1, that is, a cross-sectional view. As shown in FIG. 2, each ridge line portion 10 of the capacitor body 3 is rounded as desired.

  3 is a cross-sectional view taken along the line BB of FIG. As shown in FIG. 3, the internal electrode layer 9a has a width W gradually from an end e, which is a connection portion connected to the external electrode 5, toward the longitudinal direction end f of the internal electrode layer 9a (9b is not shown). Is gradually decreasing. On the other hand, the width gradually increases from the end e, which is a connecting portion connected to the external electrode 5, between the long side of the dielectric layer 7 and the internal electrode layers 9a, 9b toward the longitudinal direction end f of the internal electrodes 9a, 9b. A side margin portion 17 where Ws gradually increases is formed. As a result, an ineffective portion is formed around the internal electrode layers 9a and 9b except for the intersection point, in which the number of stacked internal electrode layers 9a and 9b is half.

  That is, according to the present invention, the width W1 of the connection portion connected to the external electrode 5 of the internal electrode layers 9a and 9b and the width W2 of the facing portion facing the connection portion on the same surface of the internal electrode layers 9a and 9b. And W1> W2, and the width W gradually decreases from the connection portion toward the tip portion, and two adjacent internal electrode layers 9a and 9b are connected to the internal electrode layers 9a and 9b. When projecting in a direction perpendicular to the plane, it is important that the contours of the projections of the two layers intersect on the side 10 where the width W gradually decreases from the connecting portion toward the tip portion.

  In the present invention, it is desirable to have the intersection X at two locations. In other words, the distance Ws between the side 10 where the width W of the internal electrode layers 9a and 9b of one layer gradually decreases and the side surface of the capacitor body 3 However, it is desirable that it gradually increases from the connection portion with the external electrode 5 toward the tip portion.

  Furthermore, when the adjacent two internal electrode layers 9a and 9b are projected, the distance Ws between the intersection of the sides where the width W gradually decreases from the connection portion toward the tip portion and the side surface of the capacitor body 3 is It is desirable that the distance is greater than the distance between the portion other than the intersection point X and the side surface.

  In the multilayer ceramic capacitor of the present invention, the width W1 of the connection portion connected to the external electrode 5 of the internal electrode layers 9a and 9b, and the tip portion facing the connection portion on the same surface of the internal electrode layer. When the width W2 is set, W1 / W2 ≧ 1.1 is desirable, and in particular, the strength of the side margin portion 17 is increased, and a short circuit with the external electrode 5 is prevented. The ratio of W1 / W2 is as follows because the internal stress generated at each boundary portion of the side margin portion 17, the internal electrode effective portion 18 and the ineffective portion 19 is further suppressed, and the thermal shock resistance and pressure resistance are improved. 1.15 to 1.25 is more desirable.

  In the multilayer ceramic capacitor of the present invention, even if the ridge line portion 10 of the capacitor body 3 is chamfered, the internal electrode layers 9a, 9b are prevented from being exposed in the ridge line portion 10 because the internal electrode layers 9a, 9b are prevented from being exposed. It is desirable to provide a predetermined side margin portion 17 on the outer edge side, and for this purpose, the width W1 of the internal electrode end portion e having the maximum width of the effective portion 18 constituting the internal electrode layers 9a and 9b. It is desirable that the ratio of the width Wd of the dielectric layer 7 to 1.02 to 1.27.

  As described above, the shape of the internal electrode layers 9a and 9b constituting the multilayer ceramic capacitor 1 of the present invention is from the longitudinal end e where the internal electrode layers 9a and 9b are connected to the external electrode 5 to the opposing portion f. As long as the width W gradually decreases, the space between them may be curved. In particular, in order to increase the effective area of the internal electrode layers 9a and 9b, it is desirable that the distance between e and f be formed to be convexly curved outward.

  Further, in the multilayer ceramic capacitor 1 of the present invention, the thickness of the dielectric layer 7 is preferably 4 μm or less, and in particular, from 1 to 3 μm for increasing the capacitance and insulation of the multilayer ceramic capacitor. Is more desirable.

  Furthermore, the thickness of the internal electrode layers 9a and 9b is desirably 1.5 μm or less, and in the multilayering, in order to secure the capacitance while reducing the thickness and cost of the laminated body, 0.5 to More preferably, it is 1.5 μm.

  In the multilayer ceramic capacitor 1 of the present invention, the number of layers is preferably 100 layers or more, and more preferably 200 layers or more in order to improve the capacitance as the high-capacity type multilayer ceramic capacitor 1.

  On the other hand, the internal electrode layers 9a and 9b are formed with substantially the same width from the vicinity of one end surface in the direction of the external electrode 5 formed oppositely (hereinafter referred to as the longitudinal direction) to the other end surface. In the multilayer ceramic capacitor that has been manufactured, when the internal electrode pattern formed on the green sheet at the time of manufacture is misaligned, the capacitance varies greatly, and delamination and cracks are likely to occur.

(Production method)
The multilayer ceramic capacitor 1 of the present invention is manufactured through a process as shown in FIG. 4, for example. As shown in FIG. 4 (a), first, water and a dispersant are added to the ceramic powder to be the dielectric layer 7, mixed and ground by a ball mill, an organic binder is added thereto, and the resulting ceramic slurry is used as a carrier. A ceramic green sheet 23 is formed by coating on the film 21. The thickness of the ceramic green sheet 23 is 5 μm or less. In particular, it is more preferably 2 to 4 μm for improving the capacitance of the multilayer ceramic capacitor 1 and ensuring insulation.

  As the ceramic slurry prepared here, for example, a mixture of ceramic powder, an organic binder made of polyvinyl butyral resin, and toluene and ethyl alcohol as a solvent for dissolving the organic binder is suitably used. As the other binder, an acrylic resin can be used in terms of dispersibility with ceramic powder and a solvent, strength of the ceramic green sheet 23, and binder removal.

As the ceramic powder, specifically, ceramic powder such as BaTiO ₃ —MnO—MgO—Y ₂ O ₃ can be used because it has reduction resistance. Moreover, it is desirable to add glass powder for the reason of improving the sinterability of the porcelain.

  Next, as shown in FIG. 4B, a plurality of rectangular internal electrode patterns 25 are formed on the surface of the ceramic green sheet 23 by screen printing using a metal-containing paste. Next, as shown in FIG. 4 (c), the ceramic paste is formed between the patterns in the longitudinal direction of the rectangular internal electrode pattern 25 formed on the surface of the ceramic green sheet 23 (that is, in the direction of the end margin 11). Is printed to form a rectangular ceramic pattern 29 together with the internal electrode pattern 25. It is desirable that the internal electrode pattern 25 and the ceramic pattern 29 thus formed have substantially the same thickness and are formed so as to substantially eliminate the step of the internal electrode pattern 25.

  FIG. 5 is a plan view showing a state in which the internal electrode pattern 25 and the ceramic pattern 29 are formed on the ceramic green sheet 23. The shape of the internal electrode pattern 25 formed here is a state in which the ceramic pattern 29 is formed on the end of the internal electrode pattern 25 in the longitudinal direction.

  Moreover, in the manufacturing method of this invention, the hexagonal internal electrode pattern 25 as shown in FIG. 6 may be used so that it may become the internal electrode layer 9a of the trapezoidal shape formed after baking. In this case, it is desirable to form a ceramic pattern 29 around the hexagonal internal electrode pattern 25.

  The metal-containing paste used in the present invention contains a conductor powder, a ceramic powder, an organic binder and an organic solvent, and has an appropriate viscosity for forming a thin and uniform internal electrode pattern 25 with high pattern accuracy. Preparation is performed.

  In addition, the average particle size of the conductor powder and ceramic powder contained in the metal-containing paste is such that the internal electrode pattern 25 and the internal electrode layers 9a and 9b formed by firing the metal electrode pattern 25 are dense and a metal film having a smooth surface is formed. For this reason, it is desirable to be in the range of 0.15 to 0.5 μm.

  In addition, as the conductive powder contained in the metal-containing paste, a base metal such as Ni or Cu is used, and Ni is used because the metal firing temperature matches the firing temperature of a general insulator and the cost is low. desirable.

  Further, the metal-containing paste contains a conductor powder or ceramic powder, an organic solvent composed of a mixture of an aliphatic hydrocarbon and a higher alcohol, and an organic binder composed of ethyl cellulose soluble in the organic solvent. It is easy to control the printability of the metal-containing paste, prevents discontinuity of the internal electrode pattern 25 to improve homogeneity, and promotes the elongation of the internal electrode pattern 25 during pressure heating. The binder preferably contains 1 to 10 parts by mass and the amount of organic solvent is 80 to 120 parts by mass with respect to 100 parts by mass of the mixture of the conductor powder and the ceramic powder.

  Further, the viscosity characteristics of the metal-containing paste composed of such conductor powder and ceramic powder have a yield value in order to maintain the shape retention of the internal electrode pattern 25 after printing, and also in printing at high shear The thixotropic property is desirable for the reason of suppressing the spread of the internal electrode pattern 25. Further, the viscosity of the internal electrode paste can be controlled by adding the conductor powder, the organic binder, the organic solvent, or a dispersant in the paste.

  Further, the thickness of the internal electrode pattern 25 is desirably 2 μm or less, and in particular, 0.5 to 1.5 μm in order to ensure the capacitance while reducing the thickness and cost of the laminated body in multilayering. It is desirable.

  The ceramic paste used here can be applied with the same or different composition as the metal-containing paste in which the internal electrode pattern 25 is formed, and in particular, the same conditions as the printing of the conductor paste can be adopted and the ceramic green The ceramic paste is preferably composed of a binder having the same composition as that of the metal-containing paste because the volatilization rates of the binder from the surface of the sheet 23 are matched.

  Next, the ceramic green sheet 23 formed by shifting the internal electrode pattern 25 by a half pattern in the longitudinal direction using the mask pattern having the same shape as the internal electrode pattern 25 and the ceramic pattern 29 formed as described above is shown in FIG. As shown in FIG. 4, a predetermined number of layers are laminated, and a ceramic green sheet 23 that is not printed on the uppermost surface is stacked to form a temporary laminate 31, and then the temporary laminate 31 is heated and pressed to form a laminate 35. Is formed. By this pressurization and heating, a pattern that forms the shape of the internal electrode layers 9a and 9b of the present invention can be formed. That is, in the present invention, the ceramic pattern 29 is formed between the internal electrode patterns 25 on the side connected to the external electrode 5 of the internal electrode patterns 9 a and 9 b, and the internal electrode pattern 25 is connected in the direction connected to the external electrode 5. A plurality of layers are laminated so that the ceramic patterns 29 are overlapped at the center to form a temporary laminate 31 in which a gap is formed on the side of the internal electrode pattern 25, and pressure heating is performed to perform internal heating. The pattern 25 can be deformed, whereby the temporary laminate 31 can be pressurized and heated to eliminate the gap, and the internal electrode pattern 25 can be deformed. That is, in the present invention, the ceramic pattern 29 is formed only on the connection end side with the external electrode 5 that is the end portion of the internal electrode pattern 25 in the long side direction. Thereby, only the side edge can be deformed and expanded outward while the end in the longitudinal direction of the internal electrode pattern is constrained.

  As conditions for pressurization and heating, the temperature is more preferably 50 to 100 ° C., the pressure is 40 to 150 MPa, and the time is more preferably 1 to 20 minutes. Here, the size of the internal electrode pattern 25 after pressurization and heating at the time of lamination is such that the ratio of the width W1 of the internal electrode layers 9a and 9b to the width Wd of the dielectric layer 7 formed after firing is 1.02. The ratio of the width W1 of the portion connected to the external electrodes constituting the internal electrode layers 9a and 9b and the width W2 of the facing portion is 1.1 to 1.25 so as to be 1.27. It is desirable to adjust so that it becomes.

  Next, the laminated body 35 is cut along the cutting line h, that is, in the direction perpendicular to the longitudinal direction of the internal electrode pattern 25 (see FIG. 4). (E) of FIG. 4 and (f) of FIG. 4 are cut parallel to the longitudinal direction of the internal electrode pattern 25 to form the capacitor body molded body so that the end of the internal electrode pattern 25 is exposed. . On the other hand, in the widest portion of the internal electrode pattern 25, the internal electrode pattern 25 is formed on the side margin portion 17 side without being exposed.

  Next, the capacitor body molded body is fired under a predetermined atmosphere at a temperature condition to form the capacitor body 3. In some cases, the ridge line portion 10 of the capacitor body 3 is chamfered and the capacitor body 3 Barrel polishing may be performed to expose the internal electrode layers 9a and 9b exposed from the opposite end faces.

  Next, an external electrode paste is applied to the opposite ends of the capacitor body 3 and baked to form the external electrodes 5. A plating film is formed on the surface of the external electrode 5 in order to improve mountability.

    In the multilayer ceramic capacitor 1 formed as described above, the internal electrode layers 9a and 9b have a wide portion e in the portion connected to the external electrode 5, and the opposing f is narrow, so that the internal electrode layers 9a and 9b An ineffective layer in which the number of stacked electrode layers is half is formed except for the intersection X on the side 10 where the outline of the projection in the vertical direction of the two layers is on the side 10 where the width W gradually decreases from the connection portion toward the facing portion, At the boundary between the margin portion 17 excluding the intersection X and the laminated portion of the internal electrode layers 9a and 9b, the margin portion 17 is adjacent to an ineffective layer in which the number of laminated internal electrode layers 9a and 9b is half. The internal stress due to the thermal stress and the electrostriction during voltage application can be suppressed, and the width of the margin portion 17 is the largest at the intersection, so that it is resistant to cracks and delamination due to the internal stress. The largest is secured.

  Therefore, in the portion excluding the intersection point, the internal stress due to the firing shrinkage difference and the thermal expansion coefficient difference between the ceramic material serving as the dielectric layer 7 and the metal material serving as the internal electrode layers 9a and 9b is reduced, and the margin portion is formed at the intersection point. Can be sufficiently secured, so that delamination and cracks can be prevented.

  The method for producing a multilayer ceramic capacitor of the present invention includes a step of forming a ceramic green sheet, a step of printing a metal-containing paste on the main surface of the ceramic green sheet to form a plurality of internal electrode patterns, and the internal electrode pattern A ceramic paste containing at least ceramic powder is applied between the internal electrode patterns on the side connected to the external electrodes in contact with the internal electrode patterns, and a gap is formed between the internal electrode patterns. A step of forming a ceramic pattern, and the ceramic pattern on which the internal electrode pattern and the ceramic green sheet on which the ceramic pattern is formed are superimposed on a center in a direction in which the internal electrode pattern is connected to an external electrode. The internal electrode pattern and the ceramic A step of forming a temporary laminate having a gap between the temporary pattern, a step of pressurizing and heating the temporary laminate to eliminate the gap, and a step of deforming the internal electrode pattern, and the laminate A step of forming a capacitor body molded body by cutting substantially the center of the ceramic pattern formed therein and between the rows of the internal electrode patterns, and a step of firing the capacitor body molded body. .

  That is, the method for producing a multilayer ceramic capacitor according to the present invention includes firstly forming a ceramic pattern between the internal electrode patterns on the side connected to the external electrode of the internal electrode pattern so as to be in contact with the internal electrode pattern, 2, a plurality of green sheets having such a pattern are stacked so that the ceramic pattern is superimposed in the center in the direction of connection with the external electrode of the internal electrode pattern, and third, the internal electrode pattern and After pressing and heating the temporary laminate having a gap with the ceramic pattern so as to deform the internal electrode pattern, between the approximate center of the ceramic pattern formed in the laminate and the rows of the internal electrode patterns Cutting. For this reason, in this manufacturing method, in particular, the side of the internal electrode pattern in which the ceramic pattern is not formed utilizes the extension toward the outer side during pressure heating, so that the central portion in the longitudinal direction of the internal electrode pattern after firing is The internal electrode layer is gradually reduced from the end connected to the external electrode toward the end facing in the longitudinal direction, so that two adjacent internal electrode layers are perpendicular to the internal electrode surface. When projected, the contours of the projections of the two layers intersect on the side where the width gradually decreases from the connecting portion toward the opposing portion. As a result, an ineffective layer having half the number of stacked internal electrode layers is formed around the internal electrode layer except for the intersection. As in the present invention, a ceramic pattern is formed so as to be in contact with the internal electrode pattern between the internal electrode patterns on the side connected to the external electrode of the internal electrode pattern, that is, the longitudinal direction side of the internal electrode pattern By forming the ceramic pattern only on the side, the ratio W1 / W2 of the width of the connection portion of the internal electrode layer to the width of the tip portion is compared with the case where the ceramic pattern is formed all around the side of the internal electrode pattern. 1.15 to 1.25.

  Then, at the boundary portion between the margin portion and the internal electrode laminated portion excluding the intersection point, the margin portion is adjacent to the ineffective layer having the half number of laminated internal electrodes. Internal stress due to strain or the like can be suppressed. Further, since the width of the margin portion is the largest at the intersection, it is possible to easily form a multilayer ceramic capacitor having high resistance to cracks and delamination due to internal stress.

  The multilayer ceramic capacitor of the present invention was produced as follows. The ceramic green sheet is prepared by adding water and a dispersant to a ceramic powder and glass powder in which 100 moles of barium titanate, 1 mole of yttrium oxide, 2 moles of magnesium oxide and 0.1 mole of manganese oxide are mixed. A ceramic slurry was prepared by adding a polyvinyl butyral resin and a solvent in which toluene and ethyl alcohol were mixed to form a ceramic slurry, and a film was formed on a carrier film using a die coater method. The average thickness of this ceramic green sheet was 4 μm.

  The metal-containing paste for forming the internal electrode pattern was prepared by kneading nickel powder, an organic binder made of ethyl cellulose, and an organic solvent made of a mixture of an aliphatic hydrocarbon and a higher alcohol with a three roll.

  The ceramic paste for the ceramic pattern was prepared by further pulverizing a part of the ceramic slurry and using the same organic components as the metal-containing paste.

  Next, on the main surface of the obtained ceramic green sheet, the above-described metal-containing paste was printed in a rectangular mask pattern shape using a screen printing apparatus and dried to form a plurality of internal electrode patterns. This average thickness was 1.2 μm.

  Further, a ceramic pattern was formed in the gap between the end portions in the longitudinal direction of the internal electrode pattern formed on the ceramic green sheet using the same screen printing apparatus as when the internal electrode pattern was formed. In this case, the ceramic pattern and the internal electrode pattern are substantially flush with each other.

  Next, 182 layers of ceramic green sheets with internal electrode patterns and ceramic patterns formed on the surface are laminated, and 20 ceramic green sheets without internal electrode patterns and ceramic patterns are laminated on the top and bottom. And the 1st pressurization press was performed and the temporary laminated body was formed.

  The temporary laminate produced under these conditions was in a state where the ceramic green sheet was not completely adhered, and a gap was formed between the ceramic pattern on the end margin side of the internal electrode pattern.

  Next, this temporary laminate is subjected to a second pressure heating under conditions of a temperature of 80 ° C., a pressure of 80 MPa, and a time of 2 to 10 minutes to form an internal electrode pattern and a ceramic pattern, and the upper and lower sides thereof. The internal electrode pattern and the ceramic green sheet on which the ceramic pattern was not formed were completely adhered to obtain a laminate.

  The multilayer body forming the multilayer ceramic capacitor of the present invention forms a ceramic pattern together with the internal electrode pattern on one main surface of the ceramic green sheet on which the internal electrode pattern is formed. Although the predetermined part of the electrode pattern spreads in the horizontal direction, the deformation of the internal electrode pattern in the longitudinal direction and the stacking direction was suppressed. Note that the ratio of the width of the ceramic green sheet in the area to be the dielectric layer to the maximum width of the internal electrode pattern and the maximum width and minimum width of the internal electrode pattern were controlled by adjusting the time during pressure heating.

  Next, the multilayer body is cut by cutting substantially the center of the ceramic pattern formed in the multilayer body in a direction perpendicular to the longitudinal direction of the internal electrode pattern and parallel to the longitudinal direction of the internal electrode pattern. A body compact was formed.

Next, this capacitor body molded body was deburied in air at 300 ° C., and then fired at an oxygen partial pressure of 1 × 10 ⁻⁶ Pa and a maximum temperature of 1260 ° C. for 2 hours to obtain a capacitor body.

  Next, after chamfering the ridge line portion of the capacitor body using a barrel polishing machine, an external electrode paste is applied to the end surface of the capacitor body where the internal electrode layer is exposed, and baking is performed at 800 ° C. to form an external electrode. A multilayer ceramic capacitor was obtained. The average thickness of the dielectric layers constituting the multilayer ceramic capacitor thus obtained is 2.5 μm, the number of stacked layers is 182 layers, the outer dimensions are 1.6 mm × 0.8 mm × 0.8 mm, and other internal electrode layers and The width ratio for the dielectric layer is shown in Table 1.

  (Comparative Example) On the other hand, as a comparative example, a sample in which the internal electrode pattern formed on the ceramic green sheet was formed in a rectangular shape and the ceramic pattern was formed all around the internal electrode pattern was prepared. The width of the internal electrode layer of this sample was substantially the same at any position of the width of the internal electrode layer in the direction of the external electrode.

  (Evaluation method) About 100 of the multilayer ceramic capacitors obtained as described above, each of them was polished in parallel with the internal electrode layer, and the width of the dielectric layer and the external electrode of the internal electrode layer were measured using a measuring microscope. The dimension of the connecting part with the part and the opposing part was measured.

  Next, the outer surface was observed for cracks and delamination using a stereomicroscope, the appearance was evaluated, and the appearance defect rate was evaluated.

  Further, 100 pieces of each were polished until the internal electrode layer was exposed, and the occurrence rate of defects such as internal cracks and delamination was examined. This was defined as an internal defect defect rate.

  Next, the LCR meter 4284A was used for the same number, and the capacitance at a temperature of 25 ° C. was measured at a frequency of 1.0 kHz and an input signal level of 0.5 Vrms.

  Next, 200 pieces of each were immersed in a 300 ° C. solder bath for 1 second to give a thermal shock, and then the appearance was inspected to evaluate the defect rate by the appearance inspection after immersion in the solder bath. This was defined as the thermal shock defect rate.

Next, a pressure resistance test was performed. The withstand voltage test is a test in which the voltage is increased until the multilayer ceramic capacitor is short-circuited, and the dielectric breakdown voltage at this time was examined. In addition, 50 tests each of which were applied with a constant voltage (110V, 115V) and allowed to stand for 3 minutes were performed. Evaluation in the case of applying a constant voltage is evaluation of appearance and internal defects. Then, after the pressure resistance test, polishing was performed until the internal electrode layer was exposed, and the defect rate of internal defects was examined. This was taken as the average value of breakdown voltage and the breakdown voltage failure rate. Table 1 shows the appearance defect rate, internal defect defect rate, thermal shock defect rate, dielectric breakdown voltage, and breakdown voltage defect rate.

  As is apparent from the results in Table 1, the sample Nos. Made up of the internal electrode layers having different widths in the longitudinal direction. 1 to 9, the standard deviation of the capacitance divided by the average value is as small as 2% or less, there is no appearance defect rate, the internal defect defect rate is 2% or less, and the thermal shock defect rate is 2% or less. When the dielectric breakdown voltage was 129 V or more and the withstand voltage failure rate was 110 V, it was 0% and 1 V or less when it was 115 V, and a multilayer ceramic capacitor having excellent characteristics was obtained.

  In particular, Sample No. in which the ratio of the minimum width to the maximum width of the internal electrode layer is in the range of 1.15 to 1.25. In 3 to 9, the thermal shock defect rate was 0% or less.

  On the other hand, sample No. 1 in which the width in the longitudinal direction of the internal electrode layer was constant. In No. 10, the capacitance was as high as 2.4 μF, but the defect rates such as the appearance defect rate, internal defect defect rate, thermal shock defect rate, dielectric breakdown voltage, and breakdown voltage defect rate were extremely large.

It is a longitudinal cross-sectional view of the multilayer ceramic capacitor of this invention. It is AA sectional drawing of FIG. It is BB sectional drawing of FIG. It is process drawing for manufacturing the multilayer ceramic capacitor of this invention. It is a top view which shows the state by which the internal electrode pattern was formed on the ceramic green sheet and the ceramic pattern was formed in the edge part of the longitudinal direction. It is a top view which shows the state in which the hexagonal internal electrode pattern was formed on the ceramic green sheet, and the ceramic pattern was formed in the circumference | surroundings. (A) is sectional drawing of the conventional multilayer ceramic capacitor, (b) is CC sectional drawing of (a). It is process drawing for manufacturing the conventional multilayer ceramic capacitor.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Multilayer ceramic capacitor 3 Capacitor main body 5 External electrode 7 Dielectric layer 9a, 9b Internal electrode layer 10 Side 13 Effective part 15 Ineffective part 23 Ceramic green sheet 25 Internal electrode pattern 29 Ceramic pattern 31 Temporary laminated body 35 Laminated body W1 Connection part Width W2 width X of opposite part

Claims (8)

A plurality of dielectric layers and a plurality of internal electrode layers are alternately stacked to form a substantially rectangular parallelepiped capacitor body, and externally connected to the internal electrode layers on two opposing end surfaces of the capacitor body A multilayer ceramic in which an electrode is formed, each layer of the internal electrode layer is connected to one of the external electrodes, and each layer of the adjacent internal electrode layer is connected to the external electrode at the end surface opposite to each other In the capacitor, the width W1 of the connection portion connected to the external electrode of the internal electrode layer and the width W2 of the tip portion on the opposite side of the connection portion of the internal electrode layer are in a relationship of W1> W2. When the width of the internal electrode layer gradually decreases from the connection portion toward the tip portion, and two adjacent internal electrode layers are projected in a direction perpendicular to the internal electrode surface, the contour of the projection diagram of the two layers is From connection to tip Multilayer ceramic capacitor, wherein a cross on the side where the width gradually decreases toward the. When two adjacent internal electrode layers are projected in a direction perpendicular to the internal electrode layer surface, the outlines of the projections of the two layers intersect on the side where the width gradually decreases from the connecting portion toward the tip portion. 2. The multilayer ceramic capacitor according to claim 1, wherein the crossing point is provided at two places. 3. The multilayer ceramic according to claim 1, wherein a distance between a side where the width of one internal electrode layer gradually decreases and a side surface of the capacitor body gradually increases from a connection portion of the internal electrode toward a tip portion. Capacitor. When the two adjacent internal electrode layers are projected and viewed, the distance between the side where the width gradually decreases from the connection part toward the tip part and the side surface of the capacitor main body is the distance between the part other than the intersection and the side surface. The multilayer ceramic capacitor according to claim 1, wherein the multilayer ceramic capacitor is larger than a distance between the two. 5. The multilayer ceramic capacitor according to claim 1, wherein a side connecting the tip portion to the connection portion of the single internal electrode layer is curved outward. 6. In each of the internal electrode layers, the width W1 of the connection portion of the internal electrode layer with the external electrode and the width W2 of the tip portion on the opposite side of the connection portion of the internal electrode layer are W1 / W2 ≧ 1. The multilayer ceramic capacitor according to claim 1, wherein 1 is satisfied. The multilayer ceramic capacitor according to claim 1, wherein the dielectric layer has a thickness of 4 μm or less and the internal electrode layer has a thickness of 1.5 μm or less. The multilayer ceramic capacitor according to claim 1, wherein the number of stacked layers is 100 or more.

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