JP2006033664A - Amplifier employing variable impedance element and radio communications apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an amplifier of low power consumption with variable characteristics configured using a variable inductor capable of changing inductance, without increasing the current consumption, and to provide a radio communications apparatus using the same. <P>SOLUTION: An amplifier comprises an amplification element T1 for amplifying an AC signal and variable inductors 41, 43 included in at least one of an input part and an output part. Each of the variable inductors 41, 43 includes a tapped inductor comprising a tap in at least one spot between one terminal and another terminal, and a variable capacitor which is connected between the tap and the other terminal via a fixed capacitor, and of which ON/OFF is controlled by an application voltage. In the variable inductor, inductance between the one terminal and the other terminal is changed in accordance with ON/OFF of the variable capacitor. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an amplifier suitable for application to a small-sized and low-power-consumption wireless communication device, and more particularly to an amplifier that is realized on an integrated circuit and has variable characteristics.

  Conventionally, a wireless communication amplifier has been developed as an indispensable component for a wireless communication device. Currently, the applications that lead amplifier development are GSM (Global System for Mobile Communications), PDC (Personal Digital Cellular), PHS (Personal Handy-phone System), PCS (Personal Communication Services) and other wireless communication devices for mobile phones. Wireless communication devices constituting wireless LAN (Local Area Network) conforming to 802.11a, 802.11b, and 802.11g, which are wireless communication specifications defined in IEEE (Institute of Electrical and Electronics Engineers) standards, are mainstream. It is. These wireless communication devices are always required to be low in price, downsized, and low in power consumption for long-time operation. One method for meeting these requirements is to mount a wireless communication circuit on a smaller number of semiconductor integrated circuits (hereinafter referred to as “ICs”). In particular, since the substrate material is low-cost and high yield is obtained due to the high maturity of the semiconductor process, many attempts have been made to realize a wireless communication circuit using a silicon IC. Small wireless communication devices have been provided.

  As a configuration example of an amplifier used in such a wireless communication device, Non-Patent Document 1 describes a configuration in which an amplifier corresponding to each operating frequency of a plurality of wireless communication specifications is provided on an IC and switched by a switch or the like. Further, Patent Document 1 discloses an example of an amplifier in which a matching circuit constituting an amplifier is realized by an inductor circuit or a capacitance circuit whose characteristics are variable, and the characteristics of the matching circuit can be adjusted according to the operating frequencies of a plurality of wireless communication specifications. Is disclosed. Further, Patent Document 2 discloses an example of an inductor in which a plurality of intermediate leader lines are provided in the middle of the distributed constant circuit, and an inductance value is made variable by selecting the intermediate leader line according to an input frequency. .

1996 IEICE Communication Society B-360 “Local accuracy of Software Radio oscillation frequency” JP-A-11-289229 JP-A-6-276003

  In the future development, in order to further reduce the price and downsizing, and to perform optimal wireless communication according to the location and purpose of the user, a plurality of mobile phones, wireless LANs, etc. Realization of a wireless communication device that is compatible with wireless communication specifications is expected.

  However, the conventional amplifier for wireless communication on the IC has a problem that the same amplifier cannot be used because the operating frequency and gain characteristics are different in various wireless communication specifications. Conversely, even if a wideband amplifier that covers the operating frequencies of a plurality of wireless communication specifications that are focused on is configured, the gain is reduced compared to a narrowband amplifier that matches each operating frequency. There was a problem that noise generation became difficult.

  A configuration in which a plurality of amplifiers are provided on an IC and the switches are switched by a switch or the like is one solution to the problem, but has a disadvantage that the circuit scale increases.

  Further, in the amplifier described in Patent Document 1 in which the characteristics of the matching circuit can be adjusted, it is inevitable that the power consumption increases. This will be described below. FIG. 4 of Patent Document 1 shows a circuit configuration of an inductor with variable characteristics. In this variable inductor, an inductor element 503 and bias current cutting capacitors 508 and 514 are connected in series between an input terminal 501 and an output terminal 502, and a choke coil 504 is connected to a point U between the capacitor 508 and the capacitor 514. It is configured by connecting. A line drawn in parallel from the control circuit 512 is connected to one end of three bias current cutting capacitors 505 506 507 in FIG. 4, and the other end of these capacitors 505 506 507 is the inductor element 503. Connected to different parts of the middle. Further, lines branched from the middle of the lines connected from the control circuit 512 to the bias current cutting capacitors 505, 506, 507 are connected to the anode side of the PIN diodes 509, 510, 511, and the cathode side of the 509, 510, 511 Is connected to a point V between the connection point U and the bias cut capacitor 508. In this variable inductor configuration, when a certain PIN diode is selected and turned on, a low resistance is generated between its terminals, and a contact in the middle of the inductor is bypassed and connected to the terminal V. Thereby, the effective inductance changes.

  However, since an ON current of several mA always flows through the selected PIN diode, when the amplifier is operated with the inductance maintained at a desired value, the current consumption corresponding to the ON current increases. For example, in the current wireless communication circuit for wireless LAN, the first-stage low-noise amplifier is generally assigned a current consumption of about 10 mA, but the ON current of the PIN diode is about 3 mA. Only to make it variable, 30% of the target current consumption is consumed. Therefore, the power consumption of the amplifier must be increased. In practice, a plurality of variable inductors may be used. In this case, the current consumption of the variable inductors further increases.

  The present invention has been made to overcome the above-described conventional problems, and provides a low power amplifier configured using a variable inductor capable of changing the inductance without causing an increase in current consumption. Another object is to provide a wireless communication apparatus using the same.

  In order to achieve the above object, an amplifier according to the present invention includes an amplifying element for amplifying an AC signal, and a variable inductor included in at least one of an input unit and an output unit of the amplifier, and the variable inductor has one terminal. And an inductor with a tap provided at least at one location between the other terminal and the capacitor on and off by a voltage applied to the tap and the other terminal via a fixed capacitor. The variable inductor is characterized in that the inductance changes between one terminal and the other terminal in response to the capacitance on / off of the variable capacitance.

  With the above configuration, since the change in inductance is made by the voltage applied to the variable capacitor without depending on the current, there is no increase in current consumption and the power consumption of the amplifier is reduced.

  In order to achieve the above object, another amplifier of the present invention includes a first amplifier element that amplifies a positive polarity signal of a differential input signal, and a second amplifier element that amplifies a reverse polarity signal of the differential input signal. Each of the first and second amplifier elements includes an amplifying element that amplifies an AC signal, and a variable inductor included in at least one of an input part and an output part of the amplifier element. The variable inductor includes a tapped inductor provided with a tap at least at one place between one terminal and the other terminal, and an application connected between the tap and the other terminal via a fixed capacitor. The variable inductor is configured to include a variable capacitor whose capacity is turned on and off according to the voltage, and the inductance of the variable inductor changes between one terminal and the other terminal in accordance with the capacitance on / off of the variable capacitor. And wherein the door.

  Even in the case where the amplifier amplifies the differential signal, with the above configuration, since the change in inductance is made by the voltage applied to the variable capacitor without depending on the current, there is no increase in current consumption, and the differential amplifier Low power consumption.

  In order to achieve the above object, a wireless communication apparatus of the present invention includes a first amplifier circuit that amplifies a received signal from an antenna, a mixer that performs frequency conversion of an output signal of the first amplifier circuit, and an output signal of the mixer And a second amplifier circuit that inputs an output signal of the second amplifier circuit and outputs a baseband signal, and the first amplifier circuit includes an amplifier, An amplifying element for amplifying an AC signal, and a variable inductor included in at least one of an input part and an output part of the amplifier, the variable inductor being tapped at least at one place between one terminal and the other terminal And a variable capacitor that is connected between the tap and the other terminal via a fixed capacitor and whose capacitance is controlled to be turned on and off by an applied voltage. , Variable inductor, characterized capacitance on the variable capacitor, to change the inductance between the one terminal and the other terminal according to the capacity off.

  With the above configuration, since the change in inductance is made by the voltage applied to the variable capacitor without depending on the current, there is no increase in current consumption, and the power consumption of the wireless communication apparatus is reduced.

  According to the present invention, since the change of the inductance is made by the voltage applied to the variable capacitor without depending on the current, the low inductance configured using the variable inductor that can change the inductance without causing an increase in the current consumption. It is expected to realize a power consumption amplifier or a wireless communication apparatus using the amplifier.

  Hereinafter, an amplifier and a wireless communication apparatus using a variable impedance element according to the present invention will be described in more detail with reference to the embodiments shown in the drawings.

  FIG. 1 shows a first embodiment of the present invention. The amplifier according to the present embodiment is used to amplify an AC signal applied to the input terminal 1 with a gain determined by design and supply the amplified signal to a subsequent communication circuit connected to the output terminal 2. The amplifier includes an input matching circuit 11 provided at an input portion thereof, a bipolar transistor T1 that is an amplifying element, a base bias resistor 61 thereof, a variable inductor 42 that is an emitter feedback circuit of the transistor T1, and an output provided at an output portion of the amplifier. The matching circuit 12 is included.

  In the input matching circuit 11 provided in the input unit, variable capacitors 21 and 22 are connected in series in the signal path, and the variable inductor 41 is connected from the connection point of the capacitor 21 and the capacitor 22 to the terminal 3 for applying a DC voltage. Has been. The output matching circuit 12 provided in the output unit includes a variable inductor 43, a resistor 61 for improving the stabilization coefficient of the entire amplifier circuit, and a fixed value capacitor 31.

  A bias voltage is applied to the terminal 5 of the base bias resistor from the mode control circuit (MEM) 13 of the amplifier. The mode control circuit 13 outputs a control voltage for changing the element value of each variable element from the terminals 121, 122, 141, and 143. In the amplifier, the bias current of the transistor T1 determined by the characteristics of the matching circuits 11 and 12 suitable for each wireless communication specification, the impedance of the feedback circuit 42, and the base bias voltage can be changed depending on the mode. The control content of whether to perform such control is stored in the memory circuit (MEM) 14.

  Regarding the variable inductors 41, 42 and 43, the effective inductor can be made variable with the configuration shown in FIG. The configuration of the variable inductor shown in FIG. 2 shows a case where one of the two terminals of the inductor is grounded in an AC manner, and an AC signal is applied to the terminal N1 and a DC voltage is applied to the terminal N2. Similarly, a DC voltage is applied to the terminal N3. Inductors 71 to 74 are inductors between taps when one micro lip line type inductor is divided by three taps A, B and C at arbitrary positions. Each tap is connected to the output of the element value control circuit (ECT) 15 via the DC blocking capacitors 81 to 83, and further connected to the terminal N3 via the variable capacitors 84 to 86.

  In the variable inductor having the above configuration, the voltage applied between the terminals of the variable capacitors 84 to 86 varies depending on the output voltage of the element value control circuit 15, and each of the variable capacitors 84 to 86 has two states, that is, capacitance on and capacitance off. To change. Thereby, the length of the microstrip line is changed, and the inductance can be made variable. In addition, since no current flows through the variable capacitors 84 to 86 and only the voltage between the terminals changes, there is no power consumption in the variable capacitors 84 to 86.

  Here, an example is shown in which the characteristics of the variable inductor are calculated using a circuit simulator. The calculation is performed in an example in which an AC signal is input to the terminal N1, the terminals N2 and N3 are connected to the ground, and the control voltage from the mode control circuit 13 in FIG. 1 is input to the terminal N4. The DC blocking capacitors 81 to 83 are configured with MIM (Metal Insulator Metal) capacitors in consideration of feasibility on the IC, and are equally 3 pF. Further, as the variable capacitors 84 to 86, MOS (Metal Oxide Semiconductor) type capacitors whose capacitance values change depending on the gate-source voltage are used. A MOS capacitor is composed of a semiconductor substrate (bulk) serving as a source and a gate electrode formed thereon via an insulating film, and a capacitor is formed between the bulk terminal and the gate terminal. As the variable capacitors 84 to 86, pn depletion layer capacitances by pn junctions can be used. The pn depletion layer capacitance is formed by applying a reverse bias between the p electrode terminal and the n electrode terminal of the pn junction formed on the semiconductor substrate, and the capacitance value is changed by changing the voltage applied between both terminals. To do.

  The MOS type capacitance of this example is 0.09 pF when the gate-source voltage is set to the high voltage side with respect to the threshold of 1.5 V and the capacitance is turned off, and 0.6 pF when the capacitance is set to the low voltage side and the capacitance is turned on. To change. The total length of the microstrip line is 2 mm, the taps are set at three equal intervals, and the characteristic impedance is 20Ω. Under these conditions, the effective inductor changes stepwise from 0.72 nH to 0.96 nH when the variable capacitors are all off, 86 is on, 85 is on, 84 is on, and all are on. 25% of the maximum value of inductance can be made variable. Therefore, by using the variable inductor shown in FIG. 2 in the amplifier shown in FIG. 1, the characteristics of the amplifier can be made variable.

  The effective capacitance values of the variable capacitors 121 and 122 are changed in the configuration shown in FIG. A variable capacitor C3 whose capacitance value varies depending on the voltage between the terminals is connected in series between the fixed capacitor C1 and the fixed capacitor C2, and the voltage across the terminals of the variable capacitor C3 from the terminals CN3 and CN4 through the choke inductors L1 and L2. Is changed. By making the values of the fixed capacitors C1 and C2 sufficiently larger than the variable capacitor C3, the effective capacitance values of the variable capacitors 121 and 122 formed between the terminals CN1 and CN2 can be determined by the capacitance value of the variable capacitor C3. . These variable capacitors 121 and 122 are shown in FIG. 1 using the symbols shown in FIG. In FIG. 1, the differential control voltages 121a and 121b, 122a and 122b output from the mode control circuit 13 are applied between the terminals, so that the capacitance values of the variable capacitors 121 and 122 change. As the variable capacitor C3, the above-described MOS type capacitor or pn depletion layer capacitor can be used.

  The operation of the entire amplifier of FIG. 1 will be described. When information on the corresponding wireless communication specification is input as a voltage to the terminal 101 in advance, the mode control circuit 13 reads data at a memory address corresponding to the voltage from the storage circuit 14 and outputs the data at the output terminal 121 as a voltage level. , 122, 141, 142, 143, and terminal 5. As shown in FIG. 2, the element value control circuit 15 converts the control voltage corresponding to the voltage value of the terminal N4 into the applied voltage of each variable capacitor and outputs it, so that the variable inductors 141 to 143 have a desired inductance. Is set. The capacitance values of the variable capacitors 21 and 22 are set by inputting a differential control voltage output from the mode control circuit 13. Further, the bias current of the amplification transistor T1 is determined by the voltage at the terminal 5, and each variable parameter of the amplifier is determined. As described above, the amplifier can set a predetermined matching state and amplification characteristic for the corresponding wireless communication specification, and performs an amplification operation on the AC signal input to the input terminal 1 thereof.

  In the variable inductor shown in FIG. 2 used for the description of FIG. 1, the case where the number of taps of the inductor is provided as an example has been described. However, if the number of taps is 1 or more, the above-described inductance variability is provided. Can be obtained.

  As described above, according to the present embodiment, since the inductance is set using a variable capacitor and the control by the current that increases the power consumption is not performed, a low power consumption high frequency amplifier that satisfies a plurality of wireless communication specifications is realized. Can do. Since low power consumption is realized, it is easy to incorporate an amplifier into an IC and form a single chip formed on the same substrate.

  When the amplifier operates in a relatively narrow band, the variable inductor can be configured to be used for either the input matching circuit 11 or the output matching circuit 12. In the feedback circuit disposed at the emitter of the transistor T1, a resistor can be used instead of the variable inductor 42, and the emitter can be directly grounded.

  FIG. 4 shows a second embodiment of the present invention. In the amplifier shown in FIG. 1, a cascode transistor T2 is connected to the collector side of the transistor T1, and an output matching circuit is connected to the collector terminal of T2. The transistor T2 is used to reduce the value of the mirror capacitance generated at the base terminal of the transistor T1 by suppressing the amplitude of the collector potential of the transistor T1. Although the high frequency characteristics of the amplifier deteriorate due to the mirror capacitance, the high frequency characteristics of the amplifier are improved by reducing the mirror capacitance. When the gains at the same frequency in the high band are compared, for example, a gain improvement of 3 dB can be obtained.

  According to the present embodiment, the configuration is complicated by the increase in the number of transistors as compared with the first embodiment, but the amplifier can be increased in speed and bandwidth.

  FIG. 5 shows a third embodiment of the present invention. Two sets of amplifiers shown in FIG. 1 are used in the form of a differential circuit. The amplifier according to the first embodiment amplifies a single-phase signal, whereas the amplifier according to the present embodiment adopts a differential circuit form to provide a differential between the two input terminals 1a and 1b. The signal is amplified and an amplified differential signal is output between the two output terminals 2a and 2b. The differential signal is composed of a positive polarity signal and a reverse polarity signal. For example, a positive polarity signal is given to the input terminal 1a, a reverse polarity signal is given to the input terminal 1b, and a reverse polarity signal is given from the output terminal 2a to the output terminal 2b. A positive polarity signal is output.

  According to this embodiment, it is possible to obtain an excellent in-phase signal component removal ratio of the input signal with respect to the single-phase amplifier.

  FIG. 6 shows a fourth embodiment of the present invention. In this embodiment, a cascode transistor T2 is arranged at the collector of the amplifying transistor T1, and a differential circuit format is adopted. As a result, it is possible to realize a high gain due to Miller effect suppression in the transistor T1 and an excellent in-phase signal component removal ratio of the input signal. The amplifier of this embodiment has the characteristics of the second and third embodiments at the same time.

  FIG. 7 shows a fifth embodiment of the present invention. In contrast to the amplifier shown in FIG. 1, the transistor T1 is replaced from a bipolar transistor to an nMOS transistor. The nMOS transistor may not reach the bipolar type transistor in terms of operating speed, but it is possible to reduce the value of the necessary power supply voltage. For example, a bipolar transistor requires a base-emitter voltage of about 0.9 V, and the power supply voltage (voltage between terminal 4 and terminal 3) in FIG. By setting the threshold voltage Vth of the MOS transistor to 0.4V, the power supply voltage can be reduced to about 1V.

  FIG. 8 shows a sixth embodiment of the present invention. For the amplifier shown in FIG. 7, a cascode MOS transistor T2 is connected to the collector side of the MOS transistor T1, and an output matching circuit is connected to the drain terminal of the MOS transistor T2. The MOS transistor T2 is used to reduce the value of the mirror capacitance generated at the gate terminal of the MOS transistor T1 by suppressing the amplitude of the drain potential of the MOS transistor T1. Although the high frequency characteristics of the amplifier deteriorate due to the mirror capacitance, the high frequency characteristics of the amplifier are improved by reducing the mirror capacitance.

  According to the present embodiment, the configuration is complicated by the increase in the number of transistors as compared with the fifth embodiment, but the power supply voltage can be reduced and the amplifier can be increased in speed and bandwidth.

  FIG. 9 shows a seventh embodiment of the present invention. Two sets of amplifiers shown in FIG. 7 are used in the form of a differential circuit. Whereas the amplifier of the fifth embodiment amplifies a single-phase signal, the amplifier of the present embodiment adopts a differential circuit form to provide a differential between the two input terminals 1a and 1b. The signal is amplified and an amplified differential signal is output between the two output terminals 2a and 2b.

  According to the present embodiment, an excellent in-phase signal component removal ratio of the input signal can be obtained with respect to the single-phase amplifier, and the power supply voltage can be reduced by applying the MOS transistor to the amplifying transistor.

  FIG. 10 shows an eighth embodiment of the present invention. By arranging the cascode MOS transistor T2 at the drain of the amplifying MOS transistor T1 and adopting a differential circuit form, high gain in the high band due to mirror effect suppression in the MOS transistor T1 and excellent input signal in-phase A signal component removal ratio can be realized. Furthermore, the power supply voltage can be reduced by applying a MOS transistor to the amplification transistor.

  The variable inductor used in the above first to eighth embodiments can be configured differently. In the first alternative variable inductor configuration shown in FIG. 11, one of the two terminals of the inductor is grounded in an alternating manner. Then, an AC signal is applied to the terminal N1, and a DC voltage is applied to each of the terminals N2 and N3.

  Here, each of the inductors 75 to 78 is a spiral inductor created on an IC. Taps A, B, and C are formed at connection points of the inductors 75 to 78, respectively. Each tap is connected to the output of the element value control circuit 15 via the DC blocking capacitors 81 to 83, and further connected to the terminal N3 via the variable capacitors 84 to 86.

  The variable inductor having the above configuration changes the number of spiral inductors through which an AC signal passes by changing each of the variable capacitors 84 to 86 to two states of capacitance on and capacitance off according to the output voltage of the element value control circuit 15. , Making its inductance variable. The DC blocking capacitors 81 to 83 are configured with MIM (Metal Insulator Metal) capacitors in consideration of feasibility on the IC, and the variable capacitors 84 to 86 are MOS type capacitors whose capacitance values change depending on the gate-source voltage. Consists of.

  Compared with the variable inductor adopting the microstrip line shown in FIG. 2, the inductor of this configuration changes from an elongated shape to a shape having substantially the same aspect ratio, but has an advantage that the area on the IC is small. This is because the spiral inductor can take a spiral shape to generate a positive mutual inductance between the lines and shorten the actual total wiring length necessary to obtain a desired inductance. Therefore, if this embodiment is used, the IC area can be further reduced.

  The variable inductor used in the first to eighth embodiments can have still another configuration shown in FIG. In the second alternative variable inductor configuration shown in FIG. 12, one of the two terminals of the inductor is grounded in an alternating manner. Then, an AC signal is applied to the terminal N1, and a DC voltage is applied to each of the terminals N2 and N3.

  Here, the inductors 71 to 74 respectively indicate microstrip type inductors formed on the IC, and taps A, B, and C are formed at respective connection points. Each tap is connected to the drains of three N-type MOS transistors M1 to M3 via DC blocking capacitors 81 to 83, and is connected to a terminal N5 via resistors 63 to 69. The output of the element value control circuit 15 is the gate voltage of the MOS transistors M1 to M3. If the voltage is about 0.2V higher than the threshold voltage Vth of the MOS transistor, the current is conducted between the drain and the source, and the output is low. Resistance appears. Therefore, the inductors 71 to 74 can be grounded to the terminal N3 via the DC blocking capacitors 81 to 83.

  The variable inductor used in the first to eighth embodiments can have still another configuration shown in FIG. In the configuration of the third other variable inductor shown in FIG. 13, one of the two terminals of the inductor is grounded in an alternating manner. Then, an AC signal is applied to the terminal N1, and a DC voltage is applied to each of the terminals N2 and N3.

  Here, the inductors 75 to 78 are spiral inductors created on the IC, and taps A, B, and C are formed at respective connection points. Each tap is connected to the drains of the N-type MOS transistors M4 to M6 via DC blocking capacitors 81 to 83, respectively. The source of each MOS transistor is connected to the output of the element value control circuit 15, and is further connected to the terminal N3 via variable capacitors 84 to 86. A resistance of about several kΩ is connected between the source and drain of each MOS transistor.

  In the variable inductor having the above configuration, each of the variable capacitors 84 to 86 is changed into two states of capacitance ON and capacitance OFF depending on the output voltage of the element value control circuit 15, and the number of spiral inductors through which an AC signal passes is changed. Thereby, the inductance can be made variable.

  For example, when the variable capacitor 85 is turned on, a low potential is applied to the contact H and a high potential is applied to the gate of the MOS transistor M5. On the other hand, a high potential is applied to the contacts G and I, and a low potential is applied to the gates of the MOS transistors M4 and M6. By applying a bias voltage in this way, a path that is not an AC signal path becomes a high resistance due to a series resistance.

  Now, when the MOS transistors M4 and M6 are not connected, a small capacity due to the capacity off of the variable capacitors 84 and 86 is connected to a path that is not an AC signal path, and a resonance loop is formed between the small capacity and the inductors 75 to 78. May be formed. In this configuration, since the high resistance is connected in series to this small capacity, the sharpness of resonance of the resonance loop can be suppressed. In addition, even if resonance occurs, the influence on the characteristics of the amplifier circuit can be reduced. The DC blocking capacitors 81 to 83 are configured with MIM (Metal Insulator Metal) capacitors in consideration of feasibility on the IC, and the variable capacitors 84 to 86 are MOSs whose capacitance values are variable depending on the gate-source voltage. Consists of mold capacity.

  In the matching circuits of the first to eighth embodiments described above, a variable inductor is used in which an AC signal is input to one terminal N1, and the other terminal N2 is AC-grounded. Although not shown, the matching circuit may be configured using a variable inductor in which an AC signal is transmitted from one terminal to the other terminal. An example of the configuration of the variable inductor used in such a case is shown in FIG.

  The fourth other variable inductor shown in FIG. 14 is configured such that an AC signal can be taken out from both terminals N1 and N2. Here, the inductors 71 to 74 are microstrip line type inductors formed on an IC, and taps A, B, and C are drawn from arbitrary positions. Each tap is connected to the output of the element value control circuit 15 via the DC blocking capacitors 81 to 83 and further connected to the choke inductor 79 via the variable capacitors 84 to 86. The other terminal to which the variable capacitors 84 to 86 of the choke inductor 79 are not connected is grounded, and a voltage transmission path for applying a DC potential to the variable capacitors 84 to 86 is formed. The capacitors 87 and 88 operate as a DC blocking capacitor so that a DC potential is not applied to the terminals N1 and N2.

  FIG. 15 shows a fifth other variable inductor configured to be able to extract an AC signal at both terminals N1 and N2. Here, each of the inductors 75 to 78 is a spiral inductor created on the IC, and taps A, B, and C are drawn from the respective connection positions. Each tap is connected to the output of the element value control circuit 15 via the DC blocking capacitors 81 to 83 and further connected to the choke inductor 79 via the variable capacitors 84 to 86. The other terminal to which the variable capacitors 84 to 86 of the choke inductor 79 are not connected is grounded, and a voltage transmission path for applying a DC potential to the variable capacitors 84 to 86 is formed. The capacitors 87 and 88 operate as a DC blocking capacitor so that a DC potential is not applied to the terminals N1 and N2.

  This variable inductor can reduce the area on the IC as compared with the variable inductor using the microstrip line of FIG. The reason for the small area is that by taking a spiral shape, a positive mutual inductance is generated between the lines, and the actual total wiring length necessary to obtain a desired inductance can be shortened.

  FIG. 16 shows a ninth embodiment of the present invention. FIG. 16 shows a wireless communication apparatus including the above-described amplifier of the present invention. The wireless communication apparatus of this embodiment is configured as a heterodyne wireless receiver. First, a reception signal received by the antenna 301 is amplified by the amplifier circuit 302 and input to one terminal of the mixer 303. An output signal of the local oscillation circuit 305 controlled by the local oscillation circuit control circuit (CTL) 304 becomes a local oscillation signal input to the other terminal of the mixer 303. The carrier frequency of the received signal is lowered by frequency conversion in the mixer 303, and an intermediate frequency signal is output from the mixer 303. The intermediate frequency signal is attenuated by an unnecessary frequency component by a band-pass filter 306, amplified by an intermediate frequency amplifier circuit 307, and input to an output circuit (OUT) 308 that performs demodulation. A baseband signal is extracted from the output circuit 308.

  The amplifier of the present invention is used inside the amplifier circuit 302. Thereby, it is possible to realize a heterodyne-type low-power-consumption wireless communication apparatus that satisfies a plurality of wireless communication specifications.

  FIG. 17 shows a tenth embodiment of the present invention. FIG. 17 shows another wireless communication apparatus configured to include the above-described amplifier of the present invention. The wireless communication apparatus according to the present embodiment is configured as a direct conversion type wireless reception apparatus. In FIG. 17, a received signal received by an antenna 301 is amplified by an amplifier circuit 302 and input to one input terminal of two mixers 303a and 303b. The received signal forms modulated waves that are orthogonal to each other and modulated by the in-phase component and the quadrature component. The output signal of the local oscillation circuit 305 controlled by the local oscillation circuit control circuit (CTL) 304 is branched into two, and is input to the other input terminal of each of the mixers 303a and 303b with a phase difference of 90 °. It becomes an oscillation signal. Since the frequency (fLO) of the local oscillation signal is set to be equal to the carrier frequency (fRF) of the received signal, the in-phase component and the quadrature component are directly extracted by frequency conversion. The in-phase component and the quadrature component are amplified by the amplifiers 310a and 310b after the unnecessary frequency component is attenuated by the low-pass filters 309a and 309b, and the amplified in-phase component and quadrature component are based on the output circuit (OUT) 311. Output as a band signal.

  The amplifier of the present invention is used inside the amplifier circuit 302. As a result, a low-power-consumption wireless communication device of a direct conversion format that satisfies a plurality of wireless communication specifications can be realized.

  The effect of the present invention does not occur only when a bipolar transistor or a MOS transistor is used as an amplifier. Other field effect transistors, heterojunction bipolar transistors, high electron mobility transistors, metal semiconductor junction field effect transistors It goes without saying that the same effect can be obtained even if it is replaced with. In addition, the npn-type circuit configuration is shown for the bipolar transistor and the nMOS-type circuit configuration is shown for the MOS transistor. Needless to say.

The circuit diagram for demonstrating the 1st Embodiment of this invention. The circuit diagram for demonstrating the example of the variable inductor of this invention in 1st Embodiment. FIG. 3 is a circuit diagram for explaining an example of a variable capacitor in the first embodiment. The circuit diagram for demonstrating the 2nd Embodiment of this invention. The circuit diagram for demonstrating the 3rd Embodiment of this invention. The circuit diagram for demonstrating the 4th Embodiment of this invention. The circuit diagram for demonstrating the 5th Embodiment of this invention. The circuit diagram for demonstrating the 6th Embodiment of this invention. The circuit diagram for demonstrating the 7th Embodiment of this invention. The circuit diagram for demonstrating the 8th Embodiment of this invention. The circuit diagram for demonstrating the 1st another variable inductor of this invention. The circuit diagram for demonstrating the 2nd another variable inductor of this invention. The circuit diagram for demonstrating the 3rd another variable inductor of this invention. The circuit diagram for demonstrating the 4th another variable inductor of this invention. The circuit diagram for demonstrating the 5th another variable inductor of this invention. The block diagram for demonstrating the 9th Embodiment of this invention. The block diagram for demonstrating the 10th Embodiment of this invention.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Input terminal, 2 ... Output terminal, 3, 4 ... Power supply terminal, 5, 6 ... Bias voltage application terminal, 11 ... Input matching circuit 1, 12 ... Output matching circuit 1, 13 ... Mode control circuit, 14 ... Memory circuit , 15 ... element value control circuit, 21 and 22 ... variable capacity, 31 ... capacity, 41, 42 and 43 ... variable inductor, 61 ... resistance element, 101 ... amplifier mode control terminal, 121 and 122 ... variable capacity control terminal, 141 , 142, 143 ... variable inductor control terminal, 301 ... antenna, 302, 307, 310 ... amplification circuit, 303 ... mixer, 304 ... local oscillation circuit control circuit, 305 ... local oscillation circuit, 306, 309 ... filter, 307, 310 ... Intermediate frequency amplifier circuit, 308, 311 ... Output circuit.

Claims (20)

An amplifying element for amplifying an AC signal;
A variable inductor included in at least one of an input portion and an output portion of the amplifier;
The variable inductor includes a tapped inductor provided with a tap at least at one position between one terminal and the other terminal, and an applied voltage connected between the tap and the other terminal via a fixed capacitor. And a variable capacitor whose capacity is controlled by the capacitor on and off.
The variable inductor is characterized in that an inductance changes between the one terminal and the other terminal in accordance with capacitance on and capacitance off of the variable capacitor. In claim 1,
The amplifying element is a bipolar transistor, a base of the bipolar transistor is connected to the input unit, a collector of the bipolar transistor is connected to the output unit, and a feedback circuit is formed at the emitter of the bipolar transistor. A characteristic amplifier. In claim 1,
The amplifying element is a MOS transistor, the gate of the MOS transistor is connected to the input unit, the drain of the MOS transistor is connected to the output side, and a feedback circuit is formed at the source of the MOS transistor. A characteristic amplifier. In claim 1,
The amplifier according to claim 1, wherein the tapped inductor is a microstrip line type inductor. In claim 1,
The amplifier according to claim 1, wherein the tapped inductor is a spiral inductor formed on a semiconductor integrated circuit. In claim 1,
A resistor that is short-circuited when the variable capacitor is turned on is connected in series to the variable capacitor. In claim 1,
The amplifier is characterized in that the variable capacitor is a MOS capacitor, and the applied voltage is supplied between a gate terminal and a bulk terminal of the MOS capacitor. In claim 1,
The variable capacitance is a PN depletion layer capacitance, and the applied voltage is supplied between a P electrode terminal and an N electrode terminal of the PN depletion layer capacitance. In claim 2,
An input matching circuit having a first variable inductor and a first variable capacitor by the variable inductor, and a resistor for supplying a bias voltage to the base;
An output matching circuit having a second variable inductor and a second variable capacitor by the variable inductor in the output unit;
The feedback circuit includes a third variable inductor by the variable inductor;
A control voltage for setting the inductance values of the first to third variable inductors and the capacitance values of the first and second variable capacitors, and a control circuit for generating the bias voltage;
The amplifier, wherein the control circuit sets a voltage value of the control voltage and the bias voltage according to each frequency of a plurality of communication methods. In claim 9,
The amplifier is composed of one chip formed on the same substrate. An amplifier comprising: a first amplifier element that amplifies a positive polarity signal of a differential input signal; and a second amplifier element that amplifies a reverse polarity signal of the differential input signal,
Each of the first and second amplifier elements includes:
An amplifying element for amplifying an AC signal;
A variable inductor included in at least one of the input part and the output part of the amplifier element;
The variable inductor includes a tapped inductor provided with a tap at least at one position between one terminal and the other terminal, and an applied voltage connected between the tap and the other terminal via a fixed capacitor. And a variable capacitor whose capacity is controlled by the capacitor on and off.
The variable inductor is characterized in that an inductance changes between the one terminal and the other terminal in accordance with capacitance on and capacitance off of the variable capacitor. In claim 11,
The amplifying element is a bipolar transistor, a base of the bipolar transistor is connected to the input unit, a collector of the bipolar transistor is connected to the output unit, and a feedback circuit is formed at the emitter of the bipolar transistor. A characteristic amplifier. In claim 11,
The amplifying element is a MOS transistor, the gate of the MOS transistor is connected to the input unit, the drain of the MOS transistor is connected to the output side, and a feedback circuit is formed at the source of the MOS transistor. A characteristic amplifier. In claim 11,
The amplifier according to claim 1, wherein the tapped inductor is a microstrip line type inductor. In claim 11,
The amplifier according to claim 1, wherein the tapped inductor is a spiral inductor formed on a semiconductor integrated circuit. In claim 11,
A resistor that is short-circuited when the variable capacitor is turned on is connected in series to the variable capacitor. In claim 12,
An input matching circuit having a first variable inductor and a first variable capacitor by the variable inductor, and a resistor for supplying a bias voltage to the base;
An output matching circuit having a second variable inductor and a second variable capacitor by the variable inductor in the output unit;
The feedback circuit includes a third variable inductor by the variable inductor;
A control voltage for setting the inductance values of the first to third variable inductors and the capacitance values of the first and second variable capacitors, and a control circuit for generating the bias voltage;
The amplifier, wherein the control circuit sets a voltage value of the control voltage and the bias voltage according to each frequency of a plurality of communication methods. In claim 17,
The amplifier is composed of one chip formed on the same substrate. A first amplifier circuit for amplifying a received signal from the antenna;
A mixer for performing frequency conversion of the output signal of the first amplifier circuit;
A second amplifier circuit for amplifying the output signal of the mixer;
An output circuit that receives the output signal of the second amplifier circuit and outputs a baseband signal;
The first amplifier circuit includes an amplifier;
The amplifier is
An amplifying element for amplifying an AC signal;
A variable inductor included in at least one of the input unit and the output unit of the amplifier,
The variable inductor includes a tapped inductor provided with a tap at least at one position between one terminal and the other terminal, and an applied voltage connected between the tap and the other terminal via a fixed capacitor. And a variable capacitor whose capacity is controlled by the capacitor on and off.
The variable inductor according to claim 1, wherein an inductance of the variable inductor changes between the one terminal and the other terminal in accordance with capacitance on and capacitance off of the variable capacitor. In claim 19,
The received signal includes an in-phase component and a quadrature component, the mixer and the second amplifier circuit are provided for each of the in-phase component and the quadrature component, and the output circuit includes a second for in-phase component. A radio communication apparatus, wherein an output signal of an amplifier circuit and an output signal of the second amplifier circuit for quadrature components are input and a baseband signal is output.

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