JP2005277323A - Thin-film transistor, display device, and manufacturing method for them, and television set - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a thin-film transistor and a display device which can be manufactured as efficiency in using materials is improved and manufacturing processes are simplified, and a manufacturing technique for the transistor and display device, and a technique for forming wiring patterns or the like composing the device in a well-controlled manner. <P>SOLUTION: According to the manufacturing method for the thin-film transistor, a first conductive layer having a recession is formed, a first insulating layer having a recession is formed on the first conductive layer, a semiconductor layer having a recession is formed on the first insulating layer, a second insulating layer having a recession is formed on the semiconductor layer, a composition containing a conductive material is discharged into the recession of the second insulating layer. Then a second conductive layer is formed. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a thin film transistor, a display device, a manufacturing method thereof, and a television device.

  A thin film transistor (hereinafter referred to as “TFT”) and an electronic circuit using the thin film transistor are manufactured by laminating various thin films such as a semiconductor, an insulator, and a conductor on a substrate and appropriately forming a predetermined pattern by a photolithography technique. Has been. Photolithographic technology is a technology that uses a light to transfer a circuit pattern or other pattern formed on a transparent flat plate called a photomask onto a target substrate. It is widely used in the manufacturing process.

  In the manufacturing process using the conventional photolithography technology, a multi-step process such as exposure, development, baking, and peeling is required only for handling a mask pattern formed using a photosensitive organic resin material called a photoresist. Become. Therefore, the manufacturing cost inevitably increases as the number of photolithography processes increases.

  In order to solve such problems, in recent years, the droplet discharge method has been applied to the field of flat panel displays and is actively being developed. The droplet discharge method has many advantages such as no need for a mask for direct drawing, easy application to a large substrate, and high material utilization efficiency, and is applied to the production of electrodes for color filters and plasma displays. ing.

When forming a pattern such as a wiring in an electronic device by the droplet discharge method, control of the droplet discharge amount and plasma processing or the like have been performed on the base surface in order to reduce the thickness (for example, patents) Reference 1).
Japanese Patent Laid-Open No. 2003-136991

    However, in the field of electronic equipment, it has been desired to form wiring with a narrower line width to improve electrical characteristics.

  An object of the present invention is to reduce the number of photolithography processes in a manufacturing process of a TFT, an electronic circuit using the TFT, and a display device formed by the TFT. Electronic devices typified by thin film transistors, display devices, and the like with high electrical characteristics are manufactured through a simplified manufacturing process. An object of the present invention is to provide a technique that can be manufactured at a low cost and with a high yield even on a large-area substrate having a side exceeding 1 meter.

  Another object of the present invention is to provide a technique capable of forming a pattern such as a wiring constituting these display devices in a desired shape with good controllability.

  A thin film transistor formed using the present invention is a thin film transistor having a first gate electrode layer on one side and a second gate electrode layer on the other side with a semiconductor layer interposed therebetween. In the present invention, such a thin film transistor is referred to as a dual-gate thin film transistor. In the present invention, a recess is provided in a pattern formation region, and a composition containing a pattern forming material is attached to the recess to form a pattern. This recess can be generated due to the shape of the first gate electrode layer in the dual-gate thin film transistor. The first gate electrode layer is formed into a shape having a recess (so-called depression), and then the recess shape is reflected on the insulating layer or the semiconductor layer stacked on the first gate electrode layer. The recess shape is a groove shape, a hole shape, or a hole shape depending on the shape of the first gate electrode layer. The second gate electrode layer is formed on the first gate electrode layer so as to overlap with the first gate electrode layer with an insulating layer or a semiconductor layer interposed therebetween (improves electrical characteristics of the thin film transistor). Fulfills the function of In the thin film transistor of the present invention, a recess is formed in the formation region of the second gate electrode layer, reflecting the recess of the first gate electrode layer. Therefore, the second gate electrode layer can be formed in a desired region with high controllability by discharging a composition containing a conductive material into the recess. Therefore, a thin film transistor can be manufactured in a self-aligned manner (self-alignment) without performing a patterning step.

  The display device of the present invention includes a light-emitting element and a TFT in which a medium including light-emitting organic matter or a mixture of organic and inorganic substances called electroluminescence (hereinafter also referred to as “EL”) is interposed between electrodes. And a liquid crystal display device using a liquid crystal element having a liquid crystal material as a display element.

    In the method for manufacturing a thin film transistor of the present invention, a first conductive layer having a recess is formed, a first insulating layer having a recess is formed on the first conductive layer, and the recess is formed on the first insulating layer. And forming a second insulating layer having a recess on the semiconductor layer, discharging a composition containing a conductive material into the recess having the second insulating layer, and A conductive layer is formed.

  In the method for manufacturing a thin film transistor of the present invention, a first conductive layer and a second conductive layer to be electrically connected are formed adjacent to each other, and a recess is formed over the first conductive layer and the second conductive layer. A first insulating layer is formed, a semiconductor layer having a recess is formed on the first insulating layer, a second insulating layer having a recess is formed on the semiconductor layer, and the second insulating layer is formed. The third conductive layer is formed by discharging a composition containing a conductive material into the concave portion of the substrate.

    In the method for manufacturing a thin film transistor of the present invention, a first gate electrode layer having a recess is formed, a first insulating layer having a recess is formed on the first gate electrode layer, and the first insulating layer is formed on the first insulating layer. Forming a semiconductor layer having a recess on the semiconductor layer, forming a second insulating layer having a recess on the semiconductor layer, discharging a composition containing a conductive material into the recess having the second insulating layer, and And a source electrode layer and a drain electrode layer are formed in contact with the semiconductor layer.

    In the method for manufacturing a thin film transistor of the present invention, a first conductive layer and a second conductive layer that are electrically connected are formed adjacent to each other, a first gate electrode layer is formed, and the first gate electrode layer is formed over the first gate electrode layer. Forming a first insulating layer having a recess, forming a semiconductor layer having a recess on the first insulating layer, forming a second insulating layer having a recess on the semiconductor layer, and A composition containing a conductive material is discharged into the concave portion of the insulating layer, a second gate electrode layer is formed, and a source electrode layer and a drain electrode layer are formed in contact with the semiconductor layer. To do.

    In the method for manufacturing a display device of the present invention, a first gate electrode layer having a recess is formed, a first insulating layer having a recess is formed on the first gate electrode layer, and the first insulating layer is formed. Forming a semiconductor layer having recesses thereon, forming a second insulating layer having recesses on the semiconductor layer, and discharging a composition containing a conductive material into the recesses of the second insulating layer; Forming a second gate electrode layer; electrically connecting to the semiconductor layer; forming a source electrode layer and a drain electrode layer; forming a first electrode layer on the source electrode layer or the drain electrode layer; An electroluminescent layer is formed on the first electrode layer, and a second electrode layer is formed on the electroluminescent layer.

    In the method for manufacturing a display device of the present invention, a first conductive layer and a second conductive layer that are electrically connected are formed adjacent to each other, a first gate electrode layer is formed, and the first gate electrode layer is formed. Forming a first insulating layer having a recess thereon, forming a semiconductor layer having a recess on the first insulating layer, forming a second insulating layer having a recess on the semiconductor layer, and A composition containing a conductive material is discharged into the concave portion of the second insulating layer, a second gate electrode layer is formed, and a source electrode layer and a drain electrode layer are formed by being electrically connected to the semiconductor layer. And forming a first electrode layer on the source electrode layer or the drain electrode layer, forming an electroluminescent layer on the first electrode layer, and forming a second electrode layer on the electroluminescent layer. It is characterized by doing.

  The thin film transistor of the present invention includes a first conductive layer having a recess, a first insulating layer having a recess on the first conductive layer, and a semiconductor layer having a recess on the first insulating layer. And having a second insulating layer having a recess on the semiconductor layer, and forming a second conductive layer in the recess having the second insulating layer.

  The thin film transistor of the present invention includes a first conductive layer and a second conductive layer that are electrically connected adjacent to each other, and a first recess having a recess on the first conductive layer and the second conductive layer. The first insulating layer includes a semiconductor layer having a recess, the semiconductor layer includes a second insulating layer having a recess, and the second insulating layer includes the second insulating layer. The recess has a third conductive layer.

  The thin film transistor of the present invention includes a first gate electrode layer having a recess, a first insulating layer having a recess on the first gate electrode layer, and a recess on the first insulating layer. A semiconductor layer having a second insulating layer having a recess on the semiconductor layer, a second gate electrode layer in the recess having the second insulating layer, and in contact with the semiconductor layer And a source electrode layer and a drain electrode layer.

  The thin film transistor of the present invention has a first gate electrode layer that includes a first conductive layer and a second conductive layer that are electrically connected to each other, and has a recess on the first gate electrode layer. A first insulating layer; a semiconductor layer having a recess on the first insulating layer; a second insulating layer having a recess on the semiconductor layer; and the second insulating layer comprising: The recess includes a second gate electrode layer, and a source electrode layer and a drain electrode layer in contact with the semiconductor layer.

  The display device of the present invention includes a first gate electrode layer having a recess, a first insulating layer having a recess on the first gate electrode layer, and a recess on the first insulating layer. A second insulating layer having a recess on the semiconductor layer, a second gate electrode layer in the recess of the second insulating layer, and the semiconductor layer A source electrode layer and a drain electrode layer in contact with each other; a first electrode layer on the source electrode layer or the drain electrode layer; an electroluminescent layer on the first electrode layer; A second electrode layer is provided over the light emitting layer.

  The display device of the present invention has a first gate electrode layer including a first conductive layer and a second conductive layer that are electrically connected to each other, and a recess is formed on the first gate electrode layer. A first insulating layer having a semiconductor layer having a recess on the first insulating layer, a second insulating layer having a recess on the semiconductor layer, and the second insulating layer. The recess has a second gate electrode layer, a source electrode layer and a drain electrode layer in contact with the semiconductor layer, and a first electrode layer on the source electrode layer or the drain electrode layer. And an electroluminescent layer on the first electrode layer, and a second electrode layer on the electroluminescent layer.

  According to the present invention, since the process is simplified, there is little material loss and cost reduction can be achieved. Further, the pattern can be formed with good controllability. Further, a thin film transistor with high electrical characteristics can be manufactured. Therefore, a high-performance and highly reliable display device can be manufactured with high yield.

  Embodiments of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it is easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments below. Note that in structures of the present invention described below, the same portions or portions having similar functions are denoted by the same reference numerals in different drawings, and description thereof is not repeated.

(Embodiment 1)
The present invention selectively selects at least one or more of patterns necessary for manufacturing a display panel, such as a conductive layer for forming a wiring layer or an electrode, or a mask layer for forming a predetermined pattern. A display device is manufactured by forming a pattern by a method capable of forming a pattern. In the present invention, a pattern refers to a conductive layer such as a gate electrode layer, a source electrode layer, and a drain electrode layer, a semiconductor layer, a mask layer, an insulating layer, and the like constituting a thin film transistor or a display device, and has a predetermined shape. All the components formed. As a method for selectively forming a pattern, a conductive layer, an insulating layer, or the like is formed, and droplets of a composition prepared for a specific purpose are selectively ejected (ejected) to form a predetermined pattern. A possible droplet discharge (ejection) method (also called an inkjet method depending on the method) is used. In addition, a method capable of transferring or drawing a pattern, for example, various printing methods (a method for forming a pattern such as screen (stencil) printing, offset (lithographic printing), relief printing or gravure (intaglio printing)), or the like can be used. .

  This embodiment uses a method of forming a pattern by ejecting (jetting) a composition containing a pattern forming material that is a fluid as droplets. A droplet containing a pattern forming material is discharged onto a pattern formation region, and fixed by baking, drying, or the like. In the present invention, pre-processing is performed on the pattern formation region.

  One mode of a droplet discharge device used for forming a pattern is shown in FIG. The individual heads 1405 and 1412 of the droplet discharge means 1403 are connected to the control means 1407, which can draw a pre-programmed pattern under the control of the computer 1410. The drawing timing may be performed with reference to a marker 1411 formed on the substrate 1400, for example. Alternatively, the reference point may be determined based on the edge of the substrate 1400. This is detected by the imaging means 1404, converted into a digital signal by the image processing means 1409, is recognized by the computer 1410, a control signal is generated, and sent to the control means 1407. As the imaging unit 1404, an image sensor using a charge coupled device (CCD) or a complementary metal oxide semiconductor (CMOS) can be used. Of course, the information on the pattern to be formed on the substrate 1400 is stored in the storage medium 1408. Based on this information, a control signal is sent to the control means 1407, and each head 1405 of the droplet discharge means 1403 is sent. The heads 1412 can be individually controlled.

  The nozzle sizes of the head 1405 and the head 1412 are different, and different materials can be drawn simultaneously with different widths. With one head, conductive material, organic material, inorganic material, etc. can be discharged and drawn respectively. When drawing in a wide area like an interlayer film, the same material is used from multiple nozzles to improve throughput. It is possible to discharge and draw at the same time. In the case of using a large substrate, the head 1405 and the head 1412 can freely scan on the substrate in the direction of the arrow to freely set a drawing area, and a plurality of the same pattern can be drawn on a single substrate. it can.

    In a pattern forming method such as a conductive layer using a droplet discharge method, a pattern is formed by discharging a pattern forming material processed into particles, and fusing or fusion bonding by baking to solidify. Therefore, the pattern formed by sputtering or the like often shows a columnar structure, whereas it often shows a polycrystalline state having many grain boundaries.

    In this embodiment mode, a thin film transistor to be formed is a thin film transistor including a first gate electrode layer on one side and a second gate electrode layer on the other side with a semiconductor layer interposed therebetween. In the present invention, such a thin film transistor is referred to as a dual-gate thin film transistor. In the present invention, as shown in FIG. 1, a recess is provided in a pattern formation region, and a composition containing a pattern forming material is attached to the recess to form a pattern. This recess can be generated due to the shape of the first gate electrode layer in the dual-gate thin film transistor. The first gate electrode layer is formed into a shape having a recess (so-called depression), and then the recess shape is reflected on the insulating layer or the semiconductor layer stacked on the first gate electrode layer. The second gate electrode layer is formed on the first gate electrode layer so as to overlap with the first gate electrode layer with an insulating layer or a semiconductor layer interposed therebetween (improves electrical characteristics of the thin film transistor). Fulfills the function of In the thin film transistor of the present invention, a recess is formed in the formation region of the second gate electrode layer, reflecting the recess of the first gate electrode layer. Therefore, the second gate electrode layer can be formed in a desired region with high controllability by discharging a composition containing a conductive material into the recess. Therefore, a thin film transistor can be manufactured in a self-aligned manner (self-alignment) without performing a patterning step.

    A thin film transistor manufactured in an embodiment mode of the present invention will be described with reference to FIGS. 1A to 1D are top views, and FIGS. 1E to 1H are cross-sectional views taken along line GH in FIGS. 1A to 1D. In FIG. 1, (A) and (E), (B) and (F), (C) and (G), and (D) and (H) correspond to each other.

  In this embodiment mode, a gate wiring layer 51 and a first gate electrode layer 52 a and a first gate electrode layer 52 b which are formed in contact with the gate wiring layer 51 are formed over the substrate 50. Although the first gate electrode layer 52a and the first gate electrode layer 52b are formed in contact with each other, as illustrated in FIG. 1E, the first gate electrode layer 52a and the first gate electrode layer 52b have a tapered shape and a recess such as a groove is formed therebetween. The In the present invention, the shape formed by the first gate electrode layer may be a groove shape (groove shape) or a hole (hole) shape (hole shape, hole shape). All of these are collectively referred to as concave portions. The concave portion may be formed of a plurality of gate electrode layers, or may be one gate electrode layer. Another example of the recess is shown in FIG.

    11A to 11C correspond to the portions of the gate wiring layer and the first gate electrode layer in FIG. As shown in FIG. 11A, the first gate electrode layer 62a and the first gate electrode layer 62b are formed in contact with the gate wiring layer 61, but the first gate electrode layer 62a and the first gate electrode layer 62b are formed. The gate electrode layers 62b are separated from each other. Therefore, the first gate electrode layer 62a and the first gate electrode layer 62b form a recess 60 such as a groove therebetween.

    In FIG. 11B, the concave portion is formed of four first electrode layers. As shown in FIG. 11A, on the first gate electrode layer 82a and the first gate electrode layer 82b formed in contact with the gate wiring layer 81, the first gate electrode layer 82a and the gate electrode layer 82b are formed. A first gate electrode layer 82c and a first gate electrode layer 82d are formed so as to straddle. A recess 80 having a shape like a hole (hole) is formed in the center by the four first gate electrode layers 82a to 82d formed so as to form a ridge. In this embodiment, after the first gate electrode layer 82a and the first gate electrode layer 82b are formed, the first gate electrode layer 82c and the first gate electrode layer 82d are formed. However, the way of overlapping differs depending on the order of formation. Further, the three first gate electrode layers may be formed so as to form a triangle, or may be formed so as to have a concave portion in the center by a plurality of first gate electrode layers. When the concave portion is formed by a larger number of first gate electrode layers, the shape of the concave portion can be finely controlled. FIG. 11C illustrates an example of a recess 90 formed by the three first gate electrode layers 92a, the first gate electrode layer 92b, and the first gate electrode layer 92c by a droplet discharge method. Therefore, in the case of the hole-like recesses as shown in FIGS. 11B and 11C, the discharged composition stays in the region from the groove-like recesses of FIG. Since it does not easily flow to a place, it is suitable for forming a pattern in a fine area. In either case, the first gate electrode layers are electrically connected to each other.

    Further, after forming the first gate electrode layer having no recess, the recess can be formed by removing a part of the first gate electrode layer. For example, after the first gate electrode layer is formed by an evaporation method, a CVD method, a sputtering method, a droplet discharge method, or the like, a part of the first gate electrode layer is etched using a mask or the like. Alternatively, the first gate electrode layer can be formed to have a difference in film thickness by using a mask or the like at the time of formation. In a formation method in which a composition containing a pattern forming material is attached to a formation region in a liquid form such as a droplet discharge method, a change in the shape of a pattern that occurs during subsequent drying and baking can also be used.

    A first insulating layer 53 is formed over the first gate electrode layer 52a and the first gate electrode layer 52b, and a semiconductor layer 54 and a second insulating layer are formed. A semiconductor layer having one conductivity type may be formed as necessary. In addition, an N-type semiconductor layer is formed, and an NMOS structure of an N-channel TFT, a PMOS structure of a P-channel TFT having a P-type semiconductor layer, and a CMOS structure of an N-channel TFT and a P-channel TFT are manufactured. it can. In order to impart conductivity, an element imparting conductivity is added by doping, and an impurity region is formed in the semiconductor layer, whereby an N-channel TFT or a P-channel TFT can be formed.

  The first insulating layer 53 and the second insulating layer 55 may be formed of a known material such as a silicon oxide material or a nitride material, and may be a stacked layer or a single layer. In this embodiment mode, a stacked layer of a silicon nitride film, a silicon oxide film, and a silicon nitride film 3 is used as the first insulating layer, and a silicon oxide film is used as the second insulating layer 55. Alternatively, a single layer or a double layer of silicon oxynitride film may be used. A silicon nitride film having a dense film quality is preferably used. In addition, when silver or copper is used for a conductive layer formed by a droplet discharge method, if a silicon nitride film or a NiB film is formed thereon as a barrier film, diffusion of impurities can be prevented and the surface can be planarized. is there. Note that in order to form a dense insulating film with low gate leakage current at a low deposition temperature, a rare gas element such as argon is preferably contained in a reaction gas and mixed into the formed insulating film.

  The first insulating layer 106 and the second insulating layer 130 may be formed by dropping polyimide or polyvinyl alcohol by a droplet discharge method. As a result, the exposure process can be omitted. Inorganic materials (silicon oxide, silicon nitride, silicon oxynitride, silicon nitride oxide, etc.), photosensitive or non-photosensitive organic materials (organic resin materials) (polyimide, acrylic, polyamide, polyimide amide, resist, benzocyclobutene, etc.) A film made of one kind or a plurality of kinds such as a low k material having a low dielectric constant, or a stack of these films can be used. In addition, a skeleton structure is formed by a bond of silicon (Si) and oxygen (O), and at least one of a material containing at least hydrogen as a substituent, or fluorine, an alkyl group, or an aromatic hydrocarbon as a substituent. You may use the material which has. As a manufacturing method, a vapor deposition method such as a plasma CVD method or a thermal CVD method, or a sputtering method can be used. Alternatively, a droplet discharge method or a printing method (a method for forming a pattern such as screen printing or offset printing) can be used. A TOF film or an SOG film obtained by a coating method can also be used.

  A material for forming the semiconductor layer 54 is an amorphous semiconductor (hereinafter also referred to as “AS”) manufactured by a vapor deposition method or a sputtering method using a semiconductor material gas typified by silane or germane, and the amorphous semiconductor. A polycrystalline semiconductor crystallized using light energy or thermal energy, or a semi-amorphous (also referred to as microcrystal or microcrystal; hereinafter also referred to as “SAS”) semiconductor can be used. The semiconductor layer can be formed by a known means (such as sputtering, LPCVD, or plasma CVD).

SAS is a semiconductor having an intermediate structure between amorphous and crystalline structures (including single crystal and polycrystal) and having a third state that is stable in terms of free energy and has a short-range order and a lattice. It includes a crystalline region with strain. A crystal region of 0.5 to 20 nm can be observed in at least a part of the film, and when silicon is the main component, the Raman spectrum shifts to a lower wave number side than 520 cm ^−1. Yes. In X-ray diffraction, diffraction peaks of (111) and (220) that are derived from the silicon crystal lattice are observed. At least 1 atomic% or more of hydrogen or halogen is contained as a neutralizing agent for dangling bonds. The SAS is formed by glow discharge decomposition (plasma CVD) of a silicide gas. As the silicide gas, SiH ₄ , Si ₂ H ₆ , SiH ₂ Cl ₂ , SiHCl ₃ , SiCl ₄ , SiF _{4, and the} like can be used. Further, F ₂ and GeF ₄ may be mixed. This silicide gas may be diluted with H ₂ , or H ₂ and one or more kinds of rare gas elements selected from He, Ar, Kr, and Ne. The dilution rate is in the range of 2 to 1000 times, the pressure is in the range of approximately 0.1 Pa to 133 Pa, and the power supply frequency is 1 MHz to 120 MHz, preferably 13 MHz to 60 MHz. The substrate heating temperature is preferably 300 ° C. or lower, and can be formed even at a substrate heating temperature of 100 to 200 ° C. Here, as an impurity element mainly taken in at the time of film formation, it is desirable that impurities derived from atmospheric components such as oxygen, nitrogen, and carbon be 1 × 10 ²⁰ cm ⁻³ or less, and in particular, the oxygen concentration is 5 × 10 5. It is preferable to be ¹⁹ cm ⁻³ or less, preferably 1 × 10 ¹⁹ cm ⁻³ or less. Further, by adding a rare gas element such as helium, argon, krypton, or neon to further promote lattice distortion, stability is improved and a favorable SAS can be obtained. In addition, a SAS layer formed of a hydrogen-based gas may be stacked on a SAS layer formed of a fluorine-based gas as a semiconductor layer.

  A typical example of an amorphous semiconductor is hydrogenated amorphous silicon, and a typical example of a crystalline semiconductor is polysilicon. Polysilicon (polycrystalline silicon) is mainly made of so-called high-temperature polysilicon using polysilicon formed through a process temperature of 800 ° C. or higher as a main material, or polysilicon formed at a process temperature of 600 ° C. or lower. And so-called low-temperature polysilicon, and polysilicon crystallized by adding an element that promotes crystallization. Of course, as described above, a semi-amorphous semiconductor or a semiconductor including a crystal phase in a part of the semiconductor layer can also be used.

In the case where a crystalline semiconductor layer is used for the semiconductor layer, a method for manufacturing the crystalline semiconductor layer can be a known method (laser crystallization method, thermal crystallization method, or heat using an element that promotes crystallization such as nickel. A crystallization method or the like may be used. In addition, a microcrystalline semiconductor that is a SAS can be crystallized by laser irradiation to improve crystallinity. In the case where an element for promoting crystallization is not introduced, the amorphous silicon film is heated at 500 ° C. for 1 hour in a nitrogen atmosphere before irradiating the amorphous silicon film with laser light, whereby the concentration of hydrogen contained in the amorphous silicon film is set to 1 ×. Release to 10 ²⁰ atoms / cm ³ or less. This is because the film is destroyed when the amorphous silicon film containing a large amount of hydrogen is irradiated with laser light.

  The method of introducing the metal element into the amorphous semiconductor layer is not particularly limited as long as the metal element can be present on the surface of the amorphous semiconductor layer or inside the amorphous semiconductor layer. For example, sputtering, CVD, A plasma treatment method (including a plasma CVD method), an adsorption method, or a method of applying a metal salt solution can be used. Among these, the method using a solution is simple and useful in that the concentration of the metal element can be easily adjusted. At this time, in order to improve the wettability of the surface of the amorphous semiconductor layer and to spread the aqueous solution over the entire surface of the amorphous semiconductor layer, irradiation with UV light in an oxygen atmosphere, thermal oxidation method, hydroxy radical It is desirable to form an oxide film by treatment with ozone water or hydrogen peroxide.

  The crystallization of the amorphous semiconductor layer may be a combination of heat treatment and crystallization by laser light irradiation, or may be performed multiple times by heat treatment or laser light irradiation alone.

  Alternatively, the crystalline semiconductor layer may be directly formed over the substrate by a linear plasma method. Alternatively, the crystalline semiconductor layer may be selectively formed over the substrate by a linear plasma method.

  As a semiconductor, an organic semiconductor material can be used and formed by a printing method, a spray method, a spin coating method, a droplet discharge method, or the like. In this case, the number of processes can be reduced because the etching process is not necessary. As the organic semiconductor, a low molecular material, a polymer material, or the like is used, and materials such as an organic dye or a conductive polymer material can also be used. The organic semiconductor material used in the present invention is preferably a π-electron conjugated polymer material whose skeleton is composed of conjugated double bonds. Typically, a soluble polymer material such as polythiophene, polyfluorene, poly (3-alkylthiophene), a polythiophene derivative, or pentacene can be used.

  In addition, as an organic semiconductor material that can be used in the present invention, there is a material that can form a first semiconductor region by processing after forming a soluble precursor. Examples of the organic semiconductor material that passes through such a precursor include polythienylene vinylene, poly (2,5-thienylene vinylene), polyacetylene, a polyacetylene derivative, and polyarylene vinylene.

  When converting the precursor into an organic semiconductor, a reaction catalyst such as hydrogen chloride gas is added as well as heat treatment. Typical solvents for dissolving these soluble organic semiconductor materials include toluene, xylene, chlorobenzene, dichlorobenzene, anisole, chloroform, dichloromethane, γ-butyllactone, butyl cellosolve, cyclohexane, NMP (N-methyl-2 -Pyrrolidone), cyclohexanone, 2-butanone, dioxane, dimethylformamide (DMF), THF (tetrahydrofuran), or the like can be applied.

    Since the first gate electrode layer 52a and the first gate electrode layer 52b are formed so as to have a recess, the first gate electrode layer 52a and the first gate electrode layer 52b are formed on the first gate electrode layer 52b. The shape of the recess is also reflected in the insulating layer 53, the semiconductor layer 54, and the second insulating layer 55. Therefore, a recess is also formed on the surface of the second insulating layer 55. The region of the recess overlaps the first gate electrode layer 52a, the first gate electrode layer 52b, the first insulating layer, the semiconductor layer 54, and the second insulating layer 55, and the second gate electrode This is a layer formation region. A composition 58 containing a conductive material is discharged into the recess 71 by using a droplet discharge means 57 to form a second gate electrode layer 56 (see FIGS. 1C and 1G). The discharged composition 58 containing a conductive material flows into and stays in the recess 71 and does not flow to the formation region. By discharging a composition containing a conductive material into the recess, the second gate electrode layer can be formed in a desired region with good controllability. Therefore, a thin film transistor can be manufactured in a self-aligned manner (self-alignment) without performing a patterning step. In this manner, a thin film transistor with high electrical characteristics can be manufactured in a self-aligned manner.

    In order to improve electrical characteristics, it is preferable that the first gate electrode layer and the second gate electrode layer overlap with each other with the semiconductor layer interposed therebetween. Therefore, when there are a plurality of first gate electrode layers formed under the semiconductor layer (when the first gate electrode layers are separated from each other under the semiconductor layer), the first gate electrode layers are separated from each other. The width in the channel width direction of the second gate electrode layer is preferably larger than the distance.

Before forming the second gate electrode layer 56, a through hole reaching the gate wiring layer 51 is formed in the second insulating layer and the first insulating layer. Either plasma etching (dry etching) or wet etching may be employed for the etching process when forming the through hole, but plasma etching is suitable for processing a large area substrate. As an etching gas, a fluorine-based or chlorine-based gas such as CF ₄ , NF ₃ , Cl ₂ , or BCl ₃ may be used, and an inert gas such as He or Ar may be appropriately added. Further, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate. When the second gate electrode layer 56 is formed, the second gate electrode layer 56 and the gate wiring layer 51 are electrically connected to fill the through hole. Accordingly, the first gate electrode layer 52a, the first gate electrode layer 52b, and the second gate electrode layer 56 can be simultaneously driven at the same potential, and the channel region is spread above and below the semiconductor layer 54, so that the thin film transistor is turned on. As the current increases, the S value also improves. Therefore, the power supply voltage can be lowered and the power consumption can be reduced. According to the present invention, the electrical characteristics of the thin film transistor are improved.

    In this embodiment mode, the gate wiring layer 51, the first gate electrode layer 52a, the first gate electrode layer 52a, and the second gate electrode layer 56 are formed using a droplet discharge unit. The droplet discharge means is a general term for a device having means for discharging droplets such as a nozzle having a composition discharge port and a head having one or a plurality of nozzles. The diameter of the nozzle provided in the droplet discharge means is set to 0.02 to 100 μm (preferably 30 μm or less), and the discharge amount of the composition discharged from the nozzle is 0.001 pl to 100 pl (preferably 0). .1pl or more and 40pl or less, more preferably 10pl or less). The discharge amount increases in proportion to the size of the nozzle diameter. In addition, the distance between the object to be processed and the nozzle outlet is preferably as close as possible in order to drop it at a desired location, preferably about 0.1 to 3 mm (preferably about 1 mm or less). Set.

  A composition in which a conductive material is dissolved or dispersed in a solvent is used as the composition discharged from the discharge port. Conductive materials include metals such as Ag, Au, Cu, Ni, Pt, Pd, Ir, Rh, W, and Al, metal sulfides of Cd, Zn, Fe, Ti, Si, Ge, Si, Zr, Ba It corresponds to oxides such as silver halide fine particles or dispersible nanoparticles. Further, it corresponds to indium tin oxide (ITO) used as a transparent conductive film, ITSO composed of indium tin oxide and silicon oxide, organic indium, organic tin, zinc oxide, titanium nitride, and the like. However, it is preferable to use a composition in which any of gold, silver and copper is dissolved or dispersed in a solvent in consideration of the specific resistance value, more preferably the composition discharged from the discharge port. It is preferable to use low resistance silver or copper. However, when silver or copper is used, a barrier film may be provided as a countermeasure against impurities. As the barrier film, a silicon nitride film or nickel boron (NiB) can be used.

  Alternatively, particles in which a conductive material is coated with another conductive material to form a plurality of layers may be used. For example, particles having a three-layer structure in which nickel boron (NiB) is coated around copper and silver is coated around it may be used. As the solvent, esters such as butyl acetate and ethyl acetate, alcohols such as isopropyl alcohol and ethyl alcohol, organic solvents such as methyl ethyl ketone and acetone are used. The viscosity of the composition is preferably 20 cp or less, in order to prevent drying from occurring or to allow the composition to be smoothly discharged from the discharge port. The surface tension of the composition is preferably 40 mN / m or less. However, the viscosity and the like of the composition may be appropriately adjusted according to the solvent to be used and the application. As an example, the viscosity of a composition in which ITO, organic indium, or organic tin is dissolved or dispersed in a solvent is 5 to 20 mPa · S, and the viscosity of a composition in which silver is dissolved or dispersed in a solvent is 5 to 20 mPa · S. The viscosity of the composition in which gold is dissolved or dispersed in a solvent is preferably set to 5 to 20 mPa · S.

  The conductive layer may be a stack of a plurality of conductive materials. Alternatively, first, silver may be used as a conductive material, and a conductive layer may be formed by a droplet discharge method, followed by plating with copper or the like. Plating may be performed by electroplating or chemical (electroless) plating. For plating, the substrate surface may be immersed in a container filled with a solution having a plating material, but the substrate is placed at an angle (or vertically) so that the solution having the material to be plated flows on the substrate surface. It may be applied. When plating is performed so that the solution is applied while standing the substrate, there is an advantage that the process apparatus is downsized.

  Although depending on the diameter of each nozzle and the desired pattern shape, the diameter of the conductor particles is preferably as small as possible for preventing nozzle clogging and producing a high-definition pattern. 1 μm or less is preferable. The composition is formed by a known method such as an electrolytic method, an atomizing method, or a wet reduction method, and its particle size is generally about 0.01 to 10 μm. However, when formed in a gas evaporation method, the nanomolecules protected with the dispersant are as fine as about 7 nm. When the surface of each particle is covered with a coating agent, the nanoparticles are aggregated in the solvent. And stably disperse at room temperature and shows almost the same behavior as liquid. Therefore, it is preferable to use a coating agent.

  In the present invention, since the fluidity of the composition of the fluid is used to process it into a desired pattern shape, the composition needs to have fluidity even when it reaches the object to be treated. However, as long as the fluidity is not lost, the step of discharging the composition may be performed under reduced pressure. Further, it is preferable to perform under reduced pressure because an oxide film or the like is not formed on the surface of the conductor. After discharging the composition, one or both steps of drying and baking are performed. The drying and baking steps are both heat treatment steps. For example, drying is performed at 100 degrees for 3 minutes, and baking is performed at 200 to 350 degrees for 15 minutes to 30 minutes. Time is different. The drying process and the firing process are performed under normal pressure or reduced pressure by laser light irradiation, rapid thermal annealing, a heating furnace, or the like. In addition, the timing which performs this heat processing is not specifically limited. In order to satisfactorily perform the drying and firing steps, the substrate may be heated, and the temperature at that time depends on the material of the substrate or the like, but is generally 100 to 800 degrees (preferably 200). ~ 350 degrees). By this step, the solvent in the composition is volatilized or the dispersant is chemically removed, and the surrounding resin is cured and contracted to bring the nanoparticles into contact with each other, thereby accelerating fusion and fusion.

For the laser light irradiation, a continuous wave or pulsed gas laser or solid-state laser may be used. Examples of the former gas laser include an excimer laser and a YAG laser, and examples of the latter solid-state laser include a laser using a crystal such as YAG, YVO ₄ , and GdVO ₄ doped with Cr, Nd, or the like. . Note that it is preferable to use a continuous wave laser because of the absorption rate of the laser light. In addition, a so-called hybrid laser irradiation method combining pulse oscillation and continuous oscillation may be used. However, depending on the heat resistance of the substrate, the heat treatment by laser light irradiation may be performed instantaneously within a few microseconds to several tens of seconds so as not to destroy the substrate. Instantaneous thermal annealing (RTA) uses an infrared lamp or a halogen lamp that irradiates ultraviolet light or infrared light in an inert gas atmosphere, and rapidly raises the temperature for several minutes to several microseconds. This is done by applying heat instantaneously. Since this treatment is performed instantaneously, only the outermost thin film can be heated substantially without affecting the lower layer film. That is, it does not affect a substrate having low heat resistance such as a plastic substrate.

  Alternatively, the gate electrode layer or the like may be formed by discharging a composition by a droplet discharge method, and then the surface may be pressed and flattened by pressure in order to improve the flatness. As a pressing method, unevenness may be reduced by scanning a roller-like object on the surface, or the surface may be pressed vertically with a flat plate-like object. A heating step may be performed when pressing. Alternatively, the surface may be softened or melted with a solvent or the like, and the surface irregularities may be removed with an air knife. Further, polishing may be performed using a CMP method. This step can be applied when the surface is flattened when unevenness is generated by the droplet discharge method.

    In the case of using a droplet discharge method, a base film may be formed in order to improve adhesion between a pattern and a formation region. For example, when a conductive material containing silver is applied to the substrate as the first gate electrode layer to form a silver wiring, a titanium oxide film may be formed on the substrate in order to improve adhesion. Since the titanium oxide film has good adhesion to a conductive material containing silver to be formed, reliability is improved.

    Using the second gate electrode layer 56 as a mask, the second insulating layer is patterned by etching, and the source or drain electrode layer 59a and the source or drain electrode layer 59b are formed in contact with the semiconductor layer 54 (FIG. 1 (D) and (H).) In this embodiment, the source or drain electrode layer 59a and the source or drain electrode layer 59b are formed by a droplet discharge method in which a composition containing a conductive material is discharged.

  Examples of the conductive material for forming the source or drain electrode layer 59a and the source or drain electrode layer 59b include Ag (silver), Au (gold), Cu (copper), W (tungsten), and Al (aluminum). A composition mainly composed of metal particles such as the above can be used. Further, light-transmitting indium tin oxide (ITO), ITSO made of indium tin oxide and silicon oxide, organic indium, organic tin, zinc oxide, titanium nitride, or the like may be combined.

    Through the above steps, the dual-gate thin film transistor of this embodiment is completed. According to the present invention, since the process is simplified, there is little material loss and cost reduction can be achieved. Further, the pattern can be formed with good controllability. Further, a thin film transistor with high electrical characteristics can be manufactured. Therefore, a high-performance and highly reliable display device can be manufactured with high yield.

(Embodiment 2)
An embodiment of the present invention will be described with reference to FIGS. 2 to 9, FIG. 14, and FIG. More specifically, a method for manufacturing a display device having a dual-gate thin film transistor to which the present invention is applied will be described. 3A to 8A are top views of the pixel portion of the display device, FIGS. 3A to 8B are cross-sectional views taken along line A-C in FIGS. 3A to 8A, and FIG. FIG. 6 is a sectional view taken along line BD.

  FIG. 14A is a top view illustrating a structure of a display panel according to the present invention. A pixel portion 2701 in which pixels 2702 are arranged in a matrix over a substrate 2700 having an insulating surface, a scan line side input terminal 2703, a signal A line side input terminal 2704 is formed. The number of pixels may be provided in accordance with various standards. For XGA, 1024 × 768 × 3 (RGB), for UXGA, 1600 × 1200 × 3 (RGB), and for full specification high vision, 1920 × 1080. X3 (RGB) may be used.

  The pixels 2702 are arranged in a matrix by a scan line extending from the scan line side input terminal 2703 and a signal line extending from the signal line side input terminal 2704 intersecting. Each of the pixels 2702 includes a switching element and a pixel electrode connected to the switching element. A typical example of the switching element is a TFT. By connecting the gate electrode side of the TFT to a scanning line and the source or drain side to a signal line, each pixel can be controlled independently by a signal input from the outside. Yes.

  FIG. 14A shows the structure of a display panel in which signals input to the scanning lines and signal lines are controlled by an external driver circuit. As shown in FIG. 15A, a COG (Chip on The driver IC 2751 may be mounted on the substrate 2700 by the Glass method. As another mounting mode, a TAB (Tape Automated Bonding) method as shown in FIG. 15B may be used. The driver IC may be formed on a single crystal semiconductor substrate or may be a circuit in which a TFT is formed on a glass substrate. In FIG. 15, the driver IC 2751 is connected to an FPC (Flexible printed circuit) 2750.

  In the case where a TFT provided for a pixel is formed using SAS, a scan line driver circuit 3702 can be formed over the substrate 3700 and integrated as shown in FIG. 14B, the pixel portion 3701 is controlled by an external driver circuit as in FIG. 14A connected to the signal line side input terminal 3704. In the case where a TFT provided for a pixel is formed using a polycrystalline (microcrystalline) semiconductor, a single crystal semiconductor, or the like with high mobility, FIG. 14C illustrates a pixel portion 4701, a scan line driver circuit 4702, and a signal line driver circuit. 4704 can be integrally formed on the substrate 4700.

  As the substrate 100, a glass substrate made of barium borosilicate glass, alumino borosilicate glass, or the like, a quartz substrate, a silicon substrate, a metal substrate, a stainless steel substrate, or a plastic substrate having heat resistance that can withstand the processing temperature in this manufacturing process is used. Further, polishing may be performed by a CMP method or the like so that the surface of the substrate 100 is planarized. Note that an insulating layer may be formed over the substrate 100. The insulating layer is formed as a single layer or a stacked layer using an oxide material or a nitride material containing silicon by a known method such as a CVD method, a plasma CVD method, a sputtering method, or a spin coating method. This insulating layer may not be formed, but has an effect of blocking contaminants from the substrate 100.

    On the substrate 100, a gate wiring layer 102, a first gate electrode layer 103a, a first gate electrode layer 103b, a first gate electrode layer 104, a first gate electrode layer 105a, a first gate electrode layer 105a, A first gate electrode layer 105b is formed (see FIG. 2). The first gate electrode layer 103a and the first gate electrode layer 103b are connected to the gate wiring layer 102 and are formed adjacent to each other. The first gate electrode layer 103a and the first gate electrode layer 103b are formed so as to have a concave portion having a shape on the groove therebetween. Similarly, the first gate electrode layer 105a and the first gate electrode layer 105b are connected to the first gate electrode layer 104 and formed adjacent to each other. The first gate electrode layer 105a and the first gate electrode layer 105b are formed so as to have a concave portion on the groove therebetween.

  Gate wiring layer 102, first gate electrode layer 103a, first gate electrode layer 103b, first gate electrode layer 104, first gate electrode layer 105a, first gate electrode layer 105a, first gate electrode The layer 105b can be formed by a CVD method, a sputtering method, a droplet discharge method, or the like. Gate wiring layer 102, first gate electrode layer 103a, first gate electrode layer 103b, first gate electrode layer 104, first gate electrode layer 105a, first gate electrode layer 105a, first gate electrode The layer 105b may be formed of an element selected from Ta, W, Ti, Mo, Al, and Cu, or an alloy material or a compound material containing the element as a main component. Alternatively, a semiconductor film typified by a polycrystalline silicon film doped with an impurity element such as phosphorus, or an AgPdCu alloy may be used. Alternatively, a single-layer structure or a multi-layer structure may be used. For example, a two-layer structure of a tungsten nitride (TiN) film and a molybdenum (Mo) film may be used, a 50-nm-thick tungsten film, a 500-nm-thick aluminum film, A three-layer structure in which a silicon alloy (Al—Si) film and a titanium nitride film with a thickness of 30 nm are sequentially stacked may be employed. In the case of a three-layer structure, tungsten nitride may be used instead of tungsten of the first conductive film, or aluminum instead of the aluminum and silicon alloy (Al-Si) film of the second conductive film. A titanium alloy film (Al—Ti) may be used, or a titanium film may be used instead of the titanium nitride film of the third conductive film.

Gate wiring layer 102, first gate electrode layer 103a, first gate electrode layer 103b, first gate electrode layer 104, first gate electrode layer 105a, first gate electrode layer 105a, first gate electrode In the case where patterning is required for the shape of the layer 105b, a mask may be formed and patterned by dry etching or dry etching. Using an ICP (Inductively Coupled Plasma) etching method, the etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side, the electrode temperature on the substrate side, etc.) are appropriately set. By adjusting, the electrode layer can be etched into a tapered shape. As an etching gas, a chlorine-based gas typified by Cl ₂ , BCl ₃ , SiCl _4, CCl _4, etc., a fluorine-based gas typified by CF ₄ , SF _6, NF _3, etc., or O ₂ is appropriately used. be able to.

  A mask for patterning can be formed by selectively discharging a composition. Such selective mask formation has the effect of simplifying the patterning process. For the mask, a resin material such as an epoxy resin, an acrylic resin, a phenol resin, a novolac resin, an acrylic resin, a melamine resin, or a urethane resin is used. Also, using organic materials such as benzocyclobutene, parylene, flare, permeable polyimide, compound materials made by polymerization of siloxane polymers, composition materials containing water-soluble homopolymers and water-soluble copolymers, etc. And formed by a droplet discharge method. Alternatively, a commercially available resist material containing a photosensitizer may be used. For example, a novolak resin that is a typical positive resist and a naphthoquinonediazide compound that is a photosensitizer, a base resin that is a negative resist, diphenylsilanediol, and An acid generator or the like may be used. Whichever material is used, the surface tension and viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like.

    In this embodiment, the gate wiring layer 102, the first gate electrode layer 103a, the first gate electrode layer 103b, the first gate electrode layer 104, the first gate electrode layer 105a, and the first gate electrode layer 105a The first gate electrode layer 105b is formed by the droplet discharge means 180a and the droplet discharge means 180b using a composition containing a conductive material containing silver.

  Next, the gate wiring layer 102, the first gate electrode layer 103a, the first gate electrode layer 103b, the first gate electrode layer 104, the first gate electrode layer 105a, the first gate electrode layer 105a, the first A first insulating layer 106 is formed over the gate electrode layer 105b. A semiconductor layer is formed over the first insulating layer 106, and an N-type semiconductor layer is formed thereon as a semiconductor layer having one conductivity type. Patterning is performed using a mask or the like to form a semiconductor layer 107, a semiconductor layer 108, an N-type semiconductor layer 109, and an N-type semiconductor layer 110 (see FIG. 3). The semiconductor layer 107, the semiconductor layer 108, the N-type semiconductor layer 109, and the N-type semiconductor layer 110 use silicon which is an inorganic material in this embodiment mode; however, an organic semiconductor such as pentacene as described above can also be used. . When the organic semiconductor is selectively formed by a droplet discharge method or the like, the patterning process can be simplified. The first insulating layer 106 may be formed of a known material such as a silicon oxide material or a nitride material, and may be a stacked layer or a single layer. In this embodiment, a stacked layer of a silicon nitride film, a silicon oxide film, and a silicon nitride film is used as the first insulating layer.

  In this embodiment mode, a pattern is selectively formed using a difference in wettability. A substance having low wettability is formed on a composition including a pattern forming material to be formed in advance in a non-pattern forming region. Therefore, regions having different wettability with respect to the composition containing the pattern forming material are formed in the vicinity of the pattern formation region. This difference in wettability is a relative relationship between the two regions, and if there is a difference in the wettability with respect to the composition containing the pattern forming material between the pattern formation region and the surrounding non-formation region. Good. In addition, a region having different wettability means that a contact angle of a composition containing a pattern forming material is different, and a region having a large contact angle of a composition containing a pattern forming material is a region having lower wettability (hereinafter referred to as a low wettability). A region having a small contact angle is a region having high wettability (hereinafter also referred to as a high wettability region). When the contact angle is large, the liquid composition having fluidity does not spread on the surface of the region and repels the composition, so that the surface is not wetted. However, when the contact angle is small, the composition has fluidity on the surface. Because it spreads out and wets the surface well. Therefore, regions having different wettability also have different surface energies. The surface energy of the surface in the region with low wettability is small, and the surface energy at the surface of the region with high wettability is large. In the present invention, the difference in contact angle between the regions having different wettability is 30 degrees or more, preferably 40 degrees or more.

    A composition containing a substance with low wettability is discharged over the N-type semiconductor layer 109 and the N-type semiconductor layer 110 by the droplet discharge unit 181a and the droplet discharge unit 181b, and the low wettability substance 150a and the low wettability substance are discharged. 150b is formed. The regions where the low wettability substance 150a and the low wettability substance 150b are formed are formed using the first gate electrode layer 103a and the first gate electrode layer 103b in the present invention by the first gate electrode layer 105a and the first gate electrode layer 103b. The concave portion formed by the gate electrode layer 105b is reflected, and a liquid composition with low wettability flows, so that the composition does not spread to the non-formation region. Therefore, the material 150a with low wettability and the material 150b with low wettability can be formed in a desired region with a desired shape and good controllability. Then, a composition containing a mask pattern material to be the mask 101 is formed by a coating method or the like. Due to the difference in wettability of the formation region, the composition containing the mask pattern forming material is repelled by the low wettability substance 150a and the low wettability substance 150b and does not adhere. Therefore, the mask 101 is selectively formed except for regions where the low wettability substance 150a and the low wettability substance 150b are formed (see FIG. 4).

    In addition, the process of reducing wettability is to lower the force that keeps the droplets discharged onto the area (also referred to as adhesion and adhesion) to be lower than the surrounding area. However, it is also synonymous with lowering the adhesion to the droplets. Further, the wettability may be only on the surface that is in contact with the liquid droplet and is retained, and it is not always necessary to have the same property throughout the film thickness direction.

As an example of the composition of the solution that forms the low wettability region, a silane coupling agent represented by a chemical formula of R _n —Si—X _(4-n) (n = 1, 2, 3) is used. Here, R is a substance containing a relatively inert group such as an alkyl group. X is a hydrolyzable group such as halogen, methoxy group, ethoxy group or acetoxy group, which can be bonded by condensation with a hydroxyl group on the substrate surface or adsorbed water.

Further, as a representative example of the silane coupling agent, wettability can be further reduced by using a fluorine-based silane coupling agent (fluoroalkylsilane (FAS)) having a fluoroalkyl group in R. R of FAS has a structure represented by (CF ₃ ) (CF ₂ ) _x (CH ₂ ) _y (x: an integer of 0 or more and 10 or less, y: an integer of 0 or more and 4 or less), and a plurality of R Alternatively, when X is bonded to Si, R and X may all be the same or different. As typical FAS, fluoroalkylsilanes (hereinafter also referred to as FAS) such as heptadefluorotetrahydrodecyltriethoxysilane, heptadecafluorotetrahydrodecyltrichlorosilane, tridecafluorotetrahydrooctyltrichlorosilane, and trifluoropropyltrimethoxysilane. ).

  Solvents for the solution forming the low wettability region include n-pentane, n-hexane, n-heptane, n-octane, n-decane, dicyclopentane, benzene, toluene, xylene, durene, indene, tetrahydronaphthalene, deca Hydrocarbon solvents such as hydronaphthalene and squalane, tetrahydrofuran, dioxan, ethanol, dimethyl sulfoxide and the like can be used.

  In addition, as an example of a composition of a solution that forms the low wettability region, a substance having a fluorocarbon chain (fluorine-based resin) can be used. Examples of fluorine resins include polytetrafluoroethylene (PTFE; tetrafluoroethylene resin), perfluoroalkoxyalkane (PFA; tetrafluoroethylene perfluoroalkyl vinyl ether copolymer resin), and perfluoroethylene propene copolymer (PFEP; four fluoropolymer). Ethylene-hexafluoropropylene copolymer resin), ethylene-tetrafluoroethylene copolymer (ETFE; tetrafluoroethylene-ethylene copolymer resin), polyvinylidene fluoride (PVDF; vinylidene fluoride resin), polychlorotrifluoroethylene (PCTFE; trifluoroethylene chloride resin), ethylene-chlorotrifluoroethylene copolymer (ECTFE; trifluoroethylene chloride-ethylene copolymer resin), polytetrafluoroethylene-perfluorodioxide Rukoporima (TFE / PDD), polyvinyl fluoride (PVF; a vinyl fluoride resin), or the like can be used.

Alternatively, a low wettability region may be formed by using an organic material that does not form a low wettability region (that is, a high wettability region) and then performing a treatment with CF ₄ plasma or the like. For example, a material in which a water-soluble resin such as polyvinyl alcohol (PVA) is mixed with a solvent such as H ₂ O can be used. Moreover, you may use combining PVA and another water-soluble resin. Organic material (organic resin material) (polyimide, acrylic) or skeleton structure is composed of a bond of silicon (Si) and oxygen (O), a material containing at least hydrogen as a substituent, or fluorine, alkyl group as a substituent, Alternatively, a material having at least one of aromatic hydrocarbons may be used. Further, even with a material having a low wettability region, wettability can be further reduced by performing plasma treatment or the like.

  For the mask, a resin material such as an epoxy resin, an acrylic resin, a phenol resin, a novolac resin, an acrylic resin, a melamine resin, or a urethane resin is used. Also, using organic materials such as benzocyclobutene, parylene, flare, permeable polyimide, compound materials made by polymerization of siloxane polymers, composition materials containing water-soluble homopolymers and water-soluble copolymers, etc. And formed by a droplet discharge method. Alternatively, a commercially available resist material containing a photosensitizer may be used. For example, a novolak resin that is a typical positive resist and a naphthoquinonediazide compound that is a photosensitizer, a base resin that is a negative resist, diphenylsilanediol, and An acid generator or the like may be used. Whichever material is used, the surface tension and viscosity are appropriately adjusted by adjusting the concentration of the solvent or adding a surfactant or the like.

      The low wettability substance 150a and the low wettability substance 150b can be removed by ashing, etching, plasma treatment, or the like using oxygen or the like, and the N-type semiconductor layer 109 and the N-type semiconductor layer 110 can be etched using the mask 101. . Thus, the patterning process of the mask 101 can be omitted and the process can be further simplified. In this embodiment mode, FAS is used as a substance with low wettability, and polyimide is used as a mask.

    A second insulating layer 130 is formed over the semiconductor layer, the N-type semiconductor layer, and the first insulating layer 106 (see FIG. 5). In this embodiment, a silicon oxide film is formed as the second insulating layer 130.

    Since the first gate electrode layer 103a, the first gate electrode layer 103b, the first gate electrode layer 105a, and the first gate electrode layer 105b are formed to have a recess, their first gate electrodes The shape of the recess also reflects in the first insulating layer 106, the semiconductor layer 107, the semiconductor layer 108, the N-type semiconductor layer 109, the N-type semiconductor layer 110, and the second insulating layer 130 formed over the layers. Accordingly, the recess 72a and the recess 72b are also formed on the surface of the second insulating layer 130. The regions of the recesses 72a and 72b overlap with the first gate electrode layer 103a and the first gate electrode layer 103b, the first gate electrode layer 105a and the first gate electrode layer 105b, and the second gate This is a region where the electrode layer 115 and the second gate electrode layer 116 are formed. The second gate electrode layer 115 and the second gate electrode layer 116 are formed by discharging a composition containing a conductive material to the recesses 72a and 72b using the droplet discharge unit 182a and the droplet discharge unit 182b. (See FIG. 6). The discharged composition containing the conductive material flows into and stays in the recesses 72a and 72b and does not flow to the formation region. By discharging a composition containing a conductive material into the recesses 72a and 72b, the second gate electrode layer 115 and the second gate electrode layer 116 can be formed in desired regions with high controllability. Therefore, a thin film transistor can be manufactured in a self-aligned manner (self-alignment) without performing a patterning step. In this manner, a thin film transistor with high electrical characteristics can be manufactured in a self-aligned manner.

Before forming the second gate electrode layer 115 and the second gate electrode layer 116, the gate wiring layer 102, the first gate electrode layer 104, and the first gate are formed on the second insulating layer and the first insulating layer. A through hole 132a, a through hole 132b, and a through hole 145 reaching the electrode layer 105a and the first gate electrode layer 105b are formed. Either plasma etching (dry etching) or wet etching may be employed for the etching process when forming the through hole, but plasma etching is suitable for processing a large area substrate. As an etching gas, a fluorine-based or chlorine-based gas such as CF ₄ , NF ₃ , Cl ₂ , or BCl ₃ may be used, and an inert gas such as He or Ar may be appropriately added. Further, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate. When the second gate electrode layer 115 and the second gate electrode layer 116 are formed, the through hole 132a and the through hole 132b are formed so as to be filled, and the second gate electrode layer 115, the gate wiring layer 102, the first The two gate electrode layers 116, the first gate electrode layer 105a, and the first gate electrode layer 105b are electrically connected to each other. Accordingly, the first gate electrode layer 103a, the first gate electrode layer 103b, the second gate electrode layer 115, the first gate electrode layer 105a, the first gate electrode layer 105b, and the second gate electrode layer. 116 can be driven simultaneously at the same potential, and the channel region extends above and below the semiconductor layer, so that the on-current of the thin film transistor increases and the S value also improves. Therefore, the power supply voltage can be lowered and the power consumption can be reduced. According to the present invention, the electrical characteristics of the thin film transistor are improved.

  In this embodiment mode, when the mask is formed by a droplet discharge method, a region in which the wettability is different may be formed in the vicinity of the formation region as a pretreatment. In the present invention, when a pattern is formed by discharging droplets by the droplet discharge method, a low wettability region and a high wettability region can be formed in a pattern formation region, and the shape of the pattern can be controlled. By performing this process on the formation region, there is a difference in wettability in the formation region, so that droplets remain only in the formation region with high wettability, and a pattern can be formed with good controllability. This step can be applied as a pretreatment for forming any pattern when a liquid material is used.

    The second insulating layer 130 is removed using the second gate electrode layer 115 and the second gate electrode layer 116 as a mask. In this embodiment mode, etching is performed under a condition where the selection ratio between the first insulating layer 106 and the second insulating layer 130 is high, so that only the second insulating layer 130 is removed. When the first insulating layer and the second insulating layer are formed using the same material and the etching selectivity is low, the first insulating layer 106 can be removed by etching at the same time. A source or drain electrode layer 111, a source or drain electrode layer 112, a source or drain electrode layer 113, and a source or drain electrode layer 114 are formed (see FIG. 7). In this embodiment mode, a droplet discharge method is used.

  The source or drain electrode layer 111 also functions as a source wiring layer, and the source or drain electrode layer 113 also functions as a power supply line.

  As a conductive material for forming the source or drain electrode layer 111, the source or drain electrode layer 112, the source or drain electrode layer 113, and the source or drain electrode layer 114, Ag (silver), Au A composition mainly composed of metal particles such as (gold), Cu (copper), W (tungsten), and Al (aluminum) can be used. Further, light-transmitting indium tin oxide (ITO), ITSO made of indium tin oxide and silicon oxide, organic indium, organic tin, zinc oxide, titanium nitride, or the like may be combined.

  In the through hole 145 formed in the first insulating layer 106, the source or drain electrode layer 112 and the first gate electrode layer 104 are electrically connected. A part of the source electrode layer or the drain electrode layer forms a capacitor element.

  In addition, in order to improve adhesion to a pattern by a droplet discharge method as a pretreatment, an organic material substance that functions as an adhesive may be formed. In this case, a process for forming regions having different wettability may be performed on this substance. Organic material (organic resin material) (polyimide, acrylic) or skeleton structure is composed of a bond of silicon (Si) and oxygen (O), a material containing at least hydrogen as a substituent, or fluorine, alkyl group as a substituent, Alternatively, a material having at least one of aromatic hydrocarbons may be used.

In this embodiment, the first electrode layer 117 is formed by selectively discharging a composition containing a conductive material over the first insulating layer 106 (see FIG. 8). The first electrode layer 117 is formed of indium tin oxide (ITO) or indium tin containing silicon oxide when light is emitted from the light-transmitting substrate 100 side or a transmissive display panel is manufactured. Oxide (ITSO), indium zinc oxide (IZO) containing zinc oxide (ZnO), zinc oxide (ZnO), ZnO doped with gallium (Ga), tin oxide (SnO ₂ ), etc. A predetermined pattern may be formed with a composition containing, and may be formed by firing.

  Further, it is preferably formed of indium tin oxide (ITO), indium tin oxide containing silicon oxide (ITSO), zinc oxide (ZnO), or the like by a sputtering method. More preferably, indium tin oxide containing silicon oxide is used by a sputtering method using a target containing 2 to 10% by weight of silicon oxide in ITO. In addition, indium zinc oxide (IZO (IZO), which is a conductive material obtained by doping ZnO with gallium (Ga), and an oxide conductive material containing silicon oxide and indium oxide mixed with 2 to 20% zinc oxide (ZnO). indium zinc oxide)) may be used. After the first electrode layer 117 is formed by a sputtering method, a mask layer may be formed by a droplet discharge method and formed into a desired pattern by etching. In this embodiment mode, the first electrode layer 117 is formed using a light-transmitting conductive material by a droplet discharge method, and specifically includes indium tin oxide, ITO, and silicon oxide. It is formed using ITSO.

  In the present embodiment, the first insulating layer has been described as an example of three layers of silicon nitride film / silicon oxynitride film (silicon oxide film) / silicon nitride film made of silicon nitride. As a preferred structure, the first electrode layer 117 formed of indium tin oxide containing silicon oxide is formed in close contact with the insulating layer made of silicon nitride included in the first insulating layer 106, whereby the electroluminescent layer The effect that the rate at which the light emitted in the step is emitted to the outside can be increased. In addition, the first insulator is interposed between the gate electrode layer, the gate electrode layer, and the first electrode layer, and can function as a capacitor.

  The first electrode layer 117 can also be selectively formed over the first insulating layer 106 before the source or drain electrode layer 114 is formed. In this case, in this embodiment mode, the connection structure of the source or drain electrode layer 114 and the first electrode layer 117 is a structure in which the source or drain electrode layer 114 is stacked on the first electrode layer. It becomes. When the first electrode layer 117 is formed before the source electrode layer or the drain electrode layer 114, the first electrode layer 117 can be formed in a flat formation region. Therefore, the first electrode layer 117 can be formed in a flat region. It can be formed well.

  Alternatively, an insulating layer serving as an interlayer insulating layer may be formed over the source or drain electrode layer 114 and electrically connected to the first electrode layer 117 with a wiring layer. In this case, the opening (contact hole) is not formed by removing the insulating layer, but a substance having low wettability with respect to the insulating layer is formed over the source or drain electrode layer 114. After that, when a composition including an insulating layer is applied by a coating method or the like, the insulating layer is formed in a region excluding a region where a substance having low wettability is formed.

  After the insulating layer is solidified by heating, drying, or the like, a substance with low wettability is removed to form an opening. A wiring layer is formed so as to fill the opening, and a first electrode layer 117 is formed so as to be in contact with the wiring layer. When this method is used, there is an effect of simplifying the process because it is not necessary to form an opening by etching.

  In the case where a structure in which emitted light is emitted to the side opposite to the light-transmitting substrate 100 side, in the case of manufacturing a reflective EL display panel, Ag (silver), Au (gold), Cu (Copper)), W (tungsten), Al (aluminum), and the like can be used. As another method, a transparent conductive film or a light reflective conductive film is formed by a sputtering method, a mask pattern is formed by a droplet discharge method, and the first electrode layer 117 is formed by combining etching processes. Also good.

  The first electrode layer 117 may be wiped with a CMP method or a polyvinyl alcohol-based porous body and polished so that the surface thereof is planarized. Further, after the polishing using the CMP method, the surface of the first electrode layer 117 may be subjected to ultraviolet irradiation, oxygen plasma treatment, or the like.

  Through the above steps, a TFT substrate 100 for a display panel in which a dual gate thin film transistor and a pixel electrode (first electrode layer) are connected to the substrate 100 is completed. The TFT described in any of the embodiments has high electrical characteristics and can be manufactured in a self-aligned manner in order to use the present invention.

  Next, an insulator 121 (also referred to as a partition wall or a bank) is selectively formed. The insulator 121 is formed over the first electrode layer 117 so as to have an opening. In this embodiment mode, the insulator 121 is formed over the entire surface, and is etched and patterned with a mask such as a resist. When the insulator 121 is formed using a droplet discharge method, a printing method, or the like that can be directly and selectively formed, patterning by etching is not necessarily required. The insulator 121 can also be formed into a desired shape by the pretreatment of the present invention.

  The insulator 121 is formed using silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, or other inorganic insulating materials, or acrylic acid, methacrylic acid, and derivatives thereof, polyimide, aromatic Heat-resistant polymers such as polyamide, polybenzimidazole, or inorganic siloxanes containing Si—O—Si bonds among silicon, oxygen, and hydrogen compounds formed from siloxane-based materials, on silicon It can be formed of an organic siloxane insulating material in which hydrogen is substituted with an organic group such as methyl or phenyl. You may form using photosensitive and non-photosensitive materials, such as an acryl and a polyimide. The insulator 121 preferably has a shape in which the radius of curvature continuously changes, and the coverage of the electroluminescent layer 122 and the second electrode layer 123 formed thereon is improved.

  Alternatively, after the insulator 121 is formed by discharging a composition by a droplet discharge method, the surface may be pressed and flattened by pressure in order to improve the flatness. As a pressing method, unevenness may be reduced by scanning a roller-like object on the surface, or the surface may be pressed vertically with a flat plate-like object. Alternatively, the surface may be softened or melted with a solvent or the like, and the surface irregularities may be removed with an air knife. Further, polishing may be performed using a CMP method. This step can be applied when the surface is flattened when unevenness is generated by the droplet discharge method. When flatness is improved by this step, display unevenness of the display panel can be prevented and a high-definition image can be displayed.

  A light emitting element is formed on the TFT substrate 100 for the display panel (see FIG. 9).

  Before forming the electroluminescent layer 122, heat treatment is performed at 200 ° C. under atmospheric pressure to remove moisture adsorbed in the first electrode layer 117 and the insulator 121 or on the surface thereof. In addition, it is preferable to perform heat treatment at 200 to 400 ° C., preferably 250 to 350 ° C. under reduced pressure, and to form the electroluminescent layer 122 by vacuum deposition or droplet discharge under reduced pressure without being exposed to the air as it is. .

  As the electroluminescent layer 122, materials that emit red (R), green (G), and blue (B) light are selectively formed by an evaporation method using an evaporation mask or the like. A material that emits red (R), green (G), and blue (B) light can be formed by a droplet discharge method (such as a low-molecular or high-molecular material) in the same manner as a color filter. In this case, a mask is not used. Both are preferable because RGB can be separately applied. A second electrode layer 123 is stacked over the electroluminescent layer 122 to complete a display device having a display function using a light emitting element.

Although not shown, it is effective to provide a passivation film so as to cover the second electrode layer 123. The protective film provided when forming the display device may have a single layer structure or a multilayer structure. As the passivation film, silicon nitride (SiN), silicon oxide (SiO ₂ ), silicon oxynitride (SiON), silicon nitride oxide (SiNO), aluminum nitride (AlN), aluminum oxynitride (AlON), nitrogen content is oxygen It is made of an insulating film containing aluminum nitride oxide (AlNO) or aluminum oxide, diamond-like carbon (DLC), or nitrogen-containing carbon film (CN _x ) that is higher than the content, and a single layer or a combination of the insulating films is used. Can do. For example, a laminate such as a nitrogen-containing carbon film (CN _x ) \ silicon nitride (SiN), an organic material can be used, and a polymer laminate such as a styrene polymer may be used. In addition, a skeleton structure is formed by a bond of silicon (Si) and oxygen (O), and at least one of a material containing at least hydrogen as a substituent, or fluorine, an alkyl group, or an aromatic hydrocarbon as a substituent. You may use the material which has.

At this time, it is preferable to use a film with good coverage as the passivation film, and it is effective to use a carbon film, particularly a DLC film. Since the DLC film can be formed in the temperature range from room temperature to 100 ° C., it can be easily formed over the electroluminescent layer having low heat resistance. The DLC film is formed by a plasma CVD method (typically, an RF plasma CVD method, a microwave CVD method, an electron cyclotron resonance (ECR) CVD method, a hot filament CVD method, etc.), a combustion flame method, a sputtering method, or an ion beam evaporation method. It can be formed by laser vapor deposition. The reaction gas used for film formation was hydrogen gas and a hydrocarbon-based gas (for example, CH ₄ , C ₂ H ₂ , C ₆ H _6, etc.), ionized by glow discharge, and negative self-bias was applied. Films are formed by accelerated collision of ions with the cathode. The CN film may be formed using C ₂ H ₄ gas and N ₂ gas as the reaction gas. The DLC film has a high blocking effect against oxygen and can suppress oxidation of the electroluminescent layer. Therefore, the problem that the electroluminescent layer is oxidized during the subsequent sealing process can be prevented.

  Subsequently, a sealing material is formed and sealed using a sealing substrate. After that, a flexible wiring board may be connected to the gate wiring layer 102 and electrically connected to the outside. The same applies to the source wiring layer formed by being electrically connected to the source electrode layer or the drain electrode layer 111 which is also the source wiring layer.

  A completed view of an EL display panel manufactured using the present invention is shown in FIG. 18A is a top view of the EL display panel, and FIG. 18B is a cross-sectional view taken along line EF in FIG. 18A. In FIG. 18, a pixel portion 3301 formed over an element substrate 3300 includes a pixel 3302, a gate wiring layer 3306a, a gate wiring layer 3306b, and a source wiring layer 3308, which are attached to each other with a sealing substrate 3310 and a sealant 3303. Combined and fixed. In this embodiment mode, a driver IC 3351 is installed on the FPC 3350 and mounted by the TAB method.

  As shown in FIGS. 18A and 18B, a desiccant 3305, a desiccant 3304a, and a desiccant 3304b are provided in the display panel in order to prevent deterioration of the element due to moisture. The desiccant 3305 is formed so as to surround the periphery of the pixel portion, and the desiccant 3304a and the desiccant 3304b are formed in regions corresponding to the gate wiring layers 3306a and 3306b. In the present embodiment, the desiccant is installed in a recess formed in the sealing substrate as shown in FIG. 18B, and has a structure that does not hinder thinning. Since the desiccant is also formed in the region corresponding to the gate wiring layer, the water absorption area can be increased and the water absorption effect is improved. Further, since the desiccant is formed on the gate wiring layer that does not emit light directly, the light extraction efficiency is not lowered. In this embodiment mode, a filler 3307 is filled in the display panel. When a hygroscopic substance such as a desiccant is used as the filler, a further water absorption effect can be obtained and deterioration of the element can be prevented.

  Note that in this embodiment mode, a case where a light-emitting element is sealed with a glass substrate is shown; however, the sealing process is a process for protecting the light-emitting element from moisture and is mechanically sealed with a cover material. Any of a method, a method of encapsulating with a thermosetting resin or an ultraviolet light curable resin, or a method of encapsulating with a thin film having a high barrier ability such as a metal oxide or a nitride is used. As the cover material, glass, ceramics, plastic, or metal can be used. However, when light is emitted to the cover material side, it must be translucent. In addition, the cover material and the substrate on which the light emitting element is formed are bonded together using a sealing material such as a thermosetting resin or an ultraviolet light curable resin, and the resin is cured by heat treatment or ultraviolet light irradiation treatment to form a sealed space. Form. It is also effective to provide a hygroscopic material typified by barium oxide in this sealed space. This hygroscopic material may be provided in contact with the sealing material, or may be provided on the partition wall or in the peripheral portion so as not to block light from the light emitting element. Further, the space between the cover material and the substrate on which the light emitting element is formed can be filled with a thermosetting resin or an ultraviolet light curable resin. In this case, it is effective to add a moisture absorbing material typified by barium oxide in the thermosetting resin or the ultraviolet light curable resin.

  In this embodiment mode, the switching TFT has a single gate structure, but a multi-gate structure such as a double gate structure may be used. In the case where a semiconductor is manufactured using a SAS or a crystalline semiconductor, an impurity region can be formed by adding an impurity imparting one conductivity type. In this case, the semiconductor layer may have impurity regions having different concentrations. For example, the vicinity of the channel region of the semiconductor layer and the region stacked with the gate electrode layer may be low-concentration impurity regions, and the outer region may be high-concentration impurity regions.

  As described above, in this embodiment mode, the process can be omitted by not using a light exposure process using a photomask. In addition, by forming various patterns directly on the substrate using the droplet discharge method, a display panel can be easily manufactured even if a glass substrate of 5th generation or later with one side exceeding 1000 mm is used. Can do.

  According to the present invention, since the process is simplified, there is little material loss and cost reduction can be achieved. Further, the pattern can be formed with good controllability. Further, a thin film transistor with high electrical characteristics can be manufactured. Therefore, a high-performance and highly reliable display device can be manufactured with high yield.

(Embodiment 3)
An embodiment of the present invention will be described with reference to FIG. In this embodiment mode, a display device is manufactured using the dual-gate thin film transistor formed in Embodiment Mode 2. Note that an example of a liquid crystal display device using a liquid crystal material as a display element is shown. Therefore, repetitive description of the same portion or a portion having a similar function is omitted. 10A is a top view of the display device, and FIG. 10B is a cross-sectional view taken along line EF in FIG. 10A.

  In this embodiment mode, a thin film transistor to be formed is a dual-gate thin film transistor having a first gate electrode layer on one side and a second gate electrode layer on the other side with a semiconductor layer interposed therebetween. In the present invention, as shown in FIG. 10, a recess is provided in a pattern formation region, and a composition containing a pattern forming material is attached to the recess to form a pattern.

    Over the substrate 300, the first gate electrode layer 303a and the first gate electrode layer 303b are connected to the gate wiring layer 302 and formed adjacent to each other. In addition, a capacitor wiring layer 304 is also formed. The first gate electrode layer 303a and the first gate electrode layer 303b are formed to have a recess therebetween. In this embodiment, the first gate electrode layer 303a, the first gate electrode layer 303b, the gate wiring layer 302, and the capacitor wiring layer 304 are formed by a droplet discharge method using a composition containing silver as a conductive material. Form.

    Next, a first insulating layer 305 is formed over the first gate electrode layer and the first gate wiring layer by a plasma CVD method or a sputtering method. An N-type semiconductor layer is formed over the first insulating layer 305 as a semiconductor layer and a semiconductor layer having one conductivity type. The semiconductor layer 306 and the N-type semiconductor layer 307 are formed by patterning using a mask such as a resist. In this embodiment mode, silicon which is an inorganic material is used for the semiconductor layer 306; however, an organic semiconductor such as pentacene as described above can also be used. When the organic semiconductor is selectively formed by a droplet discharge method or the like, the patterning process can be simplified.

  As shown in Embodiment Mode 2, droplets are discharged into the recesses on the N-type semiconductor layer 307 to be reflected in the recesses formed by the first gate electrode layer 303a and the first gate electrode layer 303b. By using this method, a substance with low wettability is formed with good controllability, and a mask for patterning the N-type semiconductor layer is selectively formed.

  After patterning the N-type semiconductor layer 307 using the formed mask, the second insulating layer 310 is formed. Also on the second insulating layer 310, a concave shape is formed because the first gate electrode layer 303a and the first gate electrode layer 303b are formed to have a concave portion. The second gate electrode layer is formed on the first gate electrode layer so as to overlap with the first gate electrode layer with an insulating layer or a semiconductor layer interposed therebetween (improves electrical characteristics of the thin film transistor). Fulfills the function of When the present invention is used, a recess is formed in the formation region of the second gate electrode layer, reflecting the recess of the first gate electrode layer. Therefore, the second gate electrode layer 309 can be formed in a desired region with high controllability by discharging a composition containing a conductive material into the recess. Therefore, a thin film transistor can be manufactured in a self-aligned manner (self-alignment) without performing a patterning step.

  Using the second gate electrode layer 309 as a mask, the second insulating layer 310 is removed by etching. Then, the source or drain electrode layer 330 and the source or drain electrode layer 308 are formed so as to be in contact with the N-type semiconductor layer. In this embodiment, the source or drain electrode layer 330 and the source or drain electrode layer 308 are formed by a droplet discharge method using a composition containing silver as a conductive material.

A pixel electrode layer 311 is formed by a droplet discharge method. The pixel electrode layer 311 is formed in contact with the source or drain electrode layer 308 and is electrically connected. The pixel electrode layer 311 can be formed using a material similar to that of the first electrode layer 117 described above. When a transmissive liquid crystal display panel is manufactured, indium tin oxide (ITO) and indium containing silicon oxide are used. A predetermined pattern may be formed by a composition containing tin oxide (ITSO), zinc oxide (ZnO), tin oxide (SnO ₂ ), and the like, and may be formed by baking.

  Next, an insulating layer 312 called an alignment film is formed by a printing method or a spin coating method so as to cover the pixel electrode layer 311. Note that the insulating layer 312 can be selectively formed by a screen printing method or an offset printing method. Then, rubbing is performed. Subsequently, a sealing material is formed in a peripheral region where pixels are formed by a droplet discharge method (not shown).

  After that, an insulating substrate 321 functioning as an alignment film, a colored layer 322 functioning as a color filter, a conductor layer 323 functioning as a counter electrode, and a counter substrate 324 provided with a polarizing plate 325 and the TFT substrate 300 are interposed through a spacer. A liquid crystal display panel can be manufactured by bonding and providing a liquid crystal layer 320 in the gap (see FIG. 11B). A filler may be mixed in the sealing material, and a shielding film (black matrix) or the like may be formed on the counter substrate 324. Note that as a method for forming the liquid crystal layer, a dispenser type (dropping type) or a dip type (pumping type) in which liquid crystal is injected using a capillary phenomenon after the counter substrate 324 is attached can be used.

  A liquid crystal dropping injection method employing a dispenser method will be described with reference to FIG. In the liquid crystal dropping injection method of FIG. 29, the control device 40, the imaging means 42, the head 43, the liquid crystal 33, the marker 35, and the marker 45 include the barrier layer 34, the sealing material 32, the TFT substrate 30, and the counter substrate 20. A closed loop is formed by the sealing material 32, and the liquid crystal 33 is dropped from the head 43 once or plural times therein. When the viscosity of the liquid crystal material is high, the liquid crystal material is continuously discharged and adhered to the formation region while being connected. On the other hand, when the viscosity of the liquid crystal material is low, the liquid crystal material is intermittently ejected and droplets are dropped as shown in FIG. At that time, a barrier layer 34 is provided to prevent the sealing material 32 and the liquid crystal 33 from reacting. Subsequently, the substrates are bonded together in a vacuum, and thereafter UV curing is performed to fill the liquid crystal.

A connection portion is formed in order to connect the pixel portion formed in the above steps and an external wiring substrate. The insulator layer in the connection portion is removed by ashing using oxygen gas at or near atmospheric pressure. This treatment is performed using oxygen gas and one or more selected from hydrogen, CF ₄ , NF ₃ , H ₂ O, and CHF ₃ . In this step, in order to prevent damage and destruction due to static electricity, ashing is performed after sealing using the counter substrate. However, if there is little influence from static electricity, it may be performed at any timing. .

  Subsequently, a wiring board for connection is provided so that the wiring layer is electrically connected through the anisotropic conductor layer. The wiring board plays a role of transmitting signals and potentials from the outside. Through the above steps, a liquid crystal display panel having a display function can be manufactured.

  In this embodiment mode, the switching TFT has a single gate structure, but a multi-gate structure such as a double gate structure may be used. In the case where a semiconductor is manufactured using a SAS or a crystalline semiconductor, an impurity region can be formed by adding an impurity imparting one conductivity type. In this case, the semiconductor layer may have impurity regions having different concentrations. For example, the vicinity of the channel region of the semiconductor layer and the region stacked with the gate electrode layer may be low-concentration impurity regions, and the outer region may be high-concentration impurity regions.

  As described above, in this embodiment mode, the process can be omitted by not using a light exposure process using a photomask. In addition, by forming various patterns directly on the substrate using the droplet discharge method, a display panel can be easily manufactured even if a glass substrate of 5th generation or later with one side exceeding 1000 mm is used. Can do.

  According to the present invention, since the process is simplified, there is little material loss and cost reduction can be achieved. Further, the pattern can be formed with good controllability. Further, a thin film transistor with high electrical characteristics can be manufactured. Therefore, a high-performance and highly reliable display device can be manufactured with high yield.

(Embodiment 4)
A thin film transistor is formed by applying the present invention, and a display device can be formed using the thin film transistor. When a light emitting element is used and an N-type transistor is used as a transistor for driving the light emitting element, The light emitted from the light emitting element performs any one of bottom emission, top emission, and dual emission. Here, a stacked structure of a light-emitting element corresponding to any case will be described with reference to FIGS.

In this embodiment, thin film transistors 461, 471, and 481 to which the present invention is applied are used. The thin film transistor 481 in this embodiment is provided over the substrate 480, and the first gate electrode layer 493a and the first gate electrode layer 493b are adjacent to each other with a space therebetween. In this manner, even if the first gate electrode layer is not in contact with a certain cross section, a recess (so-called depression) may be formed between the first gate electrode layers. The recessed portion is reflected in the gate insulating layer and the semiconductor layer stacked thereover, and the second gate electrode layer formed so as to overlap with the first gate electrode layer can be formed in the recessed portion with good controllability. In this embodiment mode, a silicon film having an amorphous structure is used as the semiconductor layer, and an N-type semiconductor layer is used as the one-conductivity-type semiconductor layer. Instead of forming the N-type semiconductor layer, conductivity may be imparted to the semiconductor layer by performing plasma treatment with a PH ₃ gas. The semiconductor layer is not limited to this embodiment mode, and a crystalline semiconductor layer can also be used as described in Embodiment Mode 2. When a crystalline semiconductor layer such as polysilicon is used, an impurity region having one conductivity type may be formed by introducing (adding) an impurity into the crystalline semiconductor layer without forming the one conductivity type semiconductor layer. . Alternatively, an organic semiconductor such as pentacene can be used. When the organic semiconductor is selectively formed by a droplet discharge method or the like, the patterning process can be simplified.

    Since the thin film transistor in this embodiment is a dual-gate thin film transistor in which the first gate electrode layer and the second gate electrode layer are provided with the semiconductor layer interposed therebetween, the channel region of the semiconductor layer extends vertically. High on-current can be obtained. Accordingly, the power supply voltage can be lowered, so that power consumption can be reduced. According to the present invention, since the process is simplified, there is little material loss and cost reduction can be achieved. Further, the pattern can be formed with good controllability. Further, a thin film transistor with high electrical characteristics can be manufactured. Therefore, a high-performance and highly reliable display device can be manufactured with high yield.

  First, the case where light is emitted to the light-transmitting substrate 480 side, that is, the case where bottom emission is performed will be described with reference to FIG. In this case, the first electrode layer 484, the electroluminescent layer 485, and the second electrode layer 486 are stacked in this order in contact with the source or drain electrode layer 487 so as to be electrically connected to the thin film transistor 481. Next, the case where light is emitted to the side opposite to the substrate 460, that is, the case where top emission is performed will be described with reference to FIG. The thin film transistor 461 has the same structure as the above-described dual gate thin film transistor 481 of the present invention.

  A source or drain electrode layer 462 electrically connected to the thin film transistor 461, a first electrode layer 463, an electroluminescent layer 464, and a second electrode layer 465 are stacked in this order. With the above structure, even when light is transmitted through the first electrode layer 463, the light is reflected by the source or drain electrode layer 462 and emitted to the side opposite to the substrate 460. Note that in this structure, it is not necessary to use a light-transmitting material for the first electrode layer 463 and the substrate 460. Lastly, a case where light is emitted to the light-transmitting substrate 470 side and the opposite side, that is, a case where dual emission is performed will be described with reference to FIG. The thin film transistor 471 is a dual-gate thin film transistor of the present invention similar to the thin film transistor 481. A source or drain electrode layer 477 electrically connected to the thin film transistor 471, a first electrode layer 472, an electroluminescent layer 473, and a second electrode layer 474 are sequentially stacked. At this time, when both the first electrode layer 472 and the second electrode layer 474 are formed using a light-transmitting material or a thickness capable of transmitting light, dual emission is realized.

  A mode of a light-emitting element which can be applied in this embodiment mode is shown in FIG. The light-emitting element has a structure in which an electroluminescent layer 860 is sandwiched between a first electrode layer 870 and a second electrode layer 850. It is necessary to select materials for the first electrode layer and the second electrode layer in consideration of the work function, and the first electrode layer and the second electrode layer are both anodes or cathodes depending on the pixel configuration. sell. In this embodiment mode, since the polarity of the driving TFT is an N-channel type, it is preferable that the first electrode layer be a cathode and the second electrode layer be an anode. In the case where the polarity of the driving TFT is a p-channel type, the first electrode layer may be an anode and the second electrode layer may be a cathode.

  30A and 30B show the case where the first electrode layer 870 is an anode and the second electrode layer 850 is a cathode, and the electroluminescent layer 860 is formed from the first electrode layer 870 side. , HIL (hole injection layer) / HTL (hole transport layer) 804, EML (light emitting layer) 803, ETL (electron transport layer) / EIL (electron injection layer) 802, and second electrode layer 850 are stacked in this order. preferable. FIG. 30A illustrates a structure in which light is emitted from the first electrode layer 870. The first electrode layer 870 includes an electrode layer 805 made of a light-transmitting oxide conductive material, The electrode layer includes an electrode layer 801 containing an alkali metal or alkaline earth metal such as LiF or MgAg and an electrode layer 800 formed of a metal material such as aluminum from the electroluminescent layer 860 side. FIG. 30B illustrates a structure in which light is emitted from the second electrode layer 850. The first electrode layer is formed using a metal such as aluminum or titanium or nitrogen at a concentration equal to or lower than the stoichiometric composition ratio with the metal. An electrode layer 807 formed of a metal material containing silicon, and a second electrode layer 806 formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%. The second electrode layer is composed of an electrode layer 801 containing an alkali metal or alkaline earth metal such as LiF or MgAg and an electrode layer 800 formed of a metal material such as aluminum from the electroluminescent layer 860 side. However, it is possible to emit light from the second electrode layer 850 by setting each layer to a thickness of 100 nm or less so that light can be transmitted.

  30C and 30D show the case where the first electrode layer 870 is a cathode and the second electrode layer 850 is an anode, and the electroluminescent layer 860 is an EIL (electron injection layer) from the cathode side. ) / ETL (electron transport layer) 802, EML (light emitting layer) 803, HTL (hole transport layer) / HIL (hole injection layer) 804, and the second electrode layer 850 which is an anode are preferably stacked in this order. FIG. 30C illustrates a structure in which light is emitted from the first electrode layer 870. The first electrode layer 870 includes an electrode layer containing an alkali metal or an alkaline earth metal such as LiF or MgAg from the electroluminescent layer 860 side. 801 and an electrode layer 800 formed of a metal material such as aluminum, but each layer emits light from the first electrode layer 870 by setting the thickness to 100 nm or less so that light can be transmitted. It becomes possible to do. The second electrode layer includes, from the electroluminescent layer 860 side, a second electrode layer 806 formed of an oxide conductive material containing silicon oxide at a concentration of 1 to 15 atomic%, a metal such as aluminum or titanium, or the The electrode layer 807 is formed of a metal material containing nitrogen at a concentration equal to or lower than the stoichiometric composition ratio of metal. FIG. 30D illustrates a structure in which light is emitted from the second electrode layer 850, and the first electrode layer 870 includes an electrode layer containing an alkali metal or an alkaline earth metal such as LiF or MgAg from the electroluminescent layer 860 side. 801 and an electrode layer 800 formed of a metal material such as aluminum. The film thickness is large enough to reflect light emitted from the electroluminescent layer 860. The second electrode layer 850 includes an electrode layer 805 made of a light-transmitting oxide conductive material. The electroluminescent layer can have a single layer structure or a mixed structure in addition to the laminated structure.

  In addition, as the electroluminescent layer, materials that emit red (R), green (G), and blue (B) light are selectively formed by an evaporation method using an evaporation mask, respectively. A material that emits red (R), green (G), and blue (B) light can be formed by a droplet discharge method (such as a low-molecular or high-molecular material) in the same manner as a color filter. In this case, a mask is not used. Both are preferable because RGB can be separately applied.

In the case of a top emission type, when light-transmitting ITO or ITSO is used for the second electrode layer, BzOS-Li in which Li is added to a benzoxazole derivative (BzOS) or the like can be used. Further, for example, EML may be Alq ₃ doped with a dopant corresponding to each emission color of R, G, and B (DCM in the case of R, DMQD in the case of G).

  Note that the electroluminescent layer is not limited to the above materials. For example, instead of CuPc or PEDOT, an oxide such as molybdenum oxide (MoOx: x = 2 to 3) and α-NPD or rubrene can be co-evaporated to improve the hole injection property. The material of the electroluminescent layer can be used as an organic material (including a low molecule or a polymer), or a composite material of an organic material and an inorganic material. Hereinafter, materials for forming the light emitting element will be described in detail.

Among the charge injecting and transporting materials, materials having a particularly high electron transporting property include, for example, tris (8-quinolinolato) aluminum (abbreviation: Alq ₃ ), tris (5-methyl-8-quinolinolato) aluminum (abbreviation: Almq ₃ ), Bis (10-hydroxybenzo [h] -quinolinato) beryllium (abbreviation: BeBq ₂ ), bis (2-methyl-8-quinolinolato) -4-phenylphenolato-aluminum (abbreviation: BAlq), quinoline skeleton or benzoquinoline Examples thereof include metal complexes having a skeleton. As a substance having a high hole-transport property, for example, 4,4′-bis [N- (1-naphthyl) -N-phenyl-amino] -biphenyl (abbreviation: α-NPD), 4,4′-bis [ N- (3-methylphenyl) -N-phenyl-amino] -biphenyl (abbreviation: TPD) or 4,4 ′, 4 ″ -tris (N, N-diphenyl-amino) -triphenylamine (abbreviation: TDATA) ), 4,4 ′, 4 ″ -tris [N- (3-methylphenyl) -N-phenyl-amino] -triphenylamine (abbreviation: MTDATA) (ie, benzene ring-nitrogen) And a compound having a bond of

Among the charge injecting and transporting materials, materials having particularly high electron injecting properties include alkali metals or alkaline earths such as lithium fluoride (LiF), cesium fluoride (CsF), calcium fluoride (CaF ₂ ) and the like. Metal compounds can be mentioned. In addition, a mixture of a substance having a high electron transport property such as Alq ₃ and an alkaline earth metal such as magnesium (Mg) may be used.

Among the charge injecting and transporting materials, examples of the material having a high hole injecting property include molybdenum oxide (MoOx), vanadium oxide (VOx), ruthenium oxide (RuOx), tungsten oxide (WOx), and manganese oxide. Examples thereof include metal oxides such as (MnOx). In addition, phthalocyanine compounds such as phthalocyanine (abbreviation: H ₂ Pc) and copper phthalocyanine (CuPC) can be given.

  The light emitting layer may be configured to perform color display by forming light emitting layers having different emission wavelength bands for each pixel. Typically, a light emitting layer corresponding to each color of R (red), G (green), and B (blue) is formed. In this case as well, it is possible to improve color purity and prevent mirror reflection (reflection) of the pixel portion by providing a filter that transmits light in the emission wavelength band on the light emission side of the pixel. Can do. By providing the filter, it is possible to omit a circularly polarized plate that has been conventionally required, and it is possible to eliminate the loss of light emitted from the light emitting layer. Furthermore, a change in color tone that occurs when the pixel portion (display screen) is viewed obliquely can be reduced.

There are various kinds of light emitting materials. In the low molecular weight organic light emitting material, 4-dicyanomethylene-2-methyl-6- (1,1,7,7-tetramethyljulolidyl-9-enyl) -4H-pyran (abbreviation: DCJT), 4- Dicyanomethylene-2-t-butyl-6- (1,1,7,7-tetramethyljulolidyl-9-enyl) -4H-pyran (abbreviation: DPA), periflanthene, 2,5-dicyano-1, 4-bis (10-methoxy-1,1,7,7-tetramethyljulolidyl-9-enyl) benzene, N, N′-dimethylquinacridone (abbreviation: DMQd), coumarin 6, coumarin 545T, tris (8 - quinolinolato) aluminum (abbreviation: Alq _3), 9,9'-bianthryl, 9,10-diphenyl anthracene (abbreviation: DPA) and 9,10-bis (2-naphthyl) anthracene (abbreviation: DNA) using a like Can . Other substances may also be used.

  On the other hand, the high molecular organic light emitting material has higher physical strength than the low molecular weight material, and the durability of the device is high. In addition, since the film can be formed by coating, the device can be manufactured relatively easily. The structure of the light emitting element using the high molecular weight organic light emitting material is basically the same as that when the low molecular weight organic light emitting material is used, and is cathode / organic light emitting layer / anode. However, when forming a light emitting layer using a high molecular weight organic light emitting material, it is difficult to form a laminated structure as in the case of using a low molecular weight organic light emitting material. . Specifically, the structure is cathode / light-emitting layer / hole transport layer / anode.

  Since the light emission color is determined by the material for forming the light emitting layer, a light emitting element exhibiting desired light emission can be formed by selecting these materials. Examples of the polymer electroluminescent material that can be used for forming the light emitting layer include polyparaphenylene vinylene, polyparaphenylene, polythiophene, and polyfluorene.

  The polyparaphenylene vinylene system includes derivatives of poly (paraphenylene vinylene) [PPV], poly (2,5-dialkoxy-1,4-phenylene vinylene) [RO-PPV], poly (2- (2′- Ethyl-hexoxy) -5-methoxy-1,4-phenylenevinylene) [MEH-PPV], poly (2- (dialkoxyphenyl) -1,4-phenylenevinylene) [ROPh-PPV] and the like. The polyparaphenylene series includes derivatives of polyparaphenylene [PPP], poly (2,5-dialkoxy-1,4-phenylene) [RO-PPP], poly (2,5-dihexoxy-1,4-phenylene). ) And the like. Polythiophene series includes polythiophene [PT] derivatives, poly (3-alkylthiophene) [PAT], poly (3-hexylthiophene) [PHT], poly (3-cyclohexylthiophene) [PCHT], poly (3-cyclohexyl). -4-methylthiophene) [PCHMT], poly (3,4-dicyclohexylthiophene) [PDCHT], poly [3- (4-octylphenyl) -thiophene] [POPT], poly [3- (4-octylphenyl) -2,2 bithiophene] [PTOPT] and the like. Examples of the polyfluorene series include polyfluorene [PF] derivatives, poly (9,9-dialkylfluorene) [PDAF], poly (9,9-dioctylfluorene) [PDOF], and the like.

  Note that when a hole-transporting polymer-based organic light-emitting material is sandwiched between an anode and a light-emitting polymer-based organic light-emitting material, hole injection properties from the anode can be improved. In general, an acceptor material dissolved in water is applied by spin coating or the like. In addition, since it is insoluble in an organic solvent, it can be stacked with the above-described light-emitting organic light-emitting material. Examples of the hole-transporting polymer organic light emitting material include a mixture of PEDOT and camphor sulfonic acid (CSA) as an acceptor material, a mixture of polyaniline [PANI] and polystyrene sulfonic acid [PSS] as an acceptor material, and the like. .

  The light emitting layer can be configured to emit monochromatic or white light. In the case of using a white light emitting material, color display can be made possible by providing a filter (colored layer) that transmits light of a specific wavelength on the light emission side of the pixel.

To form a light emitting layer that emits white light, for _{example, Alq 3, Alq 3, Alq} 3 doped with Nile Red which is partly red light emitting pigment, p-EtTAZ, by TPD (aromatic diamine) evaporation A white color can be obtained by sequentially laminating. In the case where the EL is formed by a coating method using spin coating, it is preferable that baking is performed by vacuum heating after coating. For example, a poly (ethylenedioxythiophene) / poly (styrenesulfonic acid) aqueous solution (PEDOT / PSS) that acts as a hole injection layer is applied and baked on the entire surface, and then a luminescent center dye (1, 1,4,4-tetraphenyl-1,3-butadiene (TPB), 4-dicyanomethylene-2-methyl-6- (p-dimethylamino-styryl) -4H-pyran (DCM1), Nile Red, Coumarin 6 Etc.) A doped polyvinyl carbazole (PVK) solution may be applied to the entire surface and fired.

  The light emitting layer can also be formed as a single layer, and an electron transporting 1,3,4-oxadiazole derivative (PBD) may be dispersed in hole transporting polyvinyl carbazole (PVK). Further, white light emission can be obtained by dispersing 30 wt% PBD as an electron transporting agent and dispersing an appropriate amount of four kinds of dyes (TPB, coumarin 6, DCM1, Nile red). In addition to the light-emitting element that can emit white light as shown here, a light-emitting element that can obtain red light emission, green light emission, or blue light emission can be manufactured by appropriately selecting the material of the light-emitting layer.

  Note that when a hole-transporting polymer-based organic light-emitting material is sandwiched between an anode and a light-emitting polymer-based organic light-emitting material, hole injection properties from the anode can be improved. In general, an acceptor material dissolved in water is applied by spin coating or the like. In addition, since it is insoluble in an organic solvent, it can be stacked with the above-described light-emitting organic light-emitting material. Examples of the hole-transporting polymer organic light emitting material include a mixture of PEDOT and camphor sulfonic acid (CSA) as an acceptor material, a mixture of polyaniline [PANI] and polystyrene sulfonic acid [PSS] as an acceptor material, and the like. .

  Furthermore, a triplet excitation material containing a metal complex or the like may be used for the light emitting layer in addition to a singlet excitation light emitting material. For example, among red light emitting pixels, green light emitting pixels, and blue light emitting pixels, a red light emitting pixel having a relatively short luminance half time is formed of a triplet excitation light emitting material, and the other A singlet excited luminescent material is used. The triplet excited luminescent material has a feature that the light emission efficiency is good, so that less power is required to obtain the same luminance. That is, when applied to a red pixel, the amount of current flowing through the light emitting element can be reduced, so that reliability can be improved. As a reduction in power consumption, a red light-emitting pixel and a green light-emitting pixel may be formed using a triplet excitation light-emitting material, and a blue light-emitting pixel may be formed using a singlet excitation light-emitting material. By forming a green light-emitting element having high human visibility with a triplet excited light-emitting material, power consumption can be further reduced.

  Examples of triplet excited luminescent materials include those using a metal complex as a dopant, and metal complexes having a third transition series element platinum as the central metal and metal complexes having iridium as the central metal are known. Yes. The triplet excited light-emitting material is not limited to these compounds, and a compound having the above structure and having an element belonging to group 8 to 10 in the periodic table as a central metal can also be used.

  The substances forming the light-emitting layer listed above are examples, and functionalities such as a hole injection transport layer, a hole transport layer, an electron injection transport layer, an electron transport layer, a light emission layer, an electron block layer, and a hole block layer are included. A light emitting element can be formed by appropriately stacking each layer. Moreover, you may form the mixed layer or mixed junction which combined these each layer. The layer structure of the light-emitting layer can be changed, and instead of having a specific electron injection region or light-emitting region, an electrode layer for this purpose is provided, or a light-emitting material is dispersed. Modifications can be made without departing from the spirit of the present invention.

  A light-emitting element formed using the above materials emits light by being forward-biased. A pixel of a display device formed using a light-emitting element can be driven by a simple matrix method or an active matrix method. In any case, each pixel emits light by applying a forward bias at a specific timing, but is in a non-light emitting state for a certain period. By applying a reverse bias during this non-light emitting time, the reliability of the light emitting element can be improved. The light emitting element has a degradation mode in which the light emission intensity decreases under a constant driving condition and a degradation mode in which the non-light emitting area is enlarged in the pixel and the luminance is apparently decreased. However, alternating current that applies a bias in the forward and reverse directions. By performing a typical drive, the progress of deterioration can be slowed, and the reliability of the light emitting device can be improved. Further, either digital driving or analog driving can be applied.

  Therefore, although not illustrated in FIG. 12, a color filter (colored layer) may be formed over the sealing substrate of the light-transmitting substrate 480. The color filter (colored layer) can be formed by a droplet discharge method. In that case, light irradiation treatment or the like can be applied as the above-described base pretreatment. By using the present invention, a color filter (colored layer) can be formed in a desired pattern with good controllability. When a color filter (colored layer) is used, high-definition display can be performed. This is because the color filter (colored layer) can correct a broad peak to be sharp in the emission spectrum of each RGB.

  As described above, the case where a material that emits light of each RGB is formed has been described. However, full color display can be performed by forming a material that emits light of a single color and combining a color filter and a color conversion layer. The color filter (colored layer) and the color conversion layer may be formed, for example, on the second substrate (sealing substrate) and attached to the substrate. In addition, as described above, any of the material that emits monochromatic light, the color filter (colored layer), and the color conversion layer can be formed by a droplet discharge method.

  Of course, monochromatic light emission may be displayed. For example, an area color type display device may be formed using monochromatic light emission. As the area color type, a passive matrix type display unit is suitable, and characters and symbols can be mainly displayed.

  In the above configuration, a material having a small work function can be used as the cathode, and for example, Ca, Al, CaF, MgAg, AlLi, or the like is desirable. The electroluminescent layer may be any of a single layer type, a laminated type, and a mixed type having no layer interface. It is also formed from singlet materials, triplet materials, or combinations thereof, charge injection / transport materials containing organic compounds or inorganic compounds, and light-emitting materials, and low molecular organic compounds and medium molecular organic compounds (sublimation) based on the number of molecules. And an organic compound having a molecular number of 20 or less, or a chained molecule having a length of 10 μm or less), including one or more layers selected from macromolecular organic compounds, You may combine with the injection | pouring transport property or the hole injection transport property inorganic compound. The first electrode layer 484, the first electrode layer 463, and the first electrode layer 472 are formed using a transparent conductive film that transmits light. For example, in addition to ITO and ITSO, indium oxide is oxidized at 2 to 20%. A transparent conductive film mixed with zinc (ZnO) is used. Note that plasma treatment in an oxygen atmosphere or heat treatment in a vacuum atmosphere is preferably performed before the first electrode layer 484, the first electrode layer 463, and the first electrode layer 472 are formed. A partition wall (also referred to as a bank) is formed using a material containing silicon, an organic material, and a compound material. A porous film may be used. However, it is preferable to use a photosensitive or non-photosensitive material such as acrylic or polyimide because the side surface has a shape in which the radius of curvature continuously changes and the upper thin film is formed without being cut off. This embodiment mode can be freely combined with the above embodiment modes.

(Embodiment 5)
In the display panel manufactured in any of Embodiments 4 to 6, the driver circuit on the scanning line side can be formed over the substrate 3700 as described in FIG. 14B by forming the semiconductor layer using SAS. it can.

FIG. 25 shows a block diagram of a scanning line side driving circuit constituted by an n-channel TFT using SAS capable of obtaining a field effect mobility of 1 to 15 cm ² / V · sec.

  In FIG. 25, a block 500 corresponds to a pulse output circuit that outputs a sampling pulse for one stage, and the shift register includes n pulse output circuits. Reference numeral 901 denotes a buffer circuit, to which a pixel 902 is connected.

  FIG. 26 shows a specific configuration of a block 500 corresponding to a pulse output circuit, and a circuit is configured by n-channel TFTs 601 to 612. At this time, the size of the TFT may be determined in consideration of the operating characteristics of the n-channel TFT using SAS. For example, if the channel length is 8 μm, the channel width can be set in the range of 10 to 80 μm.

  A specific configuration of the buffer circuit 901 is shown in FIG. Similarly, the buffer circuit is composed of n-channel TFTs 620 to 635. At this time, the size of the TFT may be determined in consideration of the operating characteristics of the n-channel TFT using SAS. For example, if the channel length is 10 μm, the channel width is set in the range of 10 to 1800 μm. When the present invention is used, a thin film transistor with high electrical characteristics can be formed. Therefore, such channel width setting can be determined with a margin. Therefore, even a thin film transistor using a droplet discharge method, which is difficult to be miniaturized, can be manufactured without impairing its electrical characteristics.

  In order to realize such a circuit, the TFTs need to be connected to each other by wiring, and a configuration example of the wiring in that case is shown in FIG. In FIG. 16, as in Embodiment 2, the first gate electrode layer 103a, the first gate electrode layer 103b, and the first insulating layer 106 (in this embodiment, an insulator layer made of silicon nitride, silicon oxide, 3 layers of an insulator layer made of silicon, and an insulator layer made of silicon nitride), a semiconductor layer 107, an N-type semiconductor layer 109, a second insulating layer 130, a second gate electrode layer 115, and a source electrode layer 171 , The source electrode layer or the drain electrode layer 112 is formed. In this embodiment, the second gate electrode layer 115 is electrically connected to the source electrode layer 171. In this manner, by fixing the second gate electrode layer 115 to the same potential as the source electrode layer 171, the influence of floating charges existing in the insulating layer or the like can be eliminated, and variation in electrical characteristics of the thin film transistor can be prevented. it can. Therefore, the reliability of display devices and electronic devices using them is improved.

    In addition, the thin film transistor in this embodiment can be manufactured through a simple process, and a formed pattern can be formed with high controllability.

  A connection wiring layer 160, a connection wiring layer 161, and a connection wiring layer 162 are formed over the substrate 100 in the same process as the first gate electrode layer 103a and the first gate electrode layer 103b. Then, a part of the insulating layer is etched so that the connection wiring layer 160, the connection wiring layer 161, and the connection wiring layer 162 are exposed, and the source or drain electrode layer 111, the source or drain electrode layer 112, and Various circuits can be realized by appropriately connecting TFTs with the connection wiring layer 163 formed in the same process.

(Embodiment 6)
Next, a mode in which a driver circuit for driving is mounted on the display panel manufactured according to Embodiment Modes 4 to 7 will be described.

  First, a display device employing a COG method is described with reference to FIG. A pixel portion 2701 for displaying information such as characters and images is provided over the substrate 2700. A substrate provided with a plurality of drive circuits is divided into a rectangular shape, and a divided drive circuit (also referred to as a driver IC) 2751 is mounted on the substrate 2700. FIG. 15A illustrates a mode in which a plurality of driver ICs 2751 and an FPC 2750 are mounted on the tip of the driver ICs 2751. Further, the size of the division may be substantially the same as the length of the side of the pixel portion on the signal line side, and a tape may be mounted on the tip of the driver IC on a single driver IC.

  Alternatively, a TAB method may be employed. In that case, a plurality of tapes may be attached and driver ICs may be mounted on the tapes as shown in FIG. As in the case of the COG method, a single driver IC may be mounted on a single tape. In this case, a metal piece or the like for fixing the driver IC may be attached together due to strength problems.

  A plurality of driver ICs mounted on these display panels may be formed on a rectangular substrate having a side of 300 mm to 1000 mm or more from the viewpoint of improving productivity.

  That is, a plurality of circuit patterns having a drive circuit portion and an input / output terminal as one unit may be formed on the substrate, and finally divided and taken out. The long side of the driver IC may be formed in a rectangular shape having a long side of 15 to 80 mm and a short side of 1 to 6 mm in consideration of the length of one side of the pixel portion and the pixel pitch. Or a length obtained by adding one side of the pixel portion and one side of each driver circuit.

  The advantage of the external dimensions of the driver IC over the IC chip lies in the length of the long side. When a driver IC formed with a long side of 15 to 80 mm is used, the number required for mounting corresponding to the pixel portion is as follows. This is less than when an IC chip is used, and the manufacturing yield can be improved. Further, when a driver IC is formed over a glass substrate, the shape of the substrate used as a base is not limited, and thus productivity is not impaired. This is a great advantage compared with the case where the IC chip is taken out from the circular silicon wafer.

  In the case where the scan line driver circuit 3702 is formed over the substrate as shown in FIG. 14B, a driver IC in which a driver circuit driver circuit on the signal line side is formed in a region outside the pixel portion 3701. Is implemented. These driver ICs are drive circuits on the signal line side. In order to form a pixel region corresponding to RGB full color, the number of signal lines in the XGA class is 3072 and the number in the UXGA class is 4800. The signal lines formed in such a number are divided into several blocks at the end of the pixel portion 3701 to form lead lines, and are collected according to the pitch of the output terminals of the driver IC.

  The driver IC is preferably formed of a crystalline semiconductor formed over a substrate, and the crystalline semiconductor is preferably formed by irradiating continuous-emitting laser light. Therefore, a continuous light emitting solid state laser or gas laser is used as an oscillator for generating the laser light. When a continuous light emission laser is used, a transistor can be formed using a polycrystalline semiconductor layer having a large grain size with few crystal defects. In addition, since the mobility and response speed are good, high-speed driving is possible, the operating frequency of the element can be improved as compared with the prior art, and there is less variation in characteristics, so that high reliability can be obtained. Note that for the purpose of further improving the operating frequency, the channel length direction of the transistor and the scanning direction of the laser light are preferably matched. This is because, in the laser crystallization process using a continuous-wave laser, the highest mobility is obtained when the channel length direction of the transistor and the scanning direction of the laser beam with respect to the substrate are substantially parallel (preferably −30 ° to 30 °). Is obtained. Note that the channel length direction corresponds to the direction in which current flows in the channel formation region, in other words, the direction in which charges move. The transistor thus fabricated has an active layer composed of a polycrystalline semiconductor layer in which crystal grains extend in the channel direction, which means that the crystal grain boundaries are formed substantially along the channel direction. means.

  In order to perform laser crystallization, it is preferable to significantly narrow down the laser beam, and the width of the laser beam shape (beam spot) should be about 1 mm to 3 mm, which is the same width of the short side of the driver IC. Is good. In order to ensure a sufficient and efficient energy density for the irradiated object, the laser light irradiation region is preferably linear. However, the line shape here does not mean a line in a strict sense, but means a rectangle or an ellipse having a large aspect ratio. For example, the aspect ratio is 2 or more (preferably 10 or more and 10,000 or less). In this manner, a method for manufacturing a display device with improved productivity can be provided by setting the width of the laser beam shape (beam spot) to the same length as the short side of the driver IC.

  As shown in FIGS. 15A and 15B, driver ICs may be mounted as both the scanning line driver circuit and the signal line driver circuit. In that case, the specifications of the driver ICs used on the scanning line side and the signal line side may be different.

In the pixel region, signal lines and scanning lines intersect to form a matrix, and transistors are arranged corresponding to the respective intersections. The present invention is characterized in that a TFT having an amorphous semiconductor or semi-amorphous semiconductor as a channel portion is used as a transistor arranged in a pixel region. The amorphous semiconductor is formed by a method such as a plasma CVD method or a sputtering method. A semi-amorphous semiconductor can be formed at a temperature of 300 ° C. or less by a plasma CVD method. For example, even a non-alkali glass substrate with an outer dimension of 550 × 650 mm has a film thickness necessary for forming a transistor. Is formed in a short time. Such a feature of the manufacturing technique is effective in manufacturing a large-screen display device. In addition, a semi-amorphous TFT can obtain a field effect mobility of ² to 10 cm ² / V · sec by forming a channel formation region with SAS. When the present invention is used, a thin film transistor with high electrical characteristics can be formed, so that a TFT having electrical characteristics necessary for sufficiently functioning a pixel can be formed. Therefore, this TFT can be used as a switching element for a pixel or an element constituting a driving circuit on the scanning line side. Therefore, a display panel that realizes system-on-panel can be manufactured.

  By using TFTs in which the semiconductor layer is formed of SAS, the scanning line side driver circuit can also be integrally formed on the substrate. In the case of using TFTs in which the semiconductor layer is formed of AS, the scanning line side driver circuit and the signal A driver IC may be mounted on both the line side driver circuits.

  In that case, it is preferable that the specifications of the driver ICs used on the scanning line side and the signal line side are different. For example, although a transistor constituting the driver IC on the scanning line side is required to have a withstand voltage of about 30 V, the driving frequency is 100 kHz or less, and a relatively high speed operation is not required. Therefore, it is preferable to set the channel length (L) of the transistors forming the driver on the scanning line side to be sufficiently large. On the other hand, it is sufficient for the transistor of the driver IC on the signal line side to have a withstand voltage of about 12V, but the drive frequency is about 65 MHz at 3V, and high speed operation is required. Therefore, it is preferable to set the channel length and the like of the transistors constituting the driver on the micron rule. When the present invention is used, a thin film transistor having high electrical characteristics can be formed, so that the setting of such a micron rule can be determined with a margin. Therefore, even a thin film transistor using a droplet discharge method, which is difficult to be miniaturized, can be manufactured without impairing its electrical characteristics.

  The method for mounting the driver IC is not particularly limited, and a known COG method, wire bonding method, or TAB method can be used.

  By setting the thickness of the driver IC to the same thickness as that of the counter substrate, the height between the two becomes substantially the same, which contributes to a reduction in thickness of the entire display device. In addition, since each substrate is made of the same material, thermal stress is not generated even when a temperature change occurs in the display device, and the characteristics of a circuit made of TFTs are not impaired. In addition, the number of driver ICs to be mounted in one pixel region can be reduced by mounting the drive circuit with a driver IC that is longer than the IC chip as shown in this embodiment.

  As described above, a driver circuit can be incorporated in the display panel.

(Embodiment 7)
A structure of a pixel of the display panel described in this embodiment will be described with reference to an equivalent circuit diagram illustrated in FIG.

  In the pixel shown in FIG. 17A, a signal line 410, a power supply line 411, a power supply line 412, a power supply line 413, and a scanning line 414 are arranged in the column direction. The pixel further includes a switching TFT 401, a driving TFT 403, a current control TFT 404, a capacitor element 402, and a light emitting element 405.

  The pixel shown in FIG. 17C is different from the pixel shown in FIG. 17A except that the gate electrode of the TFT 403 is connected to the power supply line 415 arranged in the row direction. is there. That is, both pixels shown in FIGS. 17A and 17C show the same equivalent circuit diagram. However, in the case where the power supply line 412 is arranged in the row direction (FIG. 17A) and in the case where the power supply line 415 is arranged in the column direction (FIG. 17C), each power supply line is conductive on a different layer. Formed with body layers. Here, attention is paid to the wiring to which the gate electrode of the driving TFT 403 is connected, and FIGS. 17A and 17C are separately shown in order to show that the layers for producing these are different.

As a feature of the pixel shown in FIGS. 17A and 17C, a TFT 403 and a TFT 404 are connected in series in the pixel, and the channel length L ₃ and channel width W _{3 of} the TFT 403 and the channel length L ₄ and channel width of the TFT 404 are obtained. W ₄ may be set to satisfy L ₃ / W ₃ : L ₄ / W ₄ = 5 to 6000: 1. As an example when 6000: 1 is satisfied, there is a case where L ₃ is 500 μm, W ₃ is 3 μm, L ₄ is 3 μm, and W ₄ is 100 μm. When the present invention is used, a thin film transistor with high electrical characteristics can be formed. Therefore, such channel width setting can be determined with a margin. Therefore, even a thin film transistor using a droplet discharge method that is difficult to be miniaturized can be manufactured without impairing the electrical characteristics. Accordingly, a TFT having electric characteristics necessary for sufficiently functioning a pixel as shown in FIGS. 17A and 17C can be formed, and a highly reliable display panel with excellent display capability can be manufactured. .

Note that the TFT 403 operates in a saturation region and has a role of controlling a current value flowing through the light emitting element 405, and the TFT 404 has a role of controlling a current supply to the light emitting element 405 by operating in a linear region. Both TFTs preferably have the same conductivity type in terms of manufacturing process. The TFT 403 may be a depletion type TFT as well as an enhancement type. In the present invention having the above structure, since the TFT 404 operates in a linear region, a slight change in V _GS of the TFT 404 does not affect the current value of the light emitting element 405. That is, the current value of the light emitting element 405 is determined by the TFT 403 operating in the saturation region. The present invention having the above structure can provide a display device in which luminance unevenness of a light emitting element due to variation in TFT characteristics is improved and image quality is improved.

  In the pixel shown in FIGS. 17A to 17D, a TFT 401 controls input of a video signal to the pixel. When the TFT 401 is turned on and a video signal is input into the pixel, the capacitor 402 The video signal is held in Note that FIGS. 17A and 17C illustrate a structure in which the capacitor 402 is provided; however, the present invention is not limited to this, and the capacity for holding a video signal can be covered by a gate capacity or the like. In this case, the capacitor 402 is not necessarily provided explicitly.

  The light-emitting element 405 has a structure in which an electroluminescent layer is sandwiched between two electrodes, and a potential difference is generated between the pixel electrode and the counter electrode (between the anode and the cathode) so that a forward bias voltage is applied. Is provided. The electroluminescent layer is composed of a wide variety of materials such as organic materials and inorganic materials. The luminescence in the electroluminescent layer includes light emission (fluorescence) when returning from a singlet excited state to a ground state, and a triplet excited state. And light emission (phosphorescence) when returning to the ground state.

  The pixel shown in FIG. 17B has the same pixel structure as that shown in FIG. 17A except that a TFT 406 and a scanning line 416 are added. Similarly, the pixel illustrated in FIG. 17D has the same pixel structure as that illustrated in FIG. 17C except that a TFT 406 and a scanning line 416 are added.

  The TFT 406 is controlled to be turned on or off by a newly arranged scanning line 416. When the TFT 406 is turned on, the charge held in the capacitor 402 is discharged and the TFT 406 is turned off. That is, a state in which no current flows through the light emitting element 405 can be created by the arrangement of the TFT 406. Accordingly, the configurations in FIGS. 17B and 17D can improve the duty ratio because the lighting period can be started simultaneously with or immediately after the start of the writing period without waiting for signal writing to all the pixels. It becomes possible.

  In the pixel shown in FIG. 17E, a signal line 450, a power supply line 451, a power supply line 452, and a scanning line 453 are arranged in the column direction. In addition, the pixel includes a switching TFT 441, a driving TFT 443, a capacitor element 442, and a light emitting element 444. The pixel illustrated in FIG. 17F has the same pixel structure as that illustrated in FIG. 17E except that a TFT 445 and a scanning line 454 are added. Note that the duty ratio of the structure in FIG. 17F can also be improved by the arrangement of the TFTs 445.

    As described above, when the present invention is used, a thin film transistor with high electrical characteristics can be formed. Therefore, such a fine pattern setting can be determined with a margin. Therefore, even a thin film transistor using a droplet discharge method, which is difficult to be miniaturized, can be manufactured without impairing its electrical characteristics. In addition, since it can be stably formed with good controllability, it can also give high electrical characteristics and reliability to the TFT, and it can also be applied technology for improving the display capability of the pixel according to the purpose of use. We can cope enough.

(Embodiment 8)
One mode in which protective diodes are provided in the scanning line side input terminal portion and the signal line side input terminal portion will be described with reference to FIG. In FIG. 24, a pixel 2702 is provided with a TFT 501, a TFT 502, a capacitor 504, and a light emitting element 503. This TFT has a configuration similar to that of the second embodiment.

  A protection diode 561 and a protection diode 562 are provided in the signal line side input terminal portion. This protection diode is manufactured in the same process as the TFT 501 or the TFT 502, and is operated as a diode by connecting the gate and one of the drain or the source. An equivalent circuit diagram of the top view shown in FIG. 24 is shown in FIG.

  The protection diode 561 includes a gate electrode layer, a semiconductor layer, and a wiring layer. The protective diode 562 has a similar structure. The common potential line 554 and the common potential line 555 connected to the protection diode are formed in the same layer as the gate electrode layer. Therefore, in order to be electrically connected to the wiring layer, it is necessary to form a contact hole in the insulating layer.

  The contact hole to the insulating layer may be etched by forming a mask layer. In this case, if an atmospheric pressure discharge etching process is applied, a local electric discharge process is also possible, and it is not necessary to form a mask layer on the entire surface of the substrate.

  The signal wiring layer is formed of the same layer as the source and drain wiring layer 505 in the TFT 501, and has a structure in which the signal wiring layer connected thereto and the source or drain side are connected.

  The input terminal portion on the scanning signal line side has the same configuration. A protection diode provided in the input stage can be formed at the same time. Note that the position at which the protective diode is inserted is not limited to this embodiment mode, and can be provided between the driver circuit and the pixel.

  As described above, when the present invention is used, a pattern such as a wiring can be stably formed with good controllability without causing defective formation. Therefore, the formation of a protective circuit complicates the wiring and the like. Even if it is formed, a short circuit or the like due to poor installation during formation will not occur. In addition, since a thin film transistor with high electrical characteristics can be used, power consumption can be reduced and the device can be sufficiently handled even when the device is downsized and thinned. Therefore, a display device having favorable electrical characteristics and high reliability can be manufactured.

(Embodiment 9)
FIG. 22 shows an example in which an EL display module is formed using a TFT substrate 2800 manufactured by applying the present invention. In FIG. 22, a pixel portion including pixels is formed over a TFT substrate 2800.

  In FIG. 22, outside the pixel portion and between the driver circuit and the pixel, the same TFT as that formed in the pixel or the gate of the TFT and one of the source and the drain is connected to be the same as the diode. The protection circuit portion 2801 operated in the above is provided. As the driver circuit 2809, a driver IC formed of a single crystal semiconductor, a stick driver IC formed of a polycrystalline semiconductor film over a glass substrate, a driver circuit formed of SAS, or the like is applied.

  The TFT substrate 2800 is fixed to the sealing substrate 2820 through spacers 2806a and 2806b formed by a droplet discharge method. The spacer is preferably provided to keep the distance between the two substrates constant even when the substrate is thin and the area of the pixel portion is increased. A space between the TFT substrate 2800 and the sealing substrate 2820 on the light-emitting element 2804 and the light-emitting element 2805 connected to the TFT 2802 and the TFT 2803, respectively, may be solidified by filling a light-transmitting resin material. Then, it may be filled with dehydrated nitrogen or inert gas.

  FIG. 22 shows a case where the light-emitting element 2804 and the light-emitting element 2805 have a top emission type (top emission type) configuration, in which light is emitted in the direction of the arrow shown in the drawing. Each pixel can perform multicolor display by changing the emission color of the pixels to red, green, and blue. At this time, by forming the colored layer 2807a, the colored layer 2807b, and the colored layer 2807c corresponding to each color on the sealing substrate 2820 side, the color purity of the emitted light can be increased. Alternatively, the pixel may be combined with a colored layer 2807a, a colored layer 2807b, or a colored layer 2807c as a white light emitting element.

  A driver circuit 2809 which is an external circuit is connected to a scanning line or a signal line connection terminal provided at one end of the TFT substrate 2800 through a wiring substrate 2810. Further, a heat pipe 2813 and a heat radiating plate 2812 may be provided in contact with or in proximity to the TFT substrate 2800 to enhance the heat radiation effect.

  In FIG. 22, the top emission EL module is used. However, the configuration of the light emitting element and the arrangement of the external circuit board may be changed to have a bottom emission structure, of course, a dual emission structure in which light is emitted from both the upper and lower surfaces. In the case of a top emission type structure, an insulating layer serving as a partition wall may be colored and used as a black matrix. The partition walls can be formed by a droplet discharge method, and may be formed by mixing a resin material such as polyimide with a pigment-based black resin, carbon black, or the like, or may be a laminate thereof.

  Further, in the TFT substrate 2800, a sealing structure may be formed by attaching a resin film to the side where the pixel portion is formed using a sealing material or an adhesive resin. Although glass sealing using a glass substrate is described in this embodiment mode, various sealing methods such as resin sealing using a resin, plastic sealing using a plastic, and film sealing using a film can be used. A gas barrier film for preventing the permeation of water vapor may be provided on the surface of the resin film. By adopting a film sealing structure, further reduction in thickness and weight can be achieved.

(Embodiment 10)
A television device can be completed with the display device formed according to the present invention. In the display panel, only the pixel portion is formed as shown in FIG. 14A, and the scanning line side driver circuit and the signal line side driver circuit are mounted by the TAB method as shown in FIG. 15B. And a case where the TFT is formed by SAS as shown in FIG. 14B, and the pixel portion and the scanning line side driver circuit are integrated on the substrate. In some cases, the signal line side driver circuit is separately mounted as a driver IC, or the pixel portion, the signal line side driver circuit, and the scanning line side driver circuit are integrally formed on the substrate as shown in FIG. However, any form is acceptable.

  As other external circuit configurations, on the video signal input side, among the signals received by the tuner, the video signal amplification circuit that amplifies the video signal, and the signal output from it corresponds to each color of red, green, and blue And a control circuit for converting the video signal into the input specification of the driver IC. The control circuit outputs signals to the scanning line side and the signal line side, respectively. In the case of digital driving, a signal dividing circuit may be provided on the signal line side and an input digital signal may be divided into m pieces and supplied.

  Of the signals received by the tuner, the audio signal is sent to the audio signal amplifier circuit, and the output is supplied to the speaker via the audio signal processing circuit. The control circuit receives control information of the receiving station (reception frequency) and volume from the input unit, and sends a signal to the tuner and the audio signal processing circuit.

  FIG. 13 shows an example of a liquid crystal display module. A TFT substrate 2600 and a counter substrate 2601 are fixed to each other with a sealant 2602, and a pixel portion 2603 and a liquid crystal layer 2604 are provided therebetween to form a display region. The colored layer 2605 is necessary for color display. In the case of the RGB method, a colored layer corresponding to each color of red, green, and blue is provided corresponding to each pixel. A polarizing plate 2606, a polarizing plate 2607, and a lens film 2613 are disposed outside the TFT substrate 2600 and the counter substrate 2601. The light source is composed of a cold cathode tube 2610 and a reflector 2611. The circuit board 2612 is connected to the TFT substrate 2600 by a drive circuit 2608 and a flexible wiring board 2609, and an external circuit such as a control circuit or a power supply circuit is incorporated. .

  As shown in FIGS. 20A and 20B, the display module can be incorporated into a housing to complete the television device. When the EL display module as shown in FIG. 22 is used, the liquid crystal television device can be completed when the liquid crystal display module as shown in FIG. 13 is used for the EL television device. A main screen 2003 is formed by the display module, and a speaker portion 2009, operation switches, and the like are provided as other accessory equipment. Thus, a television device can be completed according to the present invention.

  In addition, as shown in FIG. 19, reflected light of light incident from the outside may be blocked using a retardation plate or a polarizing plate. FIG. 19 shows a top emission type structure in which an insulating layer 3605 serving as a partition is colored and used as a black matrix. This partition wall can be formed by a droplet discharge method, and carbon black or the like may be mixed with a resin material such as polyimide, or may be a laminate thereof. A different material may be discharged to the same region a plurality of times by a droplet discharge method to form a partition wall. In the present embodiment, a pigment-based black resin is used. As the phase difference plate 3603 and the phase difference plate 3604, λ / 4 \ λ / 2 may be used and designed so that light can be controlled. The structure is TFT element substrate 2800 \ light emitting element 2804 \ sealing substrate (sealing material) 2820 \ phase difference plate 3603, phase difference plate 3604 (λ / 4 \ λ / 2) \ polarizing plate 3602, from the light emitting element. The emitted light passes through these and is emitted to the outside from the polarizing plate side. The retardation plate and the polarizing plate may be installed on the side from which light is emitted, and may be installed on both sides as long as the display is a double-sided emission type that emits light on both sides. Further, an antireflection film 3601 may be provided outside the polarizing plate. This makes it possible to display a higher-definition and precise image.

  As shown in FIG. 20A, a display panel 2002 using a display element is incorporated in a housing 2001, and reception of general television broadcasting is started by a receiver 2005, and a wired or wireless connection is made via a modem 2004. By connecting to a communication network, information communication in one direction (from the sender to the receiver) or in both directions (between the sender and the receiver or between the receivers) can be performed. The television device can be operated by a switch incorporated in the housing or a separate remote controller 2006, and this remote controller is also provided with a display unit 2007 for displaying information to be output. Also good.

  In addition, the television device may have a configuration in which a sub screen 2008 is formed using the second display panel in addition to the main screen 2003 to display channels, volume, and the like. In this configuration, the main screen 2003 may be formed using an EL display panel with an excellent viewing angle, and the sub screen may be formed using a liquid crystal display panel that can display with low power consumption. In order to prioritize the reduction in power consumption, the main screen 2003 may be formed using a liquid crystal display panel, the sub screen may be formed using an EL display panel, and the sub screen may blink. When the present invention is used, a highly reliable display device can be obtained even when such a large substrate is used and a large number of TFTs and electronic components are used.

  FIG. 20B illustrates a television device having a large display portion of 20 to 80 inches, for example, which includes a housing 2010, a keyboard portion 2011 that is an operation portion, a display portion 2012, a speaker portion 2013, and the like. The present invention is applied to manufacture of the display portion 2012. Since the display portion in FIG. 20B uses a bendable substance, the television set has a curved display portion. Since the shape of the display portion can be freely designed as described above, a television device having a desired shape can be manufactured.

  By using the present invention, the process can be simplified, and a display panel can be easily manufactured even if a glass substrate of the fifth generation or more in which one side exceeds 1000 mm is used.

  According to the present invention, a desired pattern can be formed with good controllability. In addition, there is little material loss, and cost reduction can be achieved. Therefore, a television device using the present invention can be formed at low cost even if it has a large screen display portion. In addition, since the electrical characteristics are high, low power consumption can be realized. Therefore, a high-performance and highly reliable television device can be manufactured with high yield.

  Of course, the present invention is not limited to a television device, but can be applied to various applications such as personal computer monitors, information display boards at railway stations and airports, and advertisement display boards on streets. can do.

(Embodiment 11)
Various display devices can be manufactured by applying the present invention. That is, the present invention can be applied to various electronic devices in which these display devices are incorporated in a display portion.

  Such electronic devices include video cameras, digital cameras, projectors, head mounted displays (goggles type displays), car navigation systems, car stereos, personal computers, game machines, personal digital assistants (mobile computers, mobile phones, electronic books, etc.) ), An image reproducing apparatus provided with a recording medium (specifically, an apparatus provided with a display capable of reproducing a recording medium such as a digital versatile disc (DVD) and displaying the image). Examples thereof are shown in FIG.

  FIG. 21A illustrates a computer, which includes a main body 2101, a housing 2102, a display portion 2103, a keyboard 2104, an external connection port 2105, a pointing mouse 2106, and the like. By using the present invention, a computer that displays a high-quality image with high reliability and low power consumption can be completed even if the size and wiring are reduced.

  FIG. 21B shows an image reproducing device (specifically, a DVD reproducing device) provided with a recording medium, which includes a main body 2201, a housing 2202, a display portion A 2203, a display portion B 2204, and a recording medium (DVD etc.) reading portion 2205. , An operation key 2206, a speaker portion 2207, and the like. The display portion A2203 mainly displays image information, and the display portion B2204 mainly displays character information. By using the present invention, an image reproducing device that displays a high-quality image with high reliability and low power consumption can be completed even if the device is downsized and wiring and the like are refined.

  FIG. 21C illustrates a mobile phone, which includes a main body 2301, an audio output portion 2302, an audio input portion 2303, a display portion 2304, operation switches 2305, an antenna 2306, and the like. By using the present invention, a mobile phone that displays high-quality images with high reliability and low power consumption can be completed even if the size and size of wiring and the like are reduced.

  FIG. 21D illustrates a video camera, which includes a main body 2401, a display portion 2402, a housing 2403, an external connection port 2404, a remote control reception portion 2405, an image receiving portion 2406, a battery 2407, an audio input portion 2408, an eyepiece portion 2409, and an operation. Key 2410 and the like. By using the present invention, a video camera that can display a high-quality image with high reliability and low power consumption even when the size is reduced and wiring and the like are made precise can be completed. This embodiment mode can be freely combined with the above embodiment modes.

The figure explaining this invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. The figure explaining this invention. Sectional drawing of the display apparatus of this invention. Sectional drawing explaining the structural example of the liquid crystal display module of this invention. The top view of the display apparatus of this invention. The top view of the display apparatus of this invention. 4A to 4D illustrate a method for manufacturing a display device of the present invention. FIG. 10 is a circuit diagram illustrating a structure of a pixel that can be applied to an EL display panel of the present invention. FIG. 6 is a top view illustrating a display panel of the present invention. Sectional drawing explaining the structural example of EL display module of this invention. FIG. 11 illustrates an electronic device to which the present invention is applied. FIG. 11 illustrates an electronic device to which the present invention is applied. Sectional drawing explaining the structural example of EL display module of this invention. FIG. 25 is an equivalent circuit diagram of an EL display panel described in FIG. FIG. 10 is a top view illustrating an EL display panel of the present invention. 6A and 6B illustrate a circuit structure in the case where a scan line side driver circuit is formed using TFTs in an EL display panel of the present invention. 6A and 6B illustrate a circuit configuration in the case where a scan line side driver circuit is formed using TFTs in an EL display panel of the present invention (shift register circuit). 4A and 4B illustrate a circuit configuration in the case where a scan line side driver circuit is formed using TFTs in an EL display panel of the present invention (buffer circuit). 2A and 2B illustrate a structure of a droplet discharge device that can be applied to the present invention. 4A and 4B illustrate a liquid crystal dropping injection method that can be applied to the present invention. 3A and 3B each illustrate a structure of a light-emitting element that can be applied to the present invention.

Claims (17)

Forming a first conductive layer having a recess;
Forming a first insulating layer having a recess on the first conductive layer;
Forming a semiconductor layer having a recess on the first insulating layer;
Forming a second insulating layer having a recess on the semiconductor layer;
A method for manufacturing a thin film transistor, wherein a second conductive layer is formed by discharging a composition containing a conductive material into the concave portion of the second insulating layer. Forming an electrically connected first conductive layer and a second conductive layer adjacent to each other;
Forming a first insulating layer having a recess on the first conductive layer and the second conductive layer;
Forming a semiconductor layer having a recess on the first insulating layer;
Forming a second insulating layer having a recess on the semiconductor layer;
A method for manufacturing a thin film transistor, wherein a third conductive layer is formed by discharging a composition containing a conductive material into the concave portion of the second insulating layer. Forming a first gate electrode layer having a recess;
Forming a first insulating layer having a recess on the first gate electrode layer;
Forming a semiconductor layer having a recess on the first insulating layer;
Forming a second insulating layer having a recess on the semiconductor layer;
Discharging a composition containing a conductive material into the concave portion of the second insulating layer to form a second gate electrode layer;
A method for manufacturing a thin film transistor, wherein a source electrode layer and a drain electrode layer are formed in electrical connection with the semiconductor layer. Forming a first conductive layer and a second conductive layer that are electrically connected to each other; forming a first gate electrode layer;
Forming a first insulating layer having a recess on the first gate electrode layer;
Forming a semiconductor layer having a recess on the first insulating layer;
Forming a second insulating layer having a recess on the semiconductor layer;
Discharging a composition containing a conductive material into the concave portion of the second insulating layer to form a second gate electrode layer;
A method for manufacturing a thin film transistor, wherein a source electrode layer and a drain electrode layer are formed in electrical connection with the semiconductor layer.   5. The method for manufacturing a thin film transistor according to claim 1, wherein the concave portion is formed to have a groove shape.   5. The method for manufacturing a thin film transistor according to claim 1, wherein the concave portion is formed to have a hole shape. Forming a first gate electrode layer having a recess;
Forming a first insulating layer having a recess on the first gate electrode layer;
Forming a semiconductor layer having a recess on the first insulating layer;
Forming a second insulating layer having a recess on the semiconductor layer;
Discharging a composition containing a conductive material into the concave portion of the second insulating layer to form a second gate electrode layer;
Forming a source electrode layer and a drain electrode layer in electrical connection with the semiconductor layer;
Forming a first electrode layer on the source electrode layer or the drain electrode layer;
Forming an electroluminescent layer on the first electrode layer;
A method for manufacturing a display device, comprising forming a second electrode layer over the electroluminescent layer. Forming a first conductive layer and a second conductive layer that are electrically connected to each other; forming a first gate electrode layer;
Forming a first insulating layer having a recess on the first gate electrode layer;
Forming a semiconductor layer having a recess on the first insulating layer;
Forming a second insulating layer having a recess on the semiconductor layer;
Discharging a composition containing a conductive material into the concave portion of the second insulating layer to form a second gate electrode layer;
Forming a source electrode layer and a drain electrode layer in electrical connection with the semiconductor layer;
Forming a first electrode layer on the source electrode layer or the drain electrode layer;
Forming an electroluminescent layer on the first electrode layer;
A method for manufacturing a display device, comprising forming a second electrode layer over the electroluminescent layer. A first conductive layer having a recess;
A first insulating layer having a recess on the first conductive layer;
A semiconductor layer having a recess on the first insulating layer;
A second insulating layer having a recess on the semiconductor layer;
A thin film transistor, wherein a second conductive layer is formed in the recess of the second insulating layer. Having a first conductive layer and a second conductive layer adjacent to each other for electrical connection;
A first insulating layer having a recess on the first conductive layer and the second conductive layer;
A semiconductor layer having a recess on the first insulating layer;
A second insulating layer having a recess on the semiconductor layer;
A thin film transistor comprising a third conductive layer in the recess of the second insulating layer. A first gate electrode layer having a recess;
A first insulating layer having a recess on the first gate electrode layer;
A semiconductor layer having a recess on the first insulating layer;
A second insulating layer having a recess on the semiconductor layer;
A second gate electrode layer in the recess of the second insulating layer;
A thin film transistor including a source electrode layer and a drain electrode layer in contact with the semiconductor layer. A first gate electrode layer including a first conductive layer and a second conductive layer that are electrically connected adjacent to each other;
A first insulating layer having a recess on the first gate electrode layer;
A semiconductor layer having a recess on the first insulating layer;
A second insulating layer having a recess on the semiconductor layer;
In the concave portion of the second insulating layer, a second gate electrode layer is provided,
A thin film transistor including a source electrode layer and a drain electrode layer in contact with the semiconductor layer.   The thin film transistor according to claim 9, wherein the recess has a groove shape.   The thin film transistor according to claim 9, wherein the recess has a hole shape. A first gate electrode layer having a recess;
A first insulating layer having a recess on the first gate electrode layer;
A semiconductor layer having a recess on the first insulating layer;
A second insulating layer having a recess on the semiconductor layer;
A second gate electrode layer in the recess of the second insulating layer;
A source electrode layer and a drain electrode layer in contact with the semiconductor layer;
A first electrode layer on the source electrode layer or the drain electrode layer;
An electroluminescent layer on the first electrode layer;
A display device comprising a second electrode layer on the electroluminescent layer. A first gate electrode layer including a first conductive layer and a second conductive layer that are electrically connected adjacent to each other;
A first insulating layer having a recess on the first gate electrode layer;
A semiconductor layer having a recess on the first insulating layer;
A second insulating layer having a recess on the semiconductor layer;
In the concave portion of the second insulating layer, a second gate electrode layer is provided,
A source electrode layer and a drain electrode layer in contact with the semiconductor layer;
A first electrode layer on the source electrode layer or the drain electrode layer;
An electroluminescent layer on the first electrode layer;
A display device comprising a second electrode layer on the electroluminescent layer. A television device comprising a display screen by the display device according to claim 15 or 16.

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