JP2005123894A - High frequency multichip module board - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To realize a high frequency multichip module board exhibiting excellent high frequency signal transmission characteristics in which chips can be mounted with high integration efficiency and mounting on a mother board is facilitated. <P>SOLUTION: The high frequency multichip module board 1 comprises a high frequency signal line 3 for connecting a chip formed on the upper surface of a dielectric substrate 2, a ground conductor layer 4, a signal terminal 31 for mounting on a mother board 5, and a ground terminal 41 formed on the lower surface of the dielectric substrate 2. The signal line 3 and the ground conductor layer 4 constitute a microstrip line. Furthermore, a ground post 7 connected with the ground conductor layer 4 and arranged substantially in parallel with a signal connection member 6 rationalizes the characteristic impedance at the part of signal connection member 6, and an adjusting plate 8 connected with the ground post 7 suppresses increase in characteristic impedance at a part where the line structure is changed from the signal line 3 to the signal connection member 6. The signal terminal 31 and the ground terminal 41 collected on the lower surface facilitate mounting of the board 1 onto the mother board 5. Since the ground conductor layer is not formed on the upper surface of the dielectric substrate 2, integration efficiency of chips is enhanced. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to a high-frequency multichip module substrate.

  Conventionally, a plurality of chip-shaped high-frequency compatible elements such as optical elements and switching elements are mounted on a high-frequency wiring board (high-frequency multichip module board) having a transmission line structure for transmitting high-frequency signals such as microwaves and millimeter waves. A multi-chip module for high frequency that is integrated with each other is known. For normal operation of the high-frequency multichip module (to ensure signal quality), it is important to optimize the characteristic impedance of the transmission line in the high-frequency multichip module substrate. The characteristic impedance of the transmission line depends on the geometric structure of the circuit elements. Therefore, the incorporation of a microstrip line structure using a signal line and a ground conductor layer as a transmission line has been attempted. In the portion where the microstrip line can be formed, the characteristic impedance of the signal line with respect to the ground conductor layer can be designed to be, for example, 50Ω or 75Ω.

  In a portion where the above-described microstrip line cannot be formed, impedance optimization by another structure is achieved. For example, in an interlayer signal line connection portion by an interlayer connection conductor (interlayer via) in a multilayer board, the first and second conductor members that are set to the ground potential are arranged at symmetrical positions of the connection conductor to optimize the impedance. It is known (see, for example, Patent Document 1).

In addition, as a countermeasure when the above-described interlayer connection conductor (interlayer via) is too long due to the relationship with the signal frequency wavelength, there is known a method in which the interlayer connection body is divided into two and a ground conductor layer is inserted (for example, Patent Document 2).
JP-A-7-221512 JP 2002-198709 A

  However, in the high-frequency multichip module substrate as shown in the above-mentioned patent document, optimization of characteristic impedance is described, but it is not mentioned from the viewpoint of a high-frequency multichip module. In other words, the geometric structure of the circuit elements is taken into consideration from the viewpoint of the terminal structure when the multichip module for high frequency is mounted on the parent substrate and the circuit structure for mounting a plurality of chips efficiently on the multichip module substrate for high frequency. Therefore, it is necessary to optimize the characteristic impedance.

  The present invention solves the above-described problems, and is a high-frequency multichip capable of realizing a high-frequency multichip module that is excellent in high-frequency signal transmission characteristics, can be mounted on a chip efficiently, and can be easily mounted on a parent substrate. An object is to provide a module substrate.

  In order to achieve the above object, a first aspect of the present invention provides a dielectric substrate made of a dielectric material, a high-frequency signal line for chip connection provided on one surface of the dielectric substrate, and the signal line. A grounding conductor layer provided on a surface of a dielectric substrate different from the surface provided with a signal terminal and a grounding terminal for mounting on a parent substrate, the signal line and the signal terminal being a signal connection member The ground conductor layer and the ground terminal are electrically connected to a ground potential, and the signal line and the ground conductor layer are paired to constitute a microstrip line for high-frequency signal transmission. A multi-chip module substrate for high frequency comprising: a grounding column electrically connected to the grounding conductor layer, wherein the grounding column is disposed substantially parallel to the signal connection member, and the signal terminal and the grounding terminal Is Serial is a high-frequency multi-chip module substrate, characterized in that it is arranged in substantially the same plane of the dielectric substrate.

The invention of claim 2 is the high-frequency multichip module substrate according to claim 1, further comprising an adjustment plate connected to the grounding pillar, the adjustment plate of the dielectric substrate on which the signal lines are arranged. It is arrange | positioned on the surface substantially the same as the surface.
Is.

  According to a third aspect of the present invention, in the high frequency multichip module substrate according to the first or second aspect, the line width of the signal line connecting the signal connection members constitutes a microstrip line. It is wider than the line width of the signal line in the part.

  According to a fourth aspect of the present invention, in the multi-chip module substrate for high frequency according to any one of the first to third aspects, an outer peripheral length of a cross section of the signal connection member becomes shorter as approaching the ground conductor layer. is there.

  According to a fifth aspect of the present invention, in the high frequency multichip module substrate according to any one of the first to fourth aspects, a plurality of the grounding pillars are arranged around the signal connection member.

  According to a sixth aspect of the present invention, in the high-frequency multichip module substrate according to any one of the first to fifth aspects, the dielectric substrate comprises two or more dielectric material layers, and the ground conductor layer is The signal line is disposed between the surface on which the signal line is disposed and the surface on which the ground terminal and the signal terminal are disposed, and the signal connection member is surrounded by the ground conductor layer.

  According to a seventh aspect of the present invention, in the high-frequency multichip module substrate according to any one of the first to fifth aspects, the grounding pillar is disposed on an outer peripheral surface of the dielectric substrate.

  According to an eighth aspect of the present invention, there is provided a dielectric base made of a dielectric material, a high frequency signal line for chip connection provided on the surface of the dielectric base, a ground conductor layer, and a signal for mounting on a parent substrate. A high-frequency multichip module substrate having a terminal and a ground terminal, wherein the signal line and the ground conductor layer are arranged to face each other across a dielectric base, and the signal lines are substantially perpendicular to each other. A signal line end portion and a signal line center portion, and the ground conductor layer has a ground conductor layer end portion and a ground conductor layer center portion positioned substantially perpendicular to each other, and the signal line center portion; The pair of the ground conductor layer center portion and the pair of the signal line end portion and the ground conductor layer end portion respectively form a microstrip line, the signal terminal is connected to the signal line end portion, and the ground terminal is ,Previous Is connected to the ground conductor layer end, the signal terminals and the ground terminal, a high-frequency multi-chip module substrate, characterized in that it is arranged in substantially the same plane of the dielectric base surface.

  According to a ninth aspect of the present invention, a light emitting element that emits an optical signal according to an input signal on the high frequency multichip module substrate according to any one of the first to eighth aspects, and an optical signal of the light emitting element. A light receiving element that receives a photoelectromotive force by receiving light, an output semiconductor element in which an impedance between the drain and the source changes when a photoelectromotive force of the light receiving element is applied between a gate and a source, and the light emitting element are mounted A circuit pattern for a light emitting element and a circuit pattern for a light receiving element for mounting the light receiving element, wherein a signal line provided on the substrate includes a first signal line and a second signal line, A semiconductor element is mounted between the signal lines, and the line between the signal lines is opened and closed by a change in impedance between the drain and source of the output semiconductor element. A relay.

  According to the first aspect of the present invention, since the signal terminals and the ground terminals are concentrated on the same surface, the high frequency multichip module substrate is easily mounted on the parent substrate using the signal terminals and the ground terminals. I can. In addition, the characteristic impedance of the signal connection member portion is adjusted by arranging a grounding pillar substantially parallel to the signal connection member that electrically connects the signal line and signal terminal for high-frequency signal transmission. Impedance mismatch is reduced, and deterioration of the waveform quality of the high-frequency signal can be reduced. In addition, since the characteristic impedance of the signal transmission line is optimized by the grounding pillar and the grounding conductor layer provided on a surface different from the surface provided with the signal line, the grounding conductor is provided on the surface provided with the signal line. There is no layer, and the chip can be mounted with high integration efficiency.

  According to the second aspect of the present invention, the adjustment plate arranged substantially on the same plane as the signal line and connected to the grounding pillar is used for the line when the line structure changes from the signal line of the microstrip line structure to the signal connection member. Since the increase in characteristic impedance is suppressed and the reflection due to the change in the transmission mode of the high frequency signal is reduced, the waveform deterioration of the high frequency signal passing through the signal line can be reduced.

  According to the invention of claim 3, the line width enlarged portion of the signal line contributes to the suppression of the increase in characteristic impedance as in the above-described adjustment plate, and thus the same effect as described above can be obtained.

  According to the fourth aspect of the present invention, the distance between the signal connection member and the grounding pillar disposed substantially parallel thereto increases as it approaches the grounding conductor layer, and therefore the high-frequency coupling between the signal connection member and the grounding pillar is weakened. Therefore, the tendency that the high frequency coupling between the signal connection member and the ground conductor layer becomes stronger as the signal connection member approaches the ground conductor layer can be canceled, and the change in the characteristic impedance of the signal connection member can be suppressed to be substantially constant. It is possible to suppress deterioration of signal waveform quality due to change in characteristic impedance.

  According to invention of Claim 5, said effect is more effectively realizable by the grounding pillar arrange | positioned in parallel with the signal connection member. In other words, the electric field between the signal connection member and the grounding column is dispersed, allowing high-frequency signals to pass more stably. Further, the shielding effect by the grounding column is increased, and the influence of the signal connection member on the disturbance can be reduced. .

  According to the invention of claim 6, the multi-chip module substrate for high frequency is configured with a conductor structure which is made smaller as a whole than the case where a plurality of grounding pillars are arranged around the signal connection member, and the same effect as described above can be obtained. Can do.

  According to the invention of claim 7, the ground pillar can be formed with a high density as a planar wiring pattern on the outer peripheral surface of the dielectric substrate by a MID (Molded Interconnected Device) method or the like, and a three-dimensional conductor structure is formed inside Thus, it is possible to realize a high-frequency multichip module substrate that is smaller than the above.

  According to the invention of claim 8, it is possible to suppress deterioration in waveform quality when a high frequency signal having a microstrip line structure is formed up to the immediate vicinity of the signal terminal and the ground terminal and a high frequency signal is passed through the signal line, and Thus, a high-frequency multichip module substrate having a terminal structure that can be easily mounted on the parent substrate can be realized. A high-frequency multichip module substrate can be formed inexpensively and easily using a method such as MID.

  According to the ninth aspect of the present invention, there is provided a semiconductor relay capable of matching the characteristic impedance not only to the signal line portion constituting the microstrip line but also to the vicinity of the signal terminal and causing little deterioration of the waveform quality of the high frequency signal. realizable.

  Hereinafter, a high-frequency multichip module substrate according to an embodiment of the present invention will be described with reference to the drawings. FIGS. 1A and 1B show the high-frequency multichip module substrate 1 mounted on the parent substrate, and FIGS. 1B and 1C show the terminal structure on the lower surface of the module substrate. The high frequency multichip module substrate 1 includes a dielectric substrate 2 made of a dielectric material, a high frequency signal line 3 for chip connection provided on one surface (upper surface) of the dielectric substrate 2, and a signal line 3. A grounding conductor layer 4 provided on the surface (lower surface) of the dielectric substrate different from the surface on which the signal line 3 is provided, and a signal terminal 31 and a grounding terminal 41 for mounting on the parent substrate 5. The signal terminal 31 is electrically connected by the signal connection member 6, the ground conductor layer 4 and the ground terminal 41 are electrically connected to have a ground potential, and the signal line 3 and the ground conductor layer 4 form a pair. Thus, a microstrip line for high-frequency signal transmission is configured.

  The high-frequency multichip module substrate 1 configured as described above further includes a grounding column 7 electrically connected to the grounding conductor layer 4, and the grounding column 7 is disposed substantially in parallel with the signal connection member 6. An adjustment plate 8 is connected to the grounding pillar 7, and the adjustment plate 8 is disposed on substantially the same plane as the surface of the dielectric substrate 2 on which the signal line 3 is disposed, and the signal terminal 31, the ground terminal 41, Are disposed on substantially the same surface (lower surface) of the dielectric substrate 2.

  In the above-described high-frequency multichip module substrate 1, the signal connection member 6 and the grounding pillar 7 have a through-hole shape, and are respectively provided through the dielectric substrate 2. Further, the multi-chip module substrate 1 for high frequency is mounted by connecting the signal terminal 31 and the ground terminal 41 to the wiring patterns 51 and 52 provided on the parent substrate 5 with solder 53 or the like, respectively. Further, chip elements such as resistors, coils, capacitors, and semiconductor elements (not shown) are mounted on the upper surface of the high-frequency multichip module substrate 1 to form a high-frequency multichip module.

  The function and operation of each component of the high-frequency multichip module substrate 1 will be described. Since the signal line 3 and the ground conductor layer 4 constitute a microstrip line, the characteristic impedance of the signal line 3 with respect to the ground conductor layer 4 can be designed to an arbitrary value, for example, 50Ω or 75Ω. Further, since the signal connection member 6 and the grounding column 7 are disposed substantially parallel to each other, the distance between the signal connection member 6 and the grounding column 7 or the thickness of the signal connection member 6 or the grounding column 7 is changed. By doing so, the characteristic impedance of the signal connection member 6 with respect to the grounding pillar 7 can be designed to a desired value.

  By the way, since the ground conductor layer 4 is not disposed in the portion of the signal line 3 facing the vicinity of the signal connection member 6 in order to maintain the insulation between the signal terminal 31 and the ground conductor layer 4, the signal of the signal line 3 A microstrip line cannot be formed in the vicinity of the connecting member 6. Therefore, unless any treatment is performed in the vicinity of the signal connection member 6 of the signal line 3, there is no opposing grounded conductor, so that the characteristic impedance is higher than the characteristic impedance of the microstrip line. Therefore, in the multi-chip module substrate 1 for high frequency, the characteristic impedance of the signal connection member 6 portion is reduced by arranging the ground pillar 7 substantially parallel to the signal connection member 6 that electrically connects the signal line 3 and the signal terminal 31. It has been adjusted.

  Further, by arranging the adjusting plate 8 so as to be substantially parallel to the signal line 3, the characteristic impedance of the signal line 3 near the signal connecting member 6 is made lower than that in the state where the adjusting plate 8 is not added, so that the microstrip line It is adjusted to be close to the characteristic impedance value of the part. In addition, the adjustment plate 8 can reduce reflection due to a change in the transmission mode of the high-frequency signal, and can reduce waveform deterioration due to reflection of the high-frequency signal in the changed portion of the line structure.

  The following effects can be obtained by combining the above actions. A high-frequency signal (for example, approximately 500 MHz or more) flowing into and out of the high-frequency multichip module substrate 1 flows in from, for example, the wiring pattern 51 of the parent substrate 5, and the signal terminal 31 and the signal connection member 6 (characteristic impedance due to the installation column 7). Adjustment), a signal line in the vicinity of the signal connecting member 6 (characteristic impedance adjustment by the adjusting plate 8), and a signal line (characteristic impedance adjustment by the microstrip structure) flow through a series of signal transmission lines. Reversely, it flows out from other signal terminals. In this way, the characteristic impedance of each part of the transmission line is adjusted and impedance mismatch is reduced, so that deterioration of the waveform quality of the high-frequency signal can be reduced, and the high-frequency multi-chip has excellent high-frequency signal transmission characteristics. The module substrate 1 is realized.

  Further, according to the above configuration, the signal terminal and the ground terminal can be concentrated and arranged on substantially the same plane. As a result, the high-frequency multichip module substrate 1 can be easily mounted on the parent substrate 5. For mounting the high-frequency multichip module substrate 1 on the parent substrate 5, for example, a normal surface mounting type solder reflow process can be used.

  Furthermore, since the means for optimizing the characteristic impedance of the series of signal transmission lines is the grounding pole 7 and the grounding conductor layer 4 provided on a surface different from the surface on which the signal line 3 is provided, the signal The upper surface of the dielectric substrate provided with the line can be used effectively, and the chip can be mounted with high integration efficiency.

  Next, another example of the high-frequency multichip module substrate will be described. FIGS. 2A and 2B show a high-frequency multichip module substrate having a signal line configuration different from that described above. The signal line 3 of the high-frequency multichip module substrate 1 has a line width wider than the line width of the portion constituting the microstrip line in the portion where the signal connection member 6 is connected. Further, the adjusting plate 8 is smaller than that shown in FIG. Thus, by increasing the line width of the signal line 3 in the vicinity of the signal connection member 6, an effect equivalent to that of the adjustment plate can be obtained. The characteristic impedance of the line can be made approximately the same. That is, the mismatch of characteristic impedance in each part can be reduced.

  Next, still another example of the high-frequency multichip module substrate will be described. FIGS. 3A and 3B show a multi-chip module substrate for high frequency in which the configuration of the signal connection member is different from that described above. The signal connection member 6 of the multi-chip module substrate 1 for high frequency has a shape (an inverted conical shape in the example in the figure) that is shorter as the outer peripheral length of the cross section of the signal connection member is closer to the ground conductor layer 4. Further, two ground terminals 41 electrically connected to the installed conductor layer 4 are arranged with the signal terminal 31 interposed therebetween, and the ground pillar 7 is electrically connected to each ground terminal 41. An adjustment plate 8 is provided at the upper end of each grounding column 7.

  As described above, by arranging the signal connection member 6 and the grounding pillar 7 substantially in parallel, the characteristic impedance of the signal connection member 6 can be lowered and designed to match the characteristic impedance in the microstrip line. The closer the signal connection member 6 is to the ground conductor layer 4, the stronger the high frequency coupling between the signal connection member 6 and the ground conductor layer 4 and the lower the characteristic impedance. Therefore, the closer to the ground conductor layer 4, the thinner the signal connection member 6 and the shorter the outer peripheral length of the cross section of the signal connection member 6 (that is, the distance between the signal connection member 6 and the ground pillar 7 is increased). A decrease in characteristic impedance of the signal connection member 6 in the vicinity of the conductor layer 4 is suppressed, and a substantially constant characteristic impedance characteristic is realized. Thus, since the characteristic impedance of the signal connection member 6 can be kept substantially constant, the deterioration of the waveform quality due to the change of the characteristic impedance can be reduced.

  Further, a signal connection member 6 and a grounding pillar 7 are arranged one by one, and a line having a shape close to a so-called slot line is disposed by sandwiching the signal connection member 6 between the two grounding pillars 7. The part of the member 6 can be shaped like a so-called coplanar transmission line, and a high-frequency signal can be passed through the signal connection member in a more stable state. When three or more grounding pillars 7 are arranged around the signal connection member 6, the shape of the high-frequency transmission line at that portion is close to the shape of the coaxial line, and the characteristic impedance setting is facilitated. Furthermore, disposing the grounding pillars 7 on both sides of the signal connection member 6 has an effect of making the signal connection member 6 less susceptible to disturbance.

  Next, still another example of the high-frequency multichip module substrate will be described. 4A and 4B show a high-frequency multichip module substrate having a structure in which the ground conductor layer is brought close to the signal line and the signal connection member is surrounded by the ground conductor layer. The dielectric substrate 2 of the multi-chip module substrate 1 for high frequency is composed of two dielectric material layers 21 and 22, and the ground conductor layer 4 has a surface on which the signal line 3 is arranged, a signal terminal 31 and a ground terminal 41. The signal connection member 6 is provided through the opening 4 a provided in the ground conductor layer 4. Accordingly, the signal connection member 6 is surrounded by the ground conductor layer 4.

  Further, the ground conductor layer 4 and the ground terminal 41 are connected by a ground connection member 42 penetrating the dielectric material layer 22, and the dielectric material layer 21 is placed on the ground conductor layer 4 at a position continuous with the connection member 42. A penetrating grounding pillar 7 is connected, and an adjustment plate 8 is provided at the upper end of the grounding pillar 7. The ground connection member 42 and the ground pillar 7 are arranged on a substantially straight line substantially parallel to the signal connection member 6. The shape of the ground conductor layer 4 is not limited to the ground conductor layer shown in any of the previous drawings. For example, when a predetermined characteristic impedance is obtained, as shown in FIG. The shape may be provided in a narrow range near the signal line.

  According to the above configuration, the signal connection member 6 can be surrounded by the ground conductor (that is, the ground conductor layer), and the number of the ground terminals 41 is not increased. Therefore, the plurality of ground pillars 7 are arranged around the signal connection member 6. The same effect can be obtained by configuring the high-frequency multichip module substrate 1 with a conductor structure that is reduced in size as compared with the case of arranging (see FIG. 3). Further, by separating the surface on which the signal terminal 31 and the ground terminal 41 are disposed from the surface on which the ground conductor layer 4 is disposed, the ground conductor layer 4 can be formed without being restricted by the design due to the thickness of the multichip module substrate for high frequency. Since it can be arranged, the design freedom of the microstrip line is increased. That is, the characteristic impedance optimization structure described above can be applied to a wider range of shapes and types of multilayer substrates.

  Next, still another example of the high-frequency multichip module substrate is shown in FIGS. This high-frequency multichip module substrate is different from that shown in FIG. 4 in the shape of the signal connection member 6. That is, the outer peripheral length of the cross section of the signal connection member 6 surrounded by the ground conductor layer 4 is not constant, and becomes shorter as it approaches the ground conductor layer 4. Since the signal connection member 6 has a narrow and narrow structure in the opening 4a portion of the ground conductor layer 4, the distance between the signal connection member 6 and the ground conductor layer 4 (and the ground column 7) increases in this portion. The reduction in characteristic impedance due to the signal connection member 6 approaching the ground conductor layer 4 can be suppressed, and the characteristic impedance can be optimized more effectively.

  Next, still another example of the high-frequency multichip module substrate will be described. 6A and 6B show a high-frequency multichip module substrate having a structure in which signal connection members are provided on the outer peripheral surface of a dielectric substrate. In this multi-chip module substrate 1 for high frequency, the signal line 3, the adjusting plate 8, the ground conductor layer 4, the signal terminal 31, and the ground terminal 41 are the same as those shown in FIG. The signal connection member 6 and the grounding pillar 7 are formed as conductor patterns not on the inside of the dielectric substrate 2 but on the outer peripheral surface of the dielectric substrate 2.

  In this configuration, the ground pillar 7 is disposed substantially parallel to the signal connection member 6, and the distance between the ground pillar 7 and the signal connection member 6 is changed to change the (ground pillar 7 of the signal connection member 6. Characteristic impedance can be set. Further, there is no ground conductor layer 4 on the opposite surface of the dielectric substrate 2 facing the vicinity of the signal line 3 connected to the signal connection member 6, and instead there are a signal terminal 31 and a ground terminal 41, and therefore a micro The strip line is not formed. Therefore, for the same reason as described above (when the adjustment plate 8 is not added, the characteristic impedance of the signal line 3 in the vicinity of the signal connection member 6 is suppressed to match the magnitude of the characteristic impedance of the microstrip line portion). The adjustment plate 8 is arranged so as to be substantially parallel to the signal line 3, and adjustment for lowering the characteristic impedance is performed. As a result, in the same manner as described above, (1) the signal connection member 6, (2) the vicinity of the signal line 3 connected to the signal connection member 6, and (3) the portion constituting the microstrip line of the signal line 3 These characteristic impedances can be made substantially equal to each other, and deterioration of waveform quality when a high-frequency signal passes through the multichip module can be reduced.

  In addition, the high-frequency multichip module substrate 1 shown in FIG. 6 uses a method such as MID (Molded Interconnected Device) or the like to place conductors such as the signal connection member 6 and the grounding pillar 7 on the outer periphery of the dielectric material. It can be formed with high density as a wiring pattern. Therefore, it is possible to realize a high-frequency multichip module substrate that is smaller than a three-dimensional conductor structure in the dielectric substrate.

  Next, still another example of the multichip module substrate for high frequency is shown in FIG. The high-frequency multichip module substrate 1 shown in FIG. 7 has a grounding conductor layer 4 in the high-frequency multichip module substrate 1 shown in FIGS. 6A to 6E provided inside the dielectric substrate 2. Is. The arrangement, function, and operation of the two dielectric layers 21 and 22 and the ground connection member 42 and the grounding pillar 7 are the same as those described for the high-frequency multichip module substrate 1 shown in FIGS. It is. However, the structure of the interlayer connection conductors such as the ground connection member 42, the ground pillar 7, and the signal connection member 6 is an end face through hole provided on the end face of the dielectric substrate 2 with the through hole substantially divided in half. There are some differences from the above.

  In manufacturing the high-frequency multichip module substrate 1 having the end surface through-holes, a plurality of high-frequency multichip module substrates 1 integrally formed on both sides of the normal through-hole are cut at the through-hole portions. A method of separating pieces is used. Therefore, such a multi-chip module substrate 1 for high frequency can be manufactured using the same substrate material as a normal multilayer substrate material, and there are few restrictions by material, and freedom of design of high frequency lines, such as a microstrip line. There is an advantage that the degree is large.

  Next, still another high-frequency multichip module substrate and semiconductor relay according to an embodiment of the present invention will be described with reference to FIGS. First, the module substrate will be described, and then the semiconductor relay will be described. The high-frequency multichip module substrate 11 includes a dielectric base 20 made of a dielectric material, high-frequency signal lines 3A and 3B for chip connection provided on the surface of the dielectric base 20, and a ground conductor layer 4. And a signal terminal 31 for mounting on a parent substrate (not shown) and a ground terminal 41, and the signal lines 3A and 3B and the ground conductor layer 4 are arranged to face each other with the dielectric base 20 in between. The signal terminal 31 is connected to a signal line end (described later) 3c, the ground terminal 41 is connected to a ground conductor layer end (described later) 4c, and the signal terminal 31 and the ground terminal 41 are connected to the dielectric base 20. They are arranged on substantially the same surface.

  Further, details of the signal lines 3A and 3B and the ground conductor layer 4 will be described. The signal lines 3A and 3B and the ground conductor layer 4 are opposed to each other with the dielectric base 20 in between, and the signal lines 3A and 3B and the ground conductor layer 4 are paired to constitute a microstrip line. Each of the signal lines 3A and 3B includes a signal line center portion 3a, a signal line bent portion 3b, and a signal line end portion 3c4c. The signal line bent portion 3b is located between the signal line center portion 3a and the signal line end portion 3c. The ground conductor layer 4 includes a ground conductor layer central portion 4a, a ground conductor layer bent portion 4b, and a ground conductor layer end portion 4c. The ground conductor layer bent portion 4b is located between the ground conductor layer central portion 4a and the ground conductor layer end portion 4c.

  The signal line bent portion 3b and the ground conductor layer bent portion 4b are bent substantially concentrically. The signal line end 3c is positioned substantially perpendicular to the signal line center 3a. The ground conductor layer end 4c is positioned substantially perpendicular to the ground conductor layer center 4a. The distance between the signal line end 3c and the ground conductor layer end 4c is substantially the same as the distance between the signal line center 3a and the ground conductor layer center 3a. The distance between the signal line bent portion 3b and the ground conductor layer bent portion 4b is substantially the same as the distance between the signal line central portion 3a and the ground conductor layer central portion 4a.

  Therefore, the microstrip line composed of the signal lines 3A and 3B and the ground conductor layer 4 (and the dielectric substrate 20) has substantially the same cross-sectional structure, and its characteristic impedance is a substantially constant value over the entire length. It has become. Further, according to such a configuration, the characteristic impedance of the high-frequency transmission line formed by the signal lines 3A and 3B and the ground conductor layer 4 can be designed to a desired value, for example, 75Ω or 50Ω. A substantially uniform microstrip line is formed over the entire length of the high-frequency transmission line (the signal line central portion 3a, the signal line bent portion 3b, and the signal line end portion 3c), so that the waveform quality of the high-frequency signal is unlikely to deteriorate. It has become.

  Such a high-frequency multichip module substrate 11 can be manufactured by using a method such as MID. That is, according to the MID method, the structure of the signal line bent portion 3b and the ground conductor layer bent portion 4b can be easily formed, unlike a normal substrate method in which flat substrates are laminated. Therefore, the signal line end portion 3c and the ground conductor layer end portion 4c are provided as an alternative to the signal connection member 6, the grounding pillar 7, and the adjusting plate 8 in the high-frequency multichip module substrate 1 shown in FIG. Furthermore, the signal line end 3c and the ground conductor layer end 4c can be formed to constitute a microstrip line. Thus, the signal terminal 31 can be directly connected to the signal line end 3c, and the ground terminal 41 can be directly connected to the ground conductor layer end 4c without using a signal grounding member or a grounding pillar. By extending the microstrip line to the terminal portion for connection to the substrate, it is possible to suppress the deterioration of the waveform quality of the high-frequency signal in the high-frequency multichip module substrate 11. In addition, it is possible to realize the high-frequency multichip module substrate 11 having a terminal structure that can be easily mounted on the parent substrate.

  Next, an example in which the above-described high-frequency multichip module substrate 11 is applied to a semiconductor relay will be described. On the high-frequency multichip module substrate 11 (FIG. 8), a light emitting element P1 that emits an optical signal according to an input signal, and a light receiving element that receives the optical signal of the light emitting element P1 and generates a photovoltaic force. P2 and output semiconductor elements (for example, MOSFETs) M1 and M2 in which the impedance between the drain and the source changes when the photoelectromotive force of the light receiving element P2 is applied between the gate and the source, and the light emitting element on which the light emitting element P1 is mounted Circuit patterns 13 and 14 and light receiving element circuit patterns 15 and 16 on which the light receiving element P2 is mounted. The light emitting element circuit patterns 13 and 14 are connected to input terminals 17 and 18 for electrical connection to the parent substrate, respectively. As shown in FIG. 10A, both the light emitting element P1 and the light receiving element P2 are sealed with a transparent resin, and the surfaces thereof are covered with an external thin film 24 that blocks light. Furthermore, as shown in FIG. 10B, the external sealing member 25 integrally seals the external thin film 24 covered with the transparent resin, the output semiconductor elements M1 and M2, and the signal lines 3A and 3B. (Packaging) is performed to form the high-frequency semiconductor relay 12. Below, the mounting form of each element described above and the operation of the semiconductor relay 12 will be described.

  First, the mounting form of each element described above will be described (see FIG. 8). The light emitting element P1 has electrodes on both sides as a light emitting diode. The back electrode is electrically connected to the light emitting element circuit pattern 13 by a conductive bonding material, and the front electrode is electrically connected to the light emitting element circuit pattern 14 by a wire W1.

  The light receiving element P2 has a source electrode on the back surface and a gate electrode on the front surface. The source electrode on the back surface is electrically connected to the light receiving element circuit pattern (source pattern) 15 by a conductive bonding material, and the gate electrode on the surface of the light receiving element P2 is connected to the light receiving element circuit pattern (for gate) by the wire W2. Pattern) 16 is electrically connected.

  The output semiconductor elements M1 and M2 made of MOSFET have a drain electrode on the back surface and a gate electrode and a source electrode on the surface. The drain electrodes on the back surface are electrically connected to the signal lines 3A and 3B by a conductive bonding material, and the gate electrodes on the front surface are electrically connected to the light receiving element circuit pattern 16 by gate wires W5 and W6. Further, the source electrode on the surface of the output semiconductor element M1 is electrically connected to the light receiving element circuit pattern 15 by the source wire W3 and is electrically connected to the source electrode on the surface of the output semiconductor element M2 by the source wire W4. .

  The light emitting element P1 and the light receiving element P2 are arranged to face each other so that an optical signal can be exchanged efficiently. These are sealed with a transparent resin, and the surface of the transparent resin is covered with an external thin film 24 that blocks light (FIG. 10). The output semiconductor elements M1 and M2 on the dielectric substrate 20 including the external thin film 24 covered with the transparent resin and a part of each circuit pattern are sealed and integrated with a sealing resin 25 having moisture resistance and light shielding properties. A semiconductor relay 12 is formed as the package.

  Next, the electrical circuit configuration of the semiconductor relay 12 will be described with reference to the circuit diagram shown in FIG. In the electric circuit of the semiconductor relay 12, the light emitting part D1 of the light emitting element P1 is, for example, a light emitting diode. The light receiving element P2 is configured by integrating a photodiode array in which a plurality of photodiodes (light receiving portions) D2 are connected in series with the charge / discharge control circuit 9. The charge / discharge control circuit 9 performs control so that charges can be efficiently charged between the gate and source electrodes of the output semiconductors (MOSFETs) M1 and M2 by the electromotive force when the photodiode array generates the photoelectromotive force. To do. The charge / discharge control circuit 9 serves as a discharge path for charges charged between the gate and source electrodes when the photodiode array does not generate photovoltaic power.

  Next, the operation of the semiconductor relay 12 configured as described above will be described. Subsequently, the circuit diagram of FIG. 11 will be referred to. When an input signal is input between the input terminal a (17: corresponding to the input terminal 17 in FIG. 8, the same applies hereinafter) and b (18), the light emitting portion D1 of the light emitting element P1 emits an optical signal. This light emission signal is received by the light receiving portion D2 of the light receiving element P2. The light receiving part D2 generates a photovoltaic power by receiving the optical signal emitted from the light emitting element P1. The photovoltaic power is output to the gate terminal c and the source terminal d via the charge / discharge control circuit 9. When a photovoltaic force is applied between the gates f and e of the output semiconductor elements M1 and M2 and the sources s and s, the gate and the source are charged, and between the drain i and the source s of the output semiconductor element M1, and The drain h and the source s of the output semiconductor element 5 are electrically connected. Therefore, the signal lines i (3A) and h (3B) are electrically connected (relay closed).

  When there is no signal input between the input terminals a (17) and b (18), the light emitting element P1 does not emit an optical signal, and the light receiving element P2 does not generate photovoltaic power. The charge charged between the gate and source of the output semiconductor elements M1 and M2 is discharged through the charge / discharge control circuit 9, and the drain and source of the output semiconductor elements M1 and M2 are interrupted, and the signal line i (3A) and h (3B) are disconnected (relay open). According to such a semiconductor relay 12, it is possible to match the characteristic impedance over the entire length from one signal terminal to the other signal terminal, and it is possible to realize opening and closing of a high-frequency signal with little deterioration in waveform quality.

  Next, still another semiconductor relay according to an embodiment of the present invention will be described. 12A, 12B, and 12C show a semiconductor relay 13 having a transmission line having a structure including a grounding pillar 7 and an adjusting plate 8 (however, a sealing resin and a dielectric portion are not shown). The multi-chip module substrate for high frequency used in the semiconductor relay 13 includes a ground conductor layer 4 between two dielectric material layers 21 and 22 as shown in FIG. The member 42 and the grounding pillar 7 are arranged in a substantially straight line, and further, an adjustment plate 8 is provided at the tip of the grounding pillar 7, and not only the signal lines 3A and 3B constituting the microstrip line. The characteristic impedance matching is performed up to the vicinity of the signal terminal 31. Similar to the semiconductor relay 12 described above, each element is mounted and sealed on the module substrate to form a semiconductor relay. The circuit configuration and circuit operation of the semiconductor relay 13 are the same as those of the semiconductor relay 12 described above, and a semiconductor relay in which the waveform quality of the high-frequency signal is less deteriorated is realized.

  In FIGS. 1 to 7 described above, the entire substrate is not shown, but only the portions including these main portions are shown by focusing on the terminal portions and signal lines. However, the present invention is not limited to this. The whole multi-chip module substrate for high frequency having a main part is included. The signal connection member, the grounding pillar, and the ground connection member that penetrate the dielectric material layer and the dielectric substrate may be through holes whose inner surfaces are made conductive by plating, and the through holes are filled with a conductive material. It may be configured. Further, the ground connection member and the ground pillar need not be arranged on the same straight line, and need not have the same cross-sectional shape. The present invention is not limited to the number of terminals, the number of signal lines, the number of elements that can be mounted, the shape of the module substrate, and the like, and can be variously modified.

(A) is a perspective view showing a state in which a high-frequency multichip module substrate according to an embodiment of the present invention is mounted on a parent substrate, (b) is a perspective view showing only a conductor portion of the module substrate, (c) FIG. 3 is a bottom perspective view of the module substrate, and (d) a bottom perspective view showing only a conductor portion of the module substrate. (A) is the perspective view which shows the other example of the multichip module board for high frequency which concerns on one Embodiment of this invention, (b) is the perspective view which showed only the conductor part of the module board. (A) is a perspective view which shows the other example of the multichip module board for high frequency which concerns on one Embodiment of this invention, (b) is the perspective view which showed only the conductor part of the module board. (A) is a perspective view which shows the other example of the multichip module board for high frequency which concerns on one Embodiment of this invention, (b) is the perspective view which showed only the conductor part of the module board. (A) is a perspective view which shows the other example of the multichip module board for high frequency which concerns on one Embodiment of this invention, (b) is the perspective view which showed only the conductor part of the module board. (A) is a perspective view which shows the other example of the multichip module board for high frequency which concerns on one Embodiment of this invention, (b) is the perspective view which showed only the conductor part of the module board. (A) is a perspective view showing still another example of the multi-chip module substrate for high frequency according to an embodiment of the present invention, (b) is a perspective view showing only the conductor portion of the module substrate, (c) ~ ( e) is a plan view of a conductor layer of the module substrate. (A) is a perspective view which shows the further another example of the multichip module board for high frequency based on one Embodiment of this invention which mounted the chip | tip for semiconductor relays, (b) removed the dielectric part from the module board | substrate. FIG. 4C is a perspective view of a ground conductor layer of the module substrate, and FIG. 4D is a perspective view of a conductor and a mounted state element excluding the ground conductor layer of the module substrate. (A) is a lower surface perspective view of a module board same as the above, (b) is sectional drawing of a module board same as the above. (A) is a chip mounting state perspective view of the same module substrate, (b) is an external perspective view of a semiconductor relay configured using the module substrate. FIG. 9 is a circuit diagram of the semiconductor relay having the configuration shown in FIG. 8. (A) is a perspective view which shows the further another example of the multichip module board for high frequencies based on one Embodiment of this invention which mounted the chip | tip for semiconductor relays, (b) (c) is a dielectric part from the module board | substrate. FIG.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1,11 Multichip module substrate for high frequency 2 Dielectric substrate 3, 3A, 3B Signal line 4 Ground conductor layer 5 Parent substrate 6 Signal connection member 7 Grounding pillar 8 Adjustment plate 12, 13 Semiconductor relay 20 Dielectric base 21, 22 Dielectric Body material layer 31 Signal terminal 41 Ground terminal 3a Signal line center 3c Signal line end 4a Ground conductor layer center 4c Ground conductor layer end P1 Light emitting element P2 Light receiving element M1, M2 Output semiconductor element 13, 14 For light emitting element Circuit pattern 15, 16 Light receiving element circuit pattern

Claims (9)

A dielectric substrate made of a dielectric material, a high-frequency signal line for chip connection provided on one surface of the dielectric substrate, and a surface of the dielectric substrate different from the surface on which the signal line is provided A grounding conductor layer, a signal terminal and a grounding terminal for mounting on the parent substrate,
The signal line and the signal terminal are electrically connected by a signal connection member,
The ground conductor layer and the ground terminal are electrically connected to a ground potential,
In the multi-chip module substrate for high frequency formed by forming a microstrip line for high-frequency signal transmission by pairing the signal line and the ground conductor layer,
A grounding column electrically connected to the grounding conductor layer;
The grounding pillar is disposed substantially parallel to the signal connection member,
The multi-chip module substrate for high frequency, wherein the signal terminal and the ground terminal are disposed on substantially the same surface of the dielectric substrate.   The adjustment plate according to claim 1, further comprising an adjustment plate connected to the grounding pillar, wherein the adjustment plate is arranged substantially on the same plane as the surface of the dielectric substrate on which the signal lines are arranged. Multi-chip module substrate for high frequency.   3. The line width of a signal line in a portion connecting the signal connection members is wider than a line width of a signal line in a portion constituting a microstrip line. Multi-chip module substrate for high frequency.   The multichip module substrate for high frequency according to any one of claims 1 to 3, wherein an outer peripheral length of a cross section of the signal connection member becomes shorter as approaching the ground conductor layer.   5. The multichip module substrate for high frequency according to claim 1, wherein a plurality of the ground pillars are arranged around the signal connection member. 6. The dielectric substrate comprises two or more dielectric material layers,
The ground conductor layer is disposed between the surface on which the signal line is disposed and the surface on which the ground terminal and the signal terminal are disposed;
The high-frequency multichip module substrate according to claim 1, wherein the signal connection member is surrounded by the ground conductor layer.   6. The multichip module substrate for high frequency according to claim 1, wherein the grounding pillar is disposed on an outer peripheral surface of the dielectric substrate. A dielectric base made of a dielectric material, a high-frequency signal line for chip connection provided on the surface of the dielectric base, a ground conductor layer, and a signal terminal and a ground terminal for mounting on the parent substrate are provided. And
In the high-frequency multichip module substrate in which the signal line and the ground conductor layer are arranged to face each other with a dielectric base interposed therebetween,
The signal line has a signal line end portion and a signal line center portion which are positioned substantially perpendicular to each other,
The ground conductor layer has a ground conductor layer end portion and a ground conductor layer center portion positioned substantially perpendicular to each other,
The signal line center and ground conductor layer center pair, and the signal line end and ground conductor layer end pair each form a microstrip line,
The signal terminal is connected to the signal line end,
The ground terminal is connected to the end of the ground conductor layer,
The multi-chip module substrate for high frequency, wherein the signal terminal and the ground terminal are disposed on substantially the same surface of the dielectric base surface. On the high-frequency multichip module substrate according to any one of claims 1 to 8,
A light emitting element that emits an optical signal in response to an input signal;
A light receiving element that receives a light signal of the light emitting element and generates a photovoltaic force;
An output semiconductor element in which the photoelectromotive force of the light receiving element is applied between the gate and the source to change the impedance between the drain and the source; and
A light emitting element circuit pattern for mounting the light emitting element;
A light receiving element circuit pattern for mounting the light receiving element,
The signal line provided on the substrate is composed of a first signal line and a second signal line, the output semiconductor element is mounted between the signal lines, and between the drain and source of the output semiconductor element A semiconductor relay, wherein a line between the signal lines is opened and closed by an impedance change.

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