JP2005101125A - 半導体装置の製造方法及び半導体装置、回路基板並びに電子機器 - Google Patents
半導体装置の製造方法及び半導体装置、回路基板並びに電子機器 Download PDFInfo
- Publication number
- JP2005101125A JP2005101125A JP2003330996A JP2003330996A JP2005101125A JP 2005101125 A JP2005101125 A JP 2005101125A JP 2003330996 A JP2003330996 A JP 2003330996A JP 2003330996 A JP2003330996 A JP 2003330996A JP 2005101125 A JP2005101125 A JP 2005101125A
- Authority
- JP
- Japan
- Prior art keywords
- adhesive sheet
- semiconductor device
- manufacturing
- opening
- substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 93
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 45
- 239000000853 adhesive Substances 0.000 claims abstract description 120
- 230000001070 adhesive effect Effects 0.000 claims abstract description 120
- 239000000758 substrate Substances 0.000 claims abstract description 52
- 230000001681 protective effect Effects 0.000 claims abstract description 48
- 238000010438 heat treatment Methods 0.000 claims abstract description 14
- 238000000034 method Methods 0.000 claims description 24
- 239000002245 particle Substances 0.000 claims description 9
- 238000007599 discharging Methods 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 12
- 230000004048 modification Effects 0.000 description 10
- 238000012986 modification Methods 0.000 description 10
- 230000000694 effects Effects 0.000 description 7
- 229910000679 solder Inorganic materials 0.000 description 7
- 230000005484 gravity Effects 0.000 description 4
- 239000004593 Epoxy Substances 0.000 description 3
- 238000001723 curing Methods 0.000 description 3
- 229920001187 thermosetting polymer Polymers 0.000 description 3
- 230000005012 migration Effects 0.000 description 2
- 238000013508 migration Methods 0.000 description 2
- NIXOWILDQLNWCW-UHFFFAOYSA-M Acrylate Chemical compound [O-]C(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-M 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000011231 conductive filler Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 239000002270 dispersing agent Substances 0.000 description 1
- 238000001227 electron beam curing Methods 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 238000007650 screen-printing Methods 0.000 description 1
- 229920001169 thermoplastic Polymers 0.000 description 1
- 239000004416 thermosoftening plastic Substances 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/564—Details not otherwise provided for, e.g. protection against moisture
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/90—Methods for connecting semiconductor or solid state bodies using means for bonding not being attached to, or not being formed on, the body surface to be connected, e.g. pressure contacts using springs or clips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/2612—Auxiliary members for layer connectors, e.g. spacers
- H01L2224/26152—Auxiliary members for layer connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
- H01L2224/26175—Flow barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/27011—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature
- H01L2224/27013—Involving a permanent auxiliary member, i.e. a member which is left at least partly in the finished device, e.g. coating, dummy feature for holding or confining the layer connector, e.g. solder flow barrier
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/2901—Shape
- H01L2224/29011—Shape comprising apertures or cavities
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75251—Means for applying energy, e.g. heating means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75252—Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83009—Pre-treatment of the layer connector or the bonding area
- H01L2224/83051—Forming additional members, e.g. dam structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00013—Fully indexed content
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/0665—Epoxy resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/078—Adhesive characteristics other than chemical
- H01L2924/0781—Adhesive characteristics other than chemical being an ohmic electrical conductor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
- Adhesives Or Adhesive Processes (AREA)
- Die Bonding (AREA)
Abstract
【解決手段】 半導体装置の製造方法は配線パターン12が形成され、開口26を有し開口26以外で配線パターン12を覆うように保護膜30が形成された基板10を用いる。開口26と、開口26と保護膜30との境界を含む範囲に、配線パターン12と基板10との段差に気泡が形成されるように、接着シート34を貼り付け、加熱し軟化させる。接着シート34によって半導体素子20を基板10に接着する。保護膜30は開口26に連通する溝32を有し、接着シート34を溝32の一部を避けて貼り付け、接着シート34を加熱して軟化させることで、気泡を溝32を通して排出する。
【選択図】 図1
Description
前記開口と、該開口と前記保護膜との境界と、を含む範囲に、前記開口内で前記配線パターンと前記基板との段差に気泡が形成されるように、接着シートを貼り付けること、
前記接着シートを、加熱し軟化させること、及び、
前記接着シートによって、半導体素子を前記基板に接着すること、
を含み、
前記保護膜は、前記開口の角部に連通する溝を有し、
前記接着シートを、前記溝の少なくとも一部を避けて貼り付け、
前記接着シートを加熱して軟化させることで、前記気泡を、前記溝を通して排出する。本発明によれば、段差にある気泡を保護膜の溝を通して外部に容易に排出することができる。したがって、接着シートで基板の配線パターンを覆う構造でありながら、接着シートと基板の間に空気が入り込まず、気泡(ボイドとも言う。)ができにくい信頼性の高い半導体装置の製造方法を提供することができる。
(2)本発明に係る半導体装置の製造方法は、配線パターンが形成され、矩形の開口を有し該開口以外の領域で前記配線パターンを覆うように保護膜が形成された基板を用い、
前記開口と、該開口と前記保護膜との境界と、を含む範囲に、前記開口内で前記配線パターンと前記基板との段差に気泡が形成されるように、多孔質の接着シートを貼り付けること、
前記接着シートを加熱して軟化させ、前記多孔質の接着シート自体を通して前記気泡を排出すること、及び、
前記接着シートによって、半導体素子を前記基板に接着すること、
を含む。本発明によれば、段差にある気泡を多孔質の接着シートの孔部から外部に容易に排出することができる。したがって、接着シートで基板の配線パターンを覆う構造でありながら、接着シートと基板の間に空気が入り込まず、気泡(ボイド)ができにくい信頼性の高い半導体装置の製造方法を提供することができる。
(3)この半導体装置の製造方法において、前記接着シートが、前記気泡を排出させる多孔質の接着シートであってもよい。
(4)この半導体装置の製造方法において、前記接着シートの端部に複数の切り込みを形成してもよい。
(5)この半導体装置の製造方法において、前記切り込みを、前記開口と前記保護膜との境界にかかるように設けてもよい。
(6)この半導体装置の製造方法において、前記接着シートは導電粒子が分散されており、前記導電粒子により前記配線パターンと前記電極とを電気的に接続してもよい。
(7)この半導体装置の製造方法において、前記接着シートが、絶縁シートであってもよい。
(8)本発明に係る半導体装置は、上記の方法で製造されてなる。
(9)本発明に係る回路基板は、上記半導体装置が搭載されてなる。
(10)本発明に係る電子機器は、上記半導体装置を有する。
図1及び図2は、本発明の第1の実施の形態に係る半導体装置の製造方法を説明する図である。図3は、図2に示す半導体装置のIII-III線断面図である。
図4は、本発明の第2の実施の形態に係る半導体装置の製造方法を説明する図である。本実施の形態には、保護膜50及び接着シート54の構成及び形状以外については、第1の実施の形態で説明した内容が該当する。
図5は、本発明の第3の実施の形態に係る半導体装置の製造方法を説明する図である。本実施の形態には、接着シート54の構成及び形状以外については、第1及び第2の実施の形態で説明した内容が該当する。
図6および図7は、本発明の実施の形態の変形例を説明する図である。
上述の半導体装置の製造方法を用いると、接着シートで保護膜を覆う構造でありながら、信頼性の高い半導体装置を提供することができる。
図8には、本実施の形態に係る半導体装置を実装した回路基板1000が示されている。また、半導体装置を有する電子機器として、図9にはノート型パーソナルコンピュータ2000が示されている。図10には携帯電話3000が示されている。
Claims (10)
- 配線パターンが形成され、矩形の開口を有し該開口以外の領域で前記配線パターンを覆うように保護膜が形成された基板を用いる半導体装置の製造方法であって、
前記開口と、該開口と前記保護膜との境界と、を含む範囲に、前記開口内で前記配線パターンと前記基板との段差に気泡が形成されるように、接着シートを貼り付けること、
前記接着シートを加熱し軟化させること、及び、
前記接着シートによって、半導体素子を前記基板に接着すること、
を含み、
前記保護膜は、前記開口の角部に連通する溝を有し、
前記接着シートを、前記溝の少なくとも一部を避けて貼り付け、
前記接着シートを加熱して軟化させることで、前記気泡を、前記溝を通して排出する半導体装置の製造方法。 - 配線パターンが形成され、矩形の開口を有し該開口以外の領域で前記配線パターンを覆うように保護膜が形成された基板を用いる半導体装置の製造方法であって、
前記開口と、該開口と前記保護膜との境界と、を含む範囲に、前記開口内で前記配線パターンと前記基板との段差に気泡が形成されるように、多孔質の接着シートを貼り付けること、
前記接着シートを加熱して軟化させ、前記多孔質の接着シート自体を通して前記気泡を排出すること、及び、
前記接着シートによって、半導体素子を前記基板に接着すること、
を含む半導体装置の製造方法。 - 請求項1に記載の半導体装置の製造方法において、
前記接着シートが、前記気泡を排出させる多孔質の接着シートである半導体装置の製造方法。 - 請求項1から請求項3のいずれかに記載の半導体装置の製造方法において、
前記接着シートの端部に複数の切り込みを形成する半導体装置の製造方法。 - 請求項4に記載の半導体装置の製造方法において、
前記切り込みを、前記開口と前記保護膜との境界にかかるように設ける半導体装置の製造方法。 - 請求項1から請求項5のいずれかに記載の半導体装置の製造方法において、
前記接着シートは導電粒子が分散されており、前記導電粒子により前記配線パターンと前記電極とを電気的に接続する半導体装置の製造方法。 - 請求項1から請求項5のいずれかに記載の半導体装置の製造方法において、
前記接着シートが、絶縁シートである半導体装置の製造方法。 - 請求項1から請求項7のいずれかに記載された方法で製造されてなる半導体装置。
- 請求項8に記載の半導体装置が搭載されてなる回路基板。
- 請求項8に記載の半導体装置を有する電子機器。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003330996A JP2005101125A (ja) | 2003-09-24 | 2003-09-24 | 半導体装置の製造方法及び半導体装置、回路基板並びに電子機器 |
US10/936,557 US7521293B2 (en) | 2003-09-24 | 2004-09-09 | Method of manufacturing semiconductor device, semiconductor device, circuit board, and electronic instrument |
CNB2004100798643A CN100356537C (zh) | 2003-09-24 | 2004-09-23 | 半导体装置的制造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2003330996A JP2005101125A (ja) | 2003-09-24 | 2003-09-24 | 半導体装置の製造方法及び半導体装置、回路基板並びに電子機器 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2005101125A true JP2005101125A (ja) | 2005-04-14 |
Family
ID=34459770
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2003330996A Withdrawn JP2005101125A (ja) | 2003-09-24 | 2003-09-24 | 半導体装置の製造方法及び半導体装置、回路基板並びに電子機器 |
Country Status (3)
Country | Link |
---|---|
US (1) | US7521293B2 (ja) |
JP (1) | JP2005101125A (ja) |
CN (1) | CN100356537C (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016506072A (ja) * | 2012-11-30 | 2016-02-25 | シラス・インコーポレイテッド | エレクトロニクス適用のための複合組成物 |
JP2016072525A (ja) * | 2014-09-30 | 2016-05-09 | 日亜化学工業株式会社 | 発光装置およびその製造方法 |
JP2017112148A (ja) * | 2015-12-14 | 2017-06-22 | デクセリアルズ株式会社 | 接続方法 |
US11495774B2 (en) | 2020-01-22 | 2022-11-08 | Seiko Epson Corporation | Electro-optical device and electronic apparatus |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101552249B (zh) * | 2008-04-01 | 2012-05-09 | 力成科技股份有限公司 | 半导体封装构造 |
US9031373B2 (en) * | 2011-03-25 | 2015-05-12 | Seo Young Lee | Lightwave circuit and method for manufacturing same |
EP3153530B1 (en) | 2012-03-30 | 2021-02-24 | Sirrus, Inc. | Composite and laminate articles and polymerizable systems for producing the same |
EP3626784A1 (en) | 2012-03-30 | 2020-03-25 | Sirrus, Inc. | Ink and coating formulations and polymerizable systems for producing the same |
US10047192B2 (en) | 2012-06-01 | 2018-08-14 | Sirrus, Inc. | Optical material and articles formed therefrom |
CN105008438B (zh) | 2012-11-16 | 2019-10-22 | 拜奥福米克斯公司 | 塑料粘结体系及方法 |
KR101526278B1 (ko) * | 2012-12-21 | 2015-06-05 | 제일모직주식회사 | 경화 필름과 도전 필름을 포함하는 분리형 이방 도전성 필름 |
TWI663722B (zh) | 2013-09-06 | 2019-06-21 | Semiconductor Energy Laboratory Co., Ltd. | 發光裝置以及發光裝置的製造方法 |
US9334430B1 (en) | 2015-05-29 | 2016-05-10 | Sirrus, Inc. | Encapsulated polymerization initiators, polymerization systems and methods using the same |
US9217098B1 (en) | 2015-06-01 | 2015-12-22 | Sirrus, Inc. | Electroinitiated polymerization of compositions having a 1,1-disubstituted alkene compound |
JP6811770B2 (ja) * | 2016-06-08 | 2021-01-13 | 株式会社Fuji | 回路形成方法 |
GB2551732B (en) * | 2016-06-28 | 2020-05-27 | Disco Corp | Method of processing wafer |
KR102555408B1 (ko) * | 2016-06-30 | 2023-07-13 | 엘지디스플레이 주식회사 | 비표시 영역으로 연장하는 신호 배선들을 포함하는 디스플레이 장치 |
CN108615715A (zh) * | 2018-07-11 | 2018-10-02 | 日月光半导体(昆山)有限公司 | 半导体封装件及其使用的导线框架条 |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10335384A (ja) | 1997-05-29 | 1998-12-18 | Sony Corp | 半導体装置又は電子部品の実装方法及び実装構成体 |
JP3029594B2 (ja) | 1997-08-21 | 2000-04-04 | 新藤電子工業株式会社 | テープキャリアパッケージの製造方法 |
KR100357757B1 (ko) * | 1997-11-21 | 2003-01-24 | 로무 가부시키가이샤 | 반도체장치및그제조방법 |
JP4086123B2 (ja) | 1998-02-10 | 2008-05-14 | ローム株式会社 | 半導体装置 |
WO2001026147A1 (fr) * | 1999-10-04 | 2001-04-12 | Seiko Epson Corporation | Dispositif a semi-conducteur, son procede de fabrication, carte de circuit imprime et dispositif electronique |
JP2002343899A (ja) * | 2001-05-17 | 2002-11-29 | Sharp Corp | 半導体パッケージ用基板、半導体パッケージ |
JP2002353369A (ja) * | 2001-05-28 | 2002-12-06 | Sharp Corp | 半導体パッケージおよびその製造方法 |
JP2003031602A (ja) | 2001-07-12 | 2003-01-31 | Sharp Corp | 半導体装置パッケージ及びその製造方法 |
JP3778276B2 (ja) | 2002-01-21 | 2006-05-24 | セイコーエプソン株式会社 | 半導体装置の製造方法 |
-
2003
- 2003-09-24 JP JP2003330996A patent/JP2005101125A/ja not_active Withdrawn
-
2004
- 2004-09-09 US US10/936,557 patent/US7521293B2/en not_active Expired - Fee Related
- 2004-09-23 CN CNB2004100798643A patent/CN100356537C/zh not_active Expired - Fee Related
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2016506072A (ja) * | 2012-11-30 | 2016-02-25 | シラス・インコーポレイテッド | エレクトロニクス適用のための複合組成物 |
JP2016072525A (ja) * | 2014-09-30 | 2016-05-09 | 日亜化学工業株式会社 | 発光装置およびその製造方法 |
JP2017112148A (ja) * | 2015-12-14 | 2017-06-22 | デクセリアルズ株式会社 | 接続方法 |
US11495774B2 (en) | 2020-01-22 | 2022-11-08 | Seiko Epson Corporation | Electro-optical device and electronic apparatus |
Also Published As
Publication number | Publication date |
---|---|
US20050106781A1 (en) | 2005-05-19 |
CN1601713A (zh) | 2005-03-30 |
CN100356537C (zh) | 2007-12-19 |
US7521293B2 (en) | 2009-04-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP2005101125A (ja) | 半導体装置の製造方法及び半導体装置、回路基板並びに電子機器 | |
JP3692935B2 (ja) | 半導体装置の製造方法 | |
US20050121761A1 (en) | Semiconductor device and method for fabricating the same | |
CN110911362B (zh) | 半导体装置 | |
JP2008159682A (ja) | 多層プリント配線板およびその製造方法 | |
JP4366666B1 (ja) | 半導体装置 | |
JPH11260954A (ja) | 半導体装置およびその製造方法 | |
JP2011061175A (ja) | 半田ボール及び半導体パッケージ | |
JP3646056B2 (ja) | フリップチップ実装方法 | |
US20050006793A1 (en) | Semiconductor device and method of manufacturing the same, circuit board, and electronic instrument | |
JP2001127194A (ja) | フリップチップ型半導体装置及びその製造方法 | |
JP4288517B2 (ja) | 半導体装置の製造方法 | |
JP3999222B2 (ja) | フリップチップ実装方法およびフリップチップ実装構造 | |
JP3668686B2 (ja) | チップ部品の実装構造 | |
KR101609268B1 (ko) | 임베디드 기판 및 임베디드 기판의 제조 방법 | |
JP2003152021A (ja) | 半導体装置及びその製造方法、回路基板並びに電子機器 | |
JP4310631B2 (ja) | 半導体装置、回路基板並びに電子機器 | |
JP2008243879A (ja) | 電子装置およびその製造方法 | |
JP3844079B2 (ja) | 半導体装置の製造方法 | |
JP4436748B2 (ja) | 半導体装置およびその実装方法 | |
JP4439248B2 (ja) | 配線基板およびこれを用いた半導体装置 | |
KR20070014671A (ko) | 기판 제조 방법 | |
JP2005252310A (ja) | 半導体装置及びその製造方法、回路基板並びに電子機器 | |
JP2006165337A (ja) | 半導体装置及び半導体装置の実装構造 | |
JPH11214444A (ja) | 半導体装置及び回路基板 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A871 | Explanation of circumstances concerning accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A871 Effective date: 20050111 |
|
A975 | Report on accelerated examination |
Free format text: JAPANESE INTERMEDIATE CODE: A971005 Effective date: 20050131 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20050208 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20050328 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20050426 |
|
A761 | Written withdrawal of application |
Free format text: JAPANESE INTERMEDIATE CODE: A761 Effective date: 20050624 |