JP2004282789A - Image processing method and its apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To suppress generation of a dot pattern with a low density and a high frequency component when developing (m)-ary-coded image data. <P>SOLUTION: Multi-level image data wherein one pixel is represented with (n) values, are inputted, spatial filtering is applied to the multi-level image data and with respect to the filtered image data, pixel data of the relevant image data are (m)-ary-coded. The (m)-ary-coded image data are converted into the array of dots with resolution higher than that of the image data, and the(m)-ary-coded image data are converted into the array of (m-1) dots, so that patterns corresponding to even-numbered pixels and patterns corresponding to odd-numbered pixels can be symmetric. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

  The present invention relates to an image processing method and an apparatus therefor, in which multi-valued image data in which one pixel is represented by n-values is input, and the n-valued multi-valued image data is adjusted according to a desired number of gradations and pixel depth. The present invention relates to an image processing method and apparatus for binarizing or binarizing m (n> m> 2).

  In a facsimile or the like that can read and transmit a document image by a scanner, when reading the image data by the scanner, the read image data is transmitted, or a copy is simply taken. No processing is performed, and the image data is always read at a predetermined resolution and the image data is binarized. Also, as for the number of gradations of the error diffusion processing, which is a pseudo halftone processing generally used in a facsimile apparatus, for example, 64 gradations of 6 bits are fixedly employed in the case of copying or transmission. I was

  In recent years, a recording apparatus capable of performing high-resolution recording in an LBP (laser beam printer) or the like has been provided at a low cost, and multivalued recording such as four-valued recording has become easy. ing. For example, when printing image data having a resolution of 400 dpi in the main scanning direction on a printing apparatus having a resolution of 1200 dpi (dots / inch) in the main scanning direction, a small resolution of 1200 dpi is required according to the density value of the input image data. By associating the number of dots (three in this case) with the density value of the input image, printing in four values can be realized. Of course, when performing binary recording at 400 dpi, all three small dots of 1200 dpi should correspond to black if black, and all three small dots of 1200 dpi should correspond to white if white.

  In recent years, copy apparatuses and facsimile apparatuses have become more complex, and high-quality printing of 256 gradations or more has been required for facsimile apparatuses at the time of copying. For this reason, when reading a document image using a scanner of a facsimile apparatus, when transmitting the read image data, for example, binary image data of 64 tones is generated by a binarization process and a copy is taken. Therefore, in order to maximize the recording characteristics (resolution, gradation, etc.) of the printer unit, it is required to generate image data of, for example, 256 gradations by m-value processing. In such image processing, binary error diffusion processing is widely used as binarization image processing. Binary error diffusion processing is extended as m-value processing, and output values are converted into m-valued images. At present, the m-value error diffusion processing is widely used, and these functions are separately implemented according to the purpose of each device.

  However, in the above-described facsimile apparatus and the like, a binarization processing circuit for performing a binarization process for using the read image for communication, and a multi-value processing circuit for performing a multi-value processing for copying the read image are provided. The use of separate circuits has the disadvantage that the facsimile apparatus becomes very expensive.

  The present invention has been made in view of the above conventional example, and a feature of the present invention is that when the m-valued image data is dot-expanded, the pixels of the m-valued image data are even-numbered pixels and odd-numbered pixels. An object of the present invention is to provide an image processing method and apparatus capable of improving the quality of an image recorded using the dots by arranging the dots so as to be symmetrical in the case of the second pixel.

  Another feature of the present invention is to improve the quality of an image recorded using these dots by changing the dot arrangement direction according to the density gradient of the pixel adjacent to the target pixel of the m-valued image data. To provide an image processing method and an apparatus therefor.

In order to achieve the above object, an image processing apparatus according to the present invention has the following configuration. That is,
Image input means for inputting multi-valued image data in which one pixel is represented by an n value;
Filter means for performing a spatial filter process on the multi-valued image data input by the image input means,
Processing means for converting each pixel data of the image data into m (2 <m <n) values for the image data filtered by the filter means;
Dot arrangement means for converting the image data m-valued by the processing means to an array of dots having a higher resolution than the resolution of the image data, the dot arrangement means having a pattern for even-numbered pixels; The pattern for odd-numbered pixels is symmetrical, and the m-valued image data is converted into (m-1) dot arrays.

In order to achieve the above object, an image processing apparatus according to the present invention has the following configuration. That is,
Image input means for inputting multi-valued image data in which one pixel is represented by an n value;
Filter means for performing a spatial filter process on the multi-valued image data input by the image input means,
Processing means for converting each pixel data of the image data into m (2 <m <n) values for the image data filtered by the filter means;
Dot arrangement means for converting the image data m-valued by the processing means into an array of dots having a higher resolution than the resolution of the image data, wherein the dot arrangement means The arrangement direction of the dots is changed according to the density gradient of adjacent pixels, and the m-valued image data is converted into (m-1) dot arrays.

In order to achieve the above object, an image processing method according to the present invention includes the following steps. That is,
An image inputting step of inputting multi-valued image data in which one pixel is represented by an n value;
A filtering step of performing a spatial filtering process on the multi-valued image data input in the image input step,
A processing step of converting each pixel data of the image data into an m (2 <m <n) value for the image data filtered in the filtering step;
A dot arrangement step of converting the m-valued image data in the processing step into an array of dots having a higher resolution than the resolution of the image data, and in the dot arrangement step, a pattern for even-numbered pixels; The pattern for odd-numbered pixels is symmetrical, and the m-valued image data is converted into (m-1) dot arrays.

In order to achieve the above object, an image processing method according to the present invention includes the following steps. That is,
An image inputting step of inputting multi-valued image data in which one pixel is represented by an n value;
A filtering step of performing a spatial filtering process on the multi-valued image data input in the image input step,
A processing step of converting each pixel data of the image data into an m (2 <m <n) value for the image data filtered in the filtering step;
A dot arrangement step of converting the image data m-valued in the processing step into an array of dots having a higher resolution than the resolution of the image data, and in the dot arrangement step, The arrangement direction of the dots is changed according to the density gradient of adjacent pixels, and the m-valued image data is converted into (m-1) dot arrays.

  According to the present invention, when the m-valued image data is dot-expanded, the dots are arranged so that the pixels of the m-valued image data are symmetrical with the even-numbered pixels and the odd-numbered pixels. By doing so, it is possible to improve the quality of an image recorded using those dots.

  Further, according to the present invention, by changing the arrangement direction of the dots according to the density gradient of the pixel adjacent to the target pixel of the m-valued image data, the quality of an image recorded using those dots is improved. There is an effect that can be.

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

  FIG. 1 is a functional block diagram illustrating the entire functions of the image processing apparatus according to the present embodiment.

  A scanner unit 100 reads a document image with a CCD (solid-state imaging device) or the like, converts the read analog image signal into a digital signal using, for example, an 8-bit A / D converter, and converts one pixel into 8 bits (256 bits). (Gradation) image data. The scanner unit 100 performs a CCD (solid-state imaging device) and optical system correction process such as shading correction at the same time as the image reading. Reference numeral 200 denotes a spatial filter processing unit which receives image data in which one pixel output from the scanner unit 100 is represented by 8 bits and performs a two-dimensional spatial filter operation on the image data to obtain a resolution of the image data. Compensation. Here, if scaling is required, scaling can be performed between the scanner unit 100 and the spatial filter processing unit 200 by a linear interpolation operation (not shown). Reference numeral 300 denotes a luminance / density conversion unit which converts image data (luminance data) whose resolution has been compensated by the spatial filter processing unit 200 into density data using, for example, a look-up table. It should be noted that the look-up table of the brightness / density conversion unit 300 stores the image processing apparatus according to the present embodiment in accordance with image processing modes such as dark / light images and binarization and quaternization described later. The table data is downloaded from the control unit 110 (FIG. 2). Further, the look-up table uses data that is corrected based on the LOG conversion curve in consideration of the recording characteristics of the printer 700.

  Reference numeral 400 denotes a binary and quaternary processing unit which receives the density data output from the luminance / density converting unit 300, performs a binary or quaternary process, and outputs the processed data. Reference numeral 500 denotes an image memory configured by a DRAM, an SRAM, or the like, and image data in which one pixel is read by the scanner unit 100 and generated by the binarization or quaternization processing is configured by 2 bits or 1 bit, or Image data input via a communication line (not shown) or the like is stored as an image file. Reference numeral 600 denotes a binary / quaternary developing unit which inputs 400 dpi binary image data or 400 dpi quaternary image data to a printer 700 having a recording resolution of 1200 dpi in the main scanning direction, and The optimum small dot arrangement of 1200 dpi is performed and output to the printer 700. The printer 600 is, for example, an LBP printer having a resolution of 1200 dpi, and prints the image data on a recording medium (recording paper or the like) using the binary data (0 or 1) developed by the binary / quaternary developing unit 600. are doing.

  In this embodiment, the multi-level error diffusion processing is described as a case of quaternary processing. However, the present invention is not limited to this. It goes without saying that m-value conversion processing can be performed.

  FIG. 2 is a block diagram showing a basic configuration of the image processing apparatus according to the present embodiment. Portions common to those in FIG. 1 are denoted by the same reference numerals, and description thereof will be omitted.

  Reference numeral 110 denotes a control unit for controlling the entire apparatus described above, which is a CPU 120 such as a microcomputer, used as a work area when processing is executed by the CPU 120, and a RAM 121 for temporarily storing various data, and stores a control program and data for the CPU 120. Program memory 122 and the like. Further, the look-up table (LUT) 123 stores a table used for the above-described luminance / density conversion. Reference numeral 124 stores a Laplacian filter constant and the like used in the spatial filter processing unit 200. A display unit 111 displays a document image read by the scanner 100 and an image subjected to various processes. Reference numerals 201 and 202 denote line buffers used in a spatial filter process to be described later. In the present embodiment, one address is configured by commonly using an address of a RAM capable of storing 16-bit data. Reference numeral 203 denotes a group of latch circuits for latching output values of the line buffers 201 and 202, which will be described later.

  Note that the spatial filter processing unit 200 in FIG. 1 is achieved by the control unit 110, the line buffers 201 and 202, the latch group 203, and the like, and the processing of the luminance / density conversion unit 300 is realized by the CPU 120 of the control unit 110. Further, in the present embodiment, the quaternary / binary processing unit 400 and the binary / quaternary developing unit 600 are configured by hardware, but may be realized by a program executed by the CPU 120.

[Embodiment 1]
Hereinafter, the features of each processing unit according to the first embodiment of the present invention will be described in detail mainly.

<Spatial filter processing unit 200>
Usually, in order to perform the spatial filter processing on the image data, a line buffer for the number of reference lines or (number of reference lines−1) is required. Conventionally, such a line buffer is constituted by an external SRAM or the like, and a large number of SRAMs having a bit width of 8 bits have been prepared. For this reason, when the input data is 8 bits, there is no particular problem in terms of device cost even if the reference line buffer is entirely formed of an 8-bit memory. However, recent advances in IC technology have made it easier to incorporate an SRAM used as an external reference buffer. However, when such a line buffer is incorporated, the memory capacity is directly reflected as a manufacturing cost, so that it is necessary to reduce the memory capacity. For this reason, in the present embodiment, both the maintenance of the performance of the apparatus and the reduction of the cost of the apparatus are achieved by reducing the significant figures of the reference buffer to such an extent that the influence of the operation is small.

  FIG. 3A is a diagram showing an example of a matrix of a Laplacian filter for resolution compensation which is relatively frequently used, and FIG. 3B is a diagram for explaining a line buffer used for the matrix operation. is there.

  In order to perform arithmetic processing for spatial filtering with reference to image data (pixel data) for three lines, two 8-bit line buffers are required to simultaneously reference pixels in the sub-scanning direction. . In the present embodiment, the number of bits of line 1 that is relatively unaffected by the operation is reduced from 8 bits to 6 bits, thereby maintaining the balance between the performance of the apparatus and the cost of the apparatus. As a result, when storing B4 size image data at 400 dpi, the memory capacity can be reduced by 8192 bits.

  FIG. 4 is a block diagram illustrating a configuration of a line buffer and a latch group of the spatial filter processing unit 200.

  The line buffers 201 and 202 are line buffers for delaying pixel data in the sub-scanning direction and simultaneously referring to three lines of pixel data. The latch group 203 delays the pixel data in the main scanning direction. Data for spatial filtering is extracted from the group of latches.

  In the present embodiment, one pixel of image data is represented by 8 bits, the line buffers 201 and 202 are configured by one RAM (16 bits / 1 address), and the lower (0 to 7) bits (8 bits) of the RAM ) Is assigned to the line buffer 202 for delaying one line, and the upper (8 to 13) bits (6 bits) are assigned to the line buffer 201 for delaying the second line.

  The input pixel data (8 bits) is directly latched in the latch circuit group 203a corresponding to the line 3 of the latch group 203, and the output data (8 bits) of the line buffer 202 is latched in the latch circuit group 203b corresponding to the line 2. ) Is latched, and the output data (6 bits) of the line buffer 201 is latched in the latch circuit group 203c.

  FIG. 5 is a timing chart showing memory access in the spatial filter processing unit 200 according to the present embodiment.

  Image data (DATIN) input in synchronization with the rising edge of the clock (DCLK) is stored in the designated addresses (A1 to An) of the line buffers 201 and 202 in synchronization with the rising edge of the clock (DCLK). The access shown in FIG. 5 is a diagram showing the access timing to the data stored in the line buffer, where RD indicates the read timing and WR indicates the write timing. For example, at the read (RD) timing 210 in FIG. 5, data (ID1) obtained by shifting the data “D1” stored in the address “A1” of the line buffer (RAM) by 2 bits is read (indicated by RDDAT). At the next write timing (WR) 211, the data (ID1) shifted and read by 2 bits and the original data (D1) are combined and stored at the same address (A1). As a result, the original pixel data (D1) is placed in the lower bits (0 to 7) of the address (A1), and the data (ID1) shifted by 2 bits is placed in the upper bits of the address (A1). (8 to 13). In this way, the read address and the write address are set to be the same, and the RAM (line buffer) is updated by the read modified write. By repeating such an operation, the pixel data delayed by one line to the lower bit (0 to 7) position (corresponding to the line buffer 202) of the RAM becomes the upper bit (8 to 13) position (8 to 13) of the same address. The pixel data delayed by two lines is stored in the line buffer 201).

  The image data delayed by the number of lines read from the line buffers 201 and 202 and the input image data (DATIN) are sequentially taken into the latch group 203 in synchronization with the rise of the clock (DCLK). The latch group 203 sequentially shifts the data read from the line buffers 201 and 202 and the input image data in synchronization with the rising edge of the clock (DCLK). Thus, two-dimensional (3 × 3) image data is extracted.

  Here, among the data latched in the latch group 203, each data indicated by X, A, B, C, and D in FIG. 4 is the X, A, B, and C of the spatial filter in FIG. , D correspond to each position. In the actual operation of the spatial filter, the values corresponding to A and B are values of only the upper 6 bits of the memory, and thus are bit-shifted and “00” is inserted in the lower 2 bits, and is calculated as 8-bit data. Processing is performed.

filter = X << 2-((A << 2) + (B << 2) + C + D);
The above equation expresses the operation of the spatial filter of the present embodiment in C language. X shifts left by 2 bits (× 4) because the filter coefficient is “4”, and A and B shift left by 2 bits to treat 6-bit data in the same manner as other 8-bit data. In an actual device, for example, when such an operation is realized by hardware, such a bit shift is realized by shifting the bit position in the wiring from the latch circuit group 203 to the adder. The spatial filter value obtained here is further added to the X data, and one pixel subjected to resolution compensation is output as 8-bit image data. Further, when such an operation is realized by software, it can be easily realized by executing and adding a shift instruction of a register.

<Brightness / density converter 300>
The brightness / density conversion unit 300 receives 8-bit brightness data for one pixel whose resolution has been compensated by the spatial filter processing unit 200, converts the brightness data into density data with reference to a look-up table, and outputs the data. As described above, normally, a luminance-density conversion table obtained by adding the correction of the recording characteristics of the printer 700 to the LOG conversion is used.

  In the present embodiment, the density data is converted to the data width required by the subsequent quaternary / binarization processing unit 400 corresponding to each mode of the binarization processing and the quaternization processing. Is performed.

  First, in the present embodiment, when binary error diffusion processing is performed, data processing is performed with all white data being "0" and all black data being "63" (6 bits).

  FIG. 6A is a diagram illustrating a characteristic example of luminance-density conversion for the binary error diffusion process.

  In the case of binary error diffusion, image data of 8 bits, that is, "0" to "255" is input, converted into 6 bits, that is, density data of "63" to "0", and output. When the quaternary error diffusion processing is performed, data processing is performed with all white data being "0" and all black data being "255".

  FIG. 6B is a diagram illustrating a characteristic example of luminance-density conversion for the quaternary error diffusion processing. Here, image data of 8 bits, that is, “0” to “255” is input, converted into density data of 8 bits, that is, “255” to “0”, and output.

  Further, depending on the performance of the printer 700, when an output pattern having a specific density is printed, the quality of the printed image may be degraded (image may be rough). For example, when image data of 256 gradations, in which one pixel is represented by 8 bits, are subjected to quaternary error diffusion processing and printed out, an image of an output pattern of density data having a density of about "31" tends to be rough. It is in. This is because, in the image data having the density of "31", the output data is in a checkered state of "0" and "1" due to the error diffusion characteristics, and the printing characteristics of the printer 700 cannot follow this checkered data. Can be Therefore, in such a case, a luminance-density conversion table is created by skipping image data of a density (here, density “31”) that makes the recorded image rough.

  FIG. 6C is a diagram illustrating a characteristic example of the luminance-density conversion table created by skipping the density “31” in this manner.

<Binary and quaternary processing section 400>
First, an algorithm of the quaternary error diffusion processing as the m-value conversion processing will be described. The difference between binary error diffusion and quaternary error diffusion is that an error is calculated from three threshold values and four output densities. Similar to the binary error diffusion, the error diffusion in four values is the output pixel density (DENT3 = 255, DENT2 = 170, DENT1 = 85, DENT0 = 0) and the correction density X′ij (pixel density Xij As a new error, the difference with the error diffusion amount is diffused to neighboring pixels with weighting corresponding to the diffusion matrix of the error distribution, as shown in FIG. In the processing relating to the distribution of errors to neighboring pixels, the correction density X′ij is similarly calculated for both binary error diffusion and quaternary error diffusion.
X′ij = Xij + SUM (Ekl × αkl) / SUM (αkl)
Here, α is a weighting coefficient for error distribution, and Ekl is an error generated before the processing pixel.

  Next, the signal level of the corrected density X′ij is determined by using three thresholds using the following equations (1) to (4) to determine the recording output signal level (OUTPUT) and the error amount (E). .

  Here, each threshold value is TH1 = (DENT1 + DENT0) / 2, TH2 = (DENT2 + DENT1) / 2, and TH3 = (DENT3 + DENT2) / 2.

If X'ij> TH3, output pixel density OUTPUT = 3 and error E = X'ij−DENT3 (1)
If TH3> = X'ij> TH2, then the output pixel density is OUTPUT = 2 and the error is E = X'ij−DENT2 ... (2)
If TH2> = X'ij> TH1, output pixel density OUTPUT = 1 and error E = X'ij-DENT1 ... (3)
If TH1> = X'ij, then output pixel density OUTPUT = 0 and error E = X'ij-DENT0 ... (4)
The new error E = X'ij- (DENT3, DENT2, DENT1, DENT0) generated here is diffused and arranged again in the near pixel element with weighting as shown in FIG. By repeating this, the 8-bit input image data (0 to 255) is converted into any one of four values (0 to 3) and output.

  Further, in the case of the binary error diffusion processing, if the density for the error calculation of the quaternary error diffusion is BDENT1 = 63, BDENT0 = 0, and the threshold value is BTH1 = (BDENT1 + BDENT0) / 2, the following equation (5) As shown in (6) and (6), the error (E) determined according to the output pixel density (OUTPUT) is diffused by weighting as shown in FIG. .

If X'ij> BTH1, the output pixel density is OUTPUT = 1 and the error is E = X'ij−BDENT1 (5)
If BTH1> = X'ij, then output pixel density OUTPUT = 0 and error E = X'ij-BDENT0 ... (6)
In the present embodiment, attention is paid to the fact that the error distribution calculation is common in the binary error diffusion and the quaternary error diffusion processing, and the block for the error distribution calculation processing and the access block for the error buffer are shared, The quaternary error diffusion and the binary error diffusion can be realized at the same time while preventing an increase in the scale of the device. More specifically, the error distribution arithmetic circuit is composed of effective bits for quaternary error diffusion having a large number of effective bits, and when storing the data in the error buffer, the effective bit number is clamped to the effective bit number for binary error diffusion. This reduces the size of the error buffer memory. In the present embodiment, the error buffer is set to 6 bits, and the amount of error calculated when the error buffer is stored in the error buffer is clamped to “−32” to “+31”.

  FIG. 8 is a block diagram showing an example of an error diffusion circuit for commonly performing the binary error diffusion and the quaternary error diffusion processing in the present embodiment.

  Reference numerals 401 to 403 denote latch circuits which hold error data to be weighted, distributed and diffused, and update the data in synchronization with the pixel clock. Reference numerals 404 to 407 denote adders for adding data output from an error distributing unit 411, which will be described later, to which errors generated during processing of each pixel are distributed. Reference numeral 408 denotes a clamp processing circuit which clamps the output data of the adder 405 to “−32” when the output data is “−32” or less, and “31” when the output data is “+31” or more, and outputs 6-bit signed data. (“−32” to “31”) and output to the image memory 500. Reference numeral 409 denotes a comparator, which compares the error density value corrected by the error data output from the adder 407 with a threshold value in accordance with each processing mode of the binary or quaternary error diffusion, and outputs the output value and the error calculation. A signal 415 for selecting a calculation formula is output. An error calculator 410 receives the signal 415 from the comparator 409 and the addition result from the adder 407, and calculates and outputs a new error amount of the pixel of interest determined thereby. An error distributor 411 weights the new error output from the error calculator 410 with a weighting coefficient corresponding to FIG. 7 and distributes the weighted error to the adders 404, 405, and 406.

  The data flow in the quaternary / binarization processing unit 400 will be described using a quaternary error diffusion process as an example. In the case of binary error diffusion, the process is performed in the same manner as the quaternary error diffusion process described below, except that the threshold value and the arithmetic expression for calculating a new error are changed.

  First, the input image data 414 is added to the output (diffused error data) of the latch 403 in the adder 407 and output to the comparator 409 and the error calculator 410. As shown in the above equations (1) to (4), the comparator 409 compares the corrected pixel data, which is the output data of the adder 407, with each of the thresholds TH1 to TH3 to determine a quaternary output value. At the same time, a selection signal 415 for selecting a new error amount calculation formula is output to the error calculator 410. The error calculator 410 has a subtraction circuit (not shown) corresponding to the above equations (1) to (4), and determines which one of the results of the above equations (1) to (4) is to be used. Selection is made according to the selection signal 415, and a new error is output.

  Note that a new error amount may be calculated by switching a value to be subtracted by the selection signal 415 from the comparator 409 to the subtractor provided in the error calculator 410.

  The new error amount output from the error calculator 410 is weighted by the error distributor 411 according to FIG. 7, and the result is output to the adders 404, 406, 409 and the latch 401. Here, the weighted error of “W3” is latched by the latch 401, and is added by the adder 404 to the weighted error of “W2” of the error generated by calculating the error of the next pixel. The output of the adder 404 is latched by the latch 402, and further added by the adder 405 to the weighted error “W1” of the error generated by calculating the error of the next pixel. The output of the adder 405 is an error amount diffused to the next line of the processing line, and is clamped by the clamp circuit 408 to 6-bit signed data from “−32” to “31” and output. The output of the clamp processing circuit 408 is temporarily stored in an error buffer in order to delay one line of data, and is read out when processing the next line.

  Further, the adder 406 adds the read value from the error buffer delayed by one line and the weighted error amount of “W4”, and latches the addition result in the latch 403. The latch 403 outputs the sum of the diffused errors as a correction amount. Thereafter, the process returns to the adder 407 and sequentially performs the addition with the input image data 414 to output the quaternized image data from the comparator 409.

  As described above, the input image data 414 is binarized in the binary error diffusion mode, quaternized in the quaternary error diffusion mode, and output as binary data or quaternary data. At this time, the number of effective bits of each latch and each adder is configured according to the number of effective bits of the quaternary error diffusion processing.

<Binary / quaternary expansion section 600>
The binary / quaternary developing unit 600 outputs image data with a main scanning resolution of 400 dpi to a printer 700 capable of binary recording with a resolution of 1200 dpi. Therefore, “0” (white) and “1200 dpi” in accordance with the input data. The image data is converted to 1 "(black) image data.

  When the input data is quaternary image data, the quaternary value is made to correspond to the number of three small dots of 1200 dpi. First, when the four values are "0", all the small dots of 1200 dpi output the value of "0". Next, in the case of four-valued “1”, one of three small dots of 1200 dpi is output as “1” and the remaining two are output as “0”. Similarly, in the case of quaternary "2", two of the three small dots of 1200 dpi are output as "1" and the remaining one is output as "0", and the quaternary data is "3". In this case, all three small dots of 1200 dpi are output as "1".

  If the input image data is binary 400 dpi image data, three 1200 dpi small dots are put together, and if the input binary data is "0", all three small dots are set to "0". If the binary input data is "1", all three small dots are output as "1", and binary 400 dpi image data is developed. The data composed of “0” and “1” thus developed is printed by the printer 700.

  In the present embodiment, a case will be described in which binary image data and quaternary image data are expanded at 400 dpi in the main scanning as input image data. As described above, when image data having a resolution of 400 dpi in the main scanning is output to the printer 700 capable of binary recording with a resolution of 1200 dpi in the main scanning direction, the input quaternary image data is converted into small dots 3 of 1200 dpi. By making the number correspond to the number of pieces, it is possible to record image data of four values of 400 dpi. When the input data is binary 400 dpi image data, 400 dpi image data can be recorded as binary data by combining three 1200 dpi small dots into “0” or “1”. It becomes.

  First, the rules for arranging small dots in the present embodiment will be described.

  FIG. 9A shows a case where image data of 255 gradations is quaternized by a quaternary error diffusion process, and the quaternized image data is regularly arranged with small dots from the left in accordance with the image density. FIG. 4 is a graph showing a relationship between density data and a recording density.

  Usually, the printer 700 such as an LBP turns on / off the irradiation by the semiconductor laser depending on whether the input image data is “1” or “0”, and the point where the laser light is turned on is black. Be recorded. At this time, the dot diameter of the laser light is circular, and the dot diameter is selected so that the dots slightly overlap each other in order to represent all black. For this reason, on / off data having a high frequency such that black and white are alternately recorded is recorded as an image composed of black dots that are liable to be crushed. For this reason, as shown in FIG. 9A, the recording density with respect to the density of the image data is extremely nonlinear.

  Considering the characteristics of the printer 700 as described above, in the present embodiment, when arranging small dots, as shown below, in the case of even pixels, the arrangement pattern 0 (pattern0) is selected. A black dot "1" is arranged from the right side, and in the case of an odd pixel, an arrangement pattern 1 (pattern1) is selected and a black dot "1" is arranged from the left side. By developing into small dots in this way, the frequency component of the output data is suppressed, and a pattern in which black and white alternate can be eliminated. At the same time, the black dots are arranged so as to be continuous as much as possible, so that the collapse of the image due to the protrusion of the dot system is suppressed.

Even pixel Odd pixel
(Arrangement pattern 0) (Arrangement pattern 1)
Pixel density 0 000 000
1 001 100
2 011 110
3 111 111
FIG. 9B shows the image density in the case where image data of 255 gradations is quaternized by quaternary error diffusion, and the quaternized data is developed and printed into small dots using the symmetric pattern. FIG. 4 is a graph showing the relationship between data and recording density.

  9B differs from FIG. 9A in that the relationship between the density of image data and the recording density is much more linear than in FIG. 9A. Accordingly, when dots are developed and printed using the above arrangement pattern, an image having more excellent gradation characteristics can be printed.

  However, when such an arrangement pattern is used, halftone expression is not a problem, but in a character line drawing, the sharpness of a recorded image may be deteriorated at an edge portion depending on whether the pixels at the edge portion are even or odd. There is.

  FIG. 10A is a diagram illustrating an example in which a low density portion of an edge is an odd-numbered pixel in the main scanning direction, and a pseudo line occurs at the edge.

  In this embodiment, the following exception processing is performed to prevent such a problem at the edge portion. That is, in the present embodiment, when the m-valued image data is input, the pixel density of interest takes an intermediate value of “1” to “(m−1)”, and the pixels on both sides are determined by the equation (7). , (8) is determined. If the condition is satisfied, a fixed pattern is selected regardless of the even or odd number. That is, the pixel of interest is compared with the density of the left and right pixels to detect that the pixel is the edge of the image. In the case of an edge portion, small dots are arranged according to the inclination direction of the pixel density, thereby improving the reproducibility at the edge portion. Here, DATn-1 indicates pixel data on the right side of DATn, and DATn + 1 indicates pixel data on the left side of DATn.

DATn−1 <DATn <DATn + 1 → placement pattern 0 (7)
DATn-1>DATn> DATn + 1 → Arrangement pattern 1 (8)
FIG. 10B is a diagram illustrating an output example in a case where exception processing is further introduced into the even / odd symmetric pattern development according to the present embodiment.

  According to this, it can be seen that a good result is obtained without a pseudo line occurring at the edge portion of the image.

  Next, a specific configuration example of the binary / quaternary developing unit 600 according to the present embodiment will be described in detail with reference to FIG.

  FIG. 11 is a block diagram illustrating a configuration of a circuit that determines the arrangement of small dots in the binary / quaternary developing unit 600.

  The image data input here is output from the line buffer while being synchronized with the horizontal synchronization signal after the image data is temporarily buffered in a line buffer (not shown) in order to synchronize the image output with the horizontal synchronization signal of the printer 700. This is the read image data. Reference numeral 601 denotes a decoder which outputs a target pixel value (DATn), a pixel value (DATn-1, DTAn + 1) before and after the target pixel in the main scanning direction, and an output value 610 of a 1-bit toggle counter for counting an input pixel value. Is entered. The output value 610 of the toggle counter determines whether the pixel is an even-numbered pixel or an odd-numbered pixel.

  The decoding logic in the decoder 601 outputs to the selector 602 a selection signal SEL for determining whether to select either the arrangement pattern 0 or the arrangement pattern 1 in accordance with a logical expression described in the following C language. The selector 602 selects a small dot pattern according to the density value of the target pixel DATn and the value of the selection signal SEL, and outputs it to the parallel / serial conversion circuit (P / S) 603. The parallel / serial conversion circuit 603 converts the input 3-bit data into serial data at a desired speed required by the printer 700 and outputs the data to the printer 700 as, for example, on / off data of a laser beam.

if (DATn = 1 || DATn = 2) {
if ((DATn-1 <DATn) && (DATn <DATn + 1)) {
SEL = pattern0;
} else if ((DATn-1> DATn) &&(DATn> DATn + 1)) {
SEL = pattern1;
} else {
if (TOGC = 1) {
SEL = pattern1;
} else {
SEL = pattern0;
}
{
} else {
if (TOGC = 1) {
SEL = pattern1;
} else {
SEL = pattern0;
}
}
As described above, according to the present embodiment, the spatial filter processing unit 200 can reduce the number of bits of the line buffer for extracting the reference data in the sub-scanning direction. The output range of the luminance-density conversion is switched according to the binarization, and the error data stored in the error buffer by the error diffusion is clamped to the number of significant digits of the error buffer in the binarization in the quaternary processing. This makes it possible to use a common block for processing, and to generate image data that makes maximum use of the printing capability of the printer.

  Also, as described above, according to the present embodiment, when the m-valued image data is dot-expanded and output to the printer 700, in the m-value input image data, the pixel has an even-numbered pixel and an odd-numbered pixel. By arranging small dots in a pattern that is symmetrical in the case of the second pixel, the gradation recording characteristics of the printer device can be significantly improved. Further, it is determined whether or not the pixel of interest has an intermediate value in the input image data of m values. If the pixel of interest has the intermediate value, the adjacent pixels located on the left and right of the pixel of interest are referred to, By determining the arrangement of the small dots based on the comparison result between the target pixel and the target pixel, it is possible to provide an image recording with improved reproducibility of the edge portion included in the image.

[Other embodiments]
Next, an algorithm of a quaternization method according to another embodiment of the present invention will be described. In the case of binarization, since the binarization is performed by a known binary error diffusion method, the description is omitted here. In this embodiment, processing is performed so that the pixel density and the error calculation method of the output image data are switched so as to suppress the occurrence of isolated black dots in a density area where the printer 700 has poor followability.

  The quaternizing process according to another embodiment of the present invention is based on quaternary error diffusion. As described above, the problem with the low-cost printer 700 is image data near the threshold value TH1 = (DENT1: 85 + DENT0: 0) / 2 => 42. Therefore, in this other embodiment, first, a comparison unit is provided for identifying whether or not the input image data has a density causing image unevenness. Further, when the pixel density of the input image data is within a specific density range, the error diffused into the input image data is calculated as shown in the following equations (9) and (10). A threshold value DENT1 = 85 for comparing with the added correction density is set. When the corrected density is larger than the threshold value, the value of the output pixel is set to "2", and the error calculated for this pixel is obtained by subtracting DENT2 = 170 from the corrected density. If the corrected density is equal to or smaller than the threshold value, the output pixel value is set to “0”, and the error calculated at this pixel is obtained by subtracting DENT0 = 0 from the correction udon.

  As a result, the quaternary output pattern in the specific density region where the conventional image unevenness occurs is changed from the conventional density “1” and density “0” pattern to the density “2” and density “0” pattern. As a result, when the quaternary data is developed and output in this density area, an isolated pixel of 1200 dpi is not generated, thereby generating a dot pattern within the range of the printer 700. The tonal characteristics are improved.

  If the input image data is out of the specific density range, a quaternary error diffusion process similar to the related art may be performed. At this time, the threshold value, the output value, and the generated error are represented by Expressions (11) to (14).

When the density of the input pixel is DTH1 <Xij <DTH2
If X'ij> DENT1, the output pixel density is OUTPUT = 2 and the error is E = X'ij−DENT2 (9)
If DENT> = X'ij, then output pixel density OUTPUT = 0 and error E = X'ij-DENT0 ... (10)
When the density of the input pixel is DTH1 ≧ Xij ≦ Xij
If X'ij> TH3, output pixel density OUTPUT = 3 and error E = X'ij−DENT3 (11)
If TH3> = X'ij> TH2, the output pixel density is OUTPUT = 2 and the error is E = X'ij−DENT2 (12)
If TH2> = X'ij> TH1, the output pixel density is OUTPUT = 1 and the error is E = X'ij−DENT1 ... (13)
If TH1> = X'ij, then output pixel density OUTPUT = 0 and error E = X'ij-DENT0 ... (14)
FIG. 12B shows an example in which a patch pattern of 0 to 255 density data is recorded using the quaternary error diffusion process and the quaternary expansion process of the present embodiment, and the density is measured using a densitometer. FIG. As is clear from FIGS. 12A and 12B, the gradation characteristics are improved near the density “42”.

  A description will be given of a circuit example of a quaternary error diffusion process according to another embodiment with reference to FIG. Note that, in FIG. 13, the same parts as those in FIG. 8 described above are denoted by the same reference numerals, and description thereof is omitted.

  The latch circuits 401 to 403 hold error data that is weighted and distributed and diffused, and the data is updated in synchronization with the pixel clock. The adders 404 to 407 perform addition of data output from the error distributor 411 and to which errors generated during processing of each pixel are distributed. The comparator 416 detects whether or not the pixel density of the input image data 414 is in a specific density area (here, -40 or more and 44 or less). The comparator 409 compares the input pixel density value corrected by the diffused error data with respect to the input pixel output from the adder 407 with a threshold value, and selects an output value in the error calculator 410 and a calculation formula for error calculation. The signal 415 is output. An error calculator 410 receives the signal 415 from the comparator 409 and the addition result from the adder 407, and calculates and outputs a new error amount of the pixel of interest determined thereby. The error distributor 411 weights the new error output from the error calculator 410 with the weighting coefficient corresponding to FIG. 7 and distributes the new error to the adders 404, 405, and 406.

  The data flow in the quaternary / binarization processing unit 400 will be described.

  First, the input image data 414 is added to the output (diffused error data) of the latch 403 in the adder 407 and output to the comparator 409 and the error calculator 410. Further, the comparator 416 detects whether the density of the input pixel is in a specific density area. In the comparator 409, based on the comparison result of the comparator 416, as shown in the above equation (9) (10) or (11) to (14), the corrected pixel data which is the output data of the latch 403 and each of the threshold values TH1 to TH1 A quaternary output value is determined by comparison with TH3 or DENT1, and at the same time, a selection signal 415 for selecting a new error amount calculation formula is output to the error calculator 410. In this error calculator 410, the equations (11) to (14) [the equation (9) uses the same subtraction equation as the equation (13), and the equation (10) uses the same subtraction equation as the equation (13)] There is a subtraction circuit shown, which selects which of the above equations (11) to (14) is to be used in accordance with the selection signals 415 and 417 from the comparators 416 and 409, and outputs a new error. .

  Note that a new error amount may be calculated by switching the value to be subtracted by the selection signals 415 and 417 from the comparators 409 and 416 for the subtractor provided in the error calculator 410.

  The new error amount output from the error calculator 410 is weighted by the error distributor 411 according to FIG. 7, and the result is output to the adders 404, 406, 409 and the latch 401. Here, the weighted error of “W3” is latched by the latch 401, and is added by the adder 404 to the weighted error of “W2” of the error generated by calculating the error of the next pixel. The output of the adder 404 is latched by the latch 402, and further added by the adder 405 to the weighted error “W1” of the error generated by calculating the error of the next pixel. The output of the adder 405 is temporarily stored in an error buffer to delay the data by one line, and is read out when the next line is processed.

  Further, the adder 406 adds the read value from the error buffer delayed by one line and the weighted error amount of “W4”, and latches the addition result in the latch 403. The latch 403 outputs the sum of the diffused errors as a correction amount. Thereafter, the process returns to the adder 407 and sequentially performs the addition with the input image data 414 to output the quaternized image data from the comparator 409.

  The configuration of the subsequent binary / quaternary developing unit 600 is as described above with reference to FIG.

  As described above, by switching the output pattern of the m-value error diffusion in the specific density region of the input image data, even if the m-valued data is dot-developed for output to the printer 700, the low density In addition, generation of a dot pattern having a high frequency component is suppressed, and printing with excellent gradation characteristics can be performed without causing image roughness even in a low cost printer.

  FIGS. 14 to 18 show flowcharts in the case where the above-described functions are realized by software. A control program for executing these processes is stored in the program memory 122 and executed under the control of the CPU 120.

  FIG. 14 is a flowchart showing the spatial filter processing in the present embodiment.

  First, in step S1, input image data (8 bits) is sequentially stored in the line buffers 201 and 202 in synchronization with a clock (DCLK). As described above, the line buffer 201 is shifted rightward by 2 bits and stored as 6-bit data. After the two lines of image data are stored in the line buffers 201 and 202 in this manner, pixel data of 3 lines × 3 pixels are latched in the latch group 203 in synchronization with the input of the image data of the next line, and the filter matrix and Multiply (step S2). The value obtained in this way is added to the pixel of interest, and pixel data subjected to filter operation is output (step S3). The filter operation expression at this time is represented by filter = X << 2-((A << 2) + (B << 2) + C + D).

  FIG. 15 is a flowchart showing the luminance-density conversion processing.

  This luminance-density conversion processing is determined depending on whether it is performed in binary or quaternary in the subsequent 4-value / binarization processing. That is, if it is determined in step S11 that the process is to be performed in binary, the process proceeds to step S12, and a process of converting all white of the 8-bit data into "0" and converting all black into "63" density data is performed. If it is determined in step S11 that quaternary processing is to be performed, the flow advances to step S13 to perform processing for converting all white of 8-bit data to "0" and all black to "255" density data. In step S14, if there is a density (density value "31" in the above example) at which image roughness occurs in the printer 700, the conversion to the density value is not performed. Note that such luminance-density conversion is preferably performed using a look-up table.

  FIG. 16 is a flowchart showing the binary / quaternary processing. This process is performed using a binary or quaternary error diffusion process.

  First, in step S21, the correction density X'ij of the target pixel Xij is obtained. When the error of one line before is stored in the error buffer, the corrected density is determined using the value stored in the error buffer. Next, the process proceeds to step S22, where it is determined whether to perform the binary or quaternary error diffusion. If the quaternary error diffusion is to be performed, the process proceeds to step S23, and the equations (1) to (4) are used. As shown, an output level (OUTPUT) and an error (E) are obtained by using three thresholds. When performing binary error diffusion, the process proceeds to step S24, where the output pixel value (OUTPUT) and the error (E) are determined based on the threshold value (BTH1) as shown in the above-described equations (5) and (6).

  When the error is determined in this way, the process proceeds to step S25, where the above-described weighted addition of FIG. 7 is executed, and the error (E) obtained by this is clamped to 6-bit data (step S26). Then, the process proceeds to a step S27, where the obtained error (E) is stored in the error buffer and is delayed by one line, and the delayed error is referred to in the error diffusion processing of the pixel of the next line.

  FIG. 17 is a flowchart showing processing for developing binary / quaternary data into binary data (expressed by small dots).

  In FIG. 17, the density gradient of the image is obtained, and the arrangement of the small dots is determined according to the density gradient. That is, in step S31, m-value image data is input, and it is determined whether the density gradient of pixels located on the left and right (in the main scanning direction) of the destination pixel of the image data is upward or downward (step S32). ), The pattern 0 (dots are developed from the right side) is selected if it goes up to the right (step S33), and the pattern 1 (dots are developed from the left side) is chosen if it goes down to the right (step S33). Step S34).

  Further, when there is no density gradient, the arrangement of small dots is determined depending on whether the pixel of interest is an odd-numbered pixel or an even-numbered pixel. That is, in step S32, m-value image data is input, and it is checked whether or not the destination pixel of the image data has a density gradient. If there is no density gradient, whether the pixel of interest is an odd-numbered pixel or an even-numbered pixel is determined. (Step S35). If it is an odd-numbered pixel, pattern 1 (dots are developed from the left side) is selected (step S36). If it is an even-numbered pixel, pattern 0 (dots are developed from the right side) is selected (step S37). ).

  FIG. 18 is a flowchart showing a binary / quaternary conversion process according to another embodiment of the present invention.

  First, in step S51, it is determined whether or not the input image data falls within a specific density range having a density that causes image unevenness in the printer 700. If it is determined that the density is out of the specific density range, the process proceeds to step S22 in FIG. 16 to execute the above-described processing.

  If it is determined that the density is within the specific density range, the process proceeds to step S52, a corrected density value obtained by adding the error diffused to the input image data is obtained, and the corrected density value is compared with a threshold value for comparison. . Here, when the corrected density value is larger, the process proceeds to step S53, the output pixel density (OUTPUT) is set to "2", and the error at that time is obtained. If the corrected density value is smaller, the process proceeds to step S54, where the output pixel density (OUTPUT) is set to "0", and the error at that time is obtained. When the processing of step S53 or step S54 is completed in this way, the process proceeds to step S25 of FIG. 16 to execute the above-described processing.

  The present invention can be applied to a system including a plurality of devices (for example, a host computer, an interface device, a reader, a printer, etc.), but can be applied to an apparatus (for example, a copying machine, a facsimile device, etc.) including one device. May be applied.

  Further, an object of the present invention is to provide a storage medium storing a program code of software for realizing the functions of the above-described embodiments to a system or an apparatus, and a computer (or CPU or MPU) of the system or apparatus to store the storage medium. This is also achieved by reading and executing the program code stored in the.

  In this case, the program code itself read from the storage medium realizes the function of the above-described embodiment, and the storage medium storing the program code constitutes the present invention.

  As a storage medium for supplying the program code, for example, a floppy disk, a hard disk, an optical disk, a magneto-optical disk, a CD-ROM, a CD-R, a magnetic tape, a nonvolatile memory card, a ROM, and the like can be used.

  When the computer executes the readout program code, not only the functions of the above-described embodiments are realized, but also an OS (Operating System) running on the computer based on the instruction of the program code. This also includes a case where some or all of the actual processing is performed and the functions of the above-described embodiments are realized by the processing.

  Further, after the program code read from the storage medium is written into a memory provided in a function expansion board inserted into the computer or a function expansion unit connected to the computer, the function expansion is performed based on the instruction of the program code. This includes the case where the CPU or the like provided in the board or the function expansion unit performs part or all of the actual processing, and the processing realizes the functions of the above-described embodiments.

  As described above, according to the present embodiment, the number of bits of the line buffer for extracting the reference data in the sub-scanning direction in the spatial filter processing unit is reduced, and further, the luminance density is adjusted according to the binarization and the quaternization. By switching the output range of the conversion, and furthermore, in the quaternary processing, the error data stored in the error buffer by the error diffusion is clamped to the number of significant bits of the error diffusion at the time of the binarization, so that the blocks are shared. Thus, it is possible to generate image data that maximizes the capabilities of the recording system during copying.

FIG. 2 is a functional block diagram illustrating a functional configuration of the image processing apparatus according to the embodiment of the present invention. FIG. 1 is a block diagram illustrating a configuration of an image processing device according to an embodiment of the present invention. FIG. 4 is a diagram illustrating an example (A) of coefficients of a spatial filter and a correspondence (B) with each line buffer in the present embodiment. FIG. 3 is a block diagram illustrating a configuration of a spatial filter processing unit according to the present embodiment. 5 is a timing chart for explaining a memory access timing in the spatial filter processing unit according to the present embodiment. FIG. 9 is a diagram illustrating a luminance-density conversion characteristic (A) of the binary error diffusion processing unit and luminance-density conversion characteristics (B) and (C) of the quaternary error diffusion processing unit according to the present embodiment. It is a figure which shows the weighting of the error distribution of the binary and quaternary error diffusion processing in this Embodiment. FIG. 3 is a block diagram illustrating a configuration of a binary and quaternary error diffusion processing unit according to the present embodiment. FIG. 4 is a diagram illustrating an example of recording characteristics of quaternary data in the present embodiment. FIGS. 7A and 7B are diagrams illustrating the generation of a pseudo line at an edge portion of image data and a diagram illustrating an example in which the generation of the pseudo line is suppressed according to the present embodiment. FIGS. FIG. 3 is a block diagram illustrating a configuration of a binary / quaternary developing unit according to the present embodiment. FIG. 7 is a diagram illustrating a conventional relationship (A) between the density of data that has been expanded into four values and the recording density and a relationship (B) of the density of data that has been expanded into four values and the recording density according to the present embodiment. FIG. 14 is a block diagram illustrating a configuration of a binary and quaternary error diffusion processing unit according to another embodiment of the present invention. 5 is a flowchart illustrating a spatial filtering process in the image processing apparatus according to the present embodiment. 5 is a flowchart illustrating a luminance-density conversion process in the image processing apparatus according to the present embodiment. 6 is a flowchart illustrating a binary / quaternary conversion process in the image processing apparatus according to the present embodiment. 5 is a flowchart illustrating a binary / quaternary expansion process in the image processing apparatus according to the present embodiment. 9 is a flowchart illustrating a binary / quaternary conversion process in an image processing apparatus according to another embodiment of the present invention.

Explanation of reference numerals

100 Scanner 120 CPU
121 RAM
122 Program memory 123 Look-up table (LUT)
124 Laplacian filter value 200 Spatial filter 201, 202 Line buffer 203 Latch group 300 Brightness-density conversion unit 400 4-value / binarization processing unit 401, 402, 403 Latch 404, 405, 406, 407 Adder 408 Clamp circuit 409 , 416 Comparator 410 Error calculator 411 Error allocator 500 Image memory 600 Binary / quaternary developing unit 700 Printer

Claims (8)

Image input means for inputting multi-valued image data in which one pixel is represented by an n value;
Filter means for performing a spatial filter process on the multi-valued image data input by the image input means,
Processing means for converting each pixel data of the image data into m (2 <m <n) values for the image data filtered by the filter means;
Dot arrangement means for converting the image data m-valued by the processing means into an array of dots having a higher resolution than the resolution of the image data,
The dot arrangement means is characterized in that a pattern for even-numbered pixels and a pattern for odd-numbered pixels are symmetrical, and converts the m-valued image data into (m-1) dot arrays. Image processing device.   2. The image processing apparatus according to claim 1, wherein the value of m is 4, and the dot arrangement unit converts the m-valued image data into an array of three dots. Image input means for inputting multi-valued image data in which one pixel is represented by an n value;
Filter means for performing a spatial filter process on the multi-valued image data input by the image input means,
Processing means for converting each pixel data of the image data into m (2 <m <n) values for the image data filtered by the filter means;
Dot arrangement means for converting the image data m-valued by the processing means into an array of dots having a higher resolution than the resolution of the image data,
The dot arranging means changes the arrangement direction of the dots in accordance with a density gradient of a pixel adjacent to a pixel of interest in the image data, and converts the m-valued image data into an (m-1) dot array An image processing apparatus, comprising:   The value of m is 4, and the dot arrangement means converts the m-valued image data into an array of three dots, and arranges the dots from the right side when the density gradient rises to the right. The image processing apparatus according to claim 3, wherein the dots are arranged from the left side when the density gradient is lower right. An image inputting step of inputting multi-valued image data in which one pixel is represented by an n value;
A filtering step of performing a spatial filtering process on the multi-valued image data input in the image input step,
A processing step of converting each pixel data of the image data into an m (2 <m <n) value for the image data filtered in the filtering step;
A dot arrangement step of converting the m-valued image data in the processing step into an array of dots having a higher resolution than the resolution of the image data,
In the dot arrangement step, a pattern for even-numbered pixels and a pattern for odd-numbered pixels are symmetrical, and the m-valued image data is converted into (m-1) dot arrays. Image processing method.   6. The image processing method according to claim 5, wherein the value of m is 4, and in the dot arrangement step, the m-valued image data is converted into an array of three dots. An image inputting step of inputting multi-valued image data in which one pixel is represented by an n value;
A filtering step of performing a spatial filtering process on the multi-valued image data input in the image input step,
A processing step of converting each pixel data of the image data into an m (2 <m <n) value for the image data filtered in the filtering step;
A dot arrangement step of converting the m-valued image data in the processing step into an array of dots having a higher resolution than the resolution of the image data,
In the dot arrangement step, the arrangement direction of the dots is changed in accordance with the density gradient of a pixel adjacent to the pixel of interest in the image data, and the m-valued image data is converted into an (m-1) dot array. An image processing method comprising:   The value of m is 4, and in the dot arrangement step, the m-valued image data is converted into an array of three dots, and when the density gradient rises to the right, the dots are arranged from the right. 8. The image processing method according to claim 7, wherein the dots are arranged from the left side when the density gradient is lower right.

Images