JP2003110939A - Photoelectric conversion cell, image pickup device, image pickup method and driving method for image pickup device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an object image pickup device using a miniaturized photoe lectric conversion cell capable of recognizing the moving direction of an object to be detected or recognizing the form. SOLUTION: The object image pickup device is composed of a photoelectric conversion cell array, in which a plurality of photoelectric conversion cells are arrayed in the form of matrix, vertical load circuit array 15 connected to the photoelectric conversion cell array, horizontal load circuit array 17, output processing circuit 23 provided with a vertical data processing circuit 19 and a horizontal data processing circuit 21 and simultaneously connected to the vertical data processing circuit 19 and the horizontal data processing circuit 21, and a control circuit 27 connected to the optic/electric converting cell array 17, vertical data processing circuit 19, horizontal data processing circuit 21 and output processing circuit 23.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an object image pickup device using a photoelectric conversion cell array, and more particularly, to a moving direction of a subject, that is, a target object or a movement of the target object without using a complicated structure. The present invention relates to an object image pickup device using a photoelectric conversion cell array whose shape can be recognized.

[0002]

2. Description of the Related Art FIG. 11 is a circuit block diagram of a conventional MOS solid-state image pickup device 111. 12 is a configuration diagram of the photoelectric conversion cells 131 arranged in a matrix of the MOS type solid-state imaging device 111 shown in FIG. 11, and FIG. 13 shows image data irradiated on the MOS type solid-state imaging device 111 of FIG. FIG. 14 is a drive signal timing chart of the MOS type solid-state imaging device for reading, and FIG.
3 is a system block diagram for reading out image data applied to the solid-state imaging device 111 to obtain information on a moving direction of a subject. FIG.

First, the configuration of a conventional MOS solid-state image pickup device 111 will be described with reference to FIG.

The MOS type solid-state image pickup device 111 includes a photoelectric conversion cell array 113 arranged in a matrix and a photoelectric conversion cell array 113 arranged in the matrix.
A vertical selection circuit 117 connected to the photoelectric conversion cell array 113 in order to select the row direction, a horizontal selection circuit 115 connected to the photoelectric conversion cell array 113 in order to select output data from the photoelectric conversion cell array 113, A load circuit cell array 119 connected to the photoelectric conversion cell array 113 for reading data from the conversion cell array 113, a control circuit 121 for controlling the MOS type solid-state imaging device 111, and an output amplifier 1.
23, the control circuit 121 is connected to the horizontal selection circuit 115, the vertical selection circuit 117, and the photoelectric conversion cell array 113.

The horizontal selection circuit 115 is the output amplifier 1
23, and the output data from the photoelectric conversion cell array 113 is output from the output terminal 125.

Next, the structure of the photoelectric conversion cell 131 forming the photoelectric conversion cell array 113 will be described with reference to FIG.

That is, the reset MOS transistor 13
The drain terminal of 3 is commonly connected to all photoelectric conversion cells 131 as a reset voltage terminal 135, and a reset M terminal is used.
The gate terminal of the OS transistor 133 is commonly connected to all photoelectric conversion cells 131 as a reset signal terminal 137.

Then, the reset MOS transistor 13
The source terminal of 3 is a photodiode 13 which is photoelectric conversion.
9 is connected to the cathode terminal, one end of the parasitic capacitance 141, and the gate of the amplifier MOS transistor 143.

On the other hand, the gate of the selection MOS transistor 145 is commonly connected to each row of the photoelectric conversion cells 131 arranged in a matrix as the vertical selection terminal 147 and connected to the vertical selection circuit 117, and the selection MOS transistor 145. The drains of are connected in common to each column of the photoelectric conversion cells 131 arranged in a matrix as the data output terminal 151, and are connected to the load circuit cell array 119 and the horizontal selection circuit 115. The source of the selection MOS transistor 145 is connected to the drain of the amplifier MOS transistor 143.

The reset MOS transistor 133 is also provided.
, The bulk and source of the amplifier MOS transistor 143, the bulk of the selection MOS transistor 145, the other terminal of the parasitic capacitance 141, and the anode terminal of the photodiode 139 are all commonly connected to the ground potential 151. There is.

Next, referring to FIG. 11 to FIG.
The operation of reading the image data of the subject irradiated on the S-type solid-state imaging device 111 will be described.

That is, FIG. 13 shows the timing of capturing the image data in the N frame 171. First, the reset signal 161 of the reset time 173 is input to the reset signal terminals 137 of all the photoelectric conversion cells 131.

By this operation, all the photoelectric conversion cells 131
Parasitic capacitance 141 arranged at is in a reset state. Then, after the reset time 173 ends, the accumulation time 163
The image data applied to each photodiode 139, which is the light receiving portion of each photoelectric conversion cell 131 during the period of, is accumulated in the parasitic capacitance 141 due to the amount of incident light.

The image data stored in the parasitic capacitance 141 is amplified by the amplifier MOS transistor 143 arranged in each photoelectric conversion cell 131, and the selection MO is generated.
By turning on the S-transistor 145, the load circuit cell array 119 can be voltage-converted and read as image data.

That is, in order to read the image data accumulated in the respective parasitic capacitors 141 arranged in all the photoelectric conversion cells 131, the vertical address signal 167 from the vertical selection circuit 117 is photoelectrically converted after the accumulation time 163 ends. One row of vertical selection terminals 147 in the conversion cell array 113 is selected, and the selection MOS transistor 145 is turned on, and the voltage-converted image data is output to the load circuit cell array 119 as the output signal 169 from the data output terminal 151. .

All the photoelectric conversion cells 131 connected to this row by the horizontal address signal 165 from the horizontal selection circuit 115 while the vertical selection terminal 147 of one row is selected by the vertical address signal 167.
Of the image data is sequentially sent to the output circuit 123, amplified, and output from the output terminal 125.

Then, the vertical address signal 167 and the horizontal address signal 165 are sequentially input to the photoelectric conversion cell array 113, so that the image data stored in the respective parasitic capacitors 141 arranged in all the photoelectric conversion cells 131 are sequentially processed. It can be obtained as an output signal 169 from the data output terminal 151.

In the driving method described above, the image data accumulated in all the photoelectric conversion cells 131 is stored in one frame period 171.
Is output from the MOS type solid-state imaging device 111.

Next, the conventional MOS type solid-state image pickup device 11 will be described.
A means for obtaining the moving direction information of the subject by using 1 will be described with reference to FIG.

FIG. 14 shows an example of an image processing system using the MOS type solid-state image pickup device 111. The output terminal 125 of the MOS type solid-state image pickup device 111 is connected to the A / D conversion circuit 181, and the A / D conversion circuit 181 is connected. The input of the first memory circuit 183 and the input of the second memory circuit 185 are connected to the output of.

A data comparison circuit 187 is connected to the output of the first memory circuit 183 and the output of the second memory circuit 185. Although not shown in FIG. 14, a control circuit such as a microcomputer is also required to control this system.

Next, the operation of this image processing system will be described.

First, the N frame image data obtained from the MOS type solid-state image pickup device 111 is converted into an A / D conversion circuit 181.
It is digitized by and is input to the first memory circuit 183 and stored. Then, the MOS type solid-state imaging device 11
The image data of N + 1 frame obtained from 1 is digitized by the A / D conversion circuit 181, input to the second memory circuit 185, and stored. And the data comparison circuit 1
The image data of N frames and the image data of N + 1 frames are compared by 87, and output from the comparison data output terminal 189. The output signal from the comparison data output terminal 189 makes it possible to know the moving direction information of the subject.

[0024]

The conventional MOS type solid-state image pickup device is configured as described above, and is driven as described above to read the image data of the object.
In order to read image data from the S-type solid-state image pickup device, a vertical selection circuit is sequentially selected to select a selection MOS transistor, and a horizontal selection circuit is sequentially selected between them to obtain data of one pixel and one pixel. It was reading sequentially.

In order to construct a system for obtaining the moving direction information of the object, the image data output from the MOS type solid-state image pickup device is digitally converted by the A / D conversion circuit and temporarily stored in a separate memory circuit for each frame. Was there. Then, in order to obtain the movement information of the subject, the image data of the N frame and the image data of the N + 1 frame are temporarily stored in different memory circuits and then the respective memory data are compared to obtain the movement direction information of the subject. Was there.

That is, in order to obtain the moving direction information of the subject,
A vertical selection circuit and a horizontal selection circuit are required in the MOS type solid-state imaging device, and a selection MOS transistor is required in the photoelectric conversion cell.

In order to obtain the image information, it is necessary to read the pixel data sequentially for each pixel, which takes a very long time. There is also a problem that the chip area is large due to the circuits such as the vertical selection circuit and the horizontal selection circuit. Further, in addition to the MOS type solid-state image pickup device, an A / D conversion circuit and a plurality of memory circuits are required, which complicates the driving method of each circuit and takes a lot of processing time.

The object of the present invention is to improve the above-mentioned drawbacks of the prior art and to provide a reliable and reliable structure without using a scan processing circuit, an analog / digital conversion circuit, a sequential read / write circuit, and the like. An object imaging device using a miniaturized photoelectric conversion cell array capable of instantaneously determining the moving direction of a predetermined detected object or recognizing the shape of the detected object.

That is, according to the present invention, in the field where it is not necessary to accurately image a subject with high resolution as in the conventional case, the moving direction of the target inspected object or the shape of the inspected object is determined. It is useful when it is used in a field where it can be recognized at a certain level.

[0030]

In order to achieve the above-mentioned object, the present invention adopts the technical constitution as described below. That is, according to a first aspect of the present invention, one photodiode, one I / V conversion control means, and two amplifier control means arranged independently of each other and connected to the photodiode. A photoelectric conversion cell for a photoelectric conversion cell array composed of
As a second aspect of the present invention, a photoelectric conversion cell array in which a plurality of the photoelectric conversion cells described above are arranged in a matrix, a vertical load circuit array connected to the photoelectric conversion cell array, and a horizontal load circuit. An array, a vertical data processing circuit, and a horizontal data processing circuit are provided, and at the same time, an output processing circuit connected to the vertical data processing circuit and the horizontal data processing circuit, the photoelectric conversion cell array, and a vertical load circuit. The object imaging device includes an array, a horizontal load circuit array, a vertical data processing circuit, a horizontal data processing circuit, and a control circuit connected to an output processing circuit.

Further, as a third aspect of the present invention, in the above-mentioned object image pickup device, the individual I / Vs in the photoelectric conversion cells constituting the photoelectric conversion cell array.
A constant voltage is applied to the control terminal of the conversion control means, and a reset signal is input to the reset terminal which is one output terminal of the I / V conversion control means, and then the vertical data processing is performed. The vertical signal determination processing circuit in the circuit stores in time series the voltage values constantly output from the individual vertical data processing circuit cells connected to the individual vertical signal lines, and The horizontal signal determination processing circuit in the above stores the voltage values that are constantly output from the individual vertical data processing circuit cells connected to the individual vertical signal lines in time series as voltage waveforms, and then the vertical signal determination processing. Moved on the photoelectric conversion cell array from the voltage waveforms on the vertical signal line and the horizontal signal line obtained from the processing circuit and the horizontal signal determination processing circuit, respectively. There is a driving method of an object image pickup device configured so as to identify the shape of the moving direction or the object to be measured of the object to be measured present in the photoelectric conversion cell array on.

[0032]

BEST MODE FOR CARRYING OUT THE INVENTION The photoelectric conversion cell, the object image pickup device using the photoelectric conversion cell array and the method for driving the object image pickup device according to the present invention adopt the above-mentioned technical constitution. Basically, the photoelectric conversion cells arranged in a matrix are characterized by a circuit configuration and a reading method. More specifically, the data of each photoelectric conversion cell arranged in a matrix array is The object imaging device has a function of simultaneously performing image data processing in the vertical direction and the horizontal direction of each photoelectric conversion cell, and is particularly suitable for easily acquiring the moving direction information of the subject.

[0033]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The configuration of a specific example of the photoelectric conversion cell and object imaging device according to the present invention will be described in detail below with reference to the drawings.

That is, FIG. 1 is a circuit diagram showing the configuration of a specific example of the photoelectric conversion cell according to the present invention, in which one photodiode 39, one I / V conversion control means 33, Two photodiodes 39 independently of each other
Amplifier control means 43, 4 connected to
A photoelectric conversion cell 31 for a photoelectric conversion cell array composed of 5 and 5 is shown.

The photodiode 39 according to the present invention
A conventionally known one can be used, and the amplifier control means 43 and 45 in the present invention are not particularly limited, but amplify the current in response to the current flowing in the photodiode 39, Any structure can be used as long as it has a structure capable of outputting to the vertical signal line 49 or the horizontal signal line 51. Similarly, the I / V
The conversion control means 33 is also not particularly limited,
Any structure can be used as long as it has a reset function and a function of converting a photocurrent flowing through the photodiode 39 into a voltage with a logarithmic output characteristic.

Transistors can be used as the amplifier control means 43 and 45 and the I / V conversion control means 33 in the present invention, and bipolar transistors or FET transistors can be used. Can be done.

To explain the more detailed structure of the photoelectric conversion cell 31 used in the present invention, one photodiode 39, the first terminal t1 of the photodiode 39, and the respective control terminals S1. S2 is connected, each first output terminal t3 and t4 is connected to the grounded second terminal t2 in the photodiode 39, and each second output terminal t5 and t6 is photoelectrically converted. Vertical signal lines 49 and horizontal signal lines 51 of the cell array 11
On the other hand, the I / V conversion connected to the first and second amplifier control units 43 and 45 individually connected to different signal lines and the first terminal t1 of the photodiode 39. Control means 33 for use.

In the present invention, it is desirable that the first and second amplifier control means 43 and 45 have the same size.

Further, in the present invention, the second output terminal t5 of the first amplifier control means 43 is connected to the horizontal signal line 51 of the photoelectric conversion cell array 11, for example,
Also, the second output terminal t of the second amplifier control means 45
Reference numeral 6 is connected to the vertical signal line 49 of the photoelectric conversion cell array 11.

Of course, in the present invention, the connection relation may be reversed.

Further, in the present invention, the first and second
In response to the amount of light applied to the photodiode 39 from the second output terminals t5 and t6 of the amplifier control means 43 and 45, the same amount of light corresponding to the amount of light is received. It is necessary that the currents are output simultaneously and at all times.

In FIG. 1, 41 is a parasitic capacitance.

It is desirable that the first and second amplifier control means 43 and 45 in the present invention are, for example, both constituted by MOS transistors.

In this case, it is preferable that the first and second MOS transistors 43 and 45 have the same size.

On the other hand, in the present invention, it is preferable that the I / V conversion control means 33 is also composed of a MOS transistor.

Therefore, the photoelectric conversion cell 31 according to the present invention
As a more preferable specific example of the above, one photodiode 39, each gate control terminal S1 and S2 is connected to the first terminal t1 of the photodiode 39, and each first output terminal t3 and t4 is The second output terminals t5 and t6, which are connected to the grounded second terminal t2 of the photodiode 39, are connected to the vertical signal line 49 and the horizontal signal line 5 of the photoelectric conversion cell array 11, respectively.
One of the first and second amplifier MOS transistors 4 that are individually connected to different signal lines.
3, 45 and the first terminal t of the photodiode 39
I / V conversion MOS transistor 3 connected to 1
The photoelectric conversion cell 11 is composed of 3 and 3.

Further, the M for I / V conversion in the present invention
The source terminal t7 of the OS transistor 33 has a first terminal t1 of the photodiode 39 and the first amplifier MOS.
Gate terminal S1 of transistor 43 and second amplifier M
The gate terminal S2 of the OS transistor 45 is connected,
Bulk B1 of the I / V conversion MOS transistor 33
And the source terminal t3 and the bulk B2 of the first amplifier MOS transistor 43, the source terminal t4 and the bulk B3 of the second amplifier MOS transistor 45, and the second terminal t2 of the photodiode 39 are commonly connected and grounded. It is preferable that

Further, the photoelectric conversion cell 31 according to the present invention.
A voltage (VM) of a predetermined level is input to the gate terminal S3 of the I / V conversion MOS transistor 33 in FIG. 1 and one output terminal called a drain terminal in the transistor 33. It is also a preferable specific example that the reset signal (VR) is applied at a predetermined timing at t8 (hereinafter referred to as a reset terminal).

The above-mentioned photoelectric conversion cell 31 in the present invention
In this case, the first and second amplifier control means 4 are provided in accordance with the amount of light with which the photodiode 39 is irradiated.
Through 3, 45, the same amount of current corresponding to the amount of light received by the photodiode 39 is simultaneously and constantly output to both the vertical signal line 49 and the horizontal signal line 51.

Next, the structure of the object image pickup device according to the present invention will be described in detail with reference to FIGS.

That is, FIG. 2 is a block diagram for explaining the outline of the configuration of a specific example of the photoelectric conversion cell array according to the present invention, in which a plurality of the photoelectric conversion cells 31 according to the present invention described above are provided. A photoelectric conversion cell array 13 arranged in a matrix, a vertical load circuit array 15 connected to the photoelectric conversion cell array 13, a horizontal load circuit array 17, a vertical data processing circuit 19, and a horizontal data processing circuit 21 are provided. At the same time, the output processing circuit 23 connected to the vertical data processing circuit 19 and the horizontal data processing circuit 21, the photoelectric conversion cell array 13, the vertical load circuit array 15, the horizontal load circuit array 17, and the vertical It comprises a data processing circuit 19, a horizontal data processing circuit 21, and a control circuit 27 connected to the output processing circuit 23. It has been shown to object imaging device 11 that is.

In the object image pickup device 11 according to the present invention, the photoelectric conversion cell array 13 includes the plurality of photoelectric conversion cells 31 as illustrated in FIG. 1 in the vertical direction and the horizontal direction, respectively. It is possible to arrange them in a matrix so that the number becomes.

That is, in the photoelectric conversion cell array 13, the number of the plurality of photoelectric conversion cells 31 arranged in the vertical direction is different from the number of the plurality of photoelectric conversion cells 31 arranged in the horizontal direction. It is also possible to configure
Further, it is preferable that the plurality of photoelectric conversion cells 31 arranged in the vertical direction and the number of photoelectric conversion cells 31 arranged in the horizontal direction are arranged in the same number.

In FIG. 3A, the photoelectric conversion cell array 13 has three photoelectric conversion cells 31 arranged in the vertical direction and three photoelectric conversion cells 31 arranged in the horizontal direction. An example in which a matrix is formed by the nine photoelectric conversion cells 31 is shown.

Further, the photoelectric conversion cell 1 according to the present invention.
3, the respective second terminals t5 in the respective first amplifier control means 43 are connected to the horizontal signal line 5 for each column.
1 is commonly connected to the second amplifier control means 45.
The second terminal t6 in each row is commonly connected to the vertical signal line 49 for each row, and the control terminal S3 and the reset terminal t in the I / V conversion control means 33 are connected.
8 is commonly connected to all photoelectric conversion cells 31.

Further, the object imaging device 11 according to the present invention.
In this case, a load circuit cell 57 having an I / V conversion function is provided at one end of each horizontal signal line 51, and the horizontal load circuit 57 is provided by the plurality of load circuit cells 57. An array 17 is formed.

Similarly, a load circuit cell 53 having an I / V conversion function is provided at one end of each vertical signal line 49, and the vertical load circuit 53 is provided by the plurality of load circuit cells 53. The array 15 is formed.

The above-mentioned vertical signal line 49 and horizontal signal line 5
The load circuit cells 53 and 57 provided in each
Thus, the current flowing through each of the vertical signal line 49 and the horizontal signal line 51 is converted into a voltage value.

The load circuit cells 53, 5 of the present invention
7 may be any circuit element as long as it has a function of converting a current into a voltage, and may be a resistor as shown in FIG. 3A, or It may be one using a transistor element.

At the other end of each vertical signal line 49 in the present invention, the total amount of current output by each photoelectric conversion cell 31 connected to each vertical signal line 49 is summed. The vertical data processing circuit cell 62 for detecting the voltage value obtained by the I / V conversion is provided, and the vertical data processing circuit 19 is formed by the plurality of vertical data processing circuit cells 62. As described above, the sum of the amounts of current output by the individual photoelectric conversion cells 31 connected to each horizontal signal line 51 is I / V converted to the other end of each horizontal signal line 51. The horizontal data processing circuit cell 63 for detecting the voltage value obtained by the above is provided and the plurality of horizontal data processing circuit cells 63 are provided.
The horizontal data processing circuit 21 is formed by.

On the other hand, the object imaging device 1 according to the present invention.
In the first embodiment, the vertical data processing circuit cells 62 and the horizontal data processing circuit cells 63 are provided with a plurality of photoelectric cells that are always connected to the corresponding vertical signal line 49 or horizontal signal line 51. Each of the conversion cells 31 is configured so that a voltage value corresponding to the sum of the amounts of light received at that time is input.

The vertical data processing circuit cells 62 and the horizontal data processing circuit cells 63 in the present invention may use a comparison circuit as shown in the figure, but the A / D It may be one that uses a conversion circuit.

Further, in the present invention, the vertical data processing circuit 19 receives the output from the individual vertical data processing circuit cells 62 and creates the movement information of the target object. Similarly, a horizontal signal determination processing circuit 67 that inputs the output from the individual horizontal data processing circuit cells 63 and creates movement information of the target object is provided to the horizontal data processing circuit 21. The provision is also desirable.

The vertical signal determination processing circuit 61 and the horizontal signal determination processing circuit 67 in the present invention are the voltages output from each of the plurality of vertical data processing circuit cells 62 or the plurality of horizontal data processing circuit cells 63. It is desirable that the waveform is recorded in time series.

On the other hand, the object imaging device 1 according to the present invention.
In 1, the output processing circuit 23 identifies the moving direction of the target object or the shape of the target object from the time-series voltage waveform information output from the vertical signal determination processing circuit 61 and the horizontal signal determination processing circuit 67. And has a function of outputting the identification information from the output terminal 25. For example, the voltage waveform profile constantly output from the vertical signal determination processing circuit 61 and the horizontal signal determination processing circuit 67 is time-series. It is recorded, and the result is compared and judged with reference information in which a predetermined moving direction or a predetermined shape is stored in advance,
It may be configured to identify the moving direction of the target object or its shape.

The photoelectric conversion cell 31 according to the present invention and the object image pickup device 11 using the photoelectric conversion cell are described below.
A more detailed specific example of the configuration and its driving method will be described.

Now, the photoelectric conversion cell array 31 of the present invention has three photoelectric conversion cells 31 as shown in FIG.
The photoelectric conversion cells 31 are arranged in a matrix of 3 rows and 3 columns.
The vertical signal lines 49 are commonly connected to each row, and the vertical signal lines 49a, 49b, and 49c are connected to the vertical load circuit array 15 and the vertical data processing circuit 19, respectively.

Further, it is assumed that the above-mentioned I / V conversion control means and amplifier control means are both composed of MOS transistors.

Further, the horizontal signal line 51 of each photoelectric conversion cell 31
Are commonly connected for each column, and each horizontal signal line 51a, 51
b and 51c are connected to the horizontal load circuit array 17 and the horizontal data processing circuit 21, respectively.

Further, the VR terminal 35 of each photoelectric conversion cell 31.
Although not shown in detail in FIG. 3A, they are commonly connected to all the photoelectric conversion cells 31 and connected to the control circuit 27.

Similarly, the VM terminal 37 of each photoelectric conversion cell 31.
Although not shown in detail in FIG. 3A, they are commonly connected to all the photoelectric conversion cells 31 and connected to the control circuit 27.

The vertical load circuit array 15 is composed of as many vertical load circuit cells 53 as there are photoelectric conversion cells 31 forming the photoelectric conversion cell array 13 in the row direction.
In this embodiment, a resistance element is used as an example of the vertical load circuit cell 53, but the vertical load circuit cell 53 may be formed using a MOS transistor or the like.

Similarly, the horizontal load circuit array 17 is composed of as many horizontal load circuit cells 57 as there are photoelectric conversion cells 31 forming the photoelectric conversion cell array 13 in the column direction.
In this embodiment, a resistance element is used as an example of the horizontal load circuit cell 57, but the horizontal load circuit cell 57 may be formed using a MOS transistor or the like. Also, the load resistance value of the vertical load circuit cell 53 and the horizontal load circuit cell 57
The load resistance values of are the same.

One end of each vertical load circuit cell 53 is connected to each vertical signal line 49a, 49b, 4 of the photoelectric conversion cell array 13.
9c, one end of each horizontal load circuit cell 57 is connected to each horizontal signal line 51a, 51 of the photoelectric conversion cell array 13.
b and 51c respectively.

The other terminal of each vertical load circuit cell 53 is commonly connected in the vertical load circuit array 15 and connected to the load reference voltage line 55, and each horizontal load circuit cell 57 is connected.
The other terminal is connected in common in the horizontal load circuit array 17 and connected to the load reference voltage line 55. The load reference voltage line 55 is connected to the control circuit 27.

The vertical data processing circuit 19 is composed of the vertical comparator circuit cells 62 and the vertical signal determination processing circuits 61, the number of which is the same as the number of photoelectric conversion cells 31 forming the photoelectric conversion cell array 13 in the row direction. One input terminal of each vertical comparator circuit cell 62 is connected to each of the vertical signal lines 49a, 49b, 49c of the photoelectric conversion cell 31, and the other terminal of each vertical comparator circuit cell 62 is all vertical comparator circuit cells 62. They are commonly connected and connected to the control circuit 27 as the comparator reference voltage line 73.

Each vertical comparator circuit cell output 59a, 59b, 59 of each vertical comparator circuit cell 62
c is a vertical signal determination processing circuit 6 composed of a logic circuit
1, the vertical signal determination processing circuit output 69 of the vertical signal determination processing circuit 61 is further connected to the output processing circuit 23.

The horizontal data processing circuit 21 is composed of horizontal comparator circuit cells 63 and horizontal signal determination processing circuits 67, the number of which is the same as the number of photoelectric conversion cells 31 forming the photoelectric conversion cell array 13 in the column direction.

One input terminal of each horizontal comparator circuit cell 63 is connected to the horizontal signal lines 51a, 51 of the photoelectric conversion cell 31.
b and 51c, and the other terminal of each horizontal comparator circuit cell 63 is commonly connected to all the horizontal comparator circuit cells 63.
3 is connected to the control circuit 27.

Then, the horizontal comparator circuit cell outputs 65a, 65b, 65 of the horizontal comparator circuit cells 63, respectively.
c is a horizontal signal determination processing circuit 6 composed of a logic circuit
7, and the horizontal signal determination processing circuit output 71 of the horizontal signal determination processing circuit 67 is connected to the output processing circuit 23.

Further, unlike the above-mentioned specific case, in the present invention, when the plurality of photoelectric conversion cells 31 forming the photoelectric conversion cell array 13 have different numbers of arrays in the vertical direction and the horizontal direction, respectively. A structural example is shown in FIG.

In the above specific example, the basic configuration is as shown in FIG.
Although the configuration is substantially the same as that shown in (A), it is necessary to arrange the load reference voltage line 55 and the comparator reference voltage line 73 as separate systems, respectively. Therefore, the load reference voltage line 55-1 and the load reference voltage line 55-2 and comparator reference voltage line 73-1 and comparator reference voltage line 73-2
And will be provided separately.

Next, the driving method and operating principle of the MOS type image pickup device 11 shown in FIG. 3 will be described with reference to FIGS. 4 and 5.

That is, to the VR terminals 35 of all the photoelectric conversion cells 31, a constant voltage value Vr75 equal to or less than the power supply voltage is applied from the control circuit 27, and VM
A constant voltage value Vm77 is applied to the terminal 37 from the control circuit 27.

The constant voltage value Vm77 is set to a voltage at which the I / V conversion MOS transistor 33 operates to convert the current flowing in the photodiode 39 into a voltage with a logarithmic output characteristic in the weak inversion state.

Then, when the MOS type image pickup device 11 is powered on or when image pickup is started, a reset time 79
Only during the period, the reset operation is performed to lower the voltage of the VR terminal 35 from the constant voltage Vr75 to the ground potential. This reset operation does not need to be performed because the reset state naturally occurs when the power source of the MOS type image pickup device 11 is turned on, but it is performed to ensure the operation.

As described above, the constant voltage Vr is applied to the VR terminal 35.
75, and by applying a constant voltage Vm77 to the VM terminal 37, the I / V conversion MOS transistor 33 converts the current flowing in the photodiode 39 into a logarithmic voltage,
This voltage is applied to the gates S1 and S2 of the first amplifier transistor 43 and the second amplifier transistor 45, respectively.
And the current flowing through the first amplifier transistor 43 is I / V converted by the horizontal load circuit array 17 and input as an output voltage of the photoelectric conversion cell 31 to the horizontal data processing circuit 21 from the horizontal signal line 51.

Similarly, the current flowing through the second amplifier transistor 45 is I / V converted by the vertical load circuit array 15 and output as the output voltage of the photoelectric conversion cell 31 to the vertical signal line 4.
Input to the vertical data processing circuit 19 from 9.

FIG. 5 shows the illuminance of the light receiving surface of the photodiode 39 of one photoelectric conversion cell 31 and the vertical load circuit cell 5
The output voltage value of the photoelectric conversion cell 31 which is I / V converted by 3 and appears on the vertical signal line 49, and the output voltage value of the photoelectric conversion cell 31 which is I / V converted by the horizontal load circuit cell 57 and appears on the horizontal signal line 51. The relationship is shown in the graph.

Here, the transistor sizes of the first amplifier MOS transistor 43 and the second amplifier MOS transistor 45 are the same, and the load resistance value of the vertical load circuit cell 53 and the load resistance value of the horizontal load circuit cell 57 are the same. Vertical load circuit array 15 and horizontal load circuit array 17 having the same value
Since the load reference power source connected to the same is the same, the output voltage of the photoelectric conversion cell 31 appearing on the vertical signal line 49 and the horizontal signal line 51 has the same voltage value.

As shown in FIG. 5, the photoelectric conversion cell 31
When the first amplifier MOS transistor 4 is irradiated with light, the photocurrent flowing through the photodiode 39 increases.
3 and the gate potential of the second amplifier MOS transistor 45 decreases, and the first amplifier MOS transistor 43
Then, no current flows in the second amplifier MOS transistor 45, and as a result, the output voltage of the photoelectric conversion cell 31 becomes high.

When the photoelectric conversion cell 31 is not irradiated with light, the photocurrent flowing through the photodiode 39 is small, the gate potentials of the first amplifier MOS transistor 43 and the second amplifier MOS transistor 45 rise, and 1
The current flows through the amplifier MOS transistor 43 and the second amplifier MOS transistor 45, and as a result, the output voltage of the photoelectric conversion cell 31 becomes high.

That is, in the photoelectric conversion cell 31 irradiated with light, the photoelectric conversion cell 31 passes through the first amplifier MOS transistor 43 and the second amplifier MOS transistor 45.
In the photoelectric conversion cell 31 in which no current flows and light is not irradiated, the photoelectric conversion cell 31 is connected via the first amplifier MOS transistor 43 and the second amplifier MOS transistor 45.
An electric current flows.

Since the MOS type solid-state image pickup device 11 of the present invention is set and operates as described above, each photoelectric conversion cell 31 constituting the photoelectric conversion cell array 13 of the MOS type solid-state image pickup device 11 is reset once. After that, the logarithmic operation is started, and it is not necessary to reset thereafter. And each photoelectric conversion cell 31 is a photoelectric conversion cell 31 that responds to illuminance.
A current flows and the output voltage of the vertical signal line 49 and the horizontal signal line 51 continues to change.

Next, the operation when an image is actually taken will be described. The photoelectric conversion cells 31 are commonly connected to each row and each column by a vertical signal line 49 and a horizontal signal line 51. Therefore, the first of the plurality of photoelectric conversion cells 31 connected to each column is
The current value obtained by adding the currents flowing through the amplifier MOS transistor 43 of FIG. 6 flows to the horizontal load circuit cell 57, is I / V converted, appears as a voltage value on the horizontal signal line 51, and is input to the horizontal data processing circuit 21.

Similarly, the current value obtained by adding the currents flowing through the second amplifier MOS transistors 45 of the plurality of photoelectric conversion cells 31 connected to each row flows to the vertical load circuit cell 53 and is I / V converted to generate a vertical signal. The voltage value appears on the line 49 and is input to the vertical data processing circuit 19.

That is, when all the photoelectric conversion cells 31 constituting the photoelectric conversion cell array 13 are irradiated with light, no current flows in each photoelectric conversion cell 31 and each vertical signal line 49,
As the potential of each horizontal signal line 51, a voltage close to the voltage value applied to the load reference voltage line 55 appears.

When some of the photoelectric conversion cells 31 constituting the photoelectric conversion cell array 13 are irradiated with light, the photoelectric conversion cells 31 connected to each column and each row are not irradiated with light. Since the total current of the numbers flows in each vertical load circuit cell 53 and each horizontal load circuit cell 57,
As the potential of each vertical signal line 49 and each horizontal signal line 51, a voltage lower than the voltage value applied to the load reference voltage line 55 appears.

A concrete example of the above operation is shown in FIG.
This will be described with reference to FIG. 6b. FIG. 6A shows a rectangular object that is long in the vertical direction, moving from left to right on the photoelectric conversion cell array 13. Black shadow is photoelectric conversion cell array 1
Vertically above 3, this shadow moves from left to right.

In FIG. 6b, a change in voltage of the vertical signal lines 49a, 49b and 49c when the rectangular object which is long in the vertical direction moves from the left to the right on the photoelectric conversion cell array 13 and the horizontal signal line line 51a, 51b and 51c voltage change, vertical comparator circuit cell output 59a of vertical data processing circuit 19a, 59b and 59c voltage change, horizontal data processing circuit 21 horizontal comparator circuit cell output 65
The voltage changes of a, 65b, and 65c are shown, and the horizontal axis shows time.

That is, at time T1, the object is the photoelectric conversion cell 3
1 (1,1), (2,1), (3,1), and at time T2, the object is the photoelectric conversion cells 31 (1,2), (2,2).
2), (3, 2), and the object is on the photoelectric conversion cells 31 (1, 3), (2, 3), (3, 3) at time T3. Note that time T0 is a time when the object has not yet appeared on the photoelectric conversion cell array 13, and time T4 is a time when the object has passed the photoelectric conversion cell array 13.

First, at time T0, a rectangular object which is long in the vertical direction has not yet appeared on the photoelectric conversion cell array 13, and all the photoelectric conversion cells 31 of the photoelectric conversion cell array 13 are irradiated with light. Lines 51a, 51b, 51
The first amplifier MOS transistor 43 of each of the three photoelectric conversion cells 31 connected to c and each vertical signal line 49
MO for second amplifier connected to a, 49b, 49c
No current flows through the S-transistor 45, and each vertical signal line 4
9a, 49b, 49c and respective horizontal signal lines 51a, 51b,
The potential level of 51c becomes a high level close to the voltage value applied to the load reference voltage line 55. Therefore, the vertical comparator circuit cell outputs 59a, 59b, 59c and the horizontal comparator circuit cell outputs 65a, 65b, 65c are at the high level.

Then, a rectangular object which is long in the vertical direction appears on the photoelectric conversion cell array 13 and moves from left to right with time in all the vertical signal lines 49a, 49b ,.
Since the two photoelectric conversion cells 31 connected to 49c are irradiated with light and one photoelectric conversion cell 31 is not irradiated with light, each vertical load circuit cell 53 has a second photoelectric conversion cell 31 Since the value of the current flowing through the amplifier MOS transistor 45 of the above, the vertical signal lines 49a, 49b,
The output voltage of 49c drops a little and the voltage values are equal, and the voltage value does not change with time. Therefore, the vertical comparator circuit cell outputs 59a, 59b, 59c of the vertical data processing circuit 19 remain at the high level during the movement of the vertically long rectangular object on the photoelectric conversion cell array 13 from left to right.

On the other hand, the horizontal signal lines 63a, 63b, 63c
Since a rectangular object that is long in the vertical direction moves from left to right with time, at time T1, the photoelectric conversion cell 31 (1,
Shadows are created on all three of 1), (2,1) and (3,1),
The total current value flowing in each first amplifier MOS transistor 43 of the three photoelectric conversion cells 31 is the horizontal load connected to the photoelectric conversion cells 31 (1, 1), (2, 1), (3, 1). Since it flows into the circuit cell 57, the horizontal signal line 63a
Output voltage drops significantly.

The horizontal comparator circuit cell output 65a of the horizontal data processing circuit 21 becomes low level. However, the photoelectric conversion cells 31 (1, 2), (2, 2), (3,
2) and photoelectric conversion cells 31 (1, 3), (2, 3),
(3, 3) is irradiated with light, and this photoelectric conversion cell 31
(1,2), (2,2), (3,2) and photoelectric conversion cell 3
Since almost no current flows in each horizontal load circuit cell 57 connected to 1 (1, 3), (2, 3), (3, 3), the potentials of the horizontal signal lines 63b and 63c are almost lowered. Instead, the horizontal comparator circuit cell outputs 65b and 65c of the horizontal data processing circuit 21 become high level.

As a result, at time T2, the horizontal comparator circuit cell output 65b of the horizontal data processing circuit 21 becomes low level and the horizontal comparator circuit cell outputs 65a and 65 are output.
c becomes Hibel. Then, at time T3, the horizontal comparator circuit cell output 65c of the horizontal data processing circuit 21 becomes low level, and the horizontal comparator circuit cell output 65b,
65c becomes a Hibel.

As described above, when the vertically long rectangular object moves from left to right with time, the vertical comparator circuit cell outputs 59a, 59 of the vertical data processing circuit 19 are outputted.
b and 59c remain at the high level and do not change, but the horizontal comparator circuit cell output 65 of the horizontal data processing circuit 21
a, 65b, and 65c change from high level to low level and then to high level in the order of 65a, 65b, and 65c.

When a vertically long rectangular object moves from right to left contrary to the above with time, the vertical comparator circuit cell output 59a of the vertical data processing circuit 19,
59b and 59c remain at the high level and do not change, but the horizontal comparator circuit cell output 6 of the horizontal data processing circuit 21
5a, 65b, and 65c change from high level to low level and then to high level in the order of 65c, 65b, and 65a.

The vertical comparator circuit cell outputs 59a, 59b and 59c of the vertical data processing circuit 19 remain unchanged at the high level and the horizontal comparator circuit cell outputs 65a, 65b and 65c of the horizontal data processing circuit 21.
Voltage of 65a, 65b, 65c in this order or 65
The vertical signal determination processing circuit 61, the horizontal signal determination processing circuit 67, and the output processing circuit 23 determine whether the high level changes to the low level or the high level in the order of c, 65b, and 65a. It is possible to determine whether the rectangular object is moving from left to right or right to left over time.

Next, description will be made with reference to FIGS. 7a and 7b.
FIG. 7A shows that a rectangular object that is long in the lateral direction has moved on the photoelectric conversion cell array 13 from top to bottom. A black shadow is formed in the lateral direction on the photoelectric conversion cell array 13, and this shadow moves from top to bottom.

In FIG. 7b, when the rectangular object which is long in the horizontal direction moves from the upper side to the lower side on the photoelectric conversion cell array 13, the voltage change of the vertical signal lines 49a, 49b and 49c and the horizontal signal line line 51a, 51b and 51c voltage change, vertical comparator circuit cell output 59a of vertical data processing circuit 19a, 59b and 59c voltage change, horizontal data processing circuit 21 horizontal comparator circuit cell output 65
It shows the voltage changes of a, 65b, and 65c, and the horizontal axis shows time.

At time T1, the object is the photoelectric conversion cell 31.
On (1,1), (1,2), (1,3), at time T
In 2, the object is a photoelectric conversion cell 31 (2, 1), (2,
2), (2, 3), and the object is on the photoelectric conversion cells 31 (3, 1), (3, 2), (3, 3) at time T3. Note that time T0 is a time when the object has not yet appeared on the photoelectric conversion cell array 13, and time T4 is a time when the object has passed the photoelectric conversion cell array 13.

First, at time T0, a rectangular object that is long in the horizontal direction has not yet appeared on the photoelectric conversion cell array 13, and all the photoelectric conversion cells 31 of the photoelectric conversion cell array 13 are irradiated with light. Lines 51a, 51b, 51
The first amplifier MOS transistor 43 of each of the three photoelectric conversion cells 31 connected to c and each vertical signal line 49
MO for second amplifier connected to a, 49b, 49c
No current flows through the S-transistor 45, and each vertical signal line 4
9a, 49b, 49c and respective horizontal signal lines 51a, 51b,
The potential level of 51c becomes a high level close to the voltage value applied to the load reference voltage line 55. Therefore, the vertical comparator circuit cell outputs 59a, 59b, 59c and the horizontal comparator circuit cell outputs 65a, 65b, 65c are at the high level.

Then, a horizontally long rectangular object appears on the photoelectric conversion cell array 13 and moves from top to bottom with time. In each of the horizontal signal lines 51a, 51b,
Since the two photoelectric conversion cells 31 connected to 51c are irradiated with light and one photoelectric conversion cell 31 is not irradiated with light, each horizontal load circuit cell 57 has a first photoelectric conversion cell 31 Since the value of the current flowing through the amplifier MOS transistor 43 of FIG.
The output voltage of 1c drops a little and the voltage values are equal, and the voltage value does not change with time. Therefore, the horizontal comparator circuit cell outputs 65a, 65b, and 65c of the horizontal data processing circuit 21 do not change and remain at the high level during the entire movement of the horizontally long rectangular object from the top to the bottom on the photoelectric conversion cell array 13.

On the other hand, the vertical signal lines 59a, 59b, 59c
Since a rectangular object that is long in the lateral direction moves from top to bottom with time, at time T1, the photoelectric conversion cell 31 (1,
1), (1, 2), and (1, 3) all have a shadow, and the total current value flowing in each first amplifier MOS transistor 43 of the three photoelectric conversion cells 31 is the photoelectric conversion cell 3
1 (1, 1), (1, 2), because it flows to the vertical load circuit cell 53 connected to (1, 3), the output voltage of the vertical signal line 49a is greatly reduced.

Then, the vertical comparator circuit output cell 59a of the vertical data processing circuit 19 becomes low level. However, the photoelectric conversion cells 31 (2, 1), (2, 2), (2,
3) and photoelectric conversion cells 31 (3, 1), (3, 2),
(3, 3) is irradiated with light, and this photoelectric conversion cell 31
(2,1), (2,2), (2,3) and photoelectric conversion cell 3
1 (3,1), (3,2), (3,3) connected to each vertical load circuit cell 53, almost no current flows, so the potentials of the vertical signal line 49b and the vertical signal line 49c almost drop. First, the vertical comparator circuit cell outputs 59b and 59c of the vertical data processing circuit 19 become high level.

As a result, at time T2, the vertical comparator circuit cell output 59b of the vertical data processing circuit 19 becomes low level, and the vertical comparator circuit cell outputs 59a, 59.
c becomes Hibel. At time T3, the vertical comparator circuit cell output 59c of the vertical data processing circuit 19 becomes low level, and the vertical comparator circuit cell output 59b,
59c becomes a Hibel.

As described above, when the horizontally long rectangular object moves from top to bottom with time, the vertical comparator circuit cell outputs 65a and 65 of the horizontal data processing circuit 21 are output.
b and 65c remain at the high level and do not change, but the vertical comparator circuit cell output 59 of the vertical data processing circuit 19
a, 59b, and 59c change from high level to low level and then to high level in the order of 59a, 59b, and 59c.

When a horizontally long rectangular object moves from the bottom to the top with time, contrary to the above, the horizontal comparator circuit cell output line 65 of the horizontal data processing circuit 21.
a, 65b and 65c remain at high level, but
The vertical comparator circuit cell outputs 59a, 59b, 59c of the vertical data processing circuit 19 are changed from the high level to the 10th level in the order of 59c, 59b, 59a, and also become the high level.

The horizontal comparator circuit cell outputs 65a, 65b, 65c of the horizontal data processing circuit 21 remain at the high level, and the vertical comparator circuit cell outputs 59a, 59b, 59c of the vertical data processing circuit 19 remain unchanged.
Voltage is 59a, 59b, 59c in this order or 59
The vertical signal determination processing circuit 61, the horizontal signal determination processing circuit 67, and the output processing circuit 23 determine whether the high level changes to the low level or the high level in the order of c, 59b, and 59a. It is possible to determine whether the rectangular object is moving from top to bottom or from bottom to top with time.

In the above description, the slender moving subject is described as moving left and right and up and down. However, the slender moving subject moves diagonally downward from upper left to lower right and diagonally upward from lower right to upper left. With respect to the movement of, it is possible to detect the movement direction according to the same principle as described above.

Further, in the above description, an elongated subject has been described in order to facilitate understanding of the operation principle, but the shape of the subject is a square, and even a circle can detect the moving direction.

That is, in the present invention, the voltage waveform diagram in which the voltage values which are continuously and continuously output to the vertical signal line 49 and the discussion horizontal signal line 51 are recorded in time series is preliminarily specified as the movement pattern. Is compared with the combined reference pattern information of the voltage waveform charts shown in FIG.

8 to 10 show specific examples in which the shape of a specific object is identified by the object imaging device 11, and the principle is substantially the same as the above-mentioned principle. Is.

That is, when an object having a shape as shown in FIGS. 8a to 10a is placed on the photoelectric conversion cell array 31 of the object image pickup device 11, the photoelectric conversion cell 31 in the part where the object is present is exposed to light. Is irradiated, and the photoelectric conversion cells 31 corresponding to the parts where there is no object are irradiated with light. Therefore, as shown in FIGS. 8b to 10b, the current values output from the photoelectric conversion cells are changed. Since the voltage waveforms on the vertical signal lines 49 and the horizontal signal lines 51 indicating the total show respective unique patterns, the pattern is compared with a reference pattern corresponding to the shape of each object stored in advance, and It is possible to identify the shape of.

Therefore, in the object imaging device 11 of the present invention, the image data is not acquired by selecting the photoelectric conversion cells forming the photoelectric conversion element cell array one by one,
The data of all photoelectric conversion cells can be simultaneously and collectively read in the horizontal and vertical directions, and further, the read operation is continuously performed without resetting, accumulating, and reading frame by frame. Therefore, a horizontal drive circuit, a vertical drive circuit, an analog / digital conversion circuit, and a related storage circuit, which are used in the conventional MOS type solid-state image pickup device, are unnecessary, and therefore the circuit configuration is simplified and Since the size can be reduced, the manufacturing cost can be significantly reduced.

As an example of the driving method of the object image pickup device 11 in the present invention, for example, in the photoelectric conversion cell which constitutes the photoelectric conversion cell array in the object image pickup device in the above-mentioned present invention. While applying a constant voltage to the control terminal of each of the I / V conversion control means,
A reset signal is input to one reset terminal in the I / V conversion control means, and then the vertical signal determination processing circuit in the vertical data processing circuit is connected to each vertical signal line. The horizontal signal determination processing circuit in the horizontal data processing circuit stores the voltage values constantly output from the individual vertical data processing circuit cells in time series, and the horizontal signal determination processing circuit in the horizontal data processing circuit is connected to each vertical signal line. The voltage value constantly output from the vertical data processing circuit cell is stored as a voltage waveform in time series, and then the vertical signal line and the horizontal signal obtained from the vertical signal determination processing circuit and the horizontal signal determination processing circuit, respectively. The moving direction of the object to be measured or the object to be measured which has moved on the photoelectric conversion cell array or is present on the photoelectric conversion cell array from the voltage waveform on the signal line It is intended to operate so as to identify the shape.

[0128]

As described above, since the present invention adopts the above-mentioned technical configuration, it does not require a scan processing circuit, an analog / digital conversion circuit, a sequential reading, a writing circuit, etc., and is simple. And an object imaging device using a miniaturized photoelectric conversion cell array capable of surely and immediately determining the moving direction of a predetermined object to be detected or recognizing the shape of the object. A suitable photoelectric conversion cell can be easily obtained.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an example of a configuration of a photoelectric conversion cell of the present invention.

FIG. 2 is a block diagram showing a configuration of a specific example of an object imaging apparatus according to the present invention.

FIG. 3 is a block diagram showing a detailed configuration of a specific example of the object imaging apparatus according to the present invention.

FIG. 4 is a timing diagram illustrating a driving method of the object imaging device according to the present invention.

FIG. 5 is a diagram for explaining characteristics of photoelectric conversion cells of a MOS type solid-state image pickup device used in the present invention.

FIG. 6 is a diagram illustrating a detection method when an object moves left and right in the object imaging device of the present invention.

FIG. 7 is a diagram illustrating a detection method when an object moves up and down in the object imaging device of the present invention.

FIG. 8 is a diagram illustrating a detection method when the shape of an object in the object imaging device of the present invention is a square shape.

FIG. 9 is a diagram illustrating a detection method when the shape of an object in the object imaging device of the present invention is a U-shape.

FIG. 10 is a diagram illustrating a detection method when the shape of an object is an inverted U-shape in the object imaging device of the present invention.

FIG. 11 is a block circuit diagram of a conventional MOS solid-state imaging device.

FIG. 12 is a diagram illustrating a photoelectric conversion cell configuration of a conventional MOS solid-state imaging device.

FIG. 13 is a timing diagram illustrating a driving method of a conventional MOS solid-state imaging device.

FIG. 14 is a block diagram showing an example of an apparatus for comparing image data using a conventional MOS solid-state imaging device.

[Explanation of symbols]

11 Object imaging device 13 Photoelectric conversion cell array 15 Vertical load circuit array 17 Horizontal load circuit array 19 Vertical data processing circuit 21. Horizontal data processing circuit 23. Output processing circuit 25. Output signal terminal 27. Control circuit 31 Photoelectric conversion cell 33 I / V conversion control means 39 photodiode 43 First amplifier control means 45 Second amplifier control means 49 Vertical signal line 51 Horizontal signal line 53, 57 load circuit cell 61 Vertical signal determination processing circuit 62 Vertical data processing circuit cell 63 Horizontal data processing circuit cell 67 Horizontal signal determination processing circuit

─────────────────────────────────────────────────── ─── Continuation of front page (51) Int.Cl. ⁷ Identification code FI theme code (reference) H01L 27/146 H01L 27/14 A (72) Inventor Nobuhiro Fueki 6 Hagadai, Haga-cho, Haga-gun, Tochigi Prefecture Honda Engineering Co., Ltd. F term (reference) 2G065 AA04 BA09 BC03 BE01 4M118 AA10 AB01 BA14 CA02 CA40 DD02 DD20 FA06 FA42 5C024 BX01 GX01 GY31 HX02

Claims (25)

[Claims] 1. One photodiode, one I / V
A photoelectric conversion cell for a photoelectric conversion cell array, comprising a conversion control means and two amplifier control means which are independently connected to each other and connected to the photodiode. 2. One photodiode, each control terminal is connected to a first terminal of the photodiode, and each first output terminal is connected to a grounded second terminal of the photodiode. First and second amplifier control means, which are connected to each other, and whose second output terminals are individually connected to different signal lines from either the vertical signal line or the horizontal signal line of the photoelectric conversion cell array. And the I / V conversion control means connected to the first terminal of the photodiode, and the photoelectric conversion cell according to claim 1. 3. The control means for the first and second amplifiers,
The photoelectric conversion cells according to claim 1 or 2, wherein the photoelectric conversion cells have the same size. 4. The I / V conversion control means has a function of converting a photocurrent flowing through the photodiode into a voltage with a logarithmic output characteristic. The photoelectric conversion cell described in 1. 5. A second output terminal of the first amplifier control means is connected to one of a vertical signal line and a horizontal signal line of the photoelectric conversion cell array, and the second output terminal of the second amplifier control means is connected. The photoelectric conversion cell according to any one of claims 1 to 4, wherein the second output terminal is connected to one of a horizontal signal line and a vertical signal line of the photoelectric conversion cell array. 6. The amount of light is responsive to the amount of light applied to the photodiode from the second output terminals of both of the first and second amplifier control means. The photoelectric conversion cell according to claim 5, wherein the same amount of current is simultaneously and constantly output. 7. The first and second amplifier control means include:
7. The photoelectric conversion cell according to claim 1, wherein each of the photoelectric conversion cells is composed of a MOS transistor. 8. The photoelectric conversion cell according to claim 7, wherein the first and second MOS transistors are formed to have the same size. 9. The photoelectric conversion cell according to claim 1, wherein the I / V conversion control means is composed of a MOS transistor. 10. One photodiode, each gate control terminal is connected to a first terminal of the photodiode, and each first output terminal is a grounded second terminal in the photodiode. And a second output terminal of each of the first and second amplifiers MO that is individually connected to a signal line different from each other on either the vertical signal line or the horizontal signal line of the photoelectric conversion cell array.
2. The photoelectric conversion cell according to claim 1, comprising an S transistor and an I / V conversion MOS transistor connected to the first terminal of the photodiode. 11. The first terminal of the photodiode, the gate of the first amplifier MOS transistor and the gate of the second amplifier MOS transistor are connected to the source terminal of the I / V conversion MOS transistor, The I
/ V conversion MOS transistor bulk, first amplifier MOS transistor source terminal and bulk, and second
11. The photoelectric conversion cell according to claim 10, wherein the source and the bulk of the amplifier MOS transistor and the second terminal of the photodiode are commonly connected and grounded. 12. A voltage of a predetermined level is input to the gate terminal of the I / V conversion MOS transistor, and a reset signal is applied to the drain terminal at a predetermined timing. The photoelectric conversion cell according to claim 11, wherein 13. A photoelectric conversion cell array in which a plurality of the photoelectric conversion cells according to claim 1 are arranged in a matrix, a vertical load circuit array connected to the photoelectric conversion cell array, and a horizontal load. A circuit array, a vertical data processing circuit, and a horizontal data processing circuit are provided, and at the same time, an output processing circuit connected to the vertical data processing circuit and the horizontal data processing circuit, the photoelectric conversion cell array, and a vertical load. An object imaging device comprising a circuit array, a horizontal load circuit array, a vertical data processing circuit, a horizontal data processing circuit, and a control circuit connected to an output processing circuit. 14. The object imaging device according to claim 13, wherein the photoelectric conversion cell array has the plurality of photoelectric conversion cells arranged in the same number in the vertical and horizontal directions. 15. In the photoelectric conversion cell, each second terminal in each first amplifier control means is commonly connected to a horizontal signal line for each column, and in each second amplifier control means. The second terminal of each of the rows is commonly connected to the vertical signal line for each row, and the control terminal in the I / V conversion control means and the reset terminal which is one output terminal are all photoelectric conversion terminals. 15. The object image pickup device according to claim 13, wherein the object image pickup devices are commonly connected by cells. 16. A load circuit cell having an I / V conversion function is provided at one end of each vertical signal line, and the load circuit cell forms a vertical load circuit array. Claim 13 thru | or 1 characterized by the above.
5. The object imaging device according to any one of 5. 17. A load circuit cell having an I / V conversion function is provided at one end of each horizontal signal line, and the load circuit cell forms a horizontal load circuit array. Claim 13 thru | or 1 characterized by the above.
5. The object imaging device according to any one of 5. 18. The other end of each of the vertical signal lines is obtained by I / V converting the total amount of current output by each photoelectric conversion cell connected to each of the vertical signal lines. 18. A vertical data processing circuit cell for detecting a different voltage value is provided, and the vertical data processing circuit is formed by the plurality of vertical data processing circuit cells. Object imaging device. 19. The other end of each of the horizontal signal lines is obtained by I / V converting the total amount of current output by each photoelectric conversion cell connected to each of the horizontal signal lines. 18. A horizontal data processing circuit cell for detecting a different voltage value is provided, and a horizontal data processing circuit is formed by the plurality of horizontal data processing circuit cells. Object imaging device. 20. In each of the vertical data processing circuit cells and in each of the output processing circuit cells, each of a plurality of photoelectric conversion cells connected to a corresponding vertical signal line or horizontal signal line is always provided. 20. The object image pickup device according to claim 13, wherein a voltage value corresponding to a total amount of light received at a time point is input. 21. The vertical data processing circuit is further provided with a vertical signal determination processing circuit for inputting outputs from the individual vertical data processing circuit cells and creating movement information of a target object. The object imaging device according to any one of claims 13 to 20. 22. The horizontal data processing circuit is further provided with a horizontal signal determination processing circuit for inputting outputs from the individual horizontal data processing circuit cells and creating movement information of a target object. The object imaging device according to any one of claims 13 to 20. 23. The vertical signal determination processing circuit and the horizontal signal determination processing circuit record a voltage waveform output from each of the plurality of vertical data processing circuit cells or the plurality of horizontal data processing circuit cells in time series. 23. The object imaging device according to claim 21, wherein the object imaging device is configured to 24. The output processing circuit identifies the moving direction of the target object or the shape of the target object from the time-series voltage waveform information output from the vertical signal determination processing circuit and the horizontal signal determination processing circuit, and The object imaging device according to any one of claims 13 to 23, which has a function of outputting identification information. 25. The object image pickup device according to any one of claims 13 to 24, wherein each of the I / V conversion control means in each photoelectric conversion cell forming the photoelectric conversion cell array. A constant voltage is applied to the control terminal, and a reset signal is input to the reset terminal, which is one of the output terminals of the I / V conversion control means, and then the vertical signal in the vertical data processing circuit. The determination processing circuit stores in time series the voltage values that are constantly output from the individual vertical data processing circuit cells connected to the individual vertical signal lines, and performs horizontal signal determination processing in the horizontal data processing circuit. The circuit stores the voltage value constantly output from the individual vertical data processing circuit cells connected to the individual vertical signal lines as a time series voltage waveform,
Then, the voltage waveforms on the vertical signal line and the horizontal signal line obtained from the vertical signal determination processing circuit and the horizontal signal determination processing circuit, respectively, are moved on the photoelectric conversion cell array or on the photoelectric conversion cell array. A method for driving an object imaging apparatus, which is configured to identify a moving direction of an existing measured object or a shape of the measured object.