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JP2002334995A5
JP2002334995A5 JP2002052794A JP2002052794A JP2002334995A5 JP 2002334995 A5 JP2002334995 A5 JP 2002334995A5 JP 2002052794 A JP2002052794 A JP 2002052794A JP 2002052794 A JP2002052794 A JP 2002052794A JP 2002334995 A5 JP2002334995 A5 JP 2002334995A5
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electrode
semiconductor film
film
semiconductor
forming
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第1絶縁膜上に、互いに分離された第1半導体膜と第2半導体膜と第3半導体膜とを形成し、前記第1半導体膜と第2半導体膜と第3半導体膜との上に第2絶縁膜を形成し、前記第1半導体膜と第2半導体膜と第3半導体膜とに対応して、第1形状の第1電極と第2電極と第3電極とを形成し、前記第1形状の第1電極と第2電極と第3電極とをマスクとして、第1ドーピング処理により前記第1半導体膜と第2半導体膜と第3半導体膜とに第1濃度の一導電型不純物領域を形成し、前記第1形状の第1電極と第2電極と第3電極とから、第2形状の第1電極と第2電極と第3電極とを形成し、第2ドーピング処理により、前記第2半導体膜に前記第2形状の第2電極と重なる第2濃度の一導電型不純物領域を形成すると共に前記第1半導体膜及び第2半導体膜に第3濃度の一導電型不純物領域を形し、第3ドーピング処理により、前記第3半導体膜に一導電型とは反対の導電型の第4不純物領域及び第5不純物領域を形成する工程を有することを特徴とする半導体装置の作製方法。A first semiconductor film, a second semiconductor film, and a third semiconductor film that are separated from each other are formed on the first insulating film, and a first semiconductor film, a second semiconductor film, and a third semiconductor film are formed on the first semiconductor film, the second semiconductor film, and the third semiconductor film. Forming two insulating films, corresponding to the first semiconductor film, the second semiconductor film, and the third semiconductor film, forming a first electrode having a first shape, a second electrode, and a third electrode; One-conductivity type impurity region having a first concentration in the first semiconductor film, the second semiconductor film, and the third semiconductor film by a first doping process using the one-shaped first electrode, second electrode, and third electrode as a mask And forming a first electrode of the second shape, a second electrode, and a third electrode from the first electrode of the first shape, the second electrode, and the third electrode. and forming a one conductivity type impurity region of the second concentration overlapped with the second electrode of the second shape in the second semiconductor layer, said first semiconductor One conductivity type impurity region of the third concentration to form formed in the film and the second semiconductor film, the third doping process, the third fourth impurity regions and the fifth opposite conductivity type to the one conductivity type into the semiconductor film A method for manufacturing a semiconductor device, including a step of forming an impurity region. 第1絶縁膜上に形成された第1半導体膜と第2半導体膜と第3半導体膜との上に第2絶縁膜を形成する工程と、前記第2絶縁膜上に第1導電膜及び第2導電膜を積層形成する工程と、第1エッチング処理により前記第1導電膜及び第2導電膜をエッチングして前記第1半導体膜と第2半導体膜と第3半導体膜とに対応して第1形状の第1電極と第2電極と第3電極とを形成する工程と、第1ドーピング処理により、前記第1半導体膜と第2半導体膜と第3半導体膜とに第1濃度の一導電型不純物領域を形成する工程と、第2エッチング処理により、前記第1形状の第1電極と第2電極と第3電極とをエッチングして、第2形状の第1電極と第2電極と第3電極とを形成する工程と、第2ドーピング処理により前記第2半導体膜に第2濃度の一導電型不純物領域を形成すると共に、前記第1半導体膜及び第2半導体膜に第3濃度の一導電型不純物領域を形成する工程と、第3ドーピング処理により、前記第3半導体膜に一導電型とは反対の導電型の第4不純物領域及び第5不純物領域を形成する工程とを特徴とする半導体装置の作製方法。Forming a second insulating film on the first semiconductor film, the second semiconductor film, and the third semiconductor film formed on the first insulating film; and a first conductive film and a second conductive film on the second insulating film; A step of stacking and forming two conductive films, and etching the first conductive film and the second conductive film by a first etching process to correspond to the first semiconductor film, the second semiconductor film, and the third semiconductor film. A step of forming a first electrode having a single shape, a second electrode, and a third electrode; and a first doping process, wherein the first semiconductor film, the second semiconductor film, and the third semiconductor film have one conductivity of a first concentration. Forming the first impurity region, and etching the first electrode, the second electrode, and the third electrode of the first shape by the second etching process, and the second electrode, the second electrode, A step of forming three electrodes and a second concentration in the second semiconductor film by a second doping process. To form the conductive type impurity region, and forming a one conductivity type impurity region of the third concentration to the first semiconductor film and the second semiconductor film, by the third doping process, one conductivity type in the third semiconductor film Forming a fourth impurity region and a fifth impurity region having a conductivity type opposite to that of the semiconductor device. 第1絶縁膜上に、互いに分離された第1半導体膜と第2半導体膜と第3半導体膜とを形成し、前記第1半導体膜上に、第1形状の第1電極を第2絶縁膜を介して形成し、前記第1半導体膜に、前記第1形状の第1電極をマスクとして、第1ドーピング処理により第1濃度の一導電型不純物領域を形成し、前記第2半導体膜及び第3半導体膜上に、第1形状の第2電極及び第3電極を、前記第2絶縁膜を介して形成し、前記第1形状の第2電極及び第3電極をエッチングして、第2形状の第2電極及び第3電極を形成し、第2ドーピング処理により、前記第2半導体膜に前記第2形状の第2電極と重なる第2濃度の一導電型不純物領域を形成すると共に前記第1半導体膜及び第2半導体膜に第3濃度の一導電型不純物領域を形し、第3ドーピング処理により、前記第3半導体膜に一導電型とは反対の導電型の第4不純物領域及び第5不純物領域を形成する工程を有することを特徴とする半導体装置の作製方法。A first semiconductor film, a second semiconductor film, and a third semiconductor film that are separated from each other are formed on the first insulating film, and a first electrode having a first shape is formed on the first semiconductor film as the second insulating film. A first conductivity type impurity region is formed in the first semiconductor film by a first doping process using the first electrode of the first shape as a mask , and the second semiconductor film and the second semiconductor film A second electrode and a third electrode having a first shape are formed on the semiconductor film through the second insulating film, and the second electrode and the third electrode having the first shape are etched to form a second shape. the second electrode and the third electrode is formed of, the second doping process, thereby forming a one conductivity type impurity region of the second concentration overlapped with the second electrode of the second shape to said second semiconductor layer, said first one conductivity type impurity region of the third concentration to form formed on one semiconductor layer and the second semiconductor film, the third dough The packaging process, a method for manufacturing a semiconductor device, wherein the the one conductivity type third semiconductor film comprising a step of forming a fourth impurity region and the fifth impurity region of opposite conductivity type. 第1絶縁膜上に形成された第1半導体膜と第2半導体膜と第3半導体膜との上に第2絶縁膜を形成する工程と、前記第2絶縁膜上に第1導電膜及び第2導電膜を積層形成する工程と、第1エッチング処理により前記第1導電膜及び第2導電膜をエッチングして前記第1半導体膜上に第1形状の第1電極を形成する工程と、第1ドーピング処理により、前記第1形状の第1電極をマスクとして前記第1半導体膜に第1濃度の一導電型不純物領域を形成する工程と、第2エッチング処理により、前記第1導電膜及び第2導電膜をエッチングして前記第2半導体膜及び第3半導体膜上に第1形状の第2電極及び第3電極を形成する工程と、第3エッチング処理により、前記第1形状の第2電極及び第3電極をエッチングして、第2形状の第2電極及び第3電極を形成する工程と、第2ドーピング処理により前記第2半導体膜に第2濃度の一導電型不純物領域を形成すると共に、前記第1半導体膜及び第2半導体膜に第3濃度の一導電型不純物領域を形成する工程と、第3ドーピング処理により、前記第3半導体膜に一導電型とは反対の導電型の第4不純物領域及び第5不純物領域を形成する工程とを特徴とする半導体装置の作製方法。Forming a second insulating film on the first semiconductor film, the second semiconductor film, and the third semiconductor film formed on the first insulating film; and a first conductive film and a second conductive film on the second insulating film; A step of forming two conductive films, a step of etching the first conductive film and the second conductive film by a first etching process to form a first electrode on the first semiconductor film, Forming a first conductivity type impurity region in the first semiconductor film using the first electrode of the first shape as a mask by a first doping process; and a second etching process to form the first conductive film and the first conductive film Etching the second conductive film to form a second electrode and a third electrode having the first shape on the second semiconductor film and the third semiconductor film; and a second electrode having the first shape by a third etching process. And the third electrode are etched to form a second electrode of the second shape and Forming a third electrode, and forming a one conductivity type impurity region of the second density in the second semiconductor film by the second doping process, the third concentration in the first semiconductor film and the second semiconductor film one A step of forming a conductive impurity region; and a step of forming a fourth impurity region and a fifth impurity region of a conductivity type opposite to the one conductivity type in the third semiconductor film by a third doping process. A method for manufacturing a semiconductor device. 請求項1乃至請求項4のいずれか一において、前記第1導電膜はTa、W、Ti、Moから選ばれた一種又は複数種と窒素との化合物で形成し、前記第2導電膜はTa、W、Ti、Moから選ばれた一種又は複数種の合金で形成することを特徴とする半導体装置の作製方法。  5. The first conductive film according to claim 1, wherein the first conductive film is formed of a compound of one or more selected from Ta, W, Ti, and Mo and nitrogen, and the second conductive film is formed of Ta. A method for manufacturing a semiconductor device, wherein the semiconductor device is formed of one or more kinds of alloys selected from W, Ti, and Mo. 請求項1乃至請求項4のいずれか一において、前記第2導電膜はシリコンを主成分とする膜で形成することを特徴とする半導体装置の作製方法。  5. The method for manufacturing a semiconductor device according to claim 1, wherein the second conductive film is formed using a film containing silicon as a main component. 請求項1乃至請求項4のいずれか一において、前記第2導電膜はアルミニウム又は銅を主成分とする膜で形成することを特徴とする半導体装置の作製方法。  5. The method for manufacturing a semiconductor device according to claim 1, wherein the second conductive film is formed using a film containing aluminum or copper as a main component.
JP2002052794A 2001-02-28 2002-02-28 Method for manufacturing semiconductor device Expired - Fee Related JP4056765B2 (en)

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JP2001056049 2001-02-28
JP2001-56049 2001-02-28
JP2002052794A JP4056765B2 (en) 2001-02-28 2002-02-28 Method for manufacturing semiconductor device

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JP2002334995A JP2002334995A (en) 2002-11-22
JP2002334995A5 true JP2002334995A5 (en) 2005-08-25
JP4056765B2 JP4056765B2 (en) 2008-03-05

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JP4175877B2 (en) * 2002-11-29 2008-11-05 株式会社半導体エネルギー研究所 Semiconductor device and manufacturing method thereof
JP5046464B2 (en) * 2002-12-18 2012-10-10 株式会社半導体エネルギー研究所 Method for manufacturing semiconductor memory element
JP4599603B2 (en) * 2003-02-12 2010-12-15 シャープ株式会社 Method for manufacturing transistor
JP4583797B2 (en) * 2004-04-14 2010-11-17 株式会社半導体エネルギー研究所 Method for manufacturing semiconductor device
JP4759314B2 (en) 2005-05-20 2011-08-31 ルネサスエレクトロニクス株式会社 Solid-state imaging device manufacturing method and solid-state imaging device

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