JP2001313624A - Receiver for ofdm packet communication - Google Patents

Abstract

PROBLEM TO BE SOLVED: To suppress the deterioration of a signal to be demodulated in the case deviation exists between the wave frequencies of a transmitting side and a receiving side in a receiver for an OFDM packet communication or in the case phase noise and thermal noise are attached to a received signal. SOLUTION: This receiver is provided with a channel estimating means 106 for estimating a channel characteristic by using each subcarrier signal, a synchronization detecting means 107 for performing synchronous detection processing of the subcarrier signal by using the estimation results and outputting a detection signal, clock frequency error estimating means 108, 110 and 111 for detecting phase rotation quantity or phase rotation accumulated quantity due to the clock frequency errors of the transmitting and receiving sides with the difference between the phase of the detection signal and the phase of a reference signal by using the detection signal and generating the phase rotation information of each subcarrier signal, and a phase rotation correcting means 109 for correcting phase rotation due to the clock frequency errors with respect to the detection signal in accordance with the clock frequency errors. A signal whose phase rotation is corrected is inputted to a discrimination decision circuit 112 and a symbol is discriminated.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an orthogonal frequency division multiplexing (O
The present invention relates to a packet communication receiver used in a digital radio communication system of the FDM (FDM) system, particularly when there is a deviation in a sampling clock frequency or a carrier frequency between a transmitter and a receiver, or phase noise or thermal noise in a received signal. The present invention relates to a receiving apparatus that demodulates an OFDM signal with high accuracy with a small processing delay without lowering the transmission efficiency even when the signal is added.

[0002]

2. Description of the Related Art The OFDM system is a type of a multicarrier system in which a high-speed signal sequence is parallelized into a plurality of signal sequences and transmission is simultaneously performed using a plurality of low-speed subcarriers. The feature is that they are arranged closest to each other. In general, when performing high-speed signal transmission using wireless communication, intersymbol interference caused by multipath propagation caused by reflection and diffraction of wireless signals causes a serious problem because transmission quality is significantly deteriorated.
However, in a multi-carrier system such as the OFDM system, even when high-speed transmission is performed, the transmission speed of each subcarrier can be reduced by parallelization.
The effect of intersymbol interference due to multipath propagation can be reduced. In addition, in the OFDM system, frequency multiplexing of each subcarrier can be easily performed in baseband using an inverse fast Fourier transform on a transmitting side, and each subcarrier can be converted from a received signal using a fast Fourier transform on a receiving side. Can be easily separated, so that a transmission / reception device can be easily realized. Further, by utilizing this, a signal obtained by cyclically expanding the inverse fast Fourier transform output on the transmission side is used as a guard interval for each OFD.
The signal is transmitted after being added to the M symbols, and a signal portion with less inter-symbol interference is FF-converted from the signal sequence of each OFDM symbol on the receiving side.
The effect of intersymbol interference can be further reduced by cutting out in the T window and performing fast Fourier transform. Furthermore, by providing a guard interval,
Even if the symbol timing, that is, the FFT window timing slightly shifts due to the influence of noise components on the receiving side, if the timing shift is within the guard interval, the signal is demodulated without receiving interference from adjacent symbols. Therefore, there is also an advantage that high-precision timing synchronization required in the case of single carrier transmission is unnecessary. For the above reasons, OF
It can be said that the DM system is suitable for high-speed signal transmission using radio.

A conventional OFDM packet communication receiving apparatus will be described with reference to FIG. In this example, it is assumed that the OFDM signal of the packet format shown in FIG. 44 is transmitted and received.

[0004] In FIG. 43, an OFDM signal received by an antenna 1 is input to a receiving circuit 2. Receiving circuit 2
Performs a reception process such as frequency conversion, filtering, quadrature detection, and AD conversion on the input OFDM signal, and outputs a complex baseband signal. Although the details of the clock frequency error will be described later, the clock frequency error information signal output from the clock frequency error detection circuit 8 is input to the receiving circuit 2. The receiving circuit 2 performs the above-described receiving process, controls the clock frequency used for AD conversion and the like based on the clock frequency error information signal for the oscillator, which is an analog component, and removes the clock frequency deviation. The complex baseband signal output from the receiving circuit 2 is input to the synchronization processing circuit 3. The synchronization processing circuit 3 detects a carrier frequency error and OFDM symbol timing using the synchronization preamble signal set at the head of the input complex baseband signal, and performs reception processing using the detected carrier frequency error information. And performs a carrier frequency error correction process on the complex baseband signal, outputs a complex baseband signal after the carrier frequency error correction process, and outputs a detected OFDM symbol timing information signal. In addition, OFDM
The detection of the symbol timing is necessary for the subsequent guard interval removing circuit 4 to remove a signal corresponding to the guard interval from the complex baseband signal and extract a signal to be input to the Fourier transform circuit 5, and the like. The signal after the carrier frequency error correction processing and the OFDM symbol timing information signal output from the synchronization processing circuit 3 are input to the guard interval removal circuit 4. The guard interval elimination circuit 4 calculates a time width obtained by subtracting the signal length corresponding to the guard interval from the length of one OFDM symbol for each OFDM symbol with respect to the input signal after the carrier frequency error correction processing in accordance with the input OFDM symbol timing information. A signal corresponding to the guard interval is removed by applying an FFT window having a window size of, and a signal input to the Fourier transform circuit 5 is extracted and output. The signal after the guard interval removal output from the guard interval removal circuit 4 is input to the Fourier transform circuit 5. The Fourier transform circuit 5 performs a fast Fourier transform on the input signal after the guard interval has been removed and extracts frequency components corresponding to each subcarrier, thereby separating each subcarrier signal at a baseband and outputting each. The Fourier transform circuit 5 performs a fast Fourier transform process for each OFDM symbol, and separates and outputs signals of each subcarrier in the OFDM symbol for each OFDM symbol. Each subcarrier signal output from the Fourier transform circuit 5 is input to the synchronous detection circuit 7 and the channel estimation circuit 6 and also to the clock frequency error detection circuit 8. The clock frequency error detection circuit 8 detects the phase rotation of each subcarrier signal caused by the frequency error of the sampling clock used in the reception processing in the reception circuit 2 from each input subcarrier signal, and detects each detected subcarrier signal. And calculates a clock frequency error between the transmitting device and the receiving device based on the phase rotation of the clock signal, and outputs clock frequency error information.

[0005] For example, when 16QAM modulation is adopted as the modulation method, the signal after the synchronous detection originally has 16 reference signal points S1 on the phase plane shown in FIG.
Appears in any position of S16. However, if there is a deviation in the sampling clock frequency or the like between the transmitting side apparatus and the receiving side apparatus, the phase of the synchronously detected detection signal is generated as described above. (For example, R1 and R2 in FIG. 45)
Are the original positions of the above-mentioned 16 reference signal points S
It does not match the position of any one of the reference signal points 1 to S16.

In practice, the clock frequency error detection circuit 8
First detects the amount of phase rotation of each subcarrier signal in the same one OFDM symbol. For example, when the input signal R1 shown in FIG. 45 is a detection signal output from the synchronous detection circuit 7, the clock frequency error detection circuit 8 outputs the reference signal point S
The phase difference φ1 between the reference signal point S3 and the input signal R1 is detected with reference to the reference signal point S3 whose position is closest to the input signal R1 among 1 to S16. When the input signal R2 shown in FIG. 45 is a detection signal output from the synchronous detection circuit 7, the clock frequency error detection circuit 8 outputs the reference signal points S1 to S1.
The phase difference φ2 between the reference signal point S6 and the input signal R2 is detected based on the reference signal point S6 whose position is closest to the input signal R2 in S16.

Here, when there is a deviation between the sampling clock frequency of the transmitting apparatus and the sampling clock frequency of the receiving apparatus, that is, when there is a clock frequency error between transmission and reception, the Fourier transform circuit 5 outputs. A brief description will be given of what phase rotation occurs in each subcarrier signal.

As described above, the guard interval removing circuit 4 removes a signal corresponding to the guard interval from each OFDM symbol by applying an FFT window using the symbol timing detected using the synchronization preamble at the head of the packet. However, if there is a clock frequency error between transmission and reception, OFD in the same packet
Even for M symbols, a difference occurs between the symbol timing of the OFDM symbol and the FFT window timing for each OFDM symbol depending on the relative temporal position of the OFDM symbol in the packet.
Therefore, the timing of the FFT window in the OFDM symbol (channel estimation OFDM symbol) corresponding to the channel estimation preamble signal near the beginning of the packet used when detecting the channel estimation result used when performing synchronous detection, Of the FFT window in the OFDM symbol of FIG. The sampling clock frequency of the transmitting device is f _TCLK , the sampling clock frequency of the receiving device is f _RCLK , and t is calculated from the OFDM symbol for channel estimation.
Assuming that the symbol timing shift of the OFDM symbol appearing after elapse of second is Δt, the following equation is established.

T · f _TCLK = (t−Δt) · f _RCLK (1)

Here, assuming that the ratio of the deviation of the sampling clock frequency between transmission and reception with respect to the standard value of the sampling clock frequency is Δx, the following equation is established.

Δx = (f _RCLK −f _TCLK ) / f _CLK (2) f _CLK : Standard value of sampling clock frequency of transmission side apparatus and reception side apparatus

From the above equations (1) and (2), the above-mentioned timing shift amount Δt is expressed by the following equation.

Δt = (f _CLK / f _RCLK ) · Δx · t (3)

Here, f _CLK ≒ f _RCLK , that is, f _CLK /
Considering that f _RCLK ≒ 1, Δt can be approximated by the following equation.

Δt ≒ Δx · t (4)

According to the above equation, when there is a deviation in the sampling clock frequency between transmission and reception, the ratio of the deviation of the sampling clock frequency between transmission and reception with respect to the standard value of the sampling clock frequency and the timing deviation of the FFT window proportional to the passage of time. It can be seen that this occurs.

The shift in the FFT window timing appears as a different phase rotation depending on the subcarrier frequency due to the basic nature of the Fourier transform in the Fourier transform circuit 5. Further, since the deviation of the timing of the FFT window increases in proportion to the passage of time, the amount of phase rotation increases with the passage of time. Here, assuming that the result of Fourier transform of a (t) is A (f), the result of Fourier transform of a (t + Δt) is expressed as A (f) · exp (j · 2π · f · Δt). be able to. Therefore, the FFT window timing in the guard interval removal circuit 4 is Δt (≒ Δx · t,
(See equation (4)), a phase rotation Δθ represented by the following equation is added to each subcarrier signal output by the Fourier transform circuit 5.

Δθ ≒ 2π · f · t · Δx (5) f: frequency offset of the subcarrier from the center frequency of the channel t: relevant OFD from the OFDM symbol for channel estimation
Elapsed time of M symbol Δx: Ratio of deviation of sampling clock frequency between transmission and reception with respect to standard value of sampling clock frequency

That is, when there is a deviation in the sampling clock frequency between transmission and reception, the time lapse of the OFDM symbol from the channel estimation OFDM symbol, that is, the time lapse of the OFDM symbol from the time of channel estimation and the center frequency of the channel Thus, a phase rotation that increases (or decreases) in proportion to the frequency offset amount of the subcarrier from is added to each subcarrier signal output from the Fourier transform circuit 5.

The clock frequency error detection circuit 8 detects a sampling clock frequency shift between transmission and reception, that is, a phase rotation caused by a clock frequency error between transmission and reception, from each subcarrier signal output from the Fourier transform circuit 5 as described above. After that, the clock frequency error information is calculated and output based on the aforementioned equation (5).

The clock frequency error information signal output from the clock frequency error detection circuit 8 is input to the receiving circuit 2. The receiving circuit 2 sends a sampling clock frequency (a sampling clock frequency of an AD converter or the like) to an internal oscillator of the receiving circuit 2 so as to remove a clock frequency error between transmission and reception based on the input clock frequency error information signal. Control).

On the other hand, in the channel estimation circuit 6, the OFDM signal of the packet has passed using the channel estimation preamble signal which is a known signal transmitted at the head of the packet among the input subcarrier signals. The state of the propagation path (channel) is estimated, and the estimated channel estimation result is output. Signals of each subcarrier undergo different amplitude and phase fluctuations due to frequency selective fading due to multipath propagation. However, since the channel estimation signal is a known signal, each subcarrier received through the propagation path is received. By comparing the signal and the known ideal signal for each subcarrier, it is possible to easily estimate how the amplitude and phase of each subcarrier are affected when passing through the propagation path. The channel estimation result of each subcarrier output from the channel estimation circuit 6 is input to the synchronous detection circuit 7 and the weighting circuit 1
1 is input. The synchronous detection circuit 7 performs processing equivalent to synchronous detection by correcting amplitude fluctuation and phase rotation caused by channel characteristics such as fading for each subcarrier using the input channel estimation result of each subcarrier, Outputs the detection signal. In the case of a high-speed packet communication system using the OFDM method, 1
Since the time length of one packet is short, the propagation path characteristics can be considered to be constant in one packet in most cases. Therefore, using the channel characteristics of each subcarrier estimated based on the channel estimation preamble signal set at the head of the packet to perform processing equivalent to synchronous detection on the subsequent data signal as described above. Can be. The detection signal output from the synchronous detection circuit 7 is input to the pilot signal phase rotation extraction circuit 10 and to the phase correction circuit 9.

The pilot signal phase rotation extraction circuit 10
From each detection signal corresponding to a pilot signal which is a known signal transmitted on at least one specific subcarrier included in the detection signal input from the synchronous detection circuit 7, a phase caused by a residual carrier frequency error and phase noise is obtained. The rotation amount information is extracted for each OFDM symbol.
Note that the phase noise is noise added to the phase component of a signal due to imperfections of an analog circuit in the transmission processing unit of the transmission device and the reception processing unit of the reception device. In addition, the residual carrier frequency error is synchronized by the incomplete carrier frequency synchronization processing performed by the influence of thermal noise added in the reception circuit 2 during the carrier frequency synchronization processing in the synchronization processing circuit 3 of the receiving apparatus. This is a frequency error that remains in the output signal of the processing circuit 3.

Here, a brief description will be given of what phase rotation occurs in each detection signal output from the synchronous detection circuit 7 when there is a residual carrier frequency and phase noise. When there is a residual carrier frequency error, the same frequency error is added to the subcarrier frequencies of all the subcarrier signals of the OFDM signal output from the synchronization processing circuit 3. Accordingly, when the channel estimation time is defined as t = 0, the phase rotation amount Δψ due to the residual carrier frequency error of each subcarrier signal is expressed by the following equation.

Δψ ≒ 2π · Δf · t (6) Δf: residual carrier frequency error amount t: time elapsed amount of the relevant OFDM symbol from the time of channel estimation

As shown in the above equation, the amount of phase rotation of each subcarrier caused by the residual carrier frequency error is common to each subcarrier, and a fixed amount of each OFDM symbol is provided for each subcarrier signal. Phase rotation will be added. On the other hand, the phase noise added to the OFDM signal in the receiving circuit 2 generally changes very slowly as compared with the OFDM symbol interval. Therefore, the phase rotation added to each OFDM signal due to the phase noise is 1 OFDM signal.
It can be assumed to be constant within the symbol period. Further, since the Fourier transform is a kind of linear transform, if the same phase rotation is added to all the input signals to the Fourier transform circuit 5, all the output signals of the Fourier transform circuit 5 are converted to the input signals. The same phase rotation as the added phase rotation will be added. Therefore, the amount of phase rotation added by the phase noise is the same for each subcarrier in the same OFDM symbol as in the case of the residual carrier frequency error. Further, as described above, since the phase noise changes very slowly as compared with the OFDM symbol interval, a change in the phase rotation amount due to the phase noise between some adjacent OFDM symbols is small.

The synchronous detection circuit 7 performs a synchronous detection process based on the channel estimation result of each subcarrier obtained using the channel estimation OFDM symbol provided at the head of the packet. In principle, correction cannot be performed for a phase rotation in which the rotation amount changes. Therefore, the synchronous detection circuit 7 outputs a detection signal in which a common phase rotation is added to each subcarrier in each OFDM symbol due to the residual carrier frequency error and the phase noise.

The aforementioned pilot signal phase rotation extraction circuit 1
0 extracts information on the amount of phase rotation caused by the residual carrier frequency error, phase noise, etc. from each detection signal corresponding to the pilot signal included in the detection signal input from the synchronous detection circuit 7 for each OFDM symbol. . The phase rotation information of each pilot signal is output from the pilot signal phase rotation extraction circuit 10, respectively. The phase rotation information of each pilot signal output from the pilot signal phase rotation extraction circuit 10 is input to a weighting circuit 11.

The weighting circuit 11 applies the phase rotation information of each pilot signal input for each OFDM symbol from the pilot signal phase rotation extraction circuit 10 based on the channel estimation result of each subcarrier input from the channel estimation circuit 6. Weighting. For example, based on the signal level information of the subcarrier corresponding to the pilot signal obtained from the channel estimation result, a large weight is applied to the phase rotation information of the pilot signal having a large signal level, and the phase rotation information of the pilot signal having a small signal level is given. Is given a small weight. When such weighting is performed, the influence of the phase rotation information of the pilot signal having a small signal level in the subsequent circuit is reduced, and the reliability of the phase rotation detection is improved. In addition, the generation of the phase rotation information signal of each pilot signal after weighting is performed, for example, such that the phase rotation amount of each input pilot signal is used as a phase component, and the signal level value of each input pilot signal is used as an amplitude component. This can be performed by generating a simple vector signal for each pilot signal. The phase rotation information signal of each pilot signal after weighting (each vector signal corresponding to each pilot signal in the above example) is 1 OF
It is output from the weighting circuit 11 for each DM symbol. The phase rotation information signal of each pilot signal after weighting output from the weighting circuit 11 is input to the intra-symbol averaging circuit 12.

The intra-symbol averaging circuit 12 applies one OFF to the phase rotation information signal of each weighted pilot signal input from the weighting circuit 11 for each OFDM symbol.
Averaging processing is performed within the DM symbol. In the above example, 1
By vector-adding vector signals corresponding to each pilot signal in an OFDM symbol, the phase rotation information signal of each pilot signal after weighting can be smoothed.
In this case, the phase of the vector obtained by adding the vectors represents the phase rotation information of each smoothed and weighted pilot signal. The amount of phase rotation of each subcarrier due to phase noise and residual carrier frequency error is 1
It is almost the same in the OFDM symbol. Therefore, 10
By smoothing the phase rotation information signal of each pilot signal in the FDM symbol, the phase rotation amount of each subcarrier such as phase noise and residual carrier frequency error of the detection signal of each subcarrier in the OFDM symbol Can be obtained with high accuracy the amount of phase rotation caused by such a factor that becomes the same within one OFDM symbol. 1 OFDM
The phase rotation information signal of each weighted pilot signal, which has been averaged in the symbol, is output from the intra-symbol averaging circuit 12 for each OFDM symbol. The phase rotation information signal of each weighted pilot signal averaged within one OFDM symbol output from the intra-symbol averaging circuit 12 is input to the moving average circuit 13.

The moving average circuit 13 performs a moving average processing in the time direction over a plurality of symbols on the phase rotation information signal of each weighted pilot signal averaged in one OFDM symbol input for each OFDM symbol. And output. By this moving average processing in the time direction,
Noise components such as thermal noise added to the signal in the receiving circuit 2 can be suppressed and reduced. The phase rotation information signal after moving average output from the moving average circuit 13 is input to the phase correction circuit 9.

The phase correction circuit 9 uses the phase-rotation information signal after moving average input from the moving average circuit 13 to calculate the phase noise and residual carrier frequency error contained in each detection signal input from the synchronous detection circuit 7. The phase rotation caused by such a factor as to make the phase rotation amount of each subcarrier the same within one OFDM symbol is corrected. The detection signal after the phase rotation correction is output from the phase correction circuit 9. Each phase-corrected detection signal output from the phase correction circuit 9 is input to the identification circuit 14.

The discrimination circuit 14 performs symbol judgment on the data signal included in each detection signal after the phase correction output from the phase correction circuit 9 and outputs the judgment result.

[0034]

As described above, when there is a difference between the sampling clock frequency used in performing the receiving process and the sampling clock frequency used in the transmitting device, synchronous detection is performed without any correction. And the phase rotation of each subcarrier signal makes it impossible for the receiving device to detect the correct phase of each subcarrier signal,
Extremely large degradation occurs. Therefore, in the conventional device,
A clock frequency error between transmission and reception is detected from each subcarrier signal after Fourier transform in the receiving device, and a sampling clock frequency commonly used in each circuit on the receiving side is subjected to analog processing based on the detected clock frequency error information. Direct sampling control removes the sampling clock frequency error between transmission and reception. However, in order to realize such control by analog processing, it was necessary to provide a correction circuit including analog processing having a very complicated configuration. In addition, because of analog processing, it is difficult to increase the correction accuracy to a certain level or more, so that there is a problem that high transmission quality cannot be obtained and a problem that power consumption increases.

On the other hand, in order to synchronously detect an OFDM packet signal when there is a difference in carrier frequency between transmission and reception,
Usually, a carrier frequency error is detected using a synchronization preamble signal provided at the head of an OFDM packet signal,
A carrier frequency error correction process is performed on the complex baseband signal after the reception process using the detected carrier frequency error information. However, in general, a noise component such as thermal noise is added to a received signal in a reception processing unit that performs frequency conversion, quadrature detection, and the like, so that a detection error occurs in the detected carrier frequency error information. Therefore, it is difficult to perform high-precision carrier frequency error correction on the received signal only by the carrier frequency error correction processing as described above, and the carrier frequency error remaining on the received signal due to the above-described detection error,
That is, the transmission quality deteriorates due to the phase rotation of each detection signal caused by the residual carrier frequency error. In order to improve the deterioration of transmission quality due to the residual carrier frequency error, the conventional apparatus detects the amount of phase rotation caused by the residual carrier frequency error of the pilot signal which is a known signal after synchronous detection, and corrects the phase rotation. I was going.

By the way, in order to detect the phase rotation amount caused by the residual carrier frequency error with high accuracy, it is necessary to accurately remove the influence of the thermal noise added by the reception processing unit. Must be detected by detecting the amount of phase rotation of the pilot signal.

However, in general, in order to maintain high frequency utilization efficiency, it is necessary to reduce the number of subcarriers used for transmitting pilot signals as much as possible. Many O
It is necessary to smooth the phase rotation amounts of a large number of pilot signals detected over the FDM symbols. In general,
Performing the time-direction smoothing process over multiple symbols in this way causes a problem that a large processing delay occurs and the throughput of the entire system decreases. Furthermore, the conventional device cannot perform sufficient smoothing on the OFDM symbol at the head of a packet due to the principle of smoothing in the time direction. Therefore, O at the beginning of the packet
There is also a problem that the phase rotation caused by the residual carrier frequency error included in each detection signal of the FDM symbol cannot be accurately corrected.

In the conventional apparatus, when correcting the phase rotation included in each subcarrier signal after synchronous detection due to residual carrier frequency error and phase noise, it is necessary to correct the phase rotation after synchronous detection corresponding to the pilot signal. The phase rotation amount of the signal is detected, weighting is performed according to the received signal level of the pilot signal, smoothing processing is performed within one OFDM symbol, and over a plurality of symbols to reduce the influence of thermal noise. In this case, the phase rotation of each subcarrier is detected by performing moving average processing in the time direction, and the phase rotation of each subcarrier signal after synchronous detection is corrected based on the detection result.

However, in an actual receiving apparatus, generally, a thermal noise is added when the received signal is analog-processed in the receiving circuit 2, and a complex baseband to which a noise component caused by the thermal noise is added from the receiving circuit 2. A signal is output. Synchronization processing circuit 3, guard interval removal circuit 4
Since the Fourier transform circuit 5 does not have a function of removing or reducing the above-mentioned noise component, if a noise component is added to the complex baseband signal output from the receiving circuit 2, the sub-output from the Fourier transform circuit 5 The signal quality of each signal for each carrier is degraded by the influence of noise components. On the other hand, among the signals for each subcarrier output from the Fourier transform circuit 5,
The state of the transmission path (channel) through which the received OFDM signal has passed is estimated for each subcarrier using only the signal corresponding to the fixed-length channel estimation preamble signal near the beginning of the packet shown in FIG. In general, in order to improve the throughput characteristics of the system, the signal length of the channel estimation preamble signal of a packet is set to be short. Therefore,
If the signal quality of each subcarrier signal output from the Fourier transform circuit 5 deteriorates due to the influence of the above-described noise component, the accuracy of the channel estimation circuit 6 in estimating the state of the transmission path (channel) also decreases due to the influence of the noise component. Become. When the channel estimation accuracy in the channel estimation circuit 6 decreases, the weight estimation circuit 11 receives the channel estimation result of each subcarrier whose accuracy has decreased, and the weighting circuit 11 uses the low-accuracy signal level information based on the low-accuracy signal level information. Thus, the phase rotation information of each pilot signal is weighted. In principle, the influence of the weighting based on the low-accuracy signal level information cannot be corrected by the intra-symbol averaging circuit 12 and the moving averaging circuit 13. Therefore, as a result, the phase rotation correction circuit 9 performs low-precision phase rotation correction, resulting in a large deterioration in transmission quality.

In order to avoid deterioration of the estimation accuracy of the transmission path (channel) state due to such thermal noise, in the conventional apparatus, the same known channel estimation preamble signal is transmitted several times near the head of the OFDM packet signal. Transmitting and averaging on the receiving side to suppress the noise component to reduce the effect of thermal noise, and to suppress the noise component by moving average processing the received channel estimation preamble signal in the frequency direction A method for reducing the influence of thermal noise is known. However, the former has a problem that the transmission efficiency, that is, the throughput is reduced because the ratio of the channel estimation preamble signal to all the signals in the packet is increased. In the latter case, since the moving average processing is performed in the frequency direction, when the fluctuation of the transmission path (channel) state for each subcarrier is large, it is not possible to follow the fluctuation. There is a problem of lowering. Therefore, it is difficult for conventional devices to perform weighting using highly accurate signal level information, and it is difficult to obtain high transmission quality.

Further, the phase component of the signal output from the intra-symbol averaging circuit 12 is mainly composed of a phase rotation component caused by phase noise, a phase rotation component caused by residual carrier frequency error, and a phase rotation component caused by thermal noise. Consists of cumulative values. Moving average circuit 13 of the conventional OFDM packet communication receiving apparatus shown in FIG. 43 reduces the phase rotation component due to thermal noise in the signal output from intra-symbol averaging circuit 12 and reduces the phase rotation component due to phase noise. It is provided for the purpose of accurately detecting a phase rotation component and a phase rotation component caused by a residual carrier frequency error. Here, consider a case in which a moving average process is performed on a certain signal over a certain period. In this case, when the amount of change of the desired signal within the period in which the moving average processing is performed is sufficiently small, it is possible to accurately detect the signal component of the desired signal while reducing the influence of thermal noise and the like. However, when the amount of change of the desired signal in the period for performing the moving average processing is large, not only the noise component but also the signal component itself of the desired signal is smoothed by the moving average processing. The signal component will be degraded due to the moving average processing. Actually, the phase rotation component caused by the phase noise hardly changes in about several OFDM symbols. Therefore, even if the moving average processing is performed, the phase rotation component caused by the phase noise hardly deteriorates. However, the cumulative value of the phase rotation component caused by the residual carrier frequency error monotonically increases (or monotonically decreases), and the increment of the cumulative value of the phase rotation component for each OFDM symbol is relatively large. When the averaging process is performed, the signal component deteriorates. Therefore, the phase rotation component due to the residual carrier frequency error in the phase averaging signal after the moving average output from the moving average circuit 13 includes a constant carrier frequency error amount and a constant proportional to the time length of the moving average period. An error will occur. Therefore,
In the conventional device, when the phase rotation of each subcarrier signal is corrected in the phase rotation correcting circuit 9 using the phase averaged information signal after the moving average output from the moving average circuit 13, the residual signal remains in the corrected signal. There is a problem in that deterioration occurs according to the carrier frequency error amount and the time length of the moving average period.

According to the present invention, in the above-described OFDM packet communication receiving apparatus, even if there is a difference between the sampling clock frequency of the transmitting apparatus and the sampling clock frequency of the receiving apparatus, the transmission quality can be improved. The purpose is to suppress deterioration and avoid complication of the circuit configuration. It is another object of the present invention to accurately demodulate an OFDM signal with a small processing delay even when there is a deviation in carrier frequency between transmission and reception or when there is phase noise. Still another object of the present invention is to suppress the deterioration of transmission quality without reducing the transmission efficiency with a simple circuit even when thermal noise is added to a received signal in a receiving device.

[0043]

According to the present invention, there is provided an OFDM packet communication receiving apparatus for achieving the above object.
Receiving means (102) for receiving a FDM signal and performing predetermined reception processing; synchronization processing means (103) for performing timing synchronization processing and carrier frequency synchronization processing on a reception signal output from the reception means; Fourier transform means (105) for separating the received signal subjected to the timing synchronization processing and the carrier frequency synchronization processing by the processing means into signals for each subcarrier using Fourier transform, and each subcarrier signal separated by the Fourier transform means Channel estimation means (106) for estimating the channel characteristics using the above-mentioned method, and synchronous detection processing for the subcarrier signals separated by the Fourier transform means using the estimation results of the channel characteristics obtained by the channel estimation means. OFDM packet including synchronous detection means (107) for outputting a detected signal In the communication communication receiver, the phase rotation amount or the phase rotation accumulated amount due to the clock frequency error between the transmission side and the reception side is determined using all or a part of the detection signals output by the synchronous detection means. The phases of the detection signals (R1, R2) and the reference signal (S
1 to S16), a clock frequency error estimating means (100) for generating phase rotation information (Δθ) of each subcarrier signal based on a clock frequency error (f _RCLK −f _TCLK ); Phase rotation correction means (109) for correcting a phase rotation due to a clock frequency error with respect to the detection signal output from the synchronous detection means based on information corresponding to the clock frequency error output from the frequency error estimation means. The output of the phase rotation correction means (109) is identified for each symbol.

A receiving apparatus for OFDM packet communication according to another embodiment of the present invention includes a receiving means for receiving an OFDM signal and performing a predetermined receiving process, a timing synchronization processing for a received signal output from the receiving means, and Synchronization processing means for performing carrier frequency synchronization processing and outputting a signal after synchronization and carrier frequency error information, and a signal subjected to timing synchronization processing and carrier frequency synchronization processing by the synchronization processing means for each subcarrier using Fourier transform. Channel estimation means for estimating a channel characteristic using each of the subcarrier signals separated by the Fourier transformation means, and a channel characteristic estimation result obtained by the channel estimation means To the subcarrier signal separated by the Fourier transform means using Synchronous detection means for performing a synchronous detection process and outputting a detection signal; and detecting a phase rotation amount due to a residual carrier frequency error of all or a part of the detection signal output from the synchronous detection means, and detecting a residual carrier frequency error. A residual carrier frequency error estimating means for generating information;
Based on the carrier frequency error information output from the synchronization processing means and the residual carrier frequency error information output from the residual carrier frequency error estimation means, the phase of the detection signal output from the synchronous detection means due to the clock frequency error A phase rotation prediction unit for predicting a rotation amount and generating phase rotation information, and a detection signal output from the synchronous detection unit is generated by a clock frequency error based on the phase rotation information output from the phase rotation prediction unit. Phase rotation correcting means for correcting phase rotation.

[0045]

(First Embodiment) An OFDM packet communication receiving apparatus according to this embodiment will be described with reference to FIG. This embodiment corresponds to claim 1.

In this embodiment, the receiving means, the synchronization processing means, the Fourier transforming means, the channel estimating means, the synchronous detecting means, the clock frequency error estimating means and the phase rotation correcting means of claim 1 are respectively composed of a receiving circuit 102, a synchronous processing circuit 103, a Fourier transform circuit 105, a channel estimation circuit 106, a synchronous detection circuit 107, a clock frequency error estimation unit 100, and a phase rotation correction circuit 109.

The OFDM signal received by the antenna 101 is input to the receiving circuit 102. The receiving circuit 102 performs receiving processing such as frequency conversion, filtering, quadrature detection, and AD conversion on the input OFDM signal. As a result of this reception processing, the reception signal is converted into a complex baseband signal by the reception circuit.
Output from 102.

The complex baseband signal output from the receiving circuit 102 is input to the synchronization processing circuit 103. The synchronization processing circuit 103 detects a carrier frequency error and a symbol timing by using a synchronization preamble signal (see FIG. 44) included in the input complex baseband signal. Then, a process for correcting the carrier frequency error is performed on the complex baseband signal input from the receiving circuit 102 using the information on the detected carrier frequency error.

The synchronization processing circuit 103 outputs a complex baseband signal in which the carrier frequency error has been corrected and information on the detected symbol timing. These signals are input to the guard interval removing circuit 104. The detection of the symbol timing is necessary to remove the guard interval existing between the symbols of the received OFDM signal and extract a valid data component from each symbol.

The guard interval elimination circuit 104 performs an FFT window process on the input complex baseband signal according to the symbol timing information input from the synchronization processing circuit 103. That is, for each OFDM symbol of the complex baseband signal, only the signal component of the time width of the FFT window is extracted, and the guard interval is removed. The time width of the FFT window is a time width obtained by subtracting a signal length corresponding to a guard interval from one OFDM symbol length.

The complex baseband signal from which the guard interval has been removed by the guard interval removing circuit 104 is input to the Fourier transform circuit 105 for each OFDM symbol. The Fourier transform circuit 105 performs a fast Fourier transform process on the input complex baseband signal for each OFDM symbol, and separates each signal component of a number of subcarriers included in the input signal.

The signals of the respective subcarriers separated by the Fourier transform circuit 105 are input to a synchronous detection circuit 107 and a channel estimation circuit 106, respectively. Channel estimation circuit 106
Indicates the state of the transmission path (channel) through which each subcarrier signal has passed using a signal component corresponding to a channel estimation preamble signal (see FIG. 44) among the input subcarrier signals. And outputs the estimation result.

By referring to the channel estimation result output from the channel estimation circuit 106, it is possible to know, for example, how the amplitude and phase of each subcarrier are affected by fading. The channel estimation result output from channel estimation circuit 106 is input to synchronous detection circuit 107.

The synchronous detection circuit 107 uses the channel estimation result input from the channel estimation circuit 106 for the complex baseband signal input from the synchronization detection circuit 107 and converts the complex baseband signal into channel characteristics such as a fading signal for each subcarrier. A process corresponding to synchronous detection is performed by correcting the resulting amplitude fluctuation and phase rotation.

The detection signal output from the synchronous detection circuit 107 is
Phase rotation correction circuit 109 and clock frequency error estimator 100
Respectively. Clock frequency error estimator 100
Is composed of a phase rotation detection circuit 108, a clock frequency error prediction circuit 110, and a phase rotation operation circuit 111.

For example, when 16QAM modulation is adopted as the modulation method, the signal after synchronous detection is originally 16 reference signal points S1 to S16 shown in FIG.
Appears in any position. However, when there is a difference between the sampling clock frequency of the transmitting device and the sampling clock frequency of the receiving device, that is, when there is a clock frequency error between transmission and reception, phase rotation occurs in the synchronously detected detection signal. Therefore, the synchronous detection circuit 10
7 (for example, R1 and R1 shown in FIG. 45).
The position 2) does not coincide with any one of the original reference signal points. The phase rotation amount of the detection signal differs for each detection signal.

The phase rotation detection circuit 108 of the clock frequency error estimating unit 100 calculates the detection signal of each subcarrier
The phase rotation amount or the phase rotation accumulated amount is detected. For example, the input signal R1 shown in FIG.
If the detection signal is output from the reference signal point 107, the phase rotation detection circuit 108 uses the reference signal point S3 whose position is closest to the input signal R1 as a reference among the reference signal points S1 to S16. The phase difference φ1 from R1 is detected.

When the input signal R2 shown in FIG. 45 is a detection signal output from the synchronous detection circuit 107, the phase rotation detection circuit 108 determines that the position of the reference signal points S1 to S16 is closest to the input signal R2. Based on the near reference signal point S6,
The phase difference φ2 between the reference signal point S6 and the input signal R2 is detected.

The amount of phase rotation caused by this clock frequency error is expressed by the above equation (5). Therefore, the phase rotation amount (Δθ) due to the clock frequency error (for example, FIG. 45)
Since the phase differences φ1 and φ2), the amount of time elapsed since the channel estimation (t), and the amount of frequency offset (f) of each subcarrier from the center frequency of the channel are all known, the following equation (5) is used. Thus, the ratio (Δx) of the deviation of the sampling clock frequency between transmission and reception with respect to the standard value of the sampling clock frequency can be calculated. further,
Since the standard value (f _CLK ) of the sampling clock frequency is known, the amount of frequency shift of the sampling clock frequency between transmission and reception (Δx) is calculated from the ratio (Δx) of the deviation of the sampling clock frequency between transmission and reception with respect to the standard value of the sampling clock frequency. f _RCLK −f _TCLK ) can also be calculated.

The clock frequency error prediction circuit 110
Using the information on the amount of phase rotation of each detection signal input from the phase rotation detection circuit 108 for each DM symbol,
Based on the equation, the ratio of the sampling clock frequency deviation between the transmission and reception with respect to the standard value of the sampling clock frequency, that is, the clock frequency deviation or the amount of the sampling clock frequency deviation between the transmission and reception, that is, the clock frequency error is calculated.

The phase rotation amount calculation circuit 111 calculates the synchronous detection circuit 10 based on the clock frequency deviation or clock frequency error predicted and calculated by the clock frequency error prediction circuit 110.
The phase rotation amount resulting from the clock frequency error of each detection signal output by 7 is calculated for each detection signal. This phase rotation amount can be obtained by the above equation (5).

The phase rotation correction circuit 109 includes a synchronous detection circuit 107
Phase detection circuit for each detection signal input from
Based on the information on the amount of phase rotation calculated in 111, a phase correction process is performed to remove the phase rotation caused by the clock frequency error.

The detection signal whose phase has been corrected by the phase rotation correction circuit 109 is input to the identification circuit 112. Identification circuit 112
Performs symbol determination on the data signal (see FIG. 44) of the input detection signal, and outputs the determination result as a demodulated output. For example, in the case of 16QAM modulation, the identification circuit 112 identifies which of the reference signal points S1 to S16 shown in FIG. 45 each detection signal corresponds to. At this time, since the phase rotation amount is corrected for each detection signal by the phase rotation correction circuit 109 before identifying which reference signal point each detection signal corresponds to, it is affected by the clock frequency shift. Signals can be identified without the need. That is, it is possible to realize highly accurate clock frequency synchronization, which is difficult to realize with the conventional device.
Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Second Embodiment) OFDM of this embodiment
The packet communication receiver will be described with reference to FIG. This embodiment corresponds to claim 2. This form is the first
It is a modification of the embodiment. In FIG. 2, elements corresponding to those of the first embodiment are denoted by the same reference numerals. The description of the same parts as those in the first embodiment will be omitted.

The clock frequency error estimator 200 shown in FIG.
Includes a weighting circuit 201, a smoothing circuit 202, a phase rotation detection circuit 203, a clock frequency error prediction circuit 110, and a phase rotation operation circuit 111.

The detection signal output from the synchronous detection circuit 107 and the channel estimation result for each subcarrier output from the channel estimation circuit 106 are input to the weighting circuit 201. The weighting circuit 201 first detects information on the amount of phase rotation from the reference signal of the detection signal input from the synchronous detection circuit 107, and then, based on the channel estimation result input from the channel estimation circuit 106, The weight information is weighted.

For example, based on the signal level information of each subcarrier obtained from the channel estimation result, a large weight is applied to the information on the amount of phase rotation detected from the detection signal of the subcarrier having a large signal level, and the signal level is small. A small weight is given to the information of the phase rotation amount detected from the detection signal of the subcarrier. When such weighting is performed, the influence of a signal having a small signal level (deteriorated signal) on the clock frequency error estimating means is reduced, so that the reliability of the clock frequency error estimation is improved.

The phase rotation amount information signal weighted by the weighting circuit 201 is input to the smoothing circuit 202.
The smoothing circuit 202 calculates a moving average in the time axis direction for each subcarrier for the weighted phase rotation amount information signal input from the weighting circuit 201, and outputs the result. That is, the smoothing circuit 202 smoothes the weighted phase rotation amount information signal. By this smoothing, it is possible to remove deterioration in signal quality due to thermal noise or the like added to the signal in the receiving circuit 102.

The phase rotation detection circuit 203 includes a weighting circuit 201
The phase rotation amount information signal which is weighted by the equation (1) and smoothed by the smoothing circuit 202 is input, and the phase rotation amount of the phase rotation generated in the detection signal due to the clock frequency error (for example, FIG.
5, φ1 and φ2) or the accumulated amount of phase rotation is detected for each detection signal.

The clock frequency error prediction circuit 110 uses the phase rotation amount or the phase rotation accumulation amount for each detection signal detected by the phase rotation detection circuit 203 to calculate the clock frequency deviation or the clock frequency based on the above equation (5). Predict the error. The phase rotation calculation circuit 111 calculates a phase rotation amount for each detection signal based on the clock frequency error of the detection signal output from the synchronous detection circuit 107 based on the clock frequency error predicted and calculated by the clock frequency error prediction circuit 110. I do. This phase rotation amount can be obtained by the above equation (5). This calculation result is applied to the phase rotation correction circuit 109.

If the communication quality differs for each subcarrier, the fading is performed by processing a signal in which the weight of the information of the amount of phase rotation detected from the detection signal of the subcarrier having good communication quality is increased as described above. And so on, the detection accuracy of the clock frequency error can be improved. In addition, by processing the phase rotation amount information signal smoothed in the time direction, the influence of thermal noise and the like can be suppressed, so that the clock frequency error can be detected with higher accuracy. That is, it is possible to realize highly accurate clock frequency synchronization, which is difficult to realize with the conventional device. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Third Embodiment) OFDM of this Embodiment
The packet communication receiving device will be described with reference to FIG. This embodiment corresponds to claim 3. This form is the first
It is a modification of the embodiment. In FIG. 3, elements corresponding to those in the first embodiment are denoted by the same reference numerals. The description of the same parts as those in the first embodiment will be omitted.

Clock frequency error estimator 300 shown in FIG.
Has a pilot signal extraction circuit 301 and a phase rotation detection circuit 3
02, a clock frequency error prediction circuit 303 and a phase rotation operation circuit 111 are provided.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted to a part (plurality) of subcarriers included in a received OFDM signal.

The pilot signal extraction circuit 301 receives the detection signal output from the synchronous detection circuit 107 and extracts only the signal component of the detection signal corresponding to the pilot signal from the detection signal.

The phase rotation detection circuit 302 inputs only the signal components of the detection signal corresponding to the pilot signal extracted by the pilot signal extraction circuit 301, and outputs the phase rotation amount or the phase rotation accumulation of the phase rotation generated in each detection signal. The amount is detected for each detection signal.

Since the pilot signal is a known signal, the corresponding reference signal point is also known. Therefore, when only the detection signal corresponding to the pilot signal is to be detected as the phase rotation amount, it is not necessary to identify a specific reference signal point corresponding to the detection signal, and the signal processing is simplified. Further, even when a large noise component is added to the detection signal, the original reference signal point of the detection signal is not erroneously identified, so that the detection accuracy of the phase rotation amount is improved. You.

The clock frequency error prediction circuit 303 inputs the amount of phase rotation or the accumulated amount of phase rotation detected by the phase rotation detection circuit 302 for each detection signal, and predicts and calculates a clock frequency deviation or a clock frequency error.

The phase rotation operation circuit 111 outputs the synchronous detection circuit 10 based on the clock frequency deviation or clock frequency error predicted and calculated by the clock frequency error prediction circuit 303.
A phase rotation amount caused by a clock frequency error generated in each detection signal output by 7 is calculated for each detection signal. This phase rotation amount can be obtained by the above equation (5).

The phase rotation correction circuit 109 includes a synchronous detection circuit 107
Phase detection circuit for each detection signal input from
Based on the information on the amount of phase rotation input from 111, a phase correction process for removing phase rotation due to a clock frequency error is performed.

As described above, when transmitting a pilot signal which is a known signal using a part of subcarriers of an OFDM signal, a clock frequency error is detected from a signal component of a detection signal corresponding to the pilot signal. Thus, the clock frequency error can be efficiently detected using only a part of the detection signal, so that the circuit configuration of the clock frequency error estimating means can be simplified. Further, even when a large noise component is added to the detection signal, the detection accuracy of the clock frequency error is improved because the reference signal point of the detection signal is not erroneously identified. That is, high-precision clock frequency synchronization that is difficult to achieve with the conventional device can be achieved with a simple circuit. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and it is possible to suppress an increase in power consumption.

(Fourth Embodiment) OFDM of this embodiment
The packet communication receiver will be described with reference to FIG. This embodiment corresponds to claim 4. This form is the first
It is a modification of the embodiment. In FIG. 4, elements corresponding to those of the first embodiment are denoted by the same reference numerals. The description of the same parts as those in the first embodiment will be omitted.

Clock frequency error estimating section 400 shown in FIG.
Includes a pilot signal extraction circuit 401, a weighting circuit 402, a smoothing circuit 403, a phase rotation detection circuit 404, a clock frequency error prediction circuit 405, and a phase rotation operation circuit 111.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

The pilot signal extraction circuit 401 receives the detection signal output from the synchronous detection circuit 107 and extracts only the signal component of the detection signal corresponding to the pilot signal from the detection signal.

The weighting circuit 402 first extracts information on the amount of phase rotation from the reference signal of each detection signal corresponding to the pilot signal extracted from the detection signal by the pilot signal extraction circuit 401. Estimation circuit 106
Is weighted based on the above-described information on the amount of phase rotation based on the channel estimation result.

For example, based on the signal level information of each subcarrier obtained from the channel estimation result, a large weight is applied to the information of the amount of phase rotation detected from the detection signal of the subcarrier having a large signal level, and the signal level is small. A small weight is given to the information of the phase rotation amount detected from the detection signal of the subcarrier. When such weighting is performed, the influence of a signal having a small signal level in the clock frequency error estimating means is reduced, so that the reliability of the clock frequency error estimation is improved.

The phase rotation amount information signal weighted by the weighting circuit 402 is input to the smoothing circuit 403.
The smoothing circuit 403 calculates a moving average in the time axis direction for each subcarrier for the weighted phase rotation amount information signal input from the weighting circuit 402, and outputs the result. That is, the smoothing circuit 403 smoothes the weighted phase rotation amount information signal. By this smoothing, it is possible to remove deterioration in signal quality due to thermal noise or the like added to the signal in the receiving circuit 102.

The phase rotation detection circuit 404 includes a weighting circuit 402
The phase rotation amount information signal which has been weighted by S and smoothed by the smoothing circuit 403 is input, and the phase rotation amount of the phase rotation generated in the detection signal due to the clock frequency error (for example, FIG.
5, φ1 and φ2) or the phase rotation accumulation amount is detected for each detection signal corresponding to the pilot signal.

The clock frequency error prediction circuit 405 uses the phase rotation amount or the phase rotation accumulated amount of each detection signal corresponding to the pilot signal detected by the phase rotation detection circuit 404, and calculates the clock based on the above equation (5). A frequency deviation or a clock frequency error is predicted and calculated. The phase rotation operation circuit 111 includes a synchronous detection circuit 107 based on the clock frequency error predicted and calculated by the clock frequency error prediction circuit 405.
The amount of phase rotation resulting from the clock frequency error of the detection signal output from is detected for each detection signal. This phase rotation amount can be obtained by the above equation (5). This calculation result is applied to the phase rotation correction circuit 109.

When transmitting a pilot signal, which is a known signal, using a part of subcarriers of an OFDM signal as described above, it is necessary to detect a clock frequency error from a signal component of a detection signal corresponding to the pilot signal. By
Since the clock frequency error can be efficiently detected using only some of the detection signals, the circuit configuration of the clock frequency error estimating means can be simplified. Further, even when a large noise component is added to the detection signal, the detection accuracy of the clock frequency error is improved because the reference signal point of the detection signal is not erroneously identified.

Further, when the communication quality differs for each subcarrier, the weight of the information on the amount of phase rotation detected from the pilot signal transmitted using the subcarrier having good communication quality is increased as described above. By processing the signal, the influence of fading or the like can be suppressed, and thus the detection accuracy of the clock frequency error can be improved.
In addition, by processing the phase rotation amount information signal smoothed in the time direction, the influence of thermal noise and the like can be suppressed, so that the clock frequency error can be detected with higher accuracy.

That is, high-precision clock frequency synchronization, which was difficult to achieve with the conventional device, can be realized with a simple circuit. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Fifth Embodiment) OFDM of this Embodiment
The packet communication receiver will be described with reference to FIG. This embodiment corresponds to claim 5. This form is the first
It is a modification of the embodiment. In FIG. 5, elements corresponding to those in the first embodiment are denoted by the same reference numerals. The description of the same parts as those in the first embodiment will be omitted.

In this embodiment, the receiving means, the synchronization processing means, the Fourier transform means, the channel estimating means, the synchronous detecting means, the clock frequency error estimating means and the phase rotation correcting means of claim 5 are respectively composed of a receiving circuit 102, a synchronous processing circuit 103, a Fourier transform circuit 105, a channel estimation circuit 106, a synchronous detection circuit 107, a clock frequency error estimation unit 500, and a phase rotation correction circuit 109.

Clock frequency error estimating section 500 shown in FIG.
Includes a phase rotation detection circuit 501, a clock frequency error prediction circuit 502, and a phase rotation calculation circuit 503.

The phase rotation detection circuit 501 receives the phase rotation corrected detection signal passed through the phase rotation correction circuit 109,
The phase rotation amount of the detection signal is detected for each OFDM symbol and each subcarrier. Note that the basic operation of the phase rotation detection circuit 501 is the same as that of the phase rotation detection circuit 108 in FIG.

The clock frequency error prediction circuit 502 predicts and calculates a clock frequency deviation or a clock frequency error by using information on the amount of phase rotation of each detection signal input from the phase rotation detection circuit 501 until the symbol is received. .

The phase rotation operation circuit 503 uses the clock frequency deviation or clock frequency error information predicted and calculated by the clock frequency error prediction circuit 502 to generate a synchronous detection circuit.
The phase rotation amount of the phase rotation caused by the clock frequency error generated in the detection signal output by 107 is calculated and obtained for each detection signal. This phase rotation amount can be obtained by the above equation (5).

The phase rotation correction circuit 109 includes a synchronous detection circuit 107
Phase detection circuit for each detection signal input from
Based on the information on the amount of phase rotation input from 503, a phase correction process for removing phase rotation caused by a clock frequency error is performed.

That is, in the OFDM packet communication receiving apparatus of FIG. 1, the phase rotation is detected from the detected signal before being corrected by the phase rotation correcting circuit 109.
In the OFDM packet communication receiver, the phase rotation is detected from the detection signal corrected by the phase rotation correction circuit 109.

Therefore, similarly to the first embodiment, the influence of the clock frequency shift is corrected by correcting the phase rotation amount for each detection signal before identifying which reference signal point each detection signal corresponds to. The signal can be identified without receiving the signal. That is, it is possible to realize highly accurate clock frequency synchronization, which is difficult to realize with the conventional device. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Sixth Embodiment) OFDM of this Embodiment
The packet communication receiver will be described with reference to FIG. This embodiment corresponds to claim 6. This form is the fifth
It is a modification of the embodiment. In FIG. 6, elements corresponding to those in the fifth embodiment are denoted by the same reference numerals. The description of the same parts as those of the fifth embodiment will be omitted.

Clock frequency error estimating section 600 shown in FIG.
Includes a weighting circuit 601, a smoothing circuit 602, a phase rotation detection circuit 603, a clock frequency error prediction circuit 502, and a phase rotation operation circuit 503.

The clock frequency error prediction circuit 502 predicts and calculates a clock frequency deviation or a clock frequency error by using information on the amount of phase rotation of each detection signal input from the phase rotation detection circuit 501 until the symbol is received.

The weighting circuit 601 includes a phase rotation correction circuit 109
The phase-corrected detection signal output from the phase-shift correction circuit is input, and first, information on the amount of phase rotation from the reference signal of the phase-rotation-corrected detection signal input from the phase rotation correction circuit 109 is detected. Based on the channel estimation result estimated by 106, the above-described information on the amount of phase rotation is weighted for each detection signal.

For example, based on the signal level information of each subcarrier obtained from the channel estimation result, a large weight is applied to the information of the amount of phase rotation detected from the detection signal of the subcarrier having a large signal level, and the signal level is small. A small weight is given to the information of the phase rotation amount detected from the detection signal of the subcarrier. When such weighting is performed, the influence of a signal having a small signal level in the clock frequency error estimating means is reduced, so that the reliability of the clock frequency error estimation is improved.

The phase rotation amount information signal weighted by the weighting circuit 601 is input to the smoothing circuit 602.
The smoothing circuit 602 calculates a moving average in the time axis direction for each subcarrier for the weighted phase rotation amount information signal input from the weighting circuit 601 and outputs the result. That is, the smoothing circuit 602 smoothes the weighted phase rotation amount information signal. By this smoothing, it is possible to remove deterioration in signal quality due to thermal noise or the like added to the signal in the receiving circuit 102.

The phase rotation detecting circuit 603 includes a weighting circuit 601
The phase rotation amount information signal which is weighted by the above and is smoothed by the smoothing circuit 602 is input, and the phase rotation amount of the phase rotation generated in the detection signal due to the clock frequency error is detected for each detection signal.

The phase rotation amount of each detection signal detected by the phase rotation detection circuit 603 is applied to the clock frequency error prediction circuit 502, and is used for calculating a clock frequency deviation or a clock frequency error.

When the communication quality differs for each subcarrier, the fading is performed by processing a signal in which the weight of the information of the amount of phase rotation detected from the detection signal of the subcarrier having good communication quality is increased as described above. And so on, the detection accuracy of the clock frequency error can be improved. In addition, by processing the phase rotation amount information signal smoothed in the time direction, the influence of thermal noise and the like can be suppressed, so that the clock frequency error can be detected with higher accuracy. That is, it is possible to realize highly accurate clock frequency synchronization, which is difficult to realize with the conventional device. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Seventh Embodiment) OFDM of this Embodiment
The packet communication receiver will be described with reference to FIG. This embodiment corresponds to claim 7. This form is the fifth
It is a modification of the embodiment. In FIG. 7, elements corresponding to those in the fifth embodiment are denoted by the same reference numerals. The description of the same parts as those of the fifth embodiment will be omitted.

Clock frequency error estimating section 700 shown in FIG.
Are the pilot signal extraction circuit 701 and the phase rotation detection circuit 70
2. It has a clock frequency error prediction circuit 703 and a phase rotation operation circuit 503.

In this embodiment, it is assumed that a pilot signal that is a known signal is transmitted to a part (plurality) of subcarriers included in a received OFDM signal.

The pilot signal extraction circuit 701 receives the detection signal whose phase has been corrected by the phase rotation correction circuit 109, and extracts only the signal component of the detection signal corresponding to the pilot signal from the detected signal.

The phase rotation detecting circuit 702 receives only the signal component of the detected signal corresponding to the pilot signal extracted by the pilot signal extracting circuit 701, and outputs the phase rotation amount or the phase rotation accumulated amount of the phase rotation generated in the detected signal. Is detected for each detection signal.

Since the pilot signal is a known signal, its corresponding reference signal point is also known. Therefore, when only the detection signal corresponding to the pilot signal is to be detected as the phase rotation amount, it is not necessary to identify a specific reference signal point corresponding to the detection signal, and the signal processing is simplified. Further, even when a large noise component is added to the detection signal, the detection accuracy of the phase rotation amount is improved because the reference signal point of the detection signal is not erroneously identified.

The clock frequency error prediction circuit 703 inputs the amount of phase rotation or the accumulated amount of phase rotation detected by the phase rotation detection circuit 702 for each detection signal, and predicts and calculates a clock frequency deviation or a clock frequency error.

In order to calculate the amount of phase rotation caused by the clock frequency error occurring in each detection signal, information on the clock frequency deviation or clock frequency error predicted and calculated by the clock frequency error prediction circuit 703 is used.
Entered in 3.

As described above, when transmitting a pilot signal which is a known signal using a part of subcarriers of an OFDM signal, a clock frequency error is detected from a signal component of a detection signal corresponding to the pilot signal. Thus, the clock frequency error can be efficiently detected using only a part of the detection signal, so that the circuit configuration of the clock frequency error estimating means can be simplified. Further, even when a large noise component is added to the detection signal, the detection accuracy of the clock frequency error is improved because the reference signal point of the detection signal is not erroneously identified. That is, high-precision clock frequency synchronization that is difficult to achieve with the conventional device can be achieved with a simple circuit. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Eighth Embodiment) OFDM of this Embodiment
The packet communication receiver will be described with reference to FIG. This embodiment corresponds to claim 8. This form is the fifth
It is a modification of the embodiment. In FIG. 8, elements corresponding to those of the fifth embodiment are denoted by the same reference numerals. The description of the same parts as those of the fifth embodiment will be omitted.

Clock frequency error estimating section 800 shown in FIG.
Corresponds to a pilot signal extraction circuit 801, a weighting circuit 802, a smoothing circuit 803, a phase rotation detection circuit 804, a clock frequency error prediction circuit 805, and a phase rotation operation circuit 503.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

The pilot signal extraction circuit 801 receives the detection signal whose phase rotation has been corrected by the phase rotation correction circuit 109, and extracts only the signal component of the detection signal corresponding to the pilot signal from the detection signal.

The weighting circuit 802 receives a detection signal corresponding to the pilot signal extracted by the pilot signal extraction circuit 801, and first, a reference signal of each detection signal corresponding to the pilot signal input from the pilot signal extraction circuit 801. Then, the information of the phase rotation amount is weighted based on the channel estimation result estimated by the channel estimation circuit 106.

For example, based on the signal level information of each subcarrier obtained from the channel estimation result, a large weight is given to the information of the phase rotation amount detected from the detection signal of the subcarrier having a large signal level, and the signal level is small. A small weight is given to the information of the phase rotation amount detected from the detection signal of the subcarrier. When such weighting is performed, the influence of a signal having a small signal level in the clock frequency error estimating means is reduced, so that the reliability of the clock frequency error estimation is improved.

The phase rotation amount information signal weighted by the weighting circuit 802 is input to the smoothing circuit 803.
The smoothing circuit 803 calculates a moving average in the time axis direction for each subcarrier for the weighted phase rotation amount information signal input from the weighting circuit 802, and outputs the result. That is, the smoothing circuit 803 smoothes the weighted phase rotation amount information signal. By this smoothing, it is possible to remove deterioration in signal quality due to thermal noise or the like added to the signal in the receiving circuit 102.

The phase rotation detecting circuit 804 includes a weighting circuit 802.
The phase rotation amount information signal which is weighted by S and smoothed by the smoothing circuit 803 is input, and the phase rotation amount of the phase rotation generated in the detection signal due to the clock frequency error is detected for each detection signal corresponding to each pilot signal. .

The clock frequency error prediction circuit 805 uses the phase rotation amount of each detection signal corresponding to each pilot signal detected by the phase rotation detection circuit 804 to calculate the clock frequency deviation or the clock frequency based on the above equation (5). The frequency error is predicted and calculated.

In order to calculate the amount of phase rotation caused by the clock frequency error occurring in each detection signal, information on the clock frequency deviation or clock frequency error predicted and calculated by the clock frequency error prediction circuit 805 is used.
Entered in 3.

As described above, when transmitting a pilot signal which is a known signal using a part of subcarriers of an OFDM signal, it is necessary to detect a clock frequency error from a signal component of a detection signal corresponding to the pilot signal. By
Since the clock frequency error can be efficiently detected using only some of the detection signals, the circuit configuration of the clock frequency error estimating means can be simplified. Further, even when a large noise component is added to the detection signal, the detection accuracy of the clock frequency error is improved because the reference signal point of the detection signal is not erroneously identified.

Further, when the communication quality differs for each subcarrier, the weight of the information of the amount of phase rotation detected from the pilot signal transmitted using the subcarrier having good communication quality is increased as described above. By processing the signal, the influence of fading or the like can be suppressed, and thus the detection accuracy of the clock frequency error can be improved.
In addition, by processing the phase rotation amount information signal smoothed in the time direction, the influence of thermal noise and the like can be suppressed, so that the clock frequency error can be detected with higher accuracy.

That is, high-precision clock frequency synchronization, which was difficult to achieve with the conventional device, can be realized with a simple circuit. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Ninth Embodiment) OFDM of this embodiment
The packet communication receiver will be described with reference to FIG. This embodiment corresponds to claim 9.

In this embodiment, the receiving means, the synchronization processing means, the Fourier transform means, the channel estimating means, the synchronous detecting means, the residual carrier frequency error estimating means, the phase rotation estimating means and the phase rotation correcting means of claim 9 receive Circuit 10
2. Corresponds to the synchronization processing circuit 901, the Fourier transform circuit 105, the channel estimation circuit 106, the synchronization detection circuit 107, the residual carrier frequency error detection circuit 902, the phase rotation prediction circuit 904, and the phase rotation correction circuit 109.

In this example, it is assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitting apparatus for transmitting the OFDM signal received by the OFDM packet communication receiving apparatus in FIG. The OFDM packet communication receiving apparatus of FIG. 9 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized. In this example, since both the carrier frequency and the sampling clock frequency are generated based on the signal output from the same signal source, the carrier frequency and the sampling clock frequency are synchronized.

The OFDM signal received by antenna 101 is input to receiving circuit 102. The receiving circuit 102 performs receiving processing such as frequency conversion, filtering, quadrature detection, and AD conversion on the input OFDM signal. As a result of this reception processing, the reception signal is converted into a complex baseband signal by the reception circuit.
Output from 102.

The complex baseband signal output from the receiving circuit 102 is input to the synchronization processing circuit 901. The synchronization processing circuit 901 detects a carrier frequency error and a symbol timing using a synchronization preamble signal (see FIG. 44) included in the input complex baseband signal. Then, a process for correcting the carrier frequency error is performed on the complex baseband signal input from the receiving circuit 102 using the information on the detected carrier frequency error.

The synchronization processing circuit 901 outputs a complex baseband signal in which the carrier frequency error has been corrected, information on the detected symbol timing, and information on the detected carrier frequency error. Among these signals, the complex baseband signal and the symbol timing information are input to the guard interval removing circuit 104. The carrier frequency error information is input to the phase rotation prediction circuit 904. The detection of the symbol timing is necessary to remove the guard interval existing between the symbols of the received OFDM signal and extract a valid data component from each symbol.

The guard interval removing circuit 104 performs an FFT window process on the input complex baseband signal according to the symbol timing information input from the synchronization processing circuit 901. That is, for each OFDM symbol of the complex baseband signal, only the signal component of the time width of the FFT window is extracted, and the guard interval is removed. The time width of the FFT window is a time width obtained by subtracting a signal length corresponding to a guard interval from one OFDM symbol length.

The complex baseband signal from which the guard interval has been removed by the guard interval removing circuit 104 is input to the Fourier transform circuit 105 for each OFDM symbol. The Fourier transform circuit 105 performs a fast Fourier transform process on the input complex baseband signal for each OFDM symbol, and separates each signal component of a number of subcarriers included in the input signal.

The signals of the respective subcarriers separated by the Fourier transform circuit 105 are input to a synchronous detection circuit 107 and a channel estimation circuit 106, respectively. Channel estimation circuit 106
Indicates the state of the transmission path (channel) through which each subcarrier signal has passed using the signal component corresponding to the channel estimation preamble signal (see FIG. 44) among the input subcarrier signals. And outputs the estimation result.

By referring to the channel estimation result output from the channel estimation circuit 106, it is possible to know, for example, how the amplitude and phase of each subcarrier are affected by fading. The channel estimation result output from channel estimation circuit 106 is input to synchronous detection circuit 107.

The synchronous detection circuit 107 uses the channel estimation result input from the channel estimation circuit 106 for the complex baseband signal input from the synchronous detection circuit 107, A process corresponding to synchronous detection is performed by correcting amplitude fluctuation and phase rotation caused by characteristics.

The detection signal output from the synchronous detection circuit 107 is
The residual carrier frequency error detection circuit 902 and the phase rotation correction circuit 903 are each input. The residual carrier frequency error detection circuit 902 detects the phase rotation of each detection signal caused by the residual carrier frequency error appearing in the detection signal using the detection signal input from the synchronous detection circuit 107, thereby obtaining the residual carrier frequency error. Detect errors.

For example, when 16QAM modulation is adopted as the modulation method, the signals after synchronous detection are originally 16 reference signal points S1 to S16 shown in FIG.
Appears in any position. However, if there is a difference between the carrier wave frequency and the sampling clock frequency between the transmitting device and the receiving device, each of the detected signals after the synchronous detection has the above formulas (5) and (6). Since the phase rotation as shown occurs, the positions of the detection signals (for example, R1 and R2 in FIG. 45) output from the synchronous detection circuit 107 do not coincide with any one of the original reference signal points.

The phase rotation caused by the shift of the carrier frequency appears in all the signal components of the detection signal included in the OFDM symbol as shown in the above equation (6). Also, since the OFDM symbol interval is constant,
The amount of phase rotation per OFDM symbol is a constant amount proportional to the residual carrier frequency error amount. Therefore, the residual carrier frequency error detection circuit 902 determines the phase rotation amount per 1 OFDM symbol or the channel estimation time, which appears in common in a plurality of input subcarrier signals.
By detecting the cumulative amount of phase rotation added up to the FDM symbol, the residual carrier frequency error is detected based on the above equation (6).

In practice, the amount of phase rotation of each subcarrier signal from the reference signal point is detected for the same one OFDM symbol. For example, the input signal R shown in FIG.
If 1 is a detection signal output from the synchronous detection circuit 107, the residual carrier frequency error detection circuit 902 uses the reference signal point S3 whose position is closest to the input signal R1 as a reference among the reference signal points S1 to S16, Reference signal point S3 and input signal R1
Is detected. When the input signal R2 shown in FIG. 45 is the detection signal output from the synchronous detection circuit 107, the residual carrier frequency error detection circuit 902 has the position closest to the input signal R2 among the reference signal points S1 to S16. With reference to the reference signal point S6, a phase difference φ2 between the reference signal point S6 and the input signal R2 is detected.

The phase rotation amount detected here includes not only the phase rotation component caused by the residual carrier frequency error as shown in the above equation (6) but also the phase rotation component as shown in the above equation (5). A phase rotation component caused by a clock frequency error is also included. Therefore, in order to detect a phase rotation amount common to all subcarriers caused by the residual carrier frequency error, the residual carrier frequency error detection circuit 902 calculates the phase rotation amount of each detection signal detected for the same OFDM symbol by using all the phase rotation amounts. Average over subcarriers.

The amount of phase rotation of each detection signal due to the clock frequency error is proportional to the frequency offset between the center frequency of the channel and the subcarrier frequency as shown in the above equation (5). For this reason, if the phase rotation amounts of all the subcarriers are simply averaged within one OFDM symbol, the phase shift due to the clock frequency error occurs between the subcarriers that are symmetrical with each other across the center frequency of the channel on the frequency axis. Since the rotations cancel each other, only the information of the phase rotation amount common to each subcarrier as shown in the above equation (6) due to the residual carrier frequency error is extracted. Using the information on the amount of phase rotation, information on the residual carrier frequency error is calculated based on equation (6). Information about the calculated residual carrier frequency error is output from the residual carrier frequency error detection circuit 902.

The input of the phase rotation prediction circuit 904 includes information on the carrier frequency error output from the synchronization processing circuit 901,
The information of the residual carrier frequency error output from the residual carrier frequency error detection circuit 902 is applied. Based on these pieces of input information, the phase rotation prediction circuit 904 predicts a phase rotation amount caused by a clock frequency error for each detection signal.

In this embodiment, it is assumed that the carrier frequency and the sampling clock frequency in the transmitting device are synchronized, and the carrier frequency and the sampling clock frequency in the receiving device are synchronized. . In such a case, the ratio (Δx) of the deviation of the sampling clock frequency between transmission and reception with respect to the standard value of the sampling clock frequency is equal to the ratio of the deviation of the carrier frequency between transmission and reception with respect to the standard value of the carrier frequency. The formula holds.

Δx = (f _RCLK −f _TCLK ) / f _CLK = Δf / f _RF = (f _RRF −f _TRF ) / f _{R F} (7) f _TRF : carrier frequency of transmission side device f _RRF : Carrier frequency of receiving side device f _RF : Standard value of carrier frequency

Therefore, when the expression (7) is substituted into the expression (5), the phase rotation amount Δθ of each detection signal caused by the clock frequency error between transmission and reception is expressed by the following expression.

Δθ ≒ 2π · _ft · (f _RRF −f _TRF ) / f _RF (8)

Therefore, using the carrier frequency error information input from the synchronization processing circuit 901 and the carrier frequency error information input from the residual carrier frequency error detection circuit 902, the transmission / reception between the transmission and reception is performed based on the equation (8). The phase rotation amount Δθ of each detection signal caused by the clock frequency error can be obtained. The phase rotation amount Δθ of each detection signal caused by the clock frequency error between transmission and reception can also be obtained based on Expression (8) using only the carrier frequency error information input from the synchronization processing circuit 901. However, by using the carrier frequency error information input from the residual carrier frequency error detection circuit 902, the phase rotation amount Δθ of each detection signal caused by the clock frequency error between transmission and reception can be obtained with higher accuracy. On the other hand, as shown in Expression (8), the phase rotation amount Δθ of each detection signal caused by the clock frequency error between transmission and reception differs for each OFDM symbol and each subcarrier. Accordingly, the phase rotation prediction circuit 904 generates a highly accurate carrier frequency error obtained from the carrier frequency error information output from the synchronization processing circuit 901 and the residual carrier frequency error information output from the residual carrier frequency error detection circuit 902. Using the information, a phase rotation amount Δθ caused by a clock frequency error between transmission and reception that occurs in each of the detection signals output from the synchronous detection circuit 107 is predicted and calculated based on Expression (8).

The phase rotation correction circuit 903 calculates the clock frequency generated in each detection signal input from the synchronous detection circuit 107 based on the information of the phase rotation amount Δθ for each detection signal predicted and calculated by the phase rotation prediction circuit 904. A phase correction process for removing a phase rotation caused by an error is performed.

The detection signal after the phase rotation correction processing output from the phase rotation correction circuit 903 is input to the identification circuit 112. The identification circuit 112 performs symbol determination on the data signal (see FIG. 44) among the input detection signals, and outputs a result of the determination as a demodulated output. For example, 16QA
In the case of M modulation, the identification circuit 112 determines that each detected signal is
5 is identified as any of the reference signal points S1 to S16. At this time, before identifying which reference signal point each detection signal corresponds to, the phase rotation is corrected with high accuracy for each detection signal by the phase rotation correction circuit 903. The signal can be identified without receiving the signal. That is, it is possible to realize highly accurate clock frequency synchronization, which is difficult to realize with the conventional device. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Tenth Embodiment) OFD of this embodiment
The receiving device for M packet communication will be described with reference to FIG. This embodiment corresponds to claim 10. This embodiment is a modification of the ninth embodiment. In FIG.
Elements corresponding to those in the ninth embodiment are denoted by the same reference numerals. The following description of the same parts as in the ninth embodiment is omitted.

The receiving apparatus for OFDM packet communication shown in FIG. 10 further includes a weighting circuit 1001 and a smoothing circuit 1002. The basic operation of the residual carrier frequency error detection circuit 1003 is the same as that of the residual carrier frequency error detection circuit 902.

In this example, it is also assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitter for transmitting the OFDM signal received by the receiver for OFDM packet communication in FIG. Also,
The receiver for OFDM packet communication in FIG. 10 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized.

A detection signal output from the synchronous detection circuit 107 and a channel estimation circuit
Estimation result output from, and phase rotation prediction circuit
Information on the amount of phase rotation of each detection signal output from 904 is applied.

The weighting circuit 1001 receives all or a part (plural) of the detection signals output from the synchronous detection circuit 107. Then, first, the phase rotation generated in each detection signal due to the clock frequency error is corrected using the information on the amount of phase rotation of the detection signal output from the phase rotation prediction circuit 904, and the phase rotation of the detection signal after the correction is corrected. Information on the amount of phase rotation from the reference signal is detected. Next, based on the channel estimation result input from the channel estimation circuit 106,
The phase rotation amount information from the reference signal is weighted.

For example, based on the signal level information of each subcarrier obtained from the channel estimation result, a large weight is given to the information of the phase rotation amount detected from the detection signal of the subcarrier having a large signal level, and the signal level is small. A small weight is given to the information of the phase rotation amount detected from the detection signal of the subcarrier. When such weighting is performed, the influence of a signal having a small signal level (degraded signal) in the residual carrier frequency error estimating means is reduced, so that the reliability of the residual carrier frequency error estimation is improved.

The phase rotation amount information signal weighted by the weighting circuit 1001 is input to the smoothing circuit 1002.
The smoothing circuit 1002 calculates a moving average in the time axis direction for each subcarrier for the weighted phase rotation amount information signal input from the weighting circuit 1001, and outputs the result. That is, the smoothing circuit 1002 smoothes the weighted phase rotation amount information signal. By this smoothing, it is possible to remove deterioration in signal quality due to thermal noise or the like added to the signal in the receiving circuit 102.

The residual carrier frequency error detection circuit 1003 receives the phase rotation amount information signal weighted by the weighting circuit 1001 and smoothed by the smoothing circuit 1002. Then, by detecting a phase rotation caused by the residual carrier frequency error from the input phase rotation amount information signal, the residual carrier frequency error is calculated based on the above equation (6). Since the basic operation of the residual carrier frequency error detection circuit 1003 is the same as that of the residual carrier frequency error detection circuit 902, a detailed description of the residual carrier frequency error detection circuit 1003 will be omitted.

The phase rotation prediction circuit 904 includes a synchronization processing circuit 901
The amount of phase rotation caused by the clock frequency error is predicted for each detection signal based on the information on the carrier frequency error detected in step (1) and the information on the residual carrier frequency error detected by the residual carrier frequency error detection circuit 1003.

If the communication quality differs for each subcarrier, the fading is performed by processing a signal in which the weight of the information of the amount of phase rotation detected from the detection signal of the subcarrier having good communication quality is increased as described above. And the like, the detection accuracy of the residual carrier frequency error can be improved. Further, by processing the phase rotation amount information signal smoothed in the time direction, it is possible to suppress the influence of thermal noise and the like, so that it is possible to detect the residual carrier frequency error with higher accuracy. That is, it is possible to realize highly accurate clock frequency synchronization, which is difficult to realize with the conventional device. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Eleventh Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This embodiment corresponds to claim 11. This embodiment is a modification of the ninth embodiment. In FIG.
Elements corresponding to those in the ninth embodiment are denoted by the same reference numerals. The following description of the same parts as in the ninth embodiment is omitted.

A pilot signal extraction circuit 1101 is added to the OFDM packet communication receiver shown in FIG.
The basic operation of the residual carrier frequency error detection circuit 1102 is as follows.
This is the same as the residual carrier frequency error detection circuit 902.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

In this example, it is assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitting apparatus for transmitting the OFDM signal received by the OFDM packet communication receiving apparatus in FIG. Also,
The receiver for OFDM packet communication of FIG. 11 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized.

The pilot signal extraction circuit 1101 receives the detection signal output from the synchronous detection circuit 107 and extracts only the signal component of the detection signal corresponding to the pilot signal from the detection signal.

The residual carrier frequency error detection circuit 1102 inputs only the signal component of the detection signal corresponding to the pilot signal extracted by the pilot signal extraction circuit 1101, and outputs the phase rotation amount or phase rotation commonly generated in each detection signal. The accumulated amount is detected for each detection signal.

Since the pilot signal is a known signal, the corresponding reference signal point (for example, any one of S1 to S16 in FIG. 45) is also known. Therefore, when only the detection signal corresponding to the pilot signal is to be detected as the phase rotation amount, it is not necessary to identify a specific reference signal point corresponding to the detection signal, and the signal processing in the residual carrier frequency error detection circuit 1102 is unnecessary. Becomes easier. Further, even when a large noise component is added to the detection signal, the original reference signal point of the detection signal is not erroneously identified, so that the detection accuracy of the phase rotation amount is improved. You.

The residual carrier frequency error detection circuit 1102 obtains the residual carrier frequency error based on the above equation (6) using the detected phase rotation amount or the accumulated phase rotation amount. Since the basic operation of the residual carrier frequency error detection circuit 1102 is the same as that of the residual carrier frequency error detection circuit 902, a detailed description of the residual carrier frequency error detection circuit 1102 will be omitted. Residual carrier frequency error detection circuit
Information on the residual carrier frequency error output from 1102 is input to the phase rotation prediction circuit 904.

As described above, when transmitting a pilot signal which is a known signal using a part of subcarriers of an OFDM signal, a residual carrier frequency error is detected from a signal component of a detection signal corresponding to the pilot signal. This makes it possible to efficiently detect the residual carrier frequency error using only a part of the detection signal, thereby simplifying the circuit configuration of the residual carrier frequency error estimating means. Further, even when a large noise component is added to the detection signal, the detection accuracy of the residual carrier frequency error is improved because the reference signal point of the detection signal is not erroneously identified.

That is, high-precision clock frequency synchronization, which was difficult to achieve with the conventional device, can be realized with a simple circuit. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Twelfth Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This embodiment corresponds to claim 12. This embodiment is a modification of the ninth embodiment. In FIG.
Elements corresponding to those in the ninth embodiment are denoted by the same reference numerals. The following description of the same parts as in the ninth embodiment is omitted.

The receiver for OFDM packet communication in FIG. 12 includes a pilot signal extraction circuit 1201 and a weighting circuit 120.
2, smoothing circuit 1203 and residual carrier frequency error detection circuit 1
204 has been added. Residual carrier frequency error detection circuit 1
The basic operation of 204 is the same as that of the residual carrier frequency error detection circuit 902.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

In this example, it is assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitting apparatus for transmitting the OFDM signal received by the OFDM packet communication receiving apparatus in FIG. Also,
The OFDM packet communication receiving apparatus of FIG. 12 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized.

The pilot signal extraction circuit 1201 receives the detection signal output from the synchronous detection circuit 107 and extracts only the signal component of the detection signal corresponding to the pilot signal from the detection signal.

The weighting circuit 1202 includes a signal component of each detection signal corresponding to the pilot signal extracted from the detection signal by the pilot signal extraction circuit 1201, a channel estimation result output from the channel estimation circuit 106, Information on the amount of phase rotation of each detection signal output from the rotation prediction circuit 904 is input. The weighting circuit 1202 first corrects the phase rotation generated in each detection signal due to the clock frequency error using the information of the phase rotation amount of the detection signal input from the phase rotation prediction circuit 904, and after the phase rotation correction Information on the amount of phase rotation from the reference signal of the detection signal is detected. Next, based on the channel estimation result input from the channel estimation circuit 106, weighting is performed on the phase rotation amount information from the aforementioned reference signal.

For example, based on the signal level information of each subcarrier obtained from the channel estimation result, a large weight is applied to the information of the phase rotation amount detected from the detection signal of the subcarrier having a large signal level, and the signal level is small. A small weight is given to the information of the phase rotation amount detected from the detection signal of the subcarrier. When such weighting is performed, the influence of a signal having a small signal level in the residual carrier frequency error estimating means is reduced, so that the reliability of the residual carrier frequency error estimation is improved.

The phase rotation amount information signal weighted by the weighting circuit 1202 is input to the smoothing circuit 1203.
The smoothing circuit 1203 calculates a moving average in the time axis direction for each subcarrier for the weighted phase rotation amount information signal input from the weighting circuit 1202, and outputs the result. That is, the smoothing circuit 1203 smoothes the weighted phase rotation amount information signal. By this smoothing, it is possible to remove deterioration in signal quality due to thermal noise or the like added to the signal in the receiving circuit 102.

The residual carrier frequency error detection circuit 1204 receives the phase rotation amount information signal weighted by the weighting circuit 1202 and smoothed by the smoothing circuit 1203, and is derived from the residual carrier frequency error from the phase rotation amount information signal. The residual carrier frequency error is determined by detecting the phase rotation.
The basic operation of the residual carrier frequency error detection circuit 1204 is as follows.
Since it is the same as the residual carrier frequency error detection circuit 902, a detailed description of the residual carrier frequency error detection circuit 1204 will be omitted. Residual carrier frequency error detection circuit 1204
Is input to the phase rotation prediction circuit 904.

As described above, when transmitting a pilot signal which is a known signal using a part of subcarriers of an OFDM signal, a residual carrier frequency error is detected from a signal component of a detection signal corresponding to the pilot signal. This makes it possible to efficiently detect the residual carrier frequency error using only a part of the detection signal, thereby simplifying the circuit configuration of the residual carrier frequency error estimating means. Further, even when a large noise component is added to the detection signal, the detection accuracy of the residual carrier frequency error is improved because the reference signal point of the detection signal is not erroneously identified.

Further, when the communication quality differs for each subcarrier, a signal in which the weight of the phase rotation amount information detected from the detection signal of the subcarrier having good communication quality is increased as described above is processed. , Fading, etc., the detection accuracy of the residual carrier frequency error can be improved. Further, by processing the phase rotation amount information signal smoothed in the time direction, it is possible to suppress the influence of thermal noise and the like, so that it is possible to detect the residual carrier frequency error with higher accuracy. That is, it is possible to realize highly accurate clock frequency synchronization, which is difficult to realize with the conventional device. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Thirteenth Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This embodiment corresponds to claim 13. This embodiment is a modification of the ninth embodiment. In FIG.
Elements corresponding to those in the ninth embodiment are denoted by the same reference numerals. The following description of the same parts as in the ninth embodiment is omitted.

In this embodiment, the receiving means, the synchronization processing means, the Fourier transform means, the channel estimating means, the synchronous detecting means, the first phase rotation predicting means, the first phase rotation correcting means, the residual carrier frequency error The estimating means, the second phase rotation estimating means, and the second phase rotation correcting means include a receiving circuit 102, a synchronization processing circuit 901, a Fourier transform circuit
5. Corresponds to the channel estimation circuit 106, synchronous detection circuit 107, phase rotation prediction circuit 904, phase rotation correction circuit 903, residual carrier frequency error detection circuit 902, phase rotation prediction circuit 904, and phase rotation correction circuit 903.

In this example, it is assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitting apparatus for transmitting the OFDM signal received by the OFDM packet communication receiving apparatus in FIG. Also,
The OFDM packet communication receiving device of FIG. 13 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized.

The receiver for OFDM packet communication shown in FIG. 13 has two independent phase rotation prediction circuits 1301 and 904.
And two independent phase rotation correction circuits 903 and 1302. In this embodiment, the phase rotation prediction circuit 1301 uses the information on the carrier frequency error input from the synchronization processing circuit 901 to predict the amount of phase rotation generated in the detection signal due to the clock frequency error for each detection signal.

That is, in this example, the carrier frequency and the sampling clock frequency in the transmitting device are synchronized with each other, and the carrier frequency and the sampling clock frequency in the receiving device are synchronized. The phase rotation amount caused by the shift of the clock frequency can be obtained from the error of the carrier frequency based on the equation (6). Since the amount of phase rotation differs for each detection signal,
For each of them, the phase rotation prediction circuit 1301 calculates the amount of phase rotation.

The phase rotation correction circuit 1302 includes the synchronous detection circuit 10
The phase rotation caused by the clock frequency error occurring in the detection signal input from 7 is corrected for each detection signal based on information on the amount of phase rotation of the detection signal predicted by the phase rotation prediction circuit 1301. The detection signal whose phase rotation has been corrected is output from the phase rotation correction circuit 1302.

However, in reality, it is not possible to correctly detect the carrier frequency error and completely correct the carrier frequency error in the synchronization processing circuit 901 due to the influence of noise components added to the received signal in the receiving circuit 102. The complex baseband signal output from the synchronization processing circuit 901 includes a residual carrier frequency error. Since the phase rotation correction circuit 1302 corrects the amount of phase rotation predicted by the phase rotation prediction circuit 1301 based on information of the carrier frequency error detected by the synchronization processing circuit 901, the phase rotation correction circuit 1302 outputs Of the phase rotation component generated by the clock frequency error, the phase rotation component corresponding to the residual carrier frequency error remains.

Therefore, the phase rotation component remaining in the detection signal output from the phase rotation correction circuit 1302, that is, the phase rotation component corresponding to the residual carrier frequency error of the phase rotation caused by the clock frequency error is converted to the phase rotation correction circuit. Correct at 903.

The residual carrier frequency error detecting circuit 902 receives the detection signal whose phase has been corrected by the phase rotation correcting circuit 1302, and detects the residual carrier frequency error using the detected signal. That is, the residual carrier frequency error is detected by detecting the phase rotation of each detected signal caused by the residual carrier frequency error appearing in the detected signal. The detailed description of the operation of the residual carrier frequency error detection circuit 902 has been already described, and will not be repeated.

The phase rotation prediction circuit 904 uses the phase rotation amount remaining in the detection signal output from the phase rotation correction circuit 1302 as information on the residual carrier frequency error detected by the residual carrier frequency error detection circuit 902. Based on the detection signal, prediction is performed for each detected signal.

In this example, the carrier frequency in the transmitting device is synchronized with the sampling clock frequency, and the carrier frequency in the receiving device is synchronized with the sampling clock frequency. The generated phase rotation amount can be obtained from the residual carrier frequency error information input from the residual carrier frequency error detection circuit 902 based on the above equation (8). Since the amount of phase rotation differs for each detection signal, the phase rotation prediction circuit 904 calculates the amount of phase rotation for each of them.

The phase rotation correction circuit 903 detects the phase rotation generated in the detection signal input from the phase rotation correction circuit 1302 based on the information of each phase rotation amount for each detection signal predicted by the phase rotation prediction circuit 904. A phase rotation correction process is performed so as to remove the phase rotation. By this phase rotation correction processing, of the phase rotation caused by the clock frequency error between transmission and reception, the residual phase rotation that cannot be completely corrected by the phase rotation correction circuit 1302 is corrected.

Therefore, before identifying which reference signal point each detected signal corresponds to, the phase rotation caused by the clock frequency error for each detected signal by the phase rotation correction circuit 1302 and the phase rotation correction circuit 903 is highly accurate. Therefore, the identification circuit 112 can identify the signal without being affected by the clock frequency error. That is, it is possible to realize highly accurate clock frequency synchronization, which is difficult to realize with the conventional device. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Fourteenth Embodiment) OFD of this Embodiment
The M-packet communication receiving device will be described with reference to FIG. This embodiment corresponds to claim 14. This embodiment is a modification of the thirteenth embodiment. In FIG. 14, elements corresponding to those of the thirteenth embodiment are denoted by the same reference numerals. The following description of the same parts as those of the thirteenth embodiment is omitted.

The receiving apparatus for OFDM packet communication shown in FIG. 14 further includes a weighting circuit 1401 and a smoothing circuit 1402. The basic operation of the residual carrier frequency error detection circuit 1403 is the same as that of the residual carrier frequency error detection circuit 902.

In this example, it is assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitter for transmitting the OFDM signal received by the receiver for OFDM packet communication in FIG. Also,
The OFDM packet communication receiver of FIG. 14 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized.

The inputs of the weighting circuit 1401 include the detection signal output from the phase rotation correction circuit 1302, the channel estimation result output from the channel estimation circuit 106, and the detection signal output from the phase rotation prediction circuit 904. Information on the amount of phase rotation is applied.

The weighting circuit 1401 includes a phase rotation correction circuit 13
The detection signal of all or a part (plural) of the detection signal output by 02 is input. Then, first, the phase rotation generated in each detection signal due to the clock frequency error is corrected using the information of the amount of phase rotation input from the phase rotation prediction circuit 904, and from the reference signal of the detection signal after the phase rotation correction The information on the amount of phase rotation is detected. Next, the channel estimation circuit 10
Based on the channel estimation result input from 6, the phase rotation amount information from the reference signal is weighted.

For example, based on the signal level information of each subcarrier obtained from the channel estimation result, a large weight is given to the information of the phase rotation amount detected from the detection signal of the subcarrier having a large signal level, and the signal level is small. A small weight is given to the information of the phase rotation amount detected from the detection signal of the subcarrier. When such weighting is performed, the influence of a signal having a small signal level (degraded signal) in the residual carrier frequency error estimating means is reduced, so that the reliability of the residual carrier frequency error estimation is improved.

The phase rotation amount information signal weighted by the weighting circuit 1401 is input to the smoothing circuit 1402.
The smoothing circuit 1402 calculates a moving average in the time axis direction for each subcarrier for the weighted phase rotation amount information signal input from the weighting circuit 1401, and outputs the result. That is, the smoothing circuit 1402 smoothes the weighted phase rotation amount information signal. By this smoothing, it is possible to remove deterioration in signal quality due to thermal noise or the like added to the signal in the receiving circuit 102.

The residual carrier frequency error detection circuit 1403 receives the phase rotation amount information signal weighted by the weighting circuit 1401 and smoothed by the smoothing circuit 1402. Then, the residual carrier frequency error is detected by detecting the phase rotation caused by the residual carrier frequency error from the input phase rotation amount information signal. Residual carrier frequency error detection circuit 1403
The basic operation of the residual carrier frequency error detection circuit
Since it is the same as 902, the residual carrier frequency error detection circuit 1
Detailed description of 403 is omitted.

The phase rotation prediction circuit 904 uses the phase rotation amount remaining in the detection signal output from the phase rotation correction circuit 1302 as information on the residual carrier frequency error detected by the residual carrier frequency error detection circuit 1403. Based on the detection signal, prediction is performed for each detected signal.

If the communication quality differs for each subcarrier, fading is performed by processing a signal in which the weight of the information of the amount of phase rotation detected from the detection signal of the subcarrier having good communication quality is increased as described above. And the like, the detection accuracy of the residual carrier frequency error can be improved. Further, by processing the phase rotation amount information signal smoothed in the time direction, it is possible to suppress the influence of thermal noise and the like, so that it is possible to detect the residual carrier frequency error with higher accuracy. That is, it is possible to realize highly accurate clock frequency synchronization, which is difficult to realize with the conventional device. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, there is no need to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Fifteenth Embodiment) OFD of this embodiment
The receiving device for M packet communication will be described with reference to FIG. This embodiment corresponds to claim 15. This embodiment is a modification of the thirteenth embodiment. In FIG. 15, elements corresponding to those of the thirteenth embodiment are denoted by the same reference numerals. The following description of the same parts as those of the thirteenth embodiment is omitted.

[0214] A pilot signal extraction circuit 1501 is added to the OFDM packet communication receiver of FIG.
The basic operation of the residual carrier frequency error detection circuit 1502 is as follows.
This is the same as the residual carrier frequency error detection circuit 902.

[0215] In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

[0216] Also in this example, it is assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitting apparatus for transmitting the OFDM signal received by the OFDM packet communication receiving apparatus in FIG. Also,
The OFDM packet communication receiver of FIG. 15 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized.

The pilot signal extraction circuit 1501 receives the detection signal output from the phase rotation correction circuit 1302, and extracts only the signal component of the detection signal corresponding to the pilot signal from the detection signal.

The residual carrier frequency error detection circuit 1502 inputs only the signal component of the detection signal corresponding to the pilot signal extracted by the pilot signal extraction circuit 1501, and outputs the phase rotation amount or phase rotation commonly generated in each detection signal. The accumulated amount is detected for each detection signal.

Since the pilot signal is a known signal, the corresponding reference signal point (for example, any one of S1 to S16 in FIG. 45) is also known. Therefore, when only the detection signal corresponding to the pilot signal is to be detected as the phase rotation amount, it is not necessary to identify a specific reference signal point corresponding to the detection signal, and the signal processing in the residual carrier frequency error detection circuit 1502 is unnecessary. Becomes easier. Further, even when a large noise component is added to the detection signal, the original reference signal point of the detection signal is not erroneously identified, so that the detection accuracy of the phase rotation amount is improved. You.

The residual carrier frequency error detection circuit 1502 obtains a residual carrier frequency error from the detected phase rotation amount.
The basic operation of the residual carrier frequency error detection circuit 1502 is as follows.
Since it is the same as the residual carrier frequency error detection circuit 902, a detailed description of the residual carrier frequency error detection circuit 1502 will be omitted. Residual carrier frequency error detection circuit 1502
The information of the residual carrier frequency error detected from the signal component of the pilot subcarrier is input to the phase rotation prediction circuit 904.

As described above, when transmitting a pilot signal which is a known signal using a part of subcarriers of an OFDM signal, a residual carrier frequency error is detected from a signal component of a detection signal corresponding to the pilot signal. This makes it possible to efficiently detect the residual carrier frequency error using only a part of the detection signal, thereby simplifying the circuit configuration of the residual carrier frequency error estimating means. Further, even when a large noise component is added to the detection signal, the detection accuracy of the residual carrier frequency error is improved because the reference signal point of the detection signal is not erroneously identified.

That is, high-precision clock frequency synchronization, which was difficult to achieve with the conventional device, can be realized with a simple circuit. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Sixteenth Embodiment) OFD of this embodiment
The receiver for M packet communication will be described with reference to FIG. This embodiment corresponds to claim 16. This embodiment is a modification of the thirteenth embodiment. In FIG. 16, elements corresponding to those of the thirteenth embodiment are denoted by the same reference numerals. The following description of the same parts as those of the thirteenth embodiment is omitted.

The receiving apparatus for OFDM packet communication shown in FIG. 16 includes a pilot signal extracting circuit 1601, a weighting circuit 160
2, smoothing circuit 1603 and residual carrier frequency error detection circuit 1
604 has been added. Residual carrier frequency error detection circuit 1
The basic operation of 604 is the same as that of the residual carrier frequency error detection circuit 902.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted by using a part (plurality) of subcarriers included in a received OFDM signal.

In this example, it is assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitter for transmitting the OFDM signal received by the receiver for OFDM packet communication in FIG. Also,
The receiver for OFDM packet communication in FIG. 16 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized.

The pilot signal extraction circuit 1601 receives the detection signal output from the phase rotation correction circuit 1302, and extracts only the subcarrier signal component corresponding to the pilot signal from the detection signal.

The input of weighting circuit 1602 is a detection signal corresponding to the pilot signal output from pilot signal extraction circuit 1601, the channel estimation result output from channel estimation circuit 106, and the output from phase rotation prediction circuit 904. And information on the amount of phase rotation of the detection signal corresponding to the above-described pilot signal.

The weighting circuit 1602 inputs, from the phase rotation prediction circuit 904, the phase rotation generated in each detection signal due to the clock frequency error to the detection signal corresponding to the pilot signal output from the pilot signal extraction circuit 1601. The correction is performed based on the information on the amount of phase rotation performed, and the information on the amount of phase rotation from the reference signal of the detection signal after the phase rotation correction is detected. Next, based on the channel estimation result input from the channel estimation circuit 106, weighting is performed on the phase rotation amount information from the aforementioned reference signal.

For example, based on the signal level information of each subcarrier obtained from the channel estimation result, a large weight is applied to the information of the amount of phase rotation detected from the detection signal of the subcarrier having a large signal level, and the signal level is small. A small weight is given to the information of the phase rotation amount detected from the detection signal of the subcarrier. When such weighting is performed, the influence of a signal having a small signal level (degraded signal) in the residual carrier frequency error estimating means is reduced, so that the reliability of the residual carrier frequency error estimation is improved.

The phase rotation amount information signal weighted by the weighting circuit 1602 is input to the smoothing circuit 1603.
The smoothing circuit 1603 calculates a moving average in the time axis direction for each subcarrier for the weighted phase rotation amount information signal input from the weighting circuit 1602, and outputs the result. That is, the smoothing circuit 1603 smoothes the weighted phase rotation amount information signal. By this smoothing, it is possible to remove deterioration in signal quality due to thermal noise or the like added to the signal in the receiving circuit 102.

The residual carrier frequency error detection circuit 1604 receives the phase rotation amount information signal weighted by the weighting circuit 1602 and smoothed by the smoothing circuit 1603, and generates a residual carrier frequency error from the phase rotation amount information signal. The residual carrier frequency error is determined by detecting the phase rotation to be performed. Since the basic operation of the residual carrier frequency error detection circuit 1604 is the same as that of the residual carrier frequency error detection circuit 902, a detailed description of the residual carrier frequency error detection circuit 1604 will be omitted.

The information of the residual carrier frequency error obtained by the residual carrier frequency error detection circuit 1604 is
Entered in 4.

As described above, when transmitting a pilot signal that is a known signal using a part of subcarriers of an OFDM signal, a residual carrier frequency error is detected from a signal component of a detection signal corresponding to the pilot signal. This makes it possible to efficiently detect the residual carrier frequency error using only a part of the detection signal, thereby simplifying the circuit configuration of the residual carrier frequency error estimating means. Further, even when a large noise component is added to the detection signal, the detection accuracy of the residual carrier frequency error is improved because the reference signal point of the detection signal is not erroneously identified.

Further, when the communication quality differs for each subcarrier, a signal in which the weight of the information of the phase rotation amount detected from the detection signal of the subcarrier having good communication quality is increased as described above is processed. , Fading, etc., the detection accuracy of the residual carrier frequency error can be improved. Further, by processing the phase rotation amount information signal smoothed in the time direction, it is possible to suppress the influence of thermal noise and the like, so that it is possible to detect the residual carrier frequency error with higher accuracy. That is, it is possible to realize highly accurate clock frequency synchronization, which is difficult to realize with the conventional device. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Seventeenth Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This embodiment corresponds to claim 17. This embodiment is a modification of the ninth embodiment. In FIG.
Elements corresponding to those in the ninth embodiment are denoted by the same reference numerals. The following description of the same parts as in the ninth embodiment is omitted.

The residual carrier frequency error detecting section shown in FIG.
The 1700 includes a phase rotation amount information extraction circuit 1701 and a common phase rotation detection circuit 1702.

In this example, it is assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitter for transmitting the OFDM signal received by the receiver for OFDM packet communication in FIG. Also,
The OFDM packet communication receiver of FIG. 17 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized.

The detection signal output from the synchronous detection circuit 107 is
The phase rotation amount information extraction circuit 1701 and the phase rotation correction circuit 903 are input. The phase rotation amount information extraction circuit 1701 detects the amount of rotation of the phase from the reference signal point on the phase plane as shown in FIG. 45 from all or part of the input detection signals. Phase rotation amount information extraction circuit 17
The phase rotation amount information signal detected by 01 is input to the common phase rotation detection circuit 1702. The phase rotation caused by the shift of the carrier frequency appears commonly in the signal components of all the detection signals included in the OFDM symbol as shown in the above equation (6). Further, since the OFDM symbol interval is constant, the amount of phase rotation per OFDM symbol is a constant amount proportional to the residual carrier frequency error amount. Therefore, the common phase rotation detection circuit 1702 calculates the phase rotation amount per OFDM symbol common to each detection signal caused by the residual carrier frequency error or the channel estimation time based on the phase rotation amount information of each input detection signal. The phase rotation accumulation amount added up to the symbol is detected, and information on the residual carrier frequency error is calculated based on the above equation (6). Information on the residual carrier frequency error calculated by the common phase rotation detection circuit 1702 is applied to the phase rotation prediction circuit 903.

Therefore, before identifying which reference signal point each detection signal corresponds to, the phase rotation caused by the clock frequency error for each detection signal by the phase rotation correction circuit 1302 and the phase rotation correction circuit 903 is highly accurate. Therefore, the identification circuit 112 can identify the signal without being affected by the clock frequency error. That is, it is possible to realize highly accurate clock frequency synchronization, which is difficult to realize with the conventional device. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

(Eighteenth Embodiment) OFD of this Embodiment
An M-packet communication receiving device will be described with reference to FIG. This embodiment corresponds to claim 18. This embodiment has many parts similar to those of the first embodiment. Therefore, in FIG. 18, elements corresponding to those in the first embodiment are denoted by the same reference numerals. The description of the same parts as those in the first embodiment will be omitted.

Each subcarrier signal output from the Fourier transform circuit 105 is input to the channel estimation circuit 106 and the synchronous detection circuit 107 and is input to the signal level information extraction circuit 1801. The signal level information extraction circuit 1801 extracts the signal level from all or some of the input subcarrier signals and outputs the signal level for each OFDM symbol. O from signal level information extraction circuit 1801
Signal level information output for each FDM symbol is input to a signal level information smoothing circuit 1802.

If thermal noise is added to the received signal during reception processing by the receiving means, errors will occur in both the amplitude component and the phase component of each subcarrier signal separated by the Fourier transform means. Signal level information extraction circuit 1801
Extracts signal level information based on each subcarrier signal separated by the Fourier transform circuit 105, so if thermal noise is added to the received signal during reception processing in the receiving circuit 102, the signal level information is extracted by the signal level information extracting circuit 1801. An error due to the influence of thermal noise occurs in the signal level information to be obtained. Therefore, the signal level information smoothing circuit 1802
Performs smoothing in the time axis direction for each subcarrier for the signal level information input from the signal level information extraction circuit 1801. This smoothing can reduce the influence of noise components caused by thermal noise and the like included in the signal level information. That is, signal level information of each subcarrier signal can be detected with high accuracy. The highly accurate signal level information after smoothing output from the signal level information smoothing circuit 1802 is input to the weighting circuit 1803. On the other hand, the detection signal output from the synchronous detection circuit 107 is input to the phase rotation amount information extraction circuit 1701 and the phase rotation correction circuit 1805. The phase rotation amount information extraction circuit 1701 detects the amount of rotation of the phase from the reference signal point on the phase plane as shown in FIG. 45 from all or part of the input detection signals. The phase rotation amount information signal detected by the phase rotation amount information extraction circuit 1701 is
Is input to The weighting circuit 1803 weights the phase rotation amount information signal detected by the phase rotation amount information extraction circuit 1701 based on the smoothed high-precision signal level information input from the signal level information smoothing circuit 1802. I do. For example, a large weight is given to the phase rotation amount information signal of the subcarrier having a large signal level, and a small weight is given to the phase rotation amount information signal of the subcarrier having a small signal level. Further, the generation of each phase rotation amount information signal after weighting is performed, for example, by using a vector signal having an input phase rotation amount as a phase component and an input smoothed signal level as an amplitude component in each phase. This can be performed by generating each of the rotation amount information signals. Since the weighting circuit 1803 weights the input phase rotation information based on the highly accurate signal level information, it is possible to perform highly accurate weighting processing. The weighted phase rotation amount information signal output from the weighting circuit 1803 is input to the common phase rotation detection circuit 1804. The phase rotation caused by the shift of the carrier frequency appears commonly in the signal components of all the detection signals included in the OFDM symbol as shown in the above equation (6). Also,
The phase rotation caused by the phase noise also appears in the signal components of all the detection signals included in the OFDM symbol, as described above. Therefore, the common phase rotation detection circuit 1804
Is based on the input information on the amount of phase rotation of each of the detected signals after weighting. From the phase rotation amount common to the detected signal or the channel estimation time, the OF
The phase rotation accumulated amount added up to the DM symbol is detected and output. That is, the common phase rotation detection circuit 1804
It outputs information on the amount of phase rotation generated by the residual carrier frequency error and the phase noise of each detection signal output from the synchronous detection circuit 107. Information on the amount of phase rotation output from the common phase rotation detection circuit 1804 is input to the phase rotation correction circuit 1805. The phase rotation correction circuit 1805, based on the information on the amount of phase rotation input from the common phase rotation detection circuit 1804,
The phase rotation correction processing is performed so as to remove the phase rotation caused by the residual carrier frequency error and the phase noise included in the detection signal input from the synchronous detection circuit 107.

The apparatus of this example can improve the accuracy of the signal level information without increasing the number of preamble signals for channel estimation, so that the phase rotation of each detection signal caused by the residual carrier frequency error and the phase noise can be reduced. The correction can be performed with high accuracy without lowering the throughput of the system. Further, since the moving average processing in the frequency direction is not performed, it is possible to detect the signal level information with high accuracy even when the fluctuation of the transmission path (channel) state between adjacent subcarriers is large. Can be accurately corrected.

(Nineteenth Embodiment) OFD of this embodiment
An M-packet communication receiving device will be described with reference to FIG. This embodiment corresponds to claims 19 and 20. This embodiment is a modification of the eighteenth embodiment. In FIG. 19, elements corresponding to those of the eighteenth embodiment are denoted by the same reference numerals. The following description is abbreviate | omitted about the same part as 18th Embodiment.

The phase rotation amount information extraction unit 1900 shown in FIG. 19 includes a pilot signal extraction circuit 1902 and a phase rotation detection circuit 19
03 and a reference signal output circuit 1904, and the common phase rotation detector 1901 includes an intra-symbol averaging circuit 1905 and a time-direction moving averaging circuit 1906.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

Each detection signal output from the synchronous detection circuit 107 is input to the phase rotation correction circuit 1805 and to the pilot signal extraction circuit 1902. Pilot signal extraction circuit 1902 extracts a detection signal corresponding to a pilot signal from the detection signals input from synchronous detection circuit 107 and outputs the detection signal. A detection signal corresponding to the pilot signal output from pilot signal extraction circuit 1902 is input to phase rotation detection circuit 1903. On the other hand, the reference signal output circuit 1904
Pilot signal extraction circuit 1902 to phase rotation detection circuit 1903
And outputs a reference signal (see FIG. 45) corresponding to the detection signal corresponding to the pilot signal input to the input terminal. As mentioned above,
Since the pilot signal is a known signal, the above-described reference signal can be easily output. Reference signal output circuit 1904
Is output to the phase rotation detection circuit 1903. The phase rotation detection circuit 1903 is connected to the reference signal output circuit 19
Based on the reference signal input from 04, a phase rotation amount of a detection signal corresponding to the pilot signal input from pilot signal extraction circuit 1902 is detected, and a phase rotation amount information signal is output.

As described above, when only the detection signal corresponding to the pilot signal is to be detected as the phase rotation amount, there is no need to identify a specific reference signal point corresponding to the detection signal, and the phase rotation amount information extraction is not required. The signal processing in the means is simplified. Further, even when a large noise component is added to the detection signal, the original reference signal point of the detection signal is not erroneously identified, so that the detection accuracy of the phase rotation amount is improved. You.

The phase rotation amount information signal output from the phase rotation detection circuit 1903 is input to the weighting circuit 1803. The weighting circuit 1803 weights and outputs the phase rotation amount information signal input from the phase rotation detection circuit 1903 based on the smoothed signal level information input from the signal level information smoothing circuit 1802. Since the weighting circuit 1803 weights the phase rotation amount information signal corresponding to the pilot signal, the signal level information extraction circuit 1801 uses the subcarrier signal corresponding to the pilot signal among the subcarrier signals output from the Fourier transform circuit 105. Is extracted. Further, as described above, the generation of each phase rotation amount information signal after weighting is performed, for example, such that the input phase rotation amount is used as a phase component and the input smoothed signal level is used as an amplitude component. This can be performed by generating a vector signal for each phase rotation amount information signal. The weighted phase rotation amount information signal output from the weighting circuit 1803 is input to the intra-symbol averaging circuit 1905. The averaging circuit in symbol 1905 is a weighting circuit
The averaging process is performed on the phase rotation amount information signal of each weighted pilot signal input from 1803 for each OFDM symbol in one OFDM symbol. In the above example, the averaging process of the phase components of the vector signals can be performed by calculating the vector sum of the vector signals corresponding to the respective pilot signals in one OFDM symbol. The amount of phase rotation of each subcarrier due to phase noise or residual carrier frequency error is substantially constant for each subcarrier within one OFDM symbol. Therefore, by averaging the phase rotation information signal of each pilot signal within one OFDM symbol, a noise component included in the signal is suppressed,
The phase rotation amount of each subcarrier signal in the OFDM symbol, which is caused by a factor such that the phase rotation amount of each subcarrier becomes the same within one OFDM symbol, such as the phase noise and the residual carrier frequency error, is accurately determined. You can know well. Since this averaging process is performed within one OFDM symbol, it corresponds to the averaging process in the frequency direction. The phase rotation information signal of each weighted pilot signal averaged in one OFDM symbol is output from the intra-symbol averaging circuit 1905 for each OFDM symbol. The phase rotation information signal of each pilot signal after averaging in one OFDM symbol output from the intra-symbol averaging circuit 1905 is input to the time-direction moving average circuit 1906. Time direction moving average circuit 1906
Is one OFDM symbol input for one OFDM symbol.
The phase rotation amount information signal of each weighted pilot signal averaged in the DM symbol is subjected to moving average processing in the time direction over a plurality of signals and output. By this moving average processing in the time direction, it is possible to further suppress noise components of the signal due to thermal noise or the like added to the signal in the receiving circuit 102. The phase rotation amount information signal after the moving average output from the time direction moving average circuit 1906 is input to the phase rotation correction circuit 1805.

The apparatus of this embodiment detects only a part of the detected signal by detecting the amount of phase rotation of each detected signal generated by the residual carrier frequency error and the phase noise from the signal component of the detected signal corresponding to the pilot signal. The above-described phase rotation amount can be efficiently detected, so that the circuit configuration of the common phase rotation detecting means can be simplified. Further, even when a large noise component is added to the detection signal, the reference signal point of the detection signal is not erroneously identified, so that the detection accuracy of the phase rotation amount is improved. . further,
The weighted phase rotation amount information is averaged in the frequency direction and averaged in the time direction, so that noise components included in the phase rotation amount information can be effectively suppressed. it can. That is, a highly accurate correction process for the phase rotation due to the residual carrier frequency error and the phase noise, which is difficult to realize with the conventional device, can be realized with a simple circuit.

(Twentieth Embodiment) OFD of this Embodiment
The M-packet communication receiving device will be described with reference to FIG. This form corresponds to claims 19, 20, and 29. This embodiment is a modification of the nineteenth embodiment. 20, components corresponding to those in the nineteenth embodiment are denoted by the same reference numerals. Nineteenth
The following description will be omitted with respect to the same portions as those of the embodiment.

The receiving apparatus for OFDM packet communication shown in FIG. 20 includes a time-direction moving average circuit 2001 instead of the signal level information smoothing circuit 1802. The signal level information of each pilot signal for each OFDM symbol output by the signal level information extraction circuit 1801 is applied to the input of the time direction moving average circuit 2001.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

The time direction moving averaging circuit 2001 performs time averaging processing in the time direction on the signal level information of each pilot signal output from the signal level information extraction circuit 1801 for each pilot signal. By this moving average processing, the signal level information of each pilot signal output from the signal level information extraction circuit 1801 is smoothed. Time direction moving average circuit 20
The signal level information of each pilot signal that has been subjected to the moving average processing by 01 is input to the weighting circuit 1803.

When the state of the transmission path (channel) due to fading changes within one packet, the signal level of each subcarrier signal changes according to the temporal position in the packet of the OFDM symbol to which the subcarrier signal belongs. Therefore, by averaging the signal level for each subcarrier using a plurality of OFDM symbols adjacent to the OFDM symbol, that is, performing a moving average process, it is possible to reduce the influence of noise components and reduce the variation in channel characteristics in a packet. It is possible to detect the signal level information of each subcarrier following. That is, the apparatus of the present example can perform the phase rotation correction with high accuracy even when the channel characteristics fluctuate within the packet.

(Twenty-first Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This embodiment corresponds to claims 19, 20 and 30. This embodiment is a modification of the nineteenth embodiment. In FIG. 21, elements corresponding to those of the nineteenth embodiment are denoted by the same reference numerals. Nineteenth
The following description will be omitted with respect to the same portions as those of the embodiment.

The receiver for OFDM packet communication shown in FIG. 21 includes an integrating circuit 2101 and a dividing circuit 2102 instead of the signal level information smoothing circuit 1802. Integrator circuit 2101
, The signal level information extraction circuit 1801 outputs
Signal level information of each pilot signal for each OFDM symbol is applied.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted by using a part (plurality) of subcarriers included in a received OFDM signal.

The integrating circuit 2101 is a signal level information extracting circuit
The signal level information of each pilot signal output by 1801 is integrated in the time direction for each pilot signal. Integrator circuit 2101
The signal level information of each pilot signal integrated by the above is input to the division circuit 2102. In order to calculate a signal level per one OFDM symbol of each pilot signal, the dividing circuit 2102 integrates the integrated value of the signal level information of each pilot signal output from the integrating circuit 2101 by the integrating circuit 2101. Each division is performed by the number of OFDM symbols.
Thus, by calculating the signal level per OFDM symbol of each pilot signal using the integrated value of the signal level of each pilot signal, it is possible to more accurately remove the thermal noise component as it goes after the packet. Becomes The signal level information per OFDM symbol of each pilot signal calculated by the division circuit 2102 is input to the weighting circuit 1803.

When the state of the transmission path (channel) due to fading hardly changes in a packet,
The signal level of each subcarrier signal is obtained by integrating the signal level of each subcarrier signal for each subcarrier, and dividing the integrated value by the number of times of integration, ie, the OFD obtained by integration.
It can be obtained by dividing by the number of M symbols. In this case, the OF which integrates as it goes after the packet
Since the number of DM symbols increases, the effect of smoothing, that is, the effect of suppressing noise components is improved, and the effect of thermal noise can be effectively reduced. Therefore, the signal level information of each subcarrier signal can be detected with high accuracy. That is, the apparatus of this example can perform the phase rotation correction with high accuracy when the channel characteristics in a packet hardly change within one packet period.

(Twenty-second Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form corresponds to claims 19, 20 and 31. This embodiment is a modification of the twenty-first embodiment. In FIG. 22, elements corresponding to those of the twenty-first embodiment are denoted by the same reference numerals. 21st
The following description will be omitted with respect to the same portions as those of the embodiment.

The receiver for OFDM packet communication in FIG. 22 includes a bit shift circuit 2201 instead of the division circuit 2102. The integrated value of the signal level information of each pilot signal output from the integration circuit 2101 is applied to the input of the bit shift circuit 2201.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

The bit shift circuit 2201 expresses the number of OFDM symbols integrated by the integration circuit 2101 as 2 ^N (N: natural number) in order to calculate the signal level per one OFDM symbol of each pilot signal. In this case, the integrated value of the signal level information of each pilot signal output from the integrating circuit 2101 is divided by N bits. This bit shift is performed only when the number of OFDM symbols integrated by the integration circuit 2101 is represented by 2 ^N (N: natural number), and the output of the bit shift circuit 2201 is updated. When the number of symbols is not represented by ^2N , the result of the previous bit shift is used as it is.
When the number of symbols is 1, the bit shift circuit 2201 outputs the input signal as it is. When such processing is performed, the output of the bit shift circuit 2201 is updated with higher frequency as going to the front of the packet, and the update frequency becomes lower as going toward the end of the packet. However, as described above, by calculating the signal level per 1 OFDM symbol of each pilot signal using the integrated value of the signal level of each pilot signal, the thermal noise component is removed more accurately as it goes after the packet. It is possible to do. Therefore, even if the update frequency after the packet is reduced, the characteristics do not deteriorate. Further, since the circuit scale required for performing the bit shift is generally very small, the circuit scale can be significantly reduced. The signal level information per OFDM symbol of each pilot signal calculated by the bit shift circuit 2201 is input to the weighting circuit 1803.

When the state of the transmission path (channel) due to fading hardly changes in a packet,
The signal level of each subcarrier signal is obtained by integrating the signal level of each subcarrier signal for each subcarrier, and dividing the integrated value by the number of times of integration, ie, the OFD obtained by integration.
It can be obtained by dividing by the number of M symbols. In this case, the OF which integrates as it goes after the packet
Since the number of DM symbols increases, the effect of smoothing, that is, the effect of suppressing noise components is improved, and the effect of thermal noise can be effectively reduced. Therefore, the signal level information of each subcarrier signal can be detected with high accuracy. Further, since the division for obtaining the signal level per one OFDM symbol of each subcarrier signal is realized by the bit shift, an increase in the circuit scale can be suppressed. Further, the bit shift is performed by the OFD after the integration processing.
Since it is performed only when the number of M symbols is represented by 2 ^N (N: natural number), the operation for each OFDM symbol is unnecessary,
Further, since the frequency of the bit shift processing decreases as the position goes after the packet, the power consumption can be significantly reduced. That is, the device of this example has a channel characteristic of 1 in a packet.
In the case where there is almost no change within the packet period, the phase rotation correction can be performed with high accuracy using a simple circuit with little power consumption.

(Twenty-third Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This embodiment corresponds to claims 18 and 38. This embodiment is a modification of the nineteenth embodiment. 23, elements corresponding to those in the nineteenth embodiment are denoted by the same reference numerals. The following description of the same parts as in the nineteenth embodiment is omitted.

The common phase rotation detector 2300 shown in FIG. 23 includes a phase rotation accumulated value calculation circuit 2301 and an intra-symbol averaging circuit.
2302, a time direction moving average circuit 2303, a division circuit 2304, and a delay correction circuit 2305 are provided.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

The phase rotation amount information signal of each pilot signal after weighting output from weighting circuit 1803 is input to phase rotation cumulative value calculation circuit 2301. The phase rotation cumulative value calculation circuit 2301 uses the phase rotation amount information signal of each weighted pilot signal input from the weighting circuit 1803 to calculate the phase noise from the channel estimation and the pilot signal resulting from the residual carrier frequency error from the time of channel estimation. Calculate the accumulated phase rotation amount. The calculation of the accumulated phase rotation amount is performed, for example, by calculating the phase rotation amount information signal of each weighted pilot signal input at the time of the OFDM symbol processing and the OF immediately before that.
The difference value of the phase rotation information signal of each weighted pilot signal input during the processing of the DM symbol is represented by one OF
This can be performed by integrating each DM symbol. The calculated phase rotation amount of each pilot signal caused by the calculated phase noise and residual carrier frequency error is output from the phase rotation cumulative value calculation circuit 2301. The cumulative phase rotation amount of each pilot signal output from the phase rotation cumulative value calculation circuit 2301 is input to the intra-symbol averaging circuit 2302.

The intra-symbol averaging circuit 2302 performs an averaging process in one OFDM symbol with respect to the accumulated phase rotation amount of each pilot signal input for each OFDM symbol from the phase rotation accumulated value calculation circuit 2301. . In the above example, the vector signals corresponding to the pilot signals in one OFDM symbol are vector-added. The amount of phase rotation of each subcarrier due to phase noise and residual carrier frequency error is substantially the same for each subcarrier within one OFDM symbol. Therefore, the accumulated value is also 10
In the FDM symbol, the subcarriers are almost the same. Therefore, by averaging the accumulated value of the phase rotation of each pilot signal within one OFDM symbol, the phase noise and the residual carrier frequency error common to the signals of the subcarriers in the OFDM symbol can be obtained. The accumulated value of rotation can be known with high accuracy. Since this averaging process is performed within one OFDM symbol, it corresponds to the averaging process in the frequency direction. The cumulative value of the phase rotation of each weighted pilot signal averaged in one OFDM symbol is one OFD
It is output from the intra-symbol averaging circuit 2302 for every M symbols. 1 OFDM output from intra-symbol averaging circuit 2302
The cumulative value of the phase rotation of each weighted pilot signal averaged in the symbol is calculated in a time-direction moving average circuit 2303.
Is input to

The time-direction moving average circuit 2303 has one O
The moving average processing in the time direction over a plurality of symbols is performed on the accumulated value of the phase rotation averaged in one OFDM symbol input for each FDM symbol and output. By this moving average processing in the time direction, it is possible to reduce signal deterioration due to thermal noise or the like added to the signal in the receiving circuit 102. The accumulated phase rotation amount information after the moving average output from the time direction moving average circuit 2303 is divided by the dividing circuit 23.
The signal is input to the delay correction circuit 2305 at the same time as the signal 04.

The dividing circuit 2304 comprises a time-direction moving average circuit 23.
With respect to the accumulated phase rotation amount information after the moving average input from 03, the delay caused by the moving average processing in the time direction moving average circuit 2303 is subtracted from the number of OFDM symbols cumulatively processed in the phase rotation cumulative value calculation circuit 2301. Divide by number. For example, the number of OFDM symbols cumulatively processed in the phase rotation cumulative value calculation circuit 2301 is 10
Consider a case where a moving average process is performed on three OFDM symbols in a time-direction moving average circuit 2303, which is a DM symbol. In this case, a moving average process of three OFDM symbols causes an error due to a delay of one OFDM symbol, so that the division circuit 2304 performs division by 9. Further, the accumulated value of the phase rotation caused by the phase noise is almost zero. Therefore, by this division, the amount of phase rotation per one OFDM symbol caused by the residual carrier frequency error is obtained. By calculating the amount of phase rotation per one OFDM symbol of each pilot signal using the accumulated value of the amount of phase rotation of each pilot signal in this way, the closer to the end of the packet, the more accurate the thermal noise and phase noise. The components can be removed. 1 due to the determined residual carrier frequency error
Phase rotation amount information per OFDM symbol is output from division circuit 2304. The phase rotation amount information per one OFDM symbol caused by the residual carrier frequency error output from the division circuit 2304 is input to the delay correction circuit 2305.

The delay correction circuit 2305 has one OFD signal due to the residual carrier frequency error input from the division circuit 2304.
Using the phase rotation amount information per M symbols, the delay error caused by the delay caused by the moving average processing included in the accumulated phase rotation amount information after the moving average input from the time direction moving average circuit 2303 is corrected. And the accumulated amount of phase rotation caused by the residual carrier frequency error and phase noise included in each subcarrier signal of the OFDM symbol. The accumulated phase rotation information after the delay error correction is output from the delay correction circuit 2305. The accumulated phase rotation amount information after the delay error correction output from the delay correction circuit 2305 is input to the phase rotation correction circuit 1805.

The phase rotation correction circuit 1805 includes a delay correction circuit 23
The phase rotation caused by the phase noise and the residual carrier frequency error included in the detection signal input from the synchronous detection circuit 107 is corrected using the accumulated phase rotation amount information after the delay error correction input from 05. The apparatus of this example uses the information of the amount of phase rotation weighted based on the high-precision signal quality information, and calculates the accumulated amount of the phase rotation of each detection signal caused by the residual carrier frequency error and the phase noise. By performing a phase rotation correction process on each detection signal using the calculation result obtained by the above, a highly accurate phase rotation correction process can be realized.

Further, since noise components can be effectively suppressed by performing the averaging process in the frequency direction and the time direction on the accumulated value of the phase rotation, thermal noise is added to the received signal at the time of the reception process. Even in this case, the accumulated amount of phase rotation of each detection signal caused by the residual carrier frequency error and the phase noise can be accurately detected.

Further, the amount of phase rotation per OFDM symbol caused by the residual carrier frequency error is calculated with high accuracy by dividing the above-described accumulated amount of phase rotation by the number of accumulated OFDM symbols, and based on this calculation result. In this way, the phase rotation accumulated value detection error generated at the time direction averaging process is removed, so that the accumulated amount of the phase rotation of each detection signal caused by the residual carrier frequency error and the phase noise can be detected with higher accuracy.

That is, it is possible to perform highly accurate correction processing for the phase rotation of each detection signal caused by the residual carrier frequency error and the phase noise, which is difficult to realize with the conventional apparatus.

(24th Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form corresponds to claims 18, 38 and 39. This embodiment is a modification of the twenty-third embodiment. In FIG. 24, elements corresponding to those of the twenty-third embodiment are denoted by the same reference numerals. 23rd
The following description will be omitted with respect to the same portions as those of the embodiment.

The receiving apparatus for OFDM packet communication in FIG. 24 includes a bit shift circuit 2401 instead of the division circuit 2304. To the input of the bit shift circuit 2401, the accumulated phase rotation amount information after the moving average output from the time direction moving average circuit 2303 is applied.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers among a number of subcarriers included in a received OFDM signal.

The bit shift circuit 2401 calculates the amount of phase rotation per one OFDM symbol of each pilot signal, so that the accumulated phase rotation information after the moving average output from the time direction moving average circuit 2303 is 2 bits. ^When the accumulated value of the phase rotation for ^N (N: natural number) OFDM symbols is an accumulated value, the accumulated phase rotation information after the moving average output from the time direction moving average circuit 2303 is shifted by N bits. Division by. Note that this bit shift is such that the accumulated phase rotation amount information after the moving average output from the time direction moving average circuit 2303 is the accumulated value of the phase rotation for 2 ^N (N: natural number) OFDM symbols. Done only at times,
The output of the bit shift circuit 2401 is updated. If the accumulated phase rotation amount information after the moving average output from the time direction moving average circuit 2303 is not the accumulated value of the phase rotations for ^2N OFDM symbols, the value obtained when the previous bit shift was performed Output the result as it is. Further, when the accumulated phase rotation amount information after the moving average output from the time-direction moving average circuit 2303 is a phase rotation value for one OFDM symbol, the bit shift circuit 2401 converts the input signal to Output as is. When such processing is performed, the output of the bit shift circuit 2401 is updated with higher frequency as going to the front of the packet, and the update frequency becomes lower as going toward the end of the packet. However, as described above, by calculating the amount of phase rotation per OFDM symbol of each subcarrier using the accumulated value of the amount of phase rotation of each pilot signal, thermal noise and phase can be more accurately shifted toward the end of the packet. It is possible to remove noise components. Therefore, even if the update frequency after the packet is reduced, the characteristics do not deteriorate. Further, since the circuit scale required for performing the bit shift is generally very small, the circuit scale can be significantly reduced. The average phase rotation amount information per OFDM symbol of each pilot signal calculated by the bit shift circuit 2401 is input to the delay correction circuit 2305.

That is, the device of this example can realize, with a simple circuit, a highly accurate correction process for the phase rotation due to the residual carrier frequency error and the phase noise, which is difficult to realize with the conventional device.

(Twenty-fifth Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form corresponds to claims 18, 29, 38 and 39. This embodiment is a modification of the twenty-fourth embodiment. In FIG. 25, elements corresponding to those of the twenty-fourth embodiment are denoted by the same reference numerals. The following description is abbreviate | omitted about the same part as a 24th embodiment.

The receiver for OFDM packet communication in FIG. 25 includes a time-direction moving average circuit 2501 instead of the signal level information smoothing circuit 1802. The signal level information of each pilot signal for each OFDM symbol output by the signal level information extraction circuit 1801 is applied to the input of the time direction moving average circuit 2501.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

[0287] The time direction moving average circuit 2501 performs moving average processing in the time direction on the signal level information of each pilot signal output from the signal level information extraction circuit 1801 for each pilot signal. By this moving average processing, the signal level information of each pilot signal output from the signal level information extraction circuit 1801 is smoothed. Time moving average circuit 25
The signal level information of each pilot signal that has been subjected to the moving average processing by 01 is input to the weighting circuit 1803.

When the state of the transmission path (channel) due to fading changes within one packet, the signal level of each subcarrier signal changes according to the temporal position in the OFDM symbol packet to which the subcarrier signal belongs. Therefore, by averaging the signal levels for each subcarrier using a plurality of OFDM symbols adjacent to the OFDM symbol, that is, performing a moving average process, it is possible to reduce the influence of noise components and reduce fluctuations in channel characteristics within a packet. It is possible to detect the signal level information of each subcarrier following. In other words, the apparatus of this example performs a highly accurate correction process for the phase rotation due to the residual carrier frequency error and the phase noise, which is difficult to achieve with the conventional apparatus, even when the channel characteristics fluctuate within the packet. Can be realized by a simple circuit.

(Twenty-Sixth Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form corresponds to claims 18, 30, 38 and 39. This embodiment is a modification of the twenty-fourth embodiment. In FIG. 26, components corresponding to those of the twenty-fourth embodiment are denoted by the same reference numerals. The following description is abbreviate | omitted about the same part as a 24th embodiment.

The receiving apparatus for OFDM packet communication shown in FIG. 26 includes an integrating circuit 2601 and a dividing circuit 2602 instead of the signal level information smoothing circuit 1802. Integrator 2601
, The signal level information extraction circuit 1801 outputs
Signal level information of each pilot signal for each OFDM symbol is applied.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

The integrating circuit 2601 is a signal level information extracting circuit
The signal level information of each pilot signal output by 1801 is integrated in the time direction for each pilot signal. Integrator 2601
The signal level information of each pilot signal integrated by the above is input to the division circuit 2602. The dividing circuit 2602 integrates the integrated value of the signal level information of each pilot signal output from the integrating circuit 2601 by the integrating circuit 2601 in order to calculate the signal level per one OFDM symbol of each pilot signal. Each division is performed by the number of OFDM symbols.
Thus, by calculating the signal level per OFDM symbol of each pilot signal using the integrated value of the signal level of each pilot signal, it is possible to more accurately remove the thermal noise component as it goes after the packet. Becomes Signal level information per OFDM symbol of each pilot signal calculated by the division circuit 2602 is input to the weighting circuit 1803.

When the state of the transmission path (channel) due to fading hardly changes in a packet,
The signal level of each subcarrier signal is obtained by integrating the signal level of each subcarrier signal for each subcarrier, and dividing the integrated value by the number of times of integration, ie, the OFD obtained by integration.
It can be obtained by dividing by the number of M symbols. In this case, the OF which integrates as it goes after the packet
Since the number of DM symbols increases, the effect of smoothing, that is, the effect of suppressing noise components is improved, and the effect of thermal noise can be effectively reduced. Therefore, the signal level information of each subcarrier signal can be detected with high accuracy. That is, the device of this example has a high accuracy for the phase rotation due to the residual carrier frequency error and the phase noise, which is difficult to realize with the conventional device, when the channel characteristics hardly change within one packet period in the packet. Correction processing can be realized by a simple circuit.

(27th Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This embodiment corresponds to claims 18, 31, 38, and 39. This embodiment is a modification of the twenty-sixth embodiment. 27, elements corresponding to those of the twenty-sixth embodiment are denoted by the same reference numerals. The description of the same parts as those of the twenty-sixth embodiment is omitted.

The receiver for OFDM packet communication in FIG. 27 includes a bit shift circuit 2701 instead of the division circuit 2602. The integrated value of the signal level information of each pilot signal output from the integration circuit 2601 is applied to the input of the bit shift circuit 2701.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

The bit shift circuit 2701 expresses the number of OFDM symbols integrated by the integration circuit 2601 as 2 ^N (N: natural number) in order to calculate a signal level per one OFDM symbol of each pilot signal. In this case, the integral value of the signal level information of each pilot signal output from the integrating circuit 2601 is divided by N bits. This bit shift is performed only when the number of OFDM symbols integrated by the integration circuit 2601 is represented by 2 ^N (N: natural number), and the output of the bit shift circuit 2701 is updated. When the number of symbols is not represented by ^2N , the result of the previous bit shift is used as it is.
When the number of symbols is 1, the bit shift circuit 2701 outputs the input signal as it is. When such processing is performed, the output of the bit shift circuit 2701 is updated with higher frequency as going to the front of the packet, and the update frequency becomes lower as going toward the end of the packet. However, as described above, by calculating the signal level per 1 OFDM symbol of each pilot signal using the integrated value of the signal level of each pilot signal, the thermal noise component is removed more accurately as it goes after the packet. It is possible to do. Therefore, even if the update frequency after the packet is reduced, the characteristics do not deteriorate. Further, since the circuit scale required for performing the bit shift is generally very small, the circuit scale can be significantly reduced. Signal level information per OFDM symbol of each pilot signal calculated by the bit shift circuit 2701 is input to the weighting circuit 1803.

When the state of the transmission path (channel) due to fading hardly changes in a packet,
The signal level of each subcarrier signal is obtained by integrating the signal level of each subcarrier signal for each subcarrier, and dividing the integrated value by the number of times of integration, ie, the OFD obtained by integration.
It can be obtained by dividing by the number of M symbols. In this case, the OF which integrates as it goes after the packet
Since the number of DM symbols increases, the effect of smoothing, that is, the effect of suppressing noise components is improved, and the effect of thermal noise can be effectively reduced. Therefore, the signal level information of each subcarrier signal can be detected with high accuracy. Further, since the division for obtaining the signal level per one OFDM symbol of each subcarrier signal is realized by the bit shift, an increase in the circuit scale can be suppressed. Further, the bit shift is performed by the OFD after the integration processing.
Since it is performed only when the number of M symbols is represented by 2 ^N (N: natural number), the operation for each OFDM symbol is unnecessary,
Further, since the frequency of the bit shift processing decreases as the position goes after the packet, the power consumption can be significantly reduced. That is, the device of this example has a channel characteristic of 1 in a packet.
In the case where there is almost no change within the packet period, a highly accurate correction process for the phase rotation due to the residual carrier frequency error and the phase noise, which is difficult to realize with the conventional device, can be realized with a simple circuit.

(28th Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form corresponds to claims 18, 22, 40 and 41. This embodiment is a modification of the eighteenth embodiment. 28, elements corresponding to those in the eighteenth embodiment are denoted by the same reference numerals. The following description is abbreviate | omitted about the same part as 18th Embodiment.

The phase rotation amount information extraction unit 2800 shown in FIG. 28 includes a subcarrier signal extraction circuit 2803 in a specific symbol, a hard decision circuit 2804, and a phase rotation detection circuit 2805. , Symbol average circuit
2806, unit amount calculation circuit 2807 and phase rotation amount estimation circuit 28
01 is equipped.

[0301] The channel estimation result output from the channel estimation circuit 106 is input to the synchronous detection circuit 107 and also to the weight coefficient calculation circuit 2802. Weight coefficient calculation circuit
2802 calculates and outputs a weight coefficient corresponding to the communication quality for each subcarrier based on the channel estimation result of each subcarrier input from channel estimation circuit 106. For example, as a measure representing the communication quality of each subcarrier,
The received signal level of each subcarrier signal can be considered.
These received signal levels can be obtained by performing a simple operation using the channel estimation result of each subcarrier input from the channel estimation circuit 106. For example, the amplitude component of the channel estimation result of each subcarrier is 2
It can be obtained by taking a square. The weight coefficient for each subcarrier output from the weight coefficient calculation circuit 2802 is input to the weight circuit 1803. On the other hand, the detection signal output from the synchronous detection circuit 107 is input to the subcarrier signal extraction circuit 2803 in the specific symbol and the phase rotation correction circuit
Entered in 1805. The specific symbol subcarrier signal extraction circuit 2803 extracts, from the input detection signal, detection signals of all subcarriers included in at least one specific OFDM symbol near a predetermined packet head, and outputs the extracted detection signals. Each detection signal output from the subcarrier signal extraction circuit 2803 in the specific symbol is converted into a phase rotation detection circuit 28.
It is input to 05 and to the hard decision circuit 2804.
The hard decision circuit 2804 performs a hard decision on each of the detection signals input from the intra-specific-symbol subcarrier signal extraction circuit 2803, and outputs each decision result. Hard decision circuit
Each judgment result output from 2804 is the phase rotation detection circuit 2805
Is input to The phase rotation detection circuit 2805 is a hard decision circuit 28
Based on each determination result input from 04, a phase rotation amount due to a residual carrier frequency error is detected and output for each of the detection signals input from the specific symbol subcarrier signal extraction circuit 2803. For example, when the detection signal extracted by the subcarrier signal extraction circuit 2803 in the specific symbol is BPSK-modulated, the signal after synchronous detection is originally two reference signal points S0 shown in FIG. And appear in any position of S1. However, if the signal output from the synchronization processing circuit 103 has a phase rotation due to the residual carrier frequency error, each of the synchronously detected detection signals has a phase rotation proportional to the amount of the residual carrier frequency error. The positions of the detection signals (for example, R0 and R1 in FIG. 46) output from the circuit 107 do not coincide with any one of the original reference signal points. The phase rotation detection circuit 2805 detects a phase rotation amount or a signal corresponding thereto for the detection signal of each subcarrier and outputs the detected signal. For example, when the input signal R0 shown in FIG. 46 is a detection signal output from the synchronous detection circuit 107, the hard decision circuit 2804 determines the reference signal point whose position is closest to the input signal R0 among the reference signal points S0 and S1. Since S0 is output, the phase rotation detection circuit 28
05 detects and outputs the phase difference P0 between the reference signal point S0 and the input signal R0. When the input signal R1 shown in FIG. 46 is a detection signal output from the synchronous detection circuit 107,
Since the hard decision circuit 2804 outputs the reference signal point S1 whose position is closest to the input signal R1 among the reference signal points S0 and S1, the phase rotation detection circuit 2805 outputs the reference signal point S1.
And a phase difference P1 between the input signal R1 and the output. The phase rotation amount information signal of each subcarrier output from the phase rotation detection circuit 2805 is input to the weighting circuit 1803. The weighting circuit 1803 weights and outputs the phase rotation amount information signal of each subcarrier input from the phase rotation detection circuit 2805 based on the weight coefficient of each subcarrier input from the weight coefficient calculation circuit 2802. By this weighting, it is possible to suppress an adverse effect caused by using the phase rotation amount information whose reliability of information is reduced due to fading or the like. The phase rotation amount information signal of each subcarrier after weighting output from weighting circuit 1803 is input to intra-symbol averaging circuit 2806. The intra-symbol averaging circuit 2806 outputs the OF signal input from the weighting circuit 1803.
By performing an averaging process on the phase rotation amount information signals of all subcarriers after weighting the DM symbol,
The effect of thermal noise and the like added in the receiving circuit 102 is suppressed, and the amount of phase rotation common to each subcarrier caused by the residual carrier frequency error is calculated and output with high accuracy. The highly accurate phase rotation amount information signal output from the intra-symbol averaging circuit 2806 is input to the unit amount calculation circuit 2807.
The unit amount calculation circuit 2807 calculates and outputs the phase rotation amount per 1 OFDM symbol caused by the residual carrier frequency error of the detection signal using the high-precision phase rotation amount information signal input from the intra-symbol averaging circuit 2806. I do. This calculation is performed, for example, by setting the time interval between the channel estimation preamble signal shown in FIG.
This can be easily performed by dividing the highly accurate phase rotation amount information input from the intra-symbol averaging circuit 2806 by the value divided by the OFDM symbol interval. The signal output from the unit amount calculation circuit 2807 is a phase rotation amount estimation circuit 28
Entered in 08. The phase rotation amount estimating circuit 2808 uses the phase rotation amount per OFDM symbol caused by the residual carrier frequency error of the detection signal input from the unit amount calculation circuit 2807, and calculates the synchronous detection circuit based on the above equation (6). 107
And outputs a phase rotation amount information signal by estimating the amount of phase rotation caused by the residual carrier frequency error added to the detection signal output from. This phase rotation amount is estimated by, for example, dividing a time interval between an OFDM symbol including the detection signal and the channel estimation preamble signal shown in FIG. 44 by one OFDM symbol interval into a unit amount calculation circuit 2807. By multiplying the amount of phase rotation per OFDM symbol caused by the residual carrier frequency error of the detection signal input from, it can be easily performed.
The phase rotation amount information signal of each detection signal output from the phase rotation amount estimation circuit 2808 is input to the phase rotation correction circuit 1805. The phase rotation correction circuit 1805 includes a phase rotation amount estimation circuit 2808.
The phase rotation caused by the residual carrier frequency error of each detection signal is corrected by using the phase rotation amount information signal of each detection signal input from, and the detection signal after the phase rotation correction is output.

That is, when there is a residual carrier frequency error in the signal output from the synchronization processing means, the detection signals of all the subcarriers of the specific OFDM symbol output from the synchronization detection means are the same as those of the above (6). Due to the amount of phase rotation corresponding to the amount of the residual carrier frequency error as shown in equation (1), the signal appears at a position shifted from the reference signal point on the phase plane. Therefore, by checking the deviation between each detection signal and the reference signal point and detecting the amount of phase rotation, the amount of the residual carrier frequency error or one OFDM symbol due to the residual carrier frequency error is calculated based on the above equation (6). Can be detected. Specific OFD mentioned above
Since detection is performed using detection signals of all subcarriers within the period of M symbols, detection can be performed with high accuracy.

As described above, the reference signal point can be obtained by hard-deciding each detection signal described above. In general, a signal modulated by a low-speed modulation scheme is more resistant to noise components than a signal modulated by a high-speed modulation scheme. (For example, the above-mentioned specific detection signal is BPSK-modulated,
When other detection signal is 16QAM modulated)
In this case, a hard decision can be made with high accuracy. That is,
It is possible to accurately detect the amount of residual carrier frequency error or the amount of phase rotation per 1 OFDM symbol caused by the residual carrier frequency error.

Further, using this detection result, the specific O
Since the amount of phase rotation for a detection signal included in an OFDM symbol other than an FDM symbol can be easily obtained based on the above equation (6), when the specific OFDM symbol is set near the beginning of a packet, Can correct the phase rotation of each detection signal in a packet with a small processing delay.

Furthermore, in a frequency selective fading environment, which is a general propagation environment in wireless communication, since the communication quality differs for each subcarrier, the phase rotation detected from the detection signal of the subcarrier having good communication quality is obtained. By processing a signal in which the weight of the quantity signal is increased, the influence of fading or the like can be suppressed, and the accuracy of detecting the residual carrier frequency error can be improved. Further, by processing the phase rotation amount signal smoothed in the OFDM symbol, the influence of thermal noise and the like can be suppressed, and the detection accuracy of the residual carrier frequency error can be improved.

That is, the apparatus of this example can realize a highly accurate correction process for the phase rotation due to the residual carrier frequency error, which was difficult to realize with the conventional apparatus, with a small processing delay.

(29th Embodiment) OFD of this Embodiment
An M-packet communication receiving device will be described with reference to FIG. This form corresponds to claims 18, 22, 23, 40, 41 and 42. This embodiment is a modification of the twenty-eighth embodiment.
29, elements corresponding to those in the twenty-eighth embodiment are denoted by the same reference numerals. The description of the same parts as those in the twenty-eighth embodiment is omitted.

The phase rotation amount information extraction section 2900 shown in FIG. 29 includes a subcarrier signal extraction circuit 2803 in a specific symbol, a hard decision circuit 2804, and an inverse modulation circuit 2902, and the common phase rotation detection section 2901 includes: An intra-symbol vector sum operation circuit 2903, a phase detection circuit 2904, a unit amount operation circuit 2807, and a phase rotation amount estimation circuit 2801 are provided.

Circuit for extracting subcarrier signal in specific symbol
Each detection signal output from 2803 is input to an inverse modulation circuit 2902 and also to a hard decision circuit 2804. Each determination result output from the hard decision circuit 2804 is input to the inverse modulation circuit 2902. The inverse modulation circuit 2902 performs an inverse modulation process on the baseband for each of the detection signals input from the specific symbol subcarrier signal extraction circuit 2803 based on each determination result input from the hard decision circuit 2804. , And outputs a complex vector signal after inverse modulation. By this inverse modulation process, the signal components added by the modulation process on the transmission side are removed from each detection signal input from the subcarrier signal extraction circuit 2803 in the specific symbol. Therefore, the signal after the inverse modulation includes only the phase component due to the phase rotation generated due to the residual carrier frequency error and the component such as the thermal noise added in the receiving circuit 102. The complex vector signal of each subcarrier after inverse modulation output from inverse modulation circuit 2902 is input to weighting circuit 1803. The weighting circuit 1803 weights and outputs the complex vector signal of each subcarrier after inverse modulation input from the inverse modulation circuit 2902 based on the weighting factor of each subcarrier input from the weighting factor arithmetic circuit 2802. . This weighting is realized, for example, by using the weighting factor of each subcarrier output from the weighting factor calculation circuit 2802 as the amplitude component of the complex vector signal of each subcarrier after inverse modulation input from the inverse modulation circuit 2902. it can. By this weighting, it is possible to suppress an adverse effect caused by using the phase rotation amount information whose reliability of information is reduced due to fading or the like. The weighted complex vector signal output from the weighting circuit 1803 is input to the intra-symbol vector sum operation circuit 2903. The intra-symbol vector sum operation circuit 2903 receives the OF signal input from the weighting circuit 1803.
The vector sum of all complex vector signals after weighting the DM symbol is calculated. By this vector sum operation,
Smoothing of the phase component of the complex vector signal input from the weighting circuit 1803 is realized. By the smoothing of the phase component, the influence of thermal noise and the like added in the receiving circuit 102 can be suppressed. That is, the phase component of the complex vector signal output from the intra-symbol vector sum operation circuit 2903 represents the phase rotation amount common to the respective subcarriers caused by the residual carrier frequency error with high accuracy. In-symbol vector sum operation circuit 29
03 is output to the phase detector 2904
Is input to The phase detection circuit 2904 detects the phase component of the complex vector signal input from the intra-symbol vector sum operation circuit 2903 and outputs a phase component information signal. The phase component information signal output from the phase detection circuit 2904 is input to the unit amount calculation circuit 2807.

That is, the apparatus of this example can realize a highly accurate correction process for the phase rotation due to the residual carrier frequency error, which was difficult to realize with the conventional apparatus, with a small processing delay.

(Thirtieth Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This aspect corresponds to claims 18, 22, 24, 40, 41, and 42. This embodiment is a modification of the twenty-ninth embodiment.
30, elements corresponding to those in the twenty-ninth embodiment are denoted by the same reference numerals. The following description of the same parts as in the twenty-ninth embodiment is omitted.

The phase rotation amount information extraction section 3000 shown in FIG. 30 includes a subcarrier signal extraction circuit 2803 in a specific symbol, a hard decision circuit 2804, and a sign inversion control circuit 3001.

FIG. 30 shows at least one specific signal used to detect phase rotation due to a residual carrier frequency error.
Each subcarrier signal of one OFDM symbol is modulated by a modulation method such as BPSK or QPSK, in which a transition from a certain reference signal point to an arbitrary reference signal point is possible only by code inversion processing. It is a configuration example in the case.

Subcarrier signal extraction circuit in specific symbol
Each detection signal, which is the output signal of 2803, is
The signal is input to the hard decision circuit 2804 while being input to 3001. The sign inversion control circuit 3001 implements an inverse modulation process on each input detection signal by a sign inversion process. Each complex vector signal after sign inversion processing output from the sign inversion control circuit 3001 is input to the weighting circuit 1803.

For example, each subcarrier signal is modulated by a modulation method such as BPSK or QPSK, in which a transition from one reference signal point to another reference signal point is possible only by code inversion processing. In this case, the inverse modulation processing can be realized by inverting the sign of the signal, so that the circuit configuration of the inverse modulation means can be simplified. In other words, the device of this example can realize a highly accurate correction process for the phase rotation due to the residual carrier frequency error, which was difficult to achieve with the conventional device, with a simple circuit and a small processing delay.

(Thirty-first Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This embodiment corresponds to claim 26. This embodiment is a modification of the twenty-eighth embodiment. 31, components corresponding to those in the twenty-eighth embodiment are denoted by the same reference numerals. The description of the same parts as those in the twenty-eighth embodiment is omitted.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted by using a part (plurality) of subcarriers among many subcarriers included in a received OFDM signal.

Each detection signal output from the synchronous detection circuit 107 is input to a specific symbol subcarrier extraction circuit 2803 and a phase rotation correction circuit 1805, and is also input to a pilot signal extraction circuit 3101. Pilot signal extraction circuit 3101
Then, a detection signal corresponding to a pilot signal included in each detection signal input from the synchronous detection circuit 107 is extracted and output. The signal output from pilot signal extraction circuit 3101 is input to phase rotation detection circuit 3102. On the other hand, reference signal output circuit 3103 outputs a reference signal corresponding to a detection signal corresponding to the pilot signal input from pilot signal extraction circuit 3101 to phase rotation detection circuit 3102. As described above, since the pilot signal is a known signal, the above-mentioned reference signal can be easily output. The reference signal output from the reference signal output circuit 3103 is input to the phase rotation detection circuit 3102. The phase rotation detection circuit 3102, based on the reference signal input from the reference signal output circuit 3103,
A phase rotation amount of a detection signal corresponding to a pilot signal input from pilot signal extraction circuit 3101 is detected, and a phase rotation amount information signal is output. The phase rotation amount information signal output from the phase rotation detection circuit 3102 is
Entered in 04. The common phase rotation detection circuit 3104 detects a phase rotation amount per 1 OFDM symbol common to each detection signal caused by a residual carrier frequency error based on the phase rotation amount information input from the phase rotation detection circuit 3102, and Output as frequency error information. The residual carrier frequency error information output from the common phase rotation detection circuit 3104 is input to the selection circuit 3106. On the other hand, the phase rotation amount information signal of each subcarrier after weighting output from weighting circuit 1803 is input to common phase rotation detection circuit 3105. The common phase rotation detection circuit 3105 is a weighting circuit
Based on the weighted phase rotation amount information input from 1803, the phase rotation amount per 1 OFDM symbol common to each detection signal caused by the residual carrier frequency error is detected and output as residual carrier frequency error information. The residual carrier frequency error information output from the common phase rotation detection circuit 3105 is input to the selection circuit 3106. Here, the difference between the residual carrier frequency error information output from the common phase rotation detection circuit 3104 and the residual carrier frequency error information output from the common phase rotation detection circuit 3105 will be simply described. The residual carrier frequency error information output from the common phase rotation detection circuit 3104 is information detected using a detection signal corresponding to a pilot signal.
The residual carrier frequency error information output from 05 is
This is information detected using each detection signal included in the FDM symbol. As a matter of course, the residual carrier frequency error information detected using a large number of detection signals has higher detection accuracy. In this example, by using a part (plurality) of a number of subcarriers included in a received OFDM signal,
Since it is assumed that a pilot signal that is a known signal is transmitted, the number of detection signals corresponding to the pilot signal to be processed increases with time, but the number of detection signals included in a specific OFDM symbol is increased. The number of signals does not increase beyond a certain value over time. It is assumed that one OFDM symbol includes a total of 52 subcarriers, and four of the 52 subcarriers are used to transmit a pilot signal. Also, the number of the specific OFDM symbols is 1
, The common phase rotation detection circuit 3104 outputs 52 or more signals included in 13 or more OFDM symbols.
It is clear that the accuracy of the signal output by the common phase rotation detection circuit 3104 is higher than the accuracy of the signal output by the common phase rotation detection circuit 3105. However, if the number of pilot signals processed by the common phase rotation detection circuit 3104 is less than 52, the accuracy of the signal is
The signal output by 3105 is higher.

The selection circuit 3106 includes the common phase rotation detection circuit 31
Of the residual carrier frequency error information input from 04 and the residual carrier frequency error information input from the common phase rotation detection circuit 3105, one of the highly accurate signals is selected and output. As described above, which signal has higher accuracy can be easily determined, for example, according to the number of OFDM symbols corresponding to each detection signal processed by the synchronous detection circuit 107. The residual carrier frequency error information output from the selection circuit 3106 is input to the phase rotation amount estimation circuit 2808.

That is, when there is a residual carrier frequency error in the signal output from the synchronization processing means, the detection signals of all the subcarriers of the specific OFDM symbol output from the synchronization detection means are the same as those of the above (6). Due to the phase rotation common to the respective subcarriers according to the amount of residual carrier frequency error as shown in the expression, the signal appears at a position shifted from the reference signal point on the phase plane. Therefore, by detecting the deviation between each detection signal and the reference signal point and detecting the amount of phase rotation common to each detection signal within the OFDM symbol period,
The amount of residual carrier frequency error or the amount of phase rotation per OFDM symbol due to the residual carrier frequency error can be detected based on the above equation (6). Since the detection is performed using the detection signals of all the subcarriers within the period of the specific OFDM symbol, the detection can be performed with high accuracy.

Further, as described above, the reference signal point can be obtained by hard-deciding each detection signal described above. In general, a signal modulated by a low-speed modulation scheme is more resistant to noise components than a signal modulated by a high-speed modulation scheme. (For example, the above-mentioned specific detection signal is BPSK-modulated,
When other detection signal is 16QAM modulated)
In this case, a hard decision can be made with high accuracy. That is,
It is possible to accurately detect the amount of residual carrier frequency error or the amount of phase rotation per 1 OFDM symbol caused by the residual carrier frequency error.

Further, using this detection result, the specific O
Since the amount of phase rotation with respect to a detection signal included in an OFDM symbol other than an FDM symbol can be easily obtained based on the above equation (6), when the specific OFDM symbol is set near the beginning of a packet, Can calculate the amount of phase rotation of each detection signal from the head of a packet with a small processing delay.

Furthermore, in a frequency selective fading environment, which is a general propagation environment in wireless communication, since the communication quality differs for each subcarrier, the phase rotation detected from the detection signal of the subcarrier having good communication quality is obtained. By processing a signal in which the weight of the quantity signal is increased, the influence of fading and the like can be suppressed, and the detection accuracy of the residual carrier frequency error can be improved.

However, as described above, simply detecting the amount of phase rotation caused by the residual carrier frequency error from the detection signal within the period of the specific OFDM symbol output from the synchronous detection means can achieve a detection accuracy of a certain level or more. I can't get it. On the other hand, the amount of phase rotation of the known pilot signal included in each OFDM symbol in the packet is detected for each OFDM symbol, not only from the specific detection signal described above, and the residual carrier frequency error is converted from a sufficiently large number of pilot signals. By calculating the average value of the phase rotation amounts per 1 OFDM symbol, the detection accuracy of the residual carrier frequency error can be improved. However, in order to obtain a high detection accuracy, it is necessary to process a very large number of pilot signals. Therefore, during the processing of the OFDM symbol near the head of the packet, in principle, it is necessary to obtain a certain level of detection accuracy. Can not. In particular, since the number of pilot signals included in one OFDM symbol is very small as compared with the number of subcarriers, the residual carrier frequency error detected using only the pilot signals of some OFDM symbols near the beginning of the packet is reduced. The detection accuracy is lower than the detection accuracy of the residual carrier frequency error detected using the detection signals of all the subcarriers included in the specific OFDM symbol. Therefore, for the phase rotation caused by the residual carrier frequency error included in the OFDM symbol near the head of the packet, the phase correction amount detected using the detection signals of all the subcarriers in the specific OFDM symbol period as described above is calculated. And for the phase rotation contained in the subsequent OFDM symbol,
By performing the correction using the phase correction amount obtained by detecting the phase rotation amount of the known pilot signal included in each OFDM symbol for each OFDM symbol as described above,
High-precision phase correction can be performed over the entire packet.

That is, the apparatus of this example can realize a highly accurate correction process for the phase rotation due to the residual carrier frequency error, which was difficult to realize with the conventional apparatus, with a small processing delay.

(32nd Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form corresponds to claims 26 and 44. This embodiment is a modification of the thirty-first embodiment. 32, elements corresponding to those in the thirty-first embodiment are denoted by the same reference numerals. The description of the same parts as those of the thirty-first embodiment is omitted.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

The common phase rotation detecting section 3200 shown in FIG. 32 includes an intra-symbol averaging circuit 3201 and a unit amount calculating circuit 3202.
Is provided.

The weighted phase rotation amount information signal of each subcarrier output from the weighting circuit 1803 is input to the intra-symbol averaging circuit 3201. Average circuit within symbol 3201
The averaging process is performed on the phase rotation amount information signals of all the subcarriers after the weighting of the OFDM symbol input from the weighting circuit 1803, so that the receiving circuit
An effect of thermal noise or the like added in 102 is suppressed, and a phase rotation amount common to each subcarrier generated due to a residual carrier frequency error is calculated and output with high accuracy. The high-precision phase rotation amount information signal output from the intra-symbol averaging circuit 3201 is input to the unit amount calculation circuit 3202. The unit amount calculation circuit 3202 calculates and outputs the phase rotation amount per 1 OFDM symbol caused by the residual carrier frequency error of the detection signal using the high-precision phase rotation amount information signal input from the intra-symbol averaging circuit 3201. I do. The signal output from the unit amount calculation circuit 3202 is input to the selection circuit 3106.

As described above, by processing the phase rotation amount signal smoothed in the OFDM symbol, the influence of thermal noise and the like is suppressed, and the phase common to each subcarrier generated due to the residual carrier frequency error is reduced. The detection accuracy of the rotation amount can be improved. That is, the apparatus of this example can realize a highly accurate correction process for the phase rotation due to the residual carrier frequency error, which is difficult to realize with the conventional apparatus, with a small processing delay.

(Thirty-third Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form corresponds to claims 26, 44, 45 and 49. This embodiment is a modification of the thirty-second embodiment. In FIG. 33, elements corresponding to those of the 32nd embodiment are denoted by the same reference numerals. The following description is abbreviate | omitted about the same part as a 32nd embodiment.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

The common phase rotation detector 3300 shown in FIG. 33 includes an intra-symbol vector sum operation circuit 3302, a phase detection circuit
3303 and a unit amount calculation circuit 3202 are provided.

Circuit for extracting subcarrier signal in specific symbol
Each detection signal output from 2803 is input to an inverse modulation circuit 3301 and also to a hard decision circuit 2804. Each determination result output from the hard decision circuit 2804 is input to the inverse modulation circuit 3301. The inverse modulation circuit 3301 performs an inverse modulation process on the baseband with respect to each of the detection signals input from the specific symbol subcarrier signal extraction circuit 2803 based on each determination result input from the hard decision circuit 2804. , And outputs a complex vector signal after inverse modulation. By this inverse modulation process, the signal components added by the modulation process on the transmission side are removed from each detection signal input from the subcarrier signal extraction circuit 2803 in the specific symbol. Therefore, the signal after the inverse modulation includes only the phase component due to the phase rotation generated due to the residual carrier frequency error and the component such as the thermal noise added in the receiving circuit 102. The complex vector signal of each subcarrier after inverse modulation output from inverse modulation circuit 3301 is input to weighting circuit 1803. The weighting circuit 1803 weights and outputs the complex vector signal of each subcarrier after inverse modulation input from the inverse modulation circuit 3301 based on the weighting factor of each subcarrier input from the weighting factor calculation circuit 2802. . This weighting is realized, for example, by using the weighting factor of each subcarrier output from the weighting factor calculation circuit 2802 as the amplitude component of the complex vector signal of each subcarrier after inverse modulation input from the inverse modulation circuit 3301. it can. The weighted complex vector signal output from the weighting circuit 1803 is input to the intra-symbol vector sum operation circuit 3302. The intra-symbol vector sum calculation circuit 3302 calculates the vector sum of all the weighted complex vector signals of the OFDM symbol input from the weighting circuit 1803. By this vector sum operation, smoothing of the phase component of the complex vector signal input from the weighting circuit 1803 is realized.
By the smoothing of the phase component, the influence of thermal noise and the like added in the receiving circuit 102 can be suppressed. That is, the phase component of the complex vector signal output from the intra-symbol vector sum operation circuit 3302 represents the phase rotation amount common to the respective subcarriers caused by the residual carrier frequency error with high accuracy. The complex vector signal output from the intra-symbol vector sum operation circuit 3302 is input to the phase detection circuit 3303. The phase detection circuit 3303 detects the phase component of the complex vector signal input from the intra-symbol vector sum operation circuit 3302 and outputs a phase component information signal. The phase component information signal output from the phase detection circuit 3303 is input to the unit amount calculation circuit 3202.

That is, the device of this example can realize a highly accurate correction process for the phase rotation due to the residual carrier frequency error, which was difficult to realize with the conventional device, with a small processing delay.

(34th embodiment) OFD of this embodiment
The receiving device for M packet communication will be described with reference to FIG. This form corresponds to claims 26, 44, 46 and 49. This embodiment is a modification of the thirty-third embodiment. In FIG. 34, elements corresponding to those of the thirty-third embodiment are denoted by the same reference numerals. The following description is abbreviate | omitted about the part same as a 33rd embodiment.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

Note that FIG. 34 shows at least one specific signal used to detect phase rotation due to a residual carrier frequency error.
Each subcarrier signal of one OFDM symbol is modulated by a modulation method such as BPSK or QPSK, in which a transition from a certain reference signal point to an arbitrary reference signal point is possible only by code inversion processing. It is a configuration example in the case.

Circuit for extracting subcarrier signal in specific symbol
Each detection signal, which is the output signal of 2803, is
The signal is input to the hard decision circuit 2804 while being input to 3401. The sign inversion control circuit 3401 implements an inverse modulation process on each input detection signal by a sign inversion process. Each complex vector signal after sign inversion processing output from the sign inversion control circuit 3401 is input to the weighting circuit 1803.

For example, each subcarrier signal is modulated by a modulation method such as BPSK or QPSK, in which a transition from one reference signal point to another reference signal point is possible only by code inversion processing. In such a case, the inverse modulation processing can be realized by inverting the sign of the signal, so that the circuit configuration of the inverse modulation means can be simplified. In other words, the device of this example can realize a highly accurate correction process for the phase rotation due to the residual carrier frequency error, which was difficult to achieve with the conventional device, with a simple circuit and a small processing delay.

(Thirty-Fifth Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form corresponds to claims 26, 34, 35, 44 and 47. This embodiment is a modification of the thirty-second embodiment. 35, elements corresponding to those of the 32nd embodiment are denoted by the same reference numerals. The following description is abbreviate | omitted about the same part as a 32nd embodiment.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

The accumulated phase value calculation unit 3501 shown in FIG.
Phase difference calculation circuit 3504, delay circuit 3505, and integration circuit 35
06, and the common phase rotation detecting section 3500 includes an intra-symbol averaging circuit 3503, a phase cumulative value calculating section 3501, a time direction moving average circuit 3507, and a dividing circuit 3508.

A phase rotation amount information signal corresponding to a pilot signal output from the phase rotation detection circuit 3102 is input to a weighting circuit 3502. The weighting circuit 3502 weights and outputs the phase rotation amount information signal input from the phase rotation detection circuit 3102 based on the weighting factor input from the weighting coefficient calculation circuit 2802. With this weighting,
It is possible to suppress an adverse effect caused by using a phase rotation amount information signal whose reliability of information is reduced due to fading or the like. The weighted phase rotation amount information signal output from the weighting circuit 3502 is used as an intra-symbol averaging circuit.
Entered in 3503. The intra-symbol averaging circuit 3503 performs averaging processing on all the phase rotation amount information signals after the weighting of the OFDM symbol input from the weighting circuit 3502. When the phase rotation amount information signal output from the weighting circuit 3502 is the above-described vector signal,
The averaging process of the phase components can be performed by calculating the vector sum. The phase rotation amount information signal after the averaging process output from the intra-symbol averaging circuit 3503 is input to the phase difference calculation circuit 3504 and also to the delay circuit 3505. The delay circuit 3505 converts the averaging-processed phase rotation amount information signal input from the intra-symbol averaging circuit 3503 into one OFD.
The output is delayed by M symbol periods. Delay circuit 3505
Each phase rotation amount information signal delayed by one OFDM symbol is input to the phase difference calculation circuit 3504. The phase difference calculation circuit 3504 receives the 1 input from the delay circuit 3505.
The phase difference between the phase rotation amount information signal input from the intra-symbol averaging circuit 3503 for each phase rotation amount information signal delayed by the OFDM symbol is detected, and the phase difference signal is changed by 1 OF
Output for each DM symbol. The phase difference signal output from the phase difference calculation circuit 3504 is input to the integration circuit 3506. The integration circuit 3506 calculates and outputs the accumulated phase rotation amount due to the residual carrier frequency error and the phase noise by integrating the phase difference signal input from the phase difference calculation circuit 3504. This accumulated phase rotation amount is calculated by the synchronous detection circuit.
This is the accumulated phase rotation amount generated due to the residual carrier frequency error and the phase noise included in each detection signal in the OFDM symbol output from 107. The accumulated phase rotation amount signal output from the integration circuit 3506 is input to the time direction moving average circuit 3507. Time direction moving average circuit 3507
Performs moving average processing in the time direction on the accumulated phase rotation amount input from the integration circuit 3506 over a plurality of OFDM symbols, and outputs the result. By this moving average processing, the receiving circuit 102
In this case, the influence of thermal noise or the like added in the above can be suppressed. The accumulated phase rotation amount signal after the moving average processing output from the time direction moving average circuit 3507 is input to the division circuit 3508. In the division circuit 3508, the time-direction moving average circuit 3507
Is divided by a value corresponding to the number of OFDM symbols subjected to integration by the integrating circuit 3506 and the number of OFDM symbols subjected to moving average processing by the time-direction moving average circuit 3507. Thus, the amount of phase rotation per OFDM symbol of each detection signal generated due to the residual carrier frequency error can be accurately obtained. For example, the integration circuit 3506 performs integration processing for 10 OFDM symbols, and the subsequent time-direction moving average circuit 3507 performs integration processing for three symbols.
Assuming that the moving average processing for OFDM symbols has been performed, the moving average processing for three OFDM symbols necessarily causes a delay of one OFDM symbol. Therefore, the division circuit 3508 divides the input value by 9 to obtain 10
The amount of phase rotation per FDM symbol is calculated. In the integration circuit 3506, if the integration processing of the number of signals that is sufficiently larger than the number of OFDM symbols processed by the subcarrier signal extraction circuit in specific symbol 2803 is performed, the division circuit 3508 outputs the unit amount calculation circuit 3202 The phase rotation amount per OFDM symbol due to the residual carrier frequency error can be obtained with higher accuracy than the output signal. The phase rotation amount signal per OFDM symbol due to the residual carrier frequency error output from the division circuit 3508 is input to the selection circuit 3106.

As described above, the information of the phase rotation amount weighted based on the high-precision signal quality information is averaged within one symbol, so that the information is included in the information of the phase rotation amount. Since the noise component can be suppressed, the phase rotation amount common to each subcarrier generated in the detection signal due to the residual carrier frequency error can be obtained with high accuracy. Further, by calculating the accumulated value of the phase rotation amount common to each subcarrier generated in the detection signal due to the residual carrier frequency error and dividing by the number of accumulated OFDM symbols, the phase per one OFDM symbol generated by the residual carrier frequency error is calculated. The rotation amount can be calculated with high accuracy. Further, before performing the above-described division, a moving average process in the time direction is performed on the accumulated value of the amount of phase rotation to effectively reduce the influence of thermal noise. , The accuracy of detecting the amount of phase rotation can be improved.

That is, the device of this example can realize a highly accurate correction process for the phase rotation due to the residual carrier frequency error, which is difficult to realize with the conventional device, with a small processing delay.

(Thirty-Sixth Embodiment) OFD of this Embodiment
The M packet communication receiving device will be described with reference to FIG. This form corresponds to claims 26, 34, 35, 44, 45, 47 and 49. This embodiment is a modification of the thirty-fifth embodiment. In FIG. 36, elements corresponding to those of the thirty-fifth embodiment are denoted by the same reference numerals. The following description is abbreviate | omitted about the same part as a 35th embodiment.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted by using a part (plurality) of subcarriers included in a received OFDM signal.

The common phase rotation detector 3600 shown in FIG. 36 includes an intra-symbol vector sum operation circuit 3602, a phase detection circuit
A 3603 and a unit calculation circuit 3604 are provided.

Circuit for extracting subcarrier signal in specific symbol
Each detection signal output from 2803 is input to inverse modulation circuit 3601 and also to hard decision circuit 2804. Each determination result output from the hard decision circuit 2804 is input to the inverse modulation circuit 3601. The inverse modulation circuit 3601 performs an inverse modulation process on the baseband for each of the detection signals input from the specific symbol subcarrier signal extraction circuit 2803 based on each determination result input from the hard decision circuit 2804. , And outputs a complex vector signal after inverse modulation. By this inverse modulation process, the signal components added by the modulation process on the transmission side are removed from each detection signal input from the subcarrier signal extraction circuit 2803 in the specific symbol. Therefore, the signal after the inverse modulation includes only the phase component due to the phase rotation generated due to the residual carrier frequency error and the component such as the thermal noise added in the receiving circuit 102. The complex vector signal of each subcarrier after inverse modulation output from inverse modulation circuit 3601 is input to weighting circuit 1803. The weighting circuit 1803 weights and outputs the complex vector signal of each sub-carrier after inverse modulation input from the inverse modulation circuit 3601 based on the weight coefficient of each sub-carrier input from the weight coefficient arithmetic circuit 2802 . This weighting is realized by, for example, using the weighting factor of each subcarrier output from the weighting factor calculation circuit 2802 as the amplitude component of the complex vector signal of each subcarrier after inverse modulation input from the inverse modulation circuit 3601. it can. The weighted complex vector signal output from the weighting circuit 1803 is input to the intra-symbol vector sum operation circuit 3602. The intra-symbol vector sum calculation circuit 3602 calculates the vector sum of all the weighted complex vector signals of the OFDM symbol input from the weighting circuit 1803. By this vector sum operation, smoothing of the phase component of the complex vector signal input from the weighting circuit 1803 is realized. By the smoothing of the phase component, the influence of thermal noise and the like added in the receiving circuit 102 can be suppressed.
That is, the phase component of the complex vector signal output from the intra-symbol vector sum calculation circuit 3602 represents the phase rotation amount common to the subcarriers caused by the residual carrier frequency error with high accuracy. The complex vector signal output from the intra-symbol vector sum operation circuit 3602 is input to the phase detection circuit 3603. The phase detection circuit 3603
The phase component of the complex vector signal input from the intra-symbol vector sum operation circuit 3602 is detected to output a phase component information signal. The phase component information signal output from the phase detection circuit 3603 is input to the unit amount calculation circuit 3604.

That is, the device of this example can realize a highly accurate correction process for the phase rotation due to the residual carrier frequency error, which is difficult to realize with the conventional device, with a small processing delay.

(Thirty-Seventh Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form corresponds to claim 26, claim 34, claim 35, claim 44, claim 46, claim 47 and claim 49. This embodiment is a modification of the thirty-sixth embodiment. 37, elements corresponding to those of the thirty-sixth embodiment are denoted by the same reference numerals. The description of the same parts as those in the thirty-sixth embodiment is omitted.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted by using a part (plurality) of subcarriers included in a received OFDM signal.

FIG. 37 shows at least one specific signal used for detecting a phase rotation due to a residual carrier frequency error.
Each subcarrier signal of one OFDM symbol is modulated by a modulation method such as BPSK or QPSK, in which a transition from a certain reference signal point to an arbitrary reference signal point is possible only by code inversion processing. It is a configuration example in the case.

Circuit for extracting subcarrier signal in specific symbol
Each detection signal, which is the output signal of 2803, is
It is input to the hard decision circuit 2804 as well as to the input 3701. The sign inversion control circuit 3701 implements an inverse modulation process on each input detection signal by a sign inversion process. Each complex vector signal after sign inversion processing output from the sign inversion control circuit 3701 is input to the weighting circuit 1803.

For example, each subcarrier signal is modulated by a modulation method such as BPSK or QPSK, in which a transition from one reference signal point to another reference signal point is possible only by code inversion processing. In such a case, the inverse modulation processing can be realized by inverting the sign of the signal, so that the circuit configuration of the inverse modulation means can be simplified. In other words, the device of this example can realize a highly accurate correction process for the phase rotation due to the residual carrier frequency error, which was difficult to achieve with the conventional device, with a simple circuit and a small processing delay.

(Thirty-eighth Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form corresponds to claim 17, claim 20, claim 25, claim 32, claim 33 and claim 43. This embodiment is a modification of the seventeenth embodiment.
38, elements corresponding to those in the seventeenth embodiment are denoted by the same reference numerals. The following description is abbreviate | omitted about the same part as a 17th embodiment.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted by using a part (plurality) of subcarriers included in a received OFDM signal.

In this example as well, it is assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitting apparatus for transmitting the OFDM signal received by the OFDM packet communication receiving apparatus shown in FIG. Also,
The OFDM packet communication receiving apparatus of FIG. 38 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized.

The phase rotation amount information extraction unit 3800 shown in FIG. 38 includes a pilot signal extraction circuit 3803 and a phase rotation detection circuit 38.
04 and a reference signal output circuit 3805.
A division circuit 3811 and a delay correction circuit 3812 are provided.

The channel estimation result output from the channel estimation circuit 106 is input to the synchronous detection circuit 107 and also to the weight coefficient calculation circuit 3802. Weight coefficient calculation circuit
The 3802 calculates and outputs a weight coefficient corresponding to the communication quality for each subcarrier based on the channel estimation result of each subcarrier input from the channel estimation circuit 106. For example, as a measure representing the communication quality of each subcarrier,
The received signal level of each subcarrier signal as described above can be considered. The weight coefficient for each subcarrier output from the weight coefficient calculation circuit 3802 is input to the weight circuit 3807.

On the other hand, each detection signal output from the synchronous detection circuit 107 is input to the phase rotation correction circuit 3815 and to the pilot signal extraction circuit 3803. Pilot signal extraction circuit 3803 extracts a detection signal corresponding to a pilot signal from the detection signals input from synchronous detection circuit 107, and outputs the detection signal. A detection signal corresponding to the pilot signal output from pilot signal extraction circuit 3803 is input to phase rotation detection circuit 3804. On the other hand, the reference signal output circuit 38
05 outputs a reference signal corresponding to a detection signal corresponding to the pilot signal input from the pilot signal extraction circuit 3803 to the phase rotation detection circuit 3804. As described above, since the pilot signal is a known signal, the above-mentioned reference signal can be easily output. Reference signal output circuit 3805
Is output to the phase rotation detection circuit 3804. The phase rotation detection circuit 3804 is connected to the reference signal output circuit 38.
Based on the reference signal input from 05, a phase rotation amount of a detection signal corresponding to the pilot signal input from pilot signal extraction circuit 3803 is detected, and a phase rotation amount information signal is output. The phase rotation amount information signal output from the phase rotation detection circuit 3803 is input to the clock frequency error reduction circuit 3806. In addition, phase rotation information of each subcarrier corresponding to a pilot signal resulting from a clock frequency error output from the phase rotation prediction circuit 903 is also input to the clock frequency error reduction circuit 3906. Clock frequency error reduction circuit
Reference numeral 3806 denotes a phase due to the clock frequency error included in the phase rotation amount information signal input from the phase rotation detection circuit 3804 based on the phase rotation information of each subcarrier resulting from the clock frequency error input from the phase rotation prediction circuit 903. Remove rotation. The phase rotation amount information signal after the phase rotation due to the clock frequency error output from the clock frequency error reduction circuit 3806 is removed is input to the weighting circuit 3807. The weighting circuit 3807 applies the phase rotation amount information signal after removing the phase rotation due to the clock frequency error input from the clock frequency error reduction circuit 3806 based on the weight coefficient of each subcarrier input from the weight coefficient calculation circuit 3802. Weighted and output. By this weighting, it is possible to suppress an adverse effect caused by using the phase rotation amount information whose reliability of information is reduced due to fading or the like. The phase rotation amount information signal of each subcarrier after weighting output from the weighting circuit 3807 is input to the intra-symbol averaging circuit 3808. The intra-symbol averaging circuit 3808 performs an averaging process on the phase rotation amount information signal corresponding to the weighted pilot signal of the OFDM symbol input from the weighting circuit 3807, thereby obtaining the receiving circuit 102
, Suppresses the influence of thermal noise and the like added in the above, and calculates and outputs the phase rotation amount common to each subcarrier in the OFDM symbol caused by the residual carrier frequency error with high accuracy. This averaging process is performed for one OFDM.
Since it is performed within a symbol, it corresponds to averaging processing in the frequency direction. The high-precision phase rotation amount information signal output from the intra-symbol averaging circuit 3808 is used as a phase rotation accumulated value calculation circuit 3809.
Is input to The phase rotation accumulated value calculation circuit 3809 uses the high-precision phase rotation amount information signal input from the intra-symbol averaging circuit 3808 to calculate the accumulation of each pilot signal caused by the phase noise and the residual carrier frequency error from the time of channel estimation. Calculate the amount of phase rotation. The calculation of the accumulated phase rotation amount is performed, for example, by calculating the difference between the high-precision phase rotation amount information signal input during the OFDM symbol processing and the high-precision phase rotation amount information signal input during the immediately preceding OFDM symbol processing. This can be done by integrating the values for each OFDM symbol. The calculated phase rotation amount of each pilot signal caused by the calculated phase noise and residual carrier frequency error is calculated by a phase rotation cumulative value calculation circuit 3809.
Output from The cumulative phase rotation amount of the pilot signal output from the phase rotation cumulative value calculation circuit 3809 is input to the time direction moving average circuit 3810. Time direction moving average circuit 38
Numeral 10 performs time-average moving averaging processing for a plurality of symbols on the phase noise input for each OFDM symbol and the accumulated phase rotation amount of each pilot signal caused by the residual carrier frequency error, and outputs the result. By this moving average processing in the time direction, it is possible to reduce signal deterioration due to thermal noise or the like added to the signal in the receiving circuit 102. The accumulated phase rotation amount information after the moving average output from the time direction moving average circuit 3810 is input to the division circuit 3811 and also to the delay correction circuit 3812.

The dividing circuit 3811 includes a time-direction moving average circuit 38.
The delay caused by the moving average processing in the time direction moving average circuit 3810 is subtracted from the number of OFDM symbols accumulated in the phase rotation accumulated value calculation circuit 3809 with respect to the accumulated phase rotation amount information after the moving average input from 10. Divide by number. For example, if the number of OFDM symbols cumulatively processed by the phase rotation cumulative value calculation circuit 3809 is 10 OFDM symbols,
Consider a case where a moving average process is performed on three OFDM symbols in a time-direction moving average circuit 3810, which is a DM symbol. In this case, the moving average processing of the three OFDM symbols causes an error due to a delay of one OFDM symbol, so that the division circuit 3811 performs division by nine. Also, the cumulative value of the phase rotation caused by the phase noise is clearly 0. Therefore, this division results in one OFDM due to the residual carrier frequency error.
The amount of phase rotation per symbol is determined. By calculating the amount of phase rotation per one OFDM symbol of each pilot signal using the accumulated value of the amount of phase rotation of each pilot signal in this way, the closer to the end of the packet, the more accurate the thermal noise and phase noise. The components can be removed. The phase rotation amount information per one OFDM symbol resulting from the obtained residual carrier frequency error is output from the division circuit 3811. The phase rotation amount information per one OFDM symbol due to the residual carrier frequency error output from the division circuit 3811 is input to the delay correction circuit 3812 and also to the phase rotation prediction circuit 903.

[0364] The delay correction circuit 381 includes one OF signal generated by the residual carrier frequency error input from the division circuit 3811.
Using the phase rotation amount information per DM symbol, the delay error caused by the delay caused by the moving average processing included in the accumulated phase rotation amount information after the moving average input from the time direction moving average circuit 3810 is corrected. And the accumulated amount of phase rotation caused by the residual carrier frequency error and phase noise included in each subcarrier signal of the OFDM symbol. The accumulated phase rotation information after the delay error correction is output from the delay correction circuit 3812. The accumulated phase rotation amount information after the delay error correction output from the delay correction circuit 3812 is added to the addition circuit.
Entered in 3814.

On the other hand, information on the phase rotation caused by the clock frequency error output from the phase rotation prediction circuit 903 is input to the clock frequency error reduction circuit 3806 and also to the addition circuit 3814. The adder circuit 3814 is a delay correction circuit
The accumulated amount of phase rotation caused by the residual carrier frequency error and phase noise input from 3812 and the phase rotation prediction circuit 90
The phase rotation information resulting from the clock frequency error, the residual carrier frequency error, and the phase noise is output by adding the phase rotation information resulting from the clock frequency error input from 3. Phase rotation information resulting from the clock frequency error, residual carrier frequency error, and phase noise output from the addition circuit 3814 is input to the phase rotation correction circuit 3815. The phase rotation correction circuit 3815 generates a clock included in each detection signal input from the synchronous detection circuit 107 based on the clock frequency error, the residual carrier frequency error, and the phase rotation information resulting from the phase noise input from the addition circuit 3814. The phase rotation caused by the frequency error, the residual carrier frequency error and the phase noise is corrected. Each detection signal after the phase rotation correction output from the phase rotation correction circuit 3815 is
Entered in 2.

As described above, when transmitting a pilot signal which is a known signal using a part of subcarriers of an OFDM signal, a residual carrier frequency error is detected from a signal component of a detection signal corresponding to the pilot signal. By doing so, the residual carrier frequency error can be efficiently detected using only a part of the detection signal, so that the circuit configuration of the common phase rotation detecting means can be simplified. Further, even when a large noise component is added to the detection signal, the detection accuracy of the residual carrier frequency error is improved because the reference signal point of the detection signal is not erroneously identified.

Also, a phase rotation component different for each subcarrier caused by a clock frequency error included in the phase rotation amount information of the detection signal output from the phase rotation amount information extracting means is removed, and each subcarrier is removed. By performing the weighting according to the communication quality, the detection accuracy of the phase rotation amount common to each subcarrier in the common phase rotation detecting means is improved.

Further, since the averaging process is performed in the frequency direction on the information on the phase rotation amount of the weighted detection signal, the accuracy of the information on the phase rotation amount is improved. Furthermore,
Using this highly accurate information on the amount of phase rotation, the accumulated amount of phase rotation of each detection signal caused by the residual carrier frequency error and phase noise is calculated, and the phase of each detected signal is calculated using the calculated result. Since rotation correction processing is performed, highly accurate phase rotation correction processing can be realized.

Also, since the noise component can be effectively suppressed by performing the averaging process in the time direction on the accumulated value of the phase rotation, thermal noise is added to the received signal at the time of the reception process. However, the accumulated amount of the phase rotation of each detection signal caused by the residual carrier frequency error and the phase noise can be accurately detected.

Further, by dividing the accumulated amount of phase rotation by the number of accumulated OFDM symbols, the amount of phase rotation per OFDM symbol caused by the residual carrier frequency error is calculated with high accuracy. Therefore, the phase rotation accumulated value detection error generated at the time direction moving average processing is removed, so that the accumulated amount of the phase rotation of each detection signal caused by the residual carrier frequency error and the phase noise can be detected with higher accuracy.

Further, using the information on the amount of phase rotation per OFDM symbol due to the residual carrier frequency error detected with high precision as described above, the phase rotation generated in each detection signal due to the clock frequency error is calculated. Therefore, the phase rotation that occurs in each detection signal due to the clock frequency error can be accurately obtained.

That is, the device of this example performs a highly accurate correction process for the phase rotation of each detection signal caused by the clock frequency error, the residual carrier frequency error, and the phase noise, which is difficult to realize by the conventional device. Can be.

(Thirty-ninth Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form is claimed in claim 17, claim 20, claim 25, claim 28, claim 31, claim 32, claim 3.
This corresponds to claim 35, claim 35, claim 37, and claim 43. This embodiment is a modification of the thirty-eighth embodiment. 39, elements corresponding to those of the thirty-eighth embodiment are denoted by the same reference numerals. The description of the same parts as those in the thirty-eighth embodiment is omitted.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

Also in this example, it is assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitting apparatus for transmitting the OFDM signal received by the OFDM packet communication receiving apparatus in FIG. Also,
The OFDM packet communication receiver of FIG. 39 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized.

[0376] The accumulated phase value calculator 3901 shown in FIG.
Phase difference calculation circuit 3906, delay circuit 3907, and integration circuit 39
08, and the common phase rotation detecting section 3900 includes an intra-symbol averaging circuit 3808, a phase rotation accumulated value calculating section 3901, a time direction moving average circuit 3810, a bit shift circuit 3909, and a delay correction circuit 3812.

Each subcarrier signal output from the Fourier transform circuit 105 is input to the channel estimation circuit 106 and the synchronous detection circuit 107, and is also input to the signal level information extraction circuit 3903. The signal level information extraction circuit 3903 extracts and outputs the signal level from all or some of the input subcarrier signals. The signal level information of the subcarrier signal output from the signal level information extraction circuit 3903 is input to the integration circuit 3904. The integration circuit 3904 integrates the signal level information of each pilot signal output from the signal level information extraction circuit 3903 in the time direction for each pilot signal. The signal level information of each pilot signal integrated by the integration circuit 3904 is input to the bit shift circuit 3905.

The bit shift circuit 3905 expresses the number of OFDM symbols integrated by the integration circuit 3904 as 2 ^N (N: natural number) in order to calculate a signal level per one OFDM symbol of each pilot signal. In this case, the integral value of the signal level information of each pilot signal output from the integrating circuit 3904 is divided by N bits. This bit shift is performed only when the number of OFDM symbols integrated by the integration circuit 3904 is represented by 2 ^N (N: natural number), and the output of the bit shift circuit 3905 is updated. When the number of symbols is not represented by ^2N , the result of the previous bit shift is used as it is.
When the number of symbols is 1, the bit shift circuit 3905 outputs the input signal as it is. When such processing is performed, the output of the bit shift circuit 3905 is updated with higher frequency as going to the front of the packet, and the update frequency becomes lower as going toward the end of the packet. However, as described above, by calculating the signal level per 1 OFDM symbol of each pilot signal using the integrated value of the signal level of each pilot signal, the thermal noise component is removed more accurately as it goes after the packet. It is possible to do. Therefore, even if the update frequency after the packet is reduced, the characteristics do not deteriorate. Further, since the circuit scale required for performing the bit shift is generally very small, the circuit scale can be significantly reduced. Signal level information per OFDM symbol of each pilot signal calculated by the bit shift circuit 3905 is input to the weighting circuit 3807.

On the other hand, the highly accurate phase rotation amount information signal output from the intra-symbol averaging circuit 3808 is input to the phase difference calculation circuit 3906 and to the delay circuit 3907. The delay circuit 3907 is a symbol averaging circuit 3808.
The phase rotation amount information signal after the averaging process input from
The output is delayed by an OFDM symbol period. Each phase rotation amount information signal delayed by one OFDM symbol by the delay circuit 3907 is input to the phase difference calculation circuit 3906. The phase difference calculation circuit 3906 detects a phase difference between the phase rotation amount information signal input from the intra-symbol averaging circuit 3808 and the phase difference with respect to each phase rotation amount information signal delayed by one OFDM symbol input from the delay circuit 3907. The signal is output for each OFDM symbol. Phase difference calculation circuit 39
The phase difference signal output from 06 is input to the integration circuit 3908. The integration circuit 3908 integrates the phase difference signal input from the phase difference calculation circuit 3906 to calculate and output the accumulated phase rotation amount due to the residual carrier frequency error and the phase noise. This cumulative phase rotation amount is the cumulative phase rotation amount generated due to the residual carrier frequency error and the phase noise included in each detection signal in the OFDM symbol output from the synchronous detection circuit 107. Integrator 39
The accumulated phase rotation amount signal output from 08 is input to the time direction moving average circuit 3810. On the other hand, the accumulated phase rotation amount information after the moving average output from the time direction moving average circuit 3810 is input to the bit shift circuit 3909 and also to the delay correction circuit 3812.

[0380] The bit shift circuit 3909 calculates the time direction moving amount of the OFDM symbols accumulated in the phase rotation accumulated value calculation unit 3901 with respect to the accumulated phase rotation amount information after the moving average input from the time direction moving average circuit 3810. Average circuit
When the number obtained by subtracting the delay caused by the moving average processing in 3810 is represented by 2 ^N (N: natural number), the accumulated phase rotation amount information after the moving average input from the time direction moving average circuit 3810 is represented by N Division is performed by bit shift of bits. Note that this bit shift is performed by the phase rotation accumulated value calculation unit.
Performed only when the number obtained by subtracting the delay caused by the moving average processing in the time direction moving average circuit 3810 from the number of OFDM symbols accumulated in 3901 is represented by 2 ^N (N: natural number), and the output of the bit shift circuit 3909 To update. When the above-mentioned number is not represented by ^2N , the result of the previous bit shift is used as it is. When the above number is 1, the bit shift circuit 3909 outputs the input signal as it is. One O due to the residual carrier frequency error output from the bit shift circuit 3909
Phase rotation amount information per FDM symbol is a delay correction circuit
Entered in 3812.

When the state of the transmission path (channel) due to fading hardly changes in a packet,
The signal level of each subcarrier signal is obtained by integrating the signal level of each subcarrier signal for each subcarrier, and dividing the integrated value by the number of times of integration, ie, the OFD obtained by integration.
It can be obtained by dividing by the number of M symbols. In this case, the OF which integrates as it goes after the packet
Since the number of DM symbols increases, the effect of smoothing, that is, the effect of suppressing noise components is improved, and the effect of thermal noise can be effectively reduced. Therefore, the signal level information of each subcarrier signal can be detected with high accuracy. Further, since the division for obtaining the signal level per one OFDM symbol of each subcarrier signal is realized by the bit shift, an increase in the circuit scale can be suppressed. Further, the bit shift is performed by the OFD after the integration processing.
Since it is performed only when the number of M symbols is represented by 2 ^N (N: natural number), the operation for each OFDM symbol is unnecessary,
Further, since the frequency of the bit shift processing decreases as the position goes after the packet, the power consumption can be significantly reduced. That is, the device of this example has a channel characteristic of 1 in a packet.
In the case where there is almost no change within the packet period, the clock frequency error, which is difficult to realize with the conventional device,
High-precision correction processing for the phase rotation of each detection signal caused by the residual carrier frequency error and the phase noise can be performed with a small amount of power using a simple circuit.

(40th Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form is claimed in claim 26, claim 27, claim 34, claim 35, claim 44, claim 46, claim 4.
This corresponds to Claim 7, Claim 48, Claim 49 and Claim 50. This embodiment is a modification of the thirty-seventh embodiment. In FIG. 40, elements corresponding to those in the 37th embodiment are denoted by the same reference numerals. The description of the same parts as those of the thirty-seventh embodiment is omitted.

In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted by using a part (plurality) of subcarriers included in a received OFDM signal.

In this example as well, it is assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitter for transmitting the OFDM signal received by the receiver for OFDM packet communication in FIG. Also,
The OFDM packet communication receiving apparatus of FIG. 40 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized.

FIG. 40 shows at least one specific signal used for detecting a phase rotation due to a residual carrier frequency error.
Each subcarrier signal of one OFDM symbol is modulated by a modulation method such as BPSK or QPSK, in which a transition from a certain reference signal point to an arbitrary reference signal point is possible only by code inversion processing. It is a configuration example in the case.

The common phase rotation detecting section 4004 shown in FIG. 40 includes an intra-symbol averaging circuit 3503, a phase cumulative value calculating section 3501, a time direction moving average circuit 3507, and a bit shift circuit 4011.

The synchronization processing circuit 4006 detects a carrier frequency error and a symbol timing using the synchronization preamble signal of the input complex baseband signal, and uses the detected carrier frequency error information to perform a reception process on the complex baseband signal. And outputs the detected symbol timing information signal and carrier frequency error information. Synchronous processing circuit
The signal after the carrier frequency error correction processing and the symbol timing information signal output from 4006 are input to guard interval removal circuit 104. Also, the synchronization processing circuit 4006
Is output to the phase rotation prediction circuit 4013.

Each subcarrier signal output from the Fourier transform circuit 105 is input to the channel estimation circuit 106 and the synchronous detection circuit 107 and is input to the signal level information extraction circuit 4007. The signal level information extraction circuit 4007 extracts the signal level from all or some of the input subcarrier signals and outputs the extracted signal level. The signal level information of the subcarrier signal output from the signal level information extraction circuit 4007 is input to the integration circuit 4008. The integration circuit 4008 integrates the signal level information of each pilot signal output from the signal level information extraction circuit 4007 in the time direction for each pilot signal. The signal level information of each pilot signal integrated by the integration circuit 4008 is input to the bit shift circuit 4009.

The bit shift circuit 4009 expresses the number of OFDM symbols integrated by the integration circuit 4008 as 2 ^N (N: natural number) in order to calculate the signal level of each pilot signal per OFDM symbol. In this case, the integral value of the signal level information of each pilot signal output from the integrating circuit 4008 is divided by N bits. This bit shift is performed only when the number of OFDM symbols integrated by the integration circuit 4008 is represented by 2 ^N (N: natural number), and the output of the bit shift circuit 4009 is updated. When the number of symbols is not represented by ^2N , the result of the previous bit shift is used as it is.
When the number of symbols is 1, the bit shift circuit 4009 outputs the input signal as it is. When such processing is performed, the output of the bit shift circuit 4009 is updated with a higher frequency as going to the front of the packet, and the update frequency becomes lower as going toward the end of the packet. However, as described above, by calculating the signal level per 1 OFDM symbol of each pilot signal using the integrated value of the signal level of each pilot signal, the thermal noise component is removed more accurately as it goes after the packet. It is possible to do. Therefore, even if the update frequency after the packet is reduced, the characteristics do not deteriorate. Further, since the circuit scale required for performing the bit shift is generally very small, the circuit scale can be significantly reduced. The signal level information per OFDM symbol of each pilot signal calculated by the bit shift circuit 4009 is input to the weighting circuit 1803 and to the weighting circuit 3502.

On the other hand, the phase rotation amount information signal output from the phase rotation detection circuit 3102 is
Entered in 10. Further, phase rotation information of each subcarrier corresponding to a pilot signal resulting from a clock frequency error output from the phase rotation prediction circuit 4013 is also input to the clock frequency error reduction circuit 4010. The clock frequency error reduction circuit 4010 is included in the phase rotation amount information signal input from the phase rotation detection circuit 3102 based on the phase rotation information of each subcarrier caused by the clock frequency error input from the phase rotation prediction circuit 4013 Eliminate phase rotation due to clock frequency error. Clock frequency error reduction circuit 40
The phase rotation amount information signal after phase rotation removal due to the clock frequency error output from 10 is input to the weighting circuit 3502. The weighting circuit 3502 is based on the signal level information per OFDM symbol of each pilot signal input from the bit shift circuit 4009, and the phase rotation amount information after removing the phase rotation due to the clock frequency error input from the clock frequency error reduction circuit 4010 is input. The signal is weighted and output. By this weighting, it is possible to suppress an adverse effect caused by using the phase rotation amount information whose reliability of information is reduced due to fading or the like. The phase rotation amount information signal of each subcarrier after weighting output from weighting circuit 3502 is input to intra-symbol averaging circuit 3503.

On the other hand, the accumulated phase rotation amount information after moving average output from the time direction moving average circuit 3507 is input to the bit shift circuit 4011 and to the delay correction circuit 4012.

[0392] The bit shift circuit 4011 calculates the time-direction shift based on the number of OFDM symbols cumulatively processed by the phase rotation cumulative value calculation section 3501 with respect to the accumulated phase rotation amount information after the moving average input from the time direction moving average circuit 3507. Average circuit
When the number obtained by subtracting the delay caused by the moving average processing in the 3507 is represented by 2 ^N (N: natural number), the accumulated phase rotation amount information after the moving average input from the time direction moving average circuit 3507 is represented by N Division is performed by bit shift of bits. Note that this bit shift is performed by the phase rotation accumulated value calculation unit.
Performed only when the number obtained by subtracting the delay caused by the moving average processing in the time direction moving average circuit 3507 from the number of OFDM symbols accumulated in 3501 is represented by 2 ^N (N: natural number), and the output of the bit shift circuit 4011 To update. When the above-mentioned number is not represented by ^2N , the result of the previous bit shift is used as it is. When the aforementioned number is 1, the bit shift circuit 4011 outputs the input signal as it is. One O due to the residual carrier frequency error output from the bit shift circuit 4011
Phase rotation amount information per FDM symbol is a delay correction circuit
Entered in 4012.

The delay correction circuit 4012 includes a bit shift circuit 40
The information included in the accumulated phase rotation amount information after the moving average input from the time direction moving average circuit 3507 using the phase rotation amount information per one OFDM symbol due to the residual carrier frequency error input from 11 The delay error caused by the delay caused by the moving average process of
An accumulated amount of phase rotation caused by residual carrier frequency error and phase noise included in each subcarrier signal of the DM symbol is obtained. The accumulated phase rotation information after the delay error correction is output from the delay correction circuit 4012. The accumulated phase rotation amount information after the delay error correction output from the delay correction circuit 4012 is input to the addition circuit 4014.

On the other hand, the phase rotation prediction circuit 4013 uses the carrier frequency error information input from the synchronization processing circuit 4006 and the residual carrier frequency error information input from the selection circuit 3106 to obtain information on the phase rotation caused by the clock frequency error. And outputs the predicted phase rotation information.
Information on the phase rotation caused by the clock frequency error output from the phase rotation prediction circuit 4013 is input to the clock frequency error reduction circuit 4010 and to the addition circuit 4014. The addition circuit 4014 adds the accumulated amount of phase rotation caused by the residual carrier frequency error and the phase noise input from the delay correction circuit 4012 and the phase rotation information caused by the clock frequency error input from the phase rotation prediction circuit 4013. By doing so, phase rotation information resulting from the clock frequency error, residual carrier frequency error, and phase noise is output. Phase rotation information resulting from the clock frequency error, residual carrier frequency error, and phase noise output from the addition circuit 4014 is input to the phase rotation correction circuit 4015. The phase rotation correction circuit 4015 generates a clock included in each detection signal input from the synchronous detection circuit 107 based on the clock frequency error, the residual carrier frequency error, and the phase rotation information resulting from the phase noise input from the addition circuit 4014. The phase rotation caused by the frequency error, the residual carrier frequency error and the phase noise is corrected. Each detection signal after the phase rotation correction output from the phase rotation correction circuit 4015 is input to the identification circuit 112.

When the state of the transmission path (channel) due to fading hardly changes in a packet,
The signal level of each subcarrier signal is obtained by integrating the signal level of each subcarrier signal for each subcarrier, and dividing the integrated value by the number of times of integration, ie, the OFD obtained by integration.
It can be obtained by dividing by the number of M symbols. In this case, the OF which integrates as it goes after the packet
Since the number of DM symbols increases, the effect of smoothing, that is, the effect of suppressing noise components is improved, and the effect of thermal noise can be effectively reduced. Therefore, the signal level information of each subcarrier signal can be detected with high accuracy. Further, since the division for obtaining the signal level per one OFDM symbol of each subcarrier signal is realized by the bit shift, an increase in the circuit scale can be suppressed. Further, the bit shift is performed by the OFD after the integration processing.
Since it is performed only when the number of M symbols is represented by 2 ^N (N: natural number), the operation for each OFDM symbol is unnecessary,
Further, since the frequency of the bit shift processing decreases as the position goes after the packet, the power consumption can be significantly reduced.

Also, a phase rotation component different for each subcarrier due to a clock frequency error included in the information of the phase rotation amount of the pilot signal output from the phase rotation detection circuit is removed, and communication for each subcarrier is performed. By performing the weighting according to the quality, the detection accuracy of the phase rotation amount common to each subcarrier in the second common phase rotation detecting means is improved.

Further, by dividing the accumulated amount of phase rotation output from the time-direction moving average means by the number of accumulated OFDM symbols, the amount of phase rotation per OFDM symbol caused by the residual carrier frequency error can be accurately determined. Since the calculation is performed and the phase rotation accumulated value detection error generated during the time direction moving average processing is removed based on the calculation result, the detection accuracy of the phase rotation accumulated amount of each detection signal generated by the residual carrier frequency error and the phase noise is improved. .

Furthermore, in order to realize a division process for calculating a phase rotation amount per 1 OFDM symbol caused by a residual carrier frequency error by a bit shift,
An increase in circuit scale can be suppressed. Further, the bit shift is performed when the number of OFDM symbols subjected to the accumulation processing is 2 ^N
(N: natural number)
The operation for every M symbols is unnecessary, and the frequency of the bit shift processing becomes lower toward the end of the packet, so that the power consumption can be significantly reduced.

Also, using the information on the amount of phase rotation per OFDM symbol due to the residual carrier frequency error detected with high precision as described above, the phase rotation occurring in each detection signal due to the clock frequency error is calculated. Therefore, the phase rotation occurring in each detection signal due to the clock frequency error can be accurately obtained.

That is, the apparatus of this example can easily perform a highly accurate correction process for the phase rotation of each detection signal caused by the clock frequency error, the residual carrier frequency error, and the phase noise, which is difficult to realize with the conventional apparatus. It can be performed with low power consumption using a simple circuit.

(41st Embodiment) OFD of this Embodiment
The receiving device for M packet communication will be described with reference to FIG. This form corresponds to claims 26, 44, 46, 47, 49 and 51. This embodiment is a modification of the thirty-seventh embodiment.
In FIG. 41, elements corresponding to those in the 37th embodiment are denoted by the same reference numerals. The description of the same parts as those of the thirty-seventh embodiment is omitted.

[0402] In this embodiment, it is assumed that a pilot signal, which is a known signal, is transmitted using a part (plurality) of subcarriers included in a received OFDM signal.

FIG. 41 shows at least one specific signal used for detecting a phase rotation due to a residual carrier frequency error.
Each subcarrier signal of one OFDM symbol is modulated by a modulation method such as BPSK or QPSK, in which a transition from a certain reference signal point to an arbitrary reference signal point is possible only by code inversion processing. It is a configuration example in the case.

The common phase rotation detecting section 4100 shown in FIG. 41 includes an intra-symbol averaging circuit 3503, a phase difference calculating circuit 3504, a delay circuit 3505, and a time direction moving averaging circuit 4101.

The phase difference signal output from the phase difference calculation circuit 3504 is input to the time direction moving average circuit 4101.
This phase difference signal is a signal in which the amount of phase rotation per OFDM symbol caused by the residual carrier frequency error is output for each OFDM symbol. The time direction moving average circuit 4101 performs moving average processing in the time direction on the phase difference signal input from the phase difference calculation circuit 3504 over a plurality of OFDM symbols, and outputs the result. By this moving average processing, the influence of thermal noise or the like added in the receiving circuit 102 can be suppressed, and the amount of phase rotation per OFDM symbol caused by the residual carrier frequency error can be obtained with high accuracy. 1 due to residual carrier frequency error after moving average processing output from time direction moving average circuit 4101
A phase rotation amount signal per OFDM symbol is selected by a selection circuit.
Input to 3106.

That is, the device of this example can realize a highly accurate correction process for the phase rotation due to the residual carrier frequency error, which is difficult to realize with the conventional device.

(Forty-second Embodiment) OFD of this Embodiment
An M-packet communication receiving device will be described with reference to FIG. This form corresponds to claims 17 and 36. This embodiment is a modification of the seventeenth embodiment. 42, components corresponding to those in the seventeenth embodiment are denoted by the same reference numerals. The following description is abbreviate | omitted about the same part as a 17th embodiment.

In this example, it is assumed that the carrier frequency and the sampling clock frequency are synchronized in the transmitting apparatus for transmitting the OFDM signal received by the OFDM packet communication receiving apparatus shown in FIG. Also,
The OFDM packet communication receiver of FIG. 42 controls the carrier frequency on the receiving side and the frequency of the sampling clock to be synchronized.

The residual carrier frequency error detecting section shown in FIG.
The 4200 includes a phase rotation amount information extraction circuit 1701 and a common phase rotation detection unit 4201.
In 01, the intra-symbol averaging circuit 4202 and the phase difference calculating circuit 42
03, a delay circuit 4204 and a time direction moving average circuit 4205 are provided.

The phase rotation amount information signal detected by the phase rotation amount information extraction circuit 1701
Is input to The intra-symbol averaging circuit 4202 performs an averaging process on the phase rotation amount information signal input from the phase rotation amount information extraction circuit 1701 within one OFDM symbol. The phase rotation amount information signal after smoothing output from the symbol smoothing circuit 4202 is input to the phase difference calculation circuit 4203 and also to the delay circuit 4204. The delay circuit 4204 delays the averaging-processed phase rotation amount information signal input from the intra-symbol averaging circuit 4202 by one OFDM symbol period, and outputs the delayed signal. Each phase rotation amount information signal delayed by one OFDM symbol by the delay circuit 4204 is input to the phase difference calculation circuit 4203. The phase difference calculation circuit 4203 includes an intra-symbol averaging circuit 42 for each phase rotation amount information signal delayed by one OFDM symbol input from the delay circuit 4204.
The phase difference of the phase rotation amount information signal input from 02 is detected, and a phase difference signal is output for each OFDM symbol. The phase difference signal output from the phase difference calculation circuit 4203 is input to the time direction moving average circuit 4205. Note that this phase difference signal is equal to 1 OFD due to the residual carrier frequency error.
This is a signal in which the amount of phase rotation per M symbol is output for each OFDM symbol. Time moving average circuit 42
05 performs moving average processing in the time direction on the phase difference signal input from the phase difference calculation circuit 4203 over a plurality of OFDM symbols, and outputs the result. By this moving average processing, the influence of thermal noise or the like added in the receiving circuit 102 can be suppressed, and the 1OFD caused by the residual carrier frequency error can be suppressed.
The amount of phase rotation per M symbols can be obtained with high accuracy. 1 OFDM due to residual carrier frequency error after moving average processing output from time direction moving average circuit 4205
The phase rotation amount signal per symbol is calculated by the phase rotation prediction circuit.
Entered in 903.

That is, the device of this example can realize a highly accurate correction process for the phase rotation due to the clock frequency error, which is difficult to realize with the conventional device. Further, since the correction processing for the clock frequency error as described above can be realized by digital processing, it is not necessary to provide an analog correction circuit having a complicated configuration, and an increase in power consumption can be suppressed.

[0412]

As described above, according to the present invention, even if there is a difference between the sampling clock frequency of the transmitting device and the sampling clock frequency of the receiving device, a simple digital circuit can be used. O for accuracy
An FDM signal can be demodulated. Further, even when there is a shift in the carrier frequency between transmission and reception, or when phase noise is added to the received signal, the OFDM signal can be demodulated with high accuracy with a small processing delay by a simple circuit. Further, even when thermal noise is added to the received signal in the receiving-side device, deterioration of transmission quality can be suppressed by a simple circuit without lowering transmission efficiency.

Further, by using the information obtained by performing weighting and smoothing using the channel estimation result and detecting the phase rotation of each subcarrier signal after synchronous detection, the influence of fading, thermal noise, and the like can be reduced. It is hard to receive.

Further, by detecting the phase rotation amount or the phase rotation accumulated amount due to the clock frequency error using the pilot signal which is a known signal, the configuration of the circuit for detecting the phase rotation is simplified.

[Brief description of the drawings]

FIG. 1 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a first embodiment.

FIG. 2 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a second embodiment.

FIG. 3 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a third embodiment.

FIG. 4 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a fourth embodiment.

FIG. 5 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a fifth embodiment.

FIG. 6 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a sixth embodiment.

FIG. 7 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a seventh embodiment.

FIG. 8 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to an eighth embodiment.

FIG. 9 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a ninth embodiment.

FIG. 10 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a tenth embodiment.

FIG. 11 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to an eleventh embodiment.

FIG. 12 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a twelfth embodiment.

FIG. 13 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a thirteenth embodiment.

FIG. 14 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a fourteenth embodiment.

FIG. 15 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a fifteenth embodiment.

FIG. 16 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a sixteenth embodiment.

FIG. 17 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a seventeenth embodiment.

FIG. 18 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to an eighteenth embodiment.

FIG. 19 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a nineteenth embodiment.

FIG. 20 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a twentieth embodiment.

FIG. 21 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a twenty-first embodiment.

FIG. 22 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a twenty-second embodiment.

FIG. 23 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a twenty-third embodiment.

FIG. 24 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a twenty-fourth embodiment.

FIG. 25 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a twenty-fifth embodiment.

FIG. 26 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a twenty-sixth embodiment.

FIG. 27 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a twenty-seventh embodiment.

FIG. 28 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a twenty-eighth embodiment.

FIG. 29 is a block diagram showing a configuration of an OFDM packet communication receiving apparatus according to a twenty-ninth embodiment.

FIG. 30 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a thirtieth embodiment.

FIG. 31 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a thirty-first embodiment.

FIG. 32 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a thirty-second embodiment.

FIG. 33 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a thirty-third embodiment.

FIG. 34 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a thirty-fourth embodiment.

FIG. 35 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a thirty-fifth embodiment.

FIG. 36 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a thirty-sixth embodiment.

FIG. 37 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a thirty-seventh embodiment.

FIG. 38 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a thirty-eighth embodiment.

FIG. 39 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a thirty-ninth embodiment.

FIG. 40 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a fortieth embodiment.

FIG. 41 is a block diagram illustrating a configuration of an OFDM packet communication receiving apparatus according to a forty-first embodiment.

FIG. 42 is a block diagram illustrating a configuration of an OFDM packet communication receiving device according to a forty-second embodiment.

FIG. 43 is a block diagram showing a configuration of a conventional OFDM packet communication receiving device.

FIG. 44 shows a packet format of an OFDM signal.

FIG. 45 is a graph illustrating an example of a signal in the case of 16QAM modulation.

FIG. 46 is a graph illustrating an example of a signal in the case of BPSK modulation.

[Explanation of symbols]

100, 200, 300, 400 Clock frequency error estimating unit 101 Antenna 102 Receiving circuit 103 Synchronization processing circuit 104 Guard interval removal circuit 105 Fourier transform circuit 106 Channel estimation circuit 107 Synchronous detection circuit 108, 203, 302, 404, 501, 603 Phase Rotation detection circuit 109 Phase rotation correction circuit 110, 303, 405, 502, 703 Clock frequency error prediction circuit 111, 503 Phase rotation operation circuit 112 Identification circuit 201, 402, 601, 802 Weighting circuit 202, 403, 602, 803 Smoothing Circuits 301, 401, 701, 801 Pilot signal extraction circuit 500, 600, 700, 800 Clock frequency error estimator 702, 804 Phase rotation detection circuit 805 Clock frequency error prediction circuit

 ──────────────────────────────────────────────────続 き Continuation of the front page (31) Priority claim number Japanese Patent Application No. 11-171072 (32) Priority date June 17, 1999 (June 17, 1999) (33) Priority claim country Japan (JP) (31) Priority claim number Patent application No. 2000-45963 (P2000-45963) (32) Priority date February 23, 2000 (Feb. 23, 2000) (33) Priority claim country Japan (JP) (72) Inventor Masahiro Morikura 3-19-2 Nishishinjuku, Shinjuku-ku, Tokyo Nippon Telegraph and Telephone Corporation F-term (reference) 5K022 DD01 DD13 DD19 DD33 DD42 5K047 AA03 AA11 BB01 CC01 GG10 GG45 HH04 HH11 HH42 HH53 MM13 MM35

Claims (51)

[Claims] 1. A receiving means (102) for receiving a OFDM signal and performing predetermined receiving processing, and a synchronous processing means (103) for performing timing synchronization processing and carrier frequency synchronization processing on a received signal output from the receiving means. ) And a Fourier transform means (10) for separating the received signal subjected to the timing synchronization processing and the carrier frequency synchronization processing by the synchronization processing means into a signal for each subcarrier by using a Fourier transform.
5); a channel estimating means (106) for estimating a channel characteristic using each subcarrier signal separated by the Fourier transform means; and a channel estimating result obtained by the channel estimating means. An OFD including synchronous detection means (107) for performing synchronous detection processing on the subcarrier signal separated by the Fourier transform means and outputting a detection signal
In the receiving apparatus for M packet communication, a phase rotation amount or a phase rotation accumulated amount due to a clock frequency error between a transmission side and a reception side using all or a part of the detection signals output by the synchronous detection means. Is detected by the difference between the phase of the detection signal (R1, R2) and the phase of the reference signal (S1 to S16), and the phase rotation information (Δθ) of each subcarrier signal due to the clock frequency error (f _RCLK −f _TCLK ) is _obtained. A clock frequency error estimating means (100) to be generated, and a detection signal output from the synchronous detection means based on information corresponding to the clock frequency error output from the clock frequency error estimating means. Phase rotation correction means (109) for correcting phase rotation
Characterized in that the output of the phase rotation correction means (109) is identified for each symbol. 2. The receiving apparatus for OFDM packet communication according to claim 1, wherein the clock frequency error estimating means is configured to perform the synchronization based on quality information of each subcarrier signal obtained from channel characteristics estimated by the channel estimating means. While weighting the phase rotation amount information from the reference signal of all or some of the detection signals output from the detection means,
A receiving apparatus for OFDM packet communication, which performs smoothing in a time direction, and detects a phase rotation amount or a phase rotation accumulated amount due to a clock frequency error based on the weighted and smoothed phase rotation amount information. 3. The receiving apparatus for OFDM packet communication according to claim 1, wherein said clock frequency error estimating means includes a phase caused by a clock frequency error of a signal component corresponding to a pilot signal included in a detection signal output from said synchronous detection means. OF characterized by detecting a rotation amount or a phase rotation accumulation amount
Receiver for DM packet communication. 4. The receiving apparatus for OFDM packet communication according to claim 1, wherein the clock frequency error estimating means is configured to perform the synchronization based on quality information of each subcarrier signal obtained from channel characteristics estimated by the channel estimating means. The phase rotation amount information from the reference signal of the signal corresponding to the pilot signal included in the detection signal output from the detection means is weighted and smoothed in the time direction, and the weighted and smoothed phase rotation is performed. A receiver for OFDM packet communication, wherein a phase rotation amount or a phase rotation accumulated amount due to a clock frequency error is detected based on the amount information. 5. A receiving means for receiving a OFDM signal and performing a predetermined receiving process, a synchronizing means for performing a timing synchronizing process and a carrier frequency synchronizing process on a received signal output by the receiving device, and And a Fourier transform unit for separating the received signal subjected to the timing synchronization process and the carrier frequency synchronization process into a signal for each subcarrier by using a Fourier transform. Channel estimation means for estimating channel characteristics using each of the subcarrier signals obtained, and synchronizing with the subcarrier signals separated by the Fourier transform means based on the estimation results of the channel characteristics obtained by the channel estimation means. Synchronous detection means for performing detection processing and outputting a detection signal; Phase rotation correction means for correcting a phase rotation caused by a clock frequency error with respect to a detection signal output from the synchronous detection means, and all or a part of the phase rotation corrected detection signal output from the phase rotation correction means A clock frequency error estimating means for detecting a phase rotation amount due to a clock frequency error based on the signal, generating phase rotation information of each subcarrier signal due to the clock frequency error and providing the phase rotation information to the phase rotation correcting means. A receiving device for OFDM packet communication, comprising: 6. The receiving apparatus for OFDM packet communication according to claim 5, wherein the clock frequency error estimating means is configured to perform the synchronization based on quality information of each subcarrier signal obtained from channel characteristics estimated by the channel estimating means. While weighting the phase rotation amount information from the reference signal of all or some of the detection signals output from the detection means,
An OFDM system which performs smoothing in a time direction and detects a phase rotation amount due to a clock frequency error based on the weighted and smoothed phase rotation amount information.
Packet communication receiver. 7. The receiving apparatus for OFDM packet communication according to claim 5, wherein the clock frequency error estimating unit corresponds to a pilot signal included in a detection signal after phase rotation correction output from the phase rotation correction unit. A receiving apparatus for OFDM packet communication, wherein a phase rotation amount due to a clock frequency error is detected based on a signal component to be transmitted. 8. The receiving apparatus for OFDM packet communication according to claim 5, wherein the clock frequency error estimating means is configured to perform the operation based on quality information of each subcarrier signal obtained from channel characteristics estimated by the channel estimating means. Weighting the phase rotation amount information from the reference signal of the signal corresponding to the pilot signal included in the detection signal after the phase rotation correction output from the phase rotation correction means, and performing smoothing in the time direction, An OFDM packet communication receiving apparatus for detecting a phase rotation amount due to a clock frequency error based on the weighted and smoothed phase rotation amount information. 9. A receiving means for receiving an OFDM signal and performing a predetermined receiving process, a timing synchronization process and a carrier frequency synchronization process for a reception signal output from the receiving device, and a signal and a carrier frequency error after synchronization. OFDM packet communication comprising: a synchronization processing means for outputting information; and a Fourier transform means for separating a signal subjected to timing synchronization processing and carrier frequency synchronization processing by the synchronization processing means into a signal for each subcarrier using Fourier transform. In the receiving apparatus for use, channel estimation means for estimating channel characteristics using each subcarrier signal separated by the Fourier transform means, and Fourier transform using the channel characteristic estimation result obtained by the channel estimation means Synchronous detection processing for the subcarrier signal separated by the means Detecting means for outputting a detected signal, and detecting a phase rotation amount due to a residual carrier frequency error of all or some of the detection signals output from the synchronous detecting means, and generating residual carrier frequency error information. Residual carrier frequency error estimating means, output from the synchronous detecting means based on carrier frequency error information output from the synchronization processing means and residual carrier frequency error information output from the residual carrier frequency error estimating means. A phase rotation prediction unit that predicts a phase rotation amount due to a clock frequency error of the detection signal and generates phase rotation information; and a detection output from the synchronous detection unit based on the phase rotation information output from the phase rotation prediction unit. Phase rotation correcting means for correcting a phase rotation caused by a clock frequency error with respect to the signal. OFDM to
Packet communication receiver. 10. The receiving apparatus for OFDM packet communication according to claim 9, wherein said residual carrier frequency error estimating means is based on quality information of each subcarrier signal obtained from channel characteristics estimated by said channel estimating means. The phase rotation amount information from the reference signal point of all or some of the detection signals output from the synchronous detection means is weighted and smoothed in the time direction, and the weighted and smoothed phase rotation amount is obtained. OFD detecting phase rotation amount due to residual carrier frequency error based on information
Receiver for M packet communication. 11. The receiving apparatus for OFDM packet communication according to claim 9, wherein said residual carrier frequency error estimating means is configured to detect a residual carrier frequency error based on a signal component corresponding to a pilot signal in a detection signal output from said synchronous detection means. An OFDM packet communication receiving device for detecting a phase rotation amount due to a frequency error. 12. The OFDM packet communication receiving apparatus according to claim 9, wherein said residual carrier frequency error estimating means detects a phase of a signal corresponding to a pilot signal from a reference signal among detection signals output from said synchronous detection means. The rotation amount information is weighted and smoothed in the time direction based on the quality information of each subcarrier signal obtained from the channel characteristics estimated by the channel estimation means, and the weighted and smoothed phase rotation is performed. A receiving device for OFDM packet communication, wherein a phase rotation amount due to a residual carrier frequency error is detected based on the amount information. 13. A receiving means for receiving an OFDM signal and performing a predetermined receiving process, a timing synchronization process and a carrier frequency synchronization process for a reception signal output from the receiving device, and a signal and a carrier frequency error after synchronization. OFDM packet communication comprising: a synchronization processing means for outputting information; and a Fourier transform means for separating a signal subjected to timing synchronization processing and carrier frequency synchronization processing by the synchronization processing means into a signal for each subcarrier using Fourier transform. A receiving device for use, wherein: a channel estimating means for estimating a channel characteristic using each subcarrier signal separated by the Fourier transforming means; and a Fourier transforming means using a channel characteristic estimation result obtained from the channel estimating means. Performs synchronous detection processing on the subcarrier signals separated by Synchronous detection means for outputting a wave signal; and first phase rotation for generating phase rotation information by predicting a phase rotation due to a clock frequency error of each subcarrier signal using carrier frequency error information output from the synchronization processing means. Prediction means; and first phase rotation correction for correcting phase rotation caused by a clock frequency error with respect to a detection signal output from the synchronous detection means using phase rotation information output from the first phase rotation prediction means. Means for detecting the amount of phase rotation due to the residual carrier frequency error of all or some of the signals after phase rotation correction output from the first phase rotation correcting means, and generating residual carrier frequency error information. Carrier frequency error estimating means, and using the residual carrier frequency error information output from the residual carrier frequency error estimating means, A second phase rotation prediction unit that predicts a residual phase rotation amount due to a clock frequency error of a detection signal output from the phase rotation correction unit and generates residual phase rotation information; A second phase rotation correcting unit that corrects a residual phase rotation caused by a clock frequency error with respect to the signal after the phase rotation correction output from the first phase rotation correcting unit using the residual phase rotation information. A receiving device for OFDM packet communication, characterized in that: 14. The receiving apparatus for OFDM packet communication according to claim 13, wherein the residual carrier frequency error estimating unit is configured to perform the residual carrier frequency error estimating unit based on quality information of each subcarrier signal obtained from channel characteristics estimated by the channel estimating unit. The phase rotation amount information from the reference signal of all or a part of the detection signals after the phase rotation correction output from the first phase rotation correction unit is weighted, and smoothed in the time direction to perform weighting and smoothing. A receiver for OFDM packet communication, wherein a phase rotation amount due to a residual carrier frequency error is detected from the converted phase rotation amount information. 15. The receiving apparatus for OFDM packet communication according to claim 13, wherein said residual carrier frequency error estimating means outputs a pilot signal among signals after phase rotation correction output from said first phase rotation correction means. An OFDM packet communication receiving apparatus for detecting a phase rotation amount due to a residual carrier frequency error based on a corresponding signal component. 16. The receiving apparatus for OFDM packet communication according to claim 13, wherein said residual carrier frequency error estimating means includes a pilot signal among phase-corrected detection signals output from said first phase rotation correcting means. Is weighted based on the quality information of each subcarrier signal obtained from the channel characteristics estimated by the channel estimating means, with respect to the phase rotation amount information from the reference signal of the signal corresponding to A receiver for OFDM packet communication, wherein the phase rotation amount due to residual carrier frequency error is detected from the weighted and smoothed detection signal. 17. The receiver for OFDM packet communication according to claim 9, wherein the residual carrier frequency error estimating means is all or a part of a detection signal input to the residual carrier frequency error estimating means. Phase rotation amount information extraction means for extracting phase rotation amount information from the detection signal of each of the sub-carriers, and each sub-circuit caused by the residual carrier frequency error based on the phase rotation amount information of each detection signal extracted by the phase rotation amount information extraction means. A receiving apparatus for OFDM packet communication, comprising: common phase rotation detecting means for detecting a phase rotation amount common to carrier signals. 18. A receiving means for receiving a OFDM signal and performing predetermined receiving processing, and a synchronous means for performing timing synchronization processing and carrier frequency synchronization processing on a received signal output by the receiving means and outputting a synchronized signal. A receiving unit for OFDM packet communication, comprising: a processing unit; and a Fourier transform unit that separates the signal subjected to the timing synchronization process and the carrier frequency synchronization process by the synchronization processing unit into a signal for each subcarrier using a Fourier transform. Channel estimation means for estimating the channel characteristics using each subcarrier signal separated by the Fourier transform means; and sub-channels separated by the Fourier transform means using the channel characteristic estimation results obtained by the channel estimation means. Synchronous detection processing is performed on the carrier signal to output a detection signal. Detection means, phase rotation amount information extraction means for extracting phase rotation amount information from all or some of the detection signals output from the synchronous detection means, and each of the subcarriers separated by the Fourier transform means Quality information extracting means for extracting the quality information of all or a part of the detected signals among the signals, and smoothing in the time direction the quality information of each detected signal obtained from the quality information extracting means for each subcarrier. Quality information smoothing means, and weighting the phase rotation amount information output from the phase rotation amount information extraction means based on the quality information smoothed in the time direction of each detection signal obtained from the quality information smoothing means. Weighting means for performing the detection, and a detection output from the synchronous detection means based on the phase rotation amount information of each detection signal weighted by the weighting means. Common phase rotation detecting means for estimating a phase rotation amount caused by a residual carrier frequency error of the wave signal, and a detection signal output from the synchronous detection means based on the phase rotation amount estimated by the common phase rotation detecting means. A receiving apparatus for OFDM packet communication, comprising: a phase rotation correcting means for performing phase correction. 19. The receiving apparatus for OFDM packet communication according to claim 18, wherein said common phase rotation detecting means averages phase rotation amount information input to said common phase rotation detecting means within one OFDM symbol. Intra-symbol averaging means for performing processing, and time-direction moving average means for performing time-average processing in the time direction on the averaged phase rotation amount information output by the intra-symbol averaging means. Receiver for OFDM packet communication. 20. The receiving apparatus for OFDM packet communication according to claim 17, wherein said phase rotation amount information extracting means converts a pilot signal of a detection signal inputted to said phase rotation amount information extracting means into a pilot signal. Pilot signal extracting means for extracting a corresponding detection signal,
Reference signal output means for outputting a reference signal corresponding to the detection signal extracted by the pilot signal extraction means,
And a phase rotation detecting means for detecting a phase rotation included in the detection signal output by the pilot signal extracting means based on the reference signal output from the reference signal output means. Receiver. 21. The OFDM packet communication receiving apparatus according to claim 17, wherein said phase rotation amount information extracting means determines a predetermined one of detection signals input to said phase rotation amount information extracting means. Specific symbol signal extraction means for extracting a detection signal in a specific OFDM symbol; reference signal output means for outputting a reference signal corresponding to the detection signal extracted by the specific symbol signal extraction means; O comprising a phase rotation detecting means for detecting a phase rotation included in the detection signal output by the specific symbol signal extracting means based on the output reference signal.
Receiver for FDM packet communication. 22. The receiving apparatus for OFDM packet communication according to claim 21, wherein said reference signal output means hard-determines a detection signal in a specific OFDM symbol extracted by said specific symbol signal extraction means. OF characterized by comprising
Receiver for DM packet communication. 23. The OFD of claim 20 and claim 21.
An OFDM packet communication receiving apparatus according to claim 1, wherein said phase rotation detecting means comprises inverse modulation means for detecting phase rotation by performing inverse modulation. 24. The OFD of claim 20 and claim 21.
In the receiving device for M packet communication, the phase rotation detecting means may be configured by sign inversion control means for detecting phase rotation by performing sign inversion control based on a reference signal output from the reference signal output means. A receiving device for OFDM packet communication, which is characterized in that: 25. The receiving apparatus for OFDM packet communication according to claim 17, wherein a weight according to the signal quality of each subcarrier signal is obtained by using an estimation result of a channel characteristic of each subcarrier obtained by said channel estimation means. Weighting means for calculating a coefficient; and weighting means for weighting the phase rotation amount information output by the phase rotation amount information extracting means based on the weighting coefficient of each subcarrier obtained by the weighting coefficient means. Wherein the common phase rotation detecting means detects a common phase rotation amount for each subcarrier signal caused by a residual carrier frequency error based on phase rotation amount information of each detection signal output by the weighting means. OFDM packet communication receiving device. 26. A receiving means for receiving an OFDM signal and performing predetermined receiving processing, a timing synchronizing processing and a carrier frequency synchronizing processing for a received signal output from the receiving means, and a synchronized signal and carrier frequency error. OFDM packet communication comprising: a synchronization processing means for outputting information; and a Fourier transform means for separating a signal subjected to timing synchronization processing and carrier frequency synchronization processing by the synchronization processing means into a signal for each subcarrier using Fourier transform. In the receiving device for use, channel estimation means for estimating channel characteristics using each subcarrier signal separated by the Fourier transform means, and using the estimation result of the channel characteristics of each subcarrier obtained by the channel estimation means To the subcarrier signal separated by the Fourier transform means. Synchronous detection means for performing synchronous detection processing for each subcarrier and outputting a detection signal, and extracting and outputting a detection signal included in at least one predetermined OFDM symbol from the detection signal output by the synchronous detection means A symbol extraction unit, a hard decision unit that makes a hard decision on the detection signal extracted by the specific symbol extraction unit and outputs a decision result, and a hard decision result output from the hard decision unit. First phase rotation detection means for detecting the phase rotation included in the output detection signal, and the signal quality of each subcarrier signal using the estimation result of the channel characteristics of each subcarrier obtained by the channel estimation means. Weight coefficient calculating means for calculating a corresponding weight coefficient; and each sub-element obtained by the weight coefficient calculating means. Weighting means for weighting the phase rotation amount detected by the first phase rotation detection means based on the weighting coefficient of the carrier, and a residual carrier frequency error based on the phase rotation amount information output from the weighting means. First common phase rotation detection means for detecting the amount of phase rotation common to each of the resulting subcarrier signals, and a pilot signal for extracting and outputting a detection signal corresponding to a pilot signal from the detection signal output by the synchronous detection means Extraction means; reference signal output means for outputting a reference signal corresponding to the detection signal extracted by the pilot signal extraction means; output by the pilot signal extraction means based on the reference signal output from the reference signal output means Second phase rotation detecting means for detecting a phase rotation included in the detection signal, A second common phase rotation detection unit that detects a phase rotation amount common to each subcarrier signal caused by the residual carrier frequency error based on the phase rotation amount information output from the phase rotation detection unit, and the first common Of the phase rotation amount common to each subcarrier signal output from the phase rotation detection means and the phase rotation amount common to each subcarrier signal output from the second common phase rotation detection means, output from the synchronous detection means Selecting means for selecting and outputting one of them according to the number of OFDM symbols equivalent to the detected detection signal, and detecting the residual of the detection signal output from the synchronous detection means based on the phase rotation amount selected by the selecting means. A phase rotation amount estimating unit for estimating a phase rotation amount caused by a carrier frequency error, and the phase rotation information output from the phase rotation estimating unit. A receiving unit for OFDM packet communication, comprising: a phase rotation correction unit that corrects a phase rotation of a detection signal output from the period detection unit. 27. The receiving apparatus for OFDM packet communication according to claim 26, wherein the carrier frequency and the clock frequency of each of the transmitting side apparatus and the receiving side apparatus are synchronized with each other. A phase rotation prediction unit that predicts and calculates a phase rotation amount caused by a clock frequency error of a detection signal output from the synchronous detection unit based on phase rotation amount information caused by a residual carrier frequency error output from the selection unit. Wherein the phase correction means corrects the phase rotation of the detection signal output from the synchronous detection means based on the phase rotation amount output from the phase rotation prediction means.
Receiver for FDM packet communication. 28. The reception apparatus for OFDM packet communication according to claim 25, 26 or 27, wherein the quality of a detection signal of all or a part of each of the subcarrier signals separated by the Fourier transform means is provided. Quality information extracting means for extracting information; and quality information smoothing means for smoothing the quality information of each detection signal obtained from the quality information extracting means in the time direction for each subcarrier, wherein the weighting means Receiving means for weighting input phase rotation amount information based on quality information smoothed in the time direction of each detection signal obtained from the quality information smoothing means, . 29. The OFD of claim 18 and claim 28.
In the receiving apparatus for M-packet communication, the quality information smoothing means performs a moving average of the quality information of each detection signal obtained by the quality information extraction means in the time direction for each subcarrier. Packet communication receiver. 30. The OFD of claim 18 and claim 28.
In the receiving device for M-packet communication, the quality information smoothing means integrates the quality information of each detection signal obtained by the quality information extracting means in a time direction, and divides by the number of integrated signals. A receiving apparatus for OFDM packet communication, characterized in that: 31. The OFD of claim 18 and claim 28.
In the receiving device for M packet communication, the quality information smoothing means integrates the quality information of each detection signal obtained by the quality information extracting means in the time direction, and the number of signals obtained by the integration is 2 ^N ( N: a natural number), and performs division by an N-bit bit shift. 32. The receiving apparatus for OFDM packet communication according to claim 25, wherein the phase rotation output from the phase rotation amount information extraction unit based on the phase rotation information generated by the phase rotation prediction unit. Clock frequency error reduction means for correcting phase rotation due to a clock frequency error included in the amount information, wherein the weighting means weights the phase rotation amount information corrected for phase rotation by the clock frequency error reduction means. A receiving device for OFDM packet communication, characterized in that: 33. The receiving apparatus for OFDM packet communication according to claim 17, wherein said common phase rotation detecting means comprises: one OFDM symbol for phase rotation amount information output by said phase rotation information extracting means. Averaging means for performing an averaging process within the phase calculation means for calculating an accumulated amount of phase rotation from the time of channel estimation based on phase rotation amount information averaged by the averaging means for the symbol. A time-direction moving average means for moving-averaging the accumulated amount of phase rotation output by the phase-rotation accumulated value calculation means in the time direction; and a cumulative value of the phase rotation moving-averaged by the time-direction moving average means. The number of delayed symbols generated by the moving average processing in the time-direction moving average means from the number of symbols on which the accumulation OFDM packet communication receiver, characterized in that a dividing means 1OFDM calculates the phase rotation amount per symbol due to the number of performs division residual carrier frequency error by subtracting. 34. The OFDM packet communication receiving apparatus according to claim 26, wherein the second common phase rotation detecting means outputs phase rotation amount information output by the second phase rotation detecting means. Averaging means for performing averaging processing within one OFDM symbol, and a phase for calculating the cumulative amount of phase rotation from the time of channel estimation based on the phase rotation amount information averaged by the intra-symbol averaging means A rotation cumulative value calculating means, a time direction moving average means for performing a moving average processing in the time direction of the accumulated amount of phase rotation output by the phase rotation cumulative value calculating means, and a moving average processing by the time direction moving average means. The accumulated value of the phase rotation is calculated based on the number of symbols on which the accumulation has been performed, by the delay time generated by the moving average processing in the time-direction moving average means. Receiving apparatus for OFDM packet communication is characterized in that a dividing means for calculating a phase rotation amount per 1OFDM symbols due to residual carrier frequency error performs division by the number obtained by subtracting the number of Bol. 35. The receiver for OFDM packet communication according to claim 33, wherein said phase rotation accumulated value calculating means converts phase rotation amount information averaged by said intra-symbol averaging means into one OFD.
A delay means for delaying by M symbols, and a difference between the phase rotation amount information averaged by the intra-symbol averaging means and the phase rotation amount information delayed by one OFDM symbol by the delay means, thereby calculating 1 OFDM
A phase difference calculating means for calculating a phase rotation amount for each symbol, and an integrating means for integrating and outputting the phase rotation amount for each symbol obtained by the phase difference calculating means for each OFDM symbol. OFDM packet communication receiving device. 36. The OFDM packet communication receiving apparatus according to claim 17, wherein said common phase rotation detecting means averages phase rotation amount information input to said common phase rotation detecting means within one OFDM symbol. An intra-symbol averaging unit for performing processing; a delay unit for delaying the phase rotation amount information averaged by the intra-symbol averaging unit by one OFDM symbol; a phase rotation amount information averaged by the intra-symbol averaging unit; The difference of the phase rotation amount information delayed by one OFDM symbol by the delay means is calculated to obtain one OFDM symbol.
Phase difference calculating means for calculating a phase rotation amount for each symbol; and time direction moving averaging means for performing a moving average processing in the time direction on a phase rotation amount for each OFDM symbol output by the phase difference calculating means. Characteristic OFD
Receiver for M packet communication. 37. The receiving apparatus for OFDM packet communication according to claim 33, wherein said dividing means comprises N bits when the number to be divided by said dividing means is represented by 2 ^N (N: natural number). 1. A receiving apparatus for OFDM packet communication, wherein the division is performed by a bit shift. 38. The OFDM packet communication receiving apparatus according to claim 18, wherein the common phase rotation detecting means is configured to accumulate a phase rotation from the time of channel estimation based on the phase rotation amount information weighted by the weighting means. Phase rotation cumulative value calculating means for calculating the amount, phase averaging means for averaging the cumulative amount of phase rotation output from the phase rotation cumulative value calculating means within one OFDM symbol, A time-direction moving average means for performing a moving-average processing in the time direction on the averaged phase rotation accumulated amount output from the means, and the accumulated phase rotation accumulated amount after the moving average output from the time-direction moving average means. Divided by the number obtained by subtracting the number of delayed symbols generated by the moving average processing in the time-direction moving average means from the number of symbols subjected to Dividing means for calculating an amount of phase rotation per OFDM symbol caused by a residual carrier frequency error, and moving in the time direction based on the amount of phase rotation per OFDM symbol caused by the residual carrier frequency error output from the dividing means. A delay correcting means for correcting a phase error due to a processing delay caused by a time-direction moving average process included in the accumulated amount of phase rotation after the moving average output from the averaging means. Receiver. 39. The OFDM packet communication receiving apparatus according to claim 34, wherein said dividing means has a signal number of 2 ^N (N: natural number) accumulated by said phase rotation accumulated value computing means. Wherein the division is performed by N-bit shift when represented by: 40. The receiving apparatus for OFDM packet communication according to claim 18, wherein said common phase rotation detecting means performs an averaging process on the phase rotation amount information weighted by said weighting means within one OFDM symbol. An intra-symbol averaging unit; a unit amount calculating unit that calculates a phase rotation amount per 1 OFDM symbol due to a residual carrier frequency error based on the averaged phase rotation accumulation amount output from the intra-symbol averaging unit; Phase rotation amount estimating means for estimating the phase rotation amount due to the residual carrier frequency error of each detection signal output from the synchronous detection means based on the phase rotation amount per OFDM symbol due to the residual carrier frequency error output from the amount calculating means OFDM characterized by comprising:
Packet communication receiver. 41. The receiving apparatus for OFDM packet communication according to claim 40, wherein a weight according to the signal quality of each subcarrier signal is obtained by using the estimation result of the channel characteristic of each subcarrier obtained by said channel estimation means. A weighting coefficient calculating unit that calculates a coefficient, wherein the weighting unit weights the phase rotation amount information output from the phase rotation amount information extracting unit based on the quality information obtained by the weighting coefficient calculation unit. A receiving apparatus for OFDM packet communication, characterized in that: 42. The OFDM packet communication receiving apparatus according to claim 40, wherein, when the signal output from the weighting means is a vector signal, the intra-symbol averaging means uses the weighting means. The weighted phase rotation amount information vector signal is 1 OFD
Consisting of an intra-symbol vector sum operation means for averaging phase components by performing a vector sum operation in M symbols, and a vector phase detection means for detecting the phase of the vector sum output from the intra-symbol vector sum operation means Receiving apparatus for OFDM packet communication. 43. The receiving apparatus for OFDM packet communication according to claim 33, wherein the time-direction moving average means uses the phase rotation amount per OFDM symbol caused by the residual carrier frequency error output from the dividing means. Delay correction means for correcting a phase error due to a processing delay caused by the time-direction moving average processing included in the accumulated value of the phase rotation to be moving averaged, and the accumulated amount of the phase rotation after the delay correction output from the delay means Adding means for adding a phase rotation amount generated by a clock frequency error output from the phase rotation prediction means, wherein the phase rotation correction means calculates a clock frequency error based on an output signal input from the addition means, A receiver for OFDM packet communication, wherein a phase rotation caused by a residual carrier frequency error is corrected. apparatus. 44. The OF according to claim 26 or 27.
In the receiving apparatus for DM packet communication, the first common phase rotation detecting means performs an averaging process within one OFDM symbol on the phase rotation amount information weighted by the weighting means, and the symbol A unit amount calculating means for calculating a phase rotation amount per one OFDM symbol due to a residual carrier frequency error based on the averaged phase rotation accumulated amount output from the inner averaging means.
Packet communication receiver. 45. The receiving apparatus for OFDM packet communication according to claim 26, wherein the first phase rotation detecting means comprises an inverse modulation means for detecting a phase rotation by performing an inverse modulation. A receiver for OFDM packet communication, comprising: 46. The OFDM packet communication receiving apparatus according to claim 26, wherein the first phase rotation detecting means performs sign inversion control based on a hard decision result output from the hard decision means. A receiver for OFDM packet communication, comprising sign inversion control means for detecting phase rotation by performing the operation. 47. The OFDM packet communication receiving apparatus according to claim 26, wherein the second phase rotation detecting means uses a weight coefficient of each subcarrier obtained by the weight coefficient calculating means. A receiver for OFDM packet communication, comprising: second weighting means for weighting the detected phase rotation amount. 48. The OFDM packet communication receiving apparatus according to claim 47, wherein the phase rotation amount information output by the second phase rotation detection unit based on the phase rotation information generated by the phase rotation prediction unit. Clock frequency error reducing means for correcting phase rotation due to the included clock frequency error, wherein the second weighting means weights the phase rotation amount information corrected for phase rotation by the clock frequency error reducing means. A receiving device for OFDM packet communication, which is characterized in that: 49. The OFDM packet communication receiving apparatus according to claim 26, wherein, when the signal output from the weighting means is a vector signal, the intra-symbol averaging means uses the weighting means. The weighted phase rotation amount information vector signal is 1 OFD
Consisting of an intra-symbol vector sum operation means for averaging phase components by performing a vector sum operation in M symbols, and a vector phase detection means for detecting the phase of the vector sum output from the intra-symbol vector sum operation means Receiving apparatus for OFDM packet communication. 50. The reception apparatus for OFDM packet communication according to claim 34, wherein the time-direction moving averaging means uses the phase rotation amount per OFDM symbol caused by the residual carrier frequency error output from the selection means. Delay correction means for correcting a phase error due to a processing delay caused by the time-direction moving average processing included in the accumulated value of the phase rotation to be moving averaged, and the accumulated amount of the phase rotation after the delay correction output from the delay means Adding means for adding a phase rotation amount generated by a clock frequency error output from the phase rotation prediction means, wherein the phase rotation correction means calculates a clock frequency error based on an output signal input from the addition means, A receiver for OFDM packet communication, wherein a phase rotation caused by a residual carrier frequency error is corrected. apparatus. 51. The OFDM packet communication receiver according to claim 26, wherein said second common phase rotation detecting means comprises: a phase rotation amount input to said second common phase rotation detecting means. An intra-symbol averaging means for averaging information within one OFDM symbol; a delay means for delaying the phase rotation amount information averaged by the intra-symbol averaging means for one OFDM symbol; The difference between the phase rotation amount information to be averaged and the phase rotation amount information delayed by one OFDM symbol by the delay means is calculated to obtain one OFDM symbol.
Phase difference calculating means for calculating a phase rotation amount for each symbol; and time direction moving averaging means for performing a moving average processing in the time direction on a phase rotation amount for each OFDM symbol output by the phase difference calculating means. Characteristic OFD
Receiver for M packet communication.