JP2001291829A - Electronic apparatus - Google Patents

Abstract

PROBLEM TO BE SOLVED: To realize and improve a monolithic semiconductor integrated circuit device for voltage step-up and an electronic apparatus. SOLUTION: The monolithic semiconductor integrated device for voltage step-up is constituted of a pair of a diode A (or a MOS transistor) and a capacitor B as basic elements. A diode has rectification transfer function, and a capacitor has charge storing function. A rectifier element A of the diode is formed on an SOI substrate 15 (which is abbreviation of silicon on insulator and a semiconductor substrate wherein an insulating layer is formed on a semiconductor substrate and a thin film semiconductor substrate is formed on the insulating layer). The part A and the part B are electrically isolated from each other. A semiconductor integrated circuit device for voltage step-up having a high step-up ratio from several volts to several hundred volts which a conventional monolithic device cannot realize is obtained.

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device having a voltage conversion function.
The present invention relates to a conductor integrated circuit device, and particularly to the device.
The present invention relates to an element configuration and a manufacturing method. Furthermore,
Assembling the device in connection with how the device is used on an electrical circuit;
The present invention relates to an embedded electronic device. 2. Description of the Related Art A voltage conversion function (hereinafter referred to as a converter)
Can be roughly divided into two categories: step-down and step-up.
Wear. Conventionally, semiconductor integrated circuit devices having a step-down function are
Species exist and are used industrially. However, FIG.
Conventional EL (electroluminescence) element shown in
As for the drive circuit of
Is generally used. Use transformer
Voltage change from AC to AC (hereinafter referred to as AC-AC)
Of course, it is easy and easy
There is, however, a DC to DC (hereinafter referred to as DC-DC)
Also in the conversion, once converted to AC component current by an oscillation circuit etc.
And boost the voltage through the transformer, then rectify again
The technique of returning to is taken. [0003] In addition, semiconductor collections such as some non-volatile memories are used.
In integrated circuit devices, high voltage for writing and erasing memory
(Even though Vdd is 10 from 3V to 5V
MOS was used to obtain a high voltage of about 20V)
A single booster circuit can be integrated into the same semiconductor integrated circuit device
(Referred to as Norisic). Figure
20 is a charge transport method, which is a booster circuit without using a transformer
(Hereinafter referred to as charge pump) circuit with diode
(D1 1001 to Dn 1003)
You. Here, as shown in FIG.
Return signal (hereinafter referred to as clock or CK)
The signal of the opposite phase (hereinafter referred to as clock bar or C
(Referred to as K inversion), the output voltage Vout
1004 is given by: Vout = Vin + nVin− (n + 1) Vf (1) Where n is a diode and a capacitor (C
11008 to Cn-1 1010).
Vf is a forward voltage drop of a single diode. A conventional PN junction is arranged in series on a single substrate.
Let me explain an example. FIG. 26 shows a conventional semiconductor integrated circuit.
It is a typical sectional view showing an apparatus. Consider it with an effective circuit
FIG. 27 shows the result. Figure 22 shows the charge points
The amplifier circuit is constructed using MOS transistors.
is there. FIG. 23A shows each MOS transistor of FIG.
In the schematic diagram shown on the electrode of, the output of the MOS transistor is
It has a cross-sectional structure shown in FIG. That is, thickness
The source 1034 and the drain 10
32 are formed. In this case, Vf in equation (1) is
Transistor threshold voltage Vth
You. As a monolithic booster circuit, FIG.
Fibonacci-type switched capacitor booster circuit shown in
Is also known. What is composed of MOS in this way is
It is used. [0005] Conventional booster circuits and boosters
The monolithic semiconductor integrated circuit device for
Although the method is being taken, the following issues need to be solved.
Can be The first problem is the conversion using a transformer first.
The method has a size problem. As you know,
The size of the lance depends on the power to be extracted.
It is determined by the frequency of the AC component used. Frequency
The transformer can be made smaller by raising it, but with the current technology
Is still large and several mm in thickness
Is absolutely necessary and is a monolithic semi-conductor
It is about 10 times that of the body integrated circuit device. In this,
When used for portable equipment, etc.
This means that it is not possible to improve the product
I will. Also, in DC-DC conversion, AC
There is a loss there
There is an efficiency problem. Also, such a conversion (Switchon
In general, a DC-DC converter of the
As mentioned above, increasing the frequency, that is, increasing the frequency
It is said that miniaturization and higher efficiency can be achieved if
Performance of the semiconductor integrated circuit devices that make up the electrical circuit
It is still not enough. And even a switch
In the switching method, the current is temporarily converted to magnetic flux.
In recent years, high frequencies have always leaked some electromagnetic waves.
These leaked electromagnetic waves are beginning to be regarded as problems in the wave
In response to environmental regulations, there is also
Has been done. As a second problem, as described above, some models
What is a Norisic boost semiconductor integrated circuit device?
However, MOS transistors are used as shown in FIG.
The configuration used is taken. As shown in FIG.
This is because a configuration using iodine cannot be taken. FIG.
PN junctions formed on the same semiconductor substrate
That is, the diodes are completely independent as shown in FIG.
This is because they cannot be separated. Each rectifier diode
P-type cathode (N-type layer 331) and anode
The PN diodes 341 to 343 are constituted by the substrate 330.
It becomes the anode P-type substrate common (344). This
Considering the discrete connection, the final stage PN die
The reverse withstand voltage at which the diode 343 can withstand the boosted voltage at that time
If it has, it seems that such a booster circuit is feasible.
Sounds good. However, these are semiconductors, and in fact
As shown in FIG. 28, these two types of PN junctions
The transistor is configured and the circuit is configured as shown.
You. For example, when CK inversion 360 becomes L (low), T
For r352, the base current i353 flows.
At this time, since CK359 is H (high), the node 35
7, the first-stage boosted charge is stored. However
However, at this time, that is, the PNP transistor Tr354
Turns on and the current 354 for the base current i × hFE is common
Said that it would not be possible to actually raise the pressure
It will be. This is again the PN junction on a single substrate
This is the reason why the arrangement is difficult. Rice cake
If you connect individual parts (discrete)
Such a configuration is possible, but the large
It becomes the same as the problem of size, it becomes monolithic
There is no point in doing so. Now, MOS transistor
FIG. 23 (a) shows a configuration in which the transistors are arranged.
As shown in (b), the MOS transistor has its substrate (S
ub) 1031 is common, for example, a substrate
If it is now the ground (GND), the first stage Transis
Is good, but the second stage transistor has its source
A potential difference that is boosted by one stage occurs between Sub.
Then, Vth increases and is expressed as follows. Vth = Vth (initial) + K ｛(VB +
2φ) 1 / 2− (2φ) 1/2｝ where VB is the substrate voltage with respect to the source, Vth (ini
tial) is the Vth and K of the transistor when the substrate voltage is 0
The substrate bias constant, φ, is the Fermi level. Ie
Vth rises as the number of stages increases
ON operation stops, boost voltage saturates
It turns out that. Experimentally, up to more than 10 V with 3 V input
Pressure rise is the practical limit. The output current I is represented by I∝f · C / n, where f is the frequency of CK and C is the unit capacity.
Data capacity. Therefore, to increase I,
You can see that C should be increased, but the area is also increasing
It is not good for economic efficiency.
You. If you want to increase the boosted voltage,
And ensure that the withstand voltage suitable for the final output voltage is not
This increases the thickness of the capacitor's insulating film.
This will reduce the capacity this time. like this
In this method, the output current and the boost voltage
The factor that has [0008] The above-mentioned problems have been solved.
In the present invention, a good monolithic
Means for realizing a thick boosted semiconductor integrated circuit device,
And electrical circuits in electronic equipment incorporating them
Road measures were taken as follows. As a first means, a good monolithic ascent
The configuration method of the compression semiconductor integrated circuit device will be described. Previous
As described, a monolithic boosted semiconductor integrated circuit device
The charge pump method is a typical example of
MOS transistors (or
It is a pair of a diode) and a capacitor. these
The MOS transistor is rectified by its function (in English,
In the Rectifier), the capacitor stores electric charge and
It is a transfer, but a capacitor is a capacitor.
You. First, a rectification function is provided as a first means.
A diode, and the diode is an SOI substrate (Sili
abbreviation of con On Insulator, semiconductor substrate
An insulating layer on the substrate and a thin semiconductor substrate on the insulating layer
It is a semiconductor substrate having a configuration as described below. Semiconductor base of thin film
In recent years, the thickness of the plate has been reduced from several tens of angstroms.
Various types up to several 100 μm have been realized. The semiconductor substrate
SIMOX method, ZMR method, bonding
Various proposals have been made such as a matching method. ) Formed on
And are electrically isolated from each other.
It is a means of doing. Capacitors are also on SOI substrate
Formed. [0011] As the first means 2,
Means of configuring a diode with a MOS transistor
It is. As the third, the diode in the first
Silicon transistors (polycrystalline silicon film or poly
MOS transistor formed on silicon film.
Lower Polysilicon Thin Film tr
The abbreviation of "ansistor" is referred to as PTF. )
It is a means of doing. As the fourth, in the first
Diode by polysilicon film with excimer laser
By forming a PN junction on the one with improved single crystallinity
Obtained diode (hereinafter called poly recrystallized diode)
You. ). 5 to 8
And the capacity for each of
Means that the structure of the data is made of two layers of polysilicon film.
You. From 9 to 12, from 1 to 4
In each case, the structure of the capacitor is not SOI but general
To perform with an insulating film formed on a typical semiconductor substrate
It is. As the second means, the first means has been described.
The rectifying function of the rollers and the capacitor
It is a means to take a structure to join. The first means
In combination with 1 to 12 of the second hand
Stages 1 to 12 are referred to. [0013] As a third means, the separation on the SOI substrate is performed.
To form an array of PN junctions, the PN junctions
Power output through the wire, and
Circuit composed of such a rectifier and capacitor
This is a means of providing a structure having [0014] As a fourth means, as one of the measures, a capacitor
Edge film or dielectric film is made of silicon oxide film-silicon nitride
This is a means of forming a three-layer structure of a film and a silicon oxide film.
You. Second, the dielectric film of the capacitor is made of silicon oxide.
It is said that the structure of the oxide film-tantalum oxide film (Ta2O5)
Means. As the third, the dielectric film of the capacitor
Barium strontium titanate (Bax, Sr1-x
) TiO3 (hereinafter referred to as BST-based film)} structure
It is a means of doing. Fourth, inviting capacitors
Conductor film is made of lead zirconate titanate @ Pb (Zr, Ti) O
3 (hereinafter referred to as PZT-based film)
Means. Fifth, the arranged rectifying elements and the key
Rectifying element traversed by wiring that electrically connects between capacitors
The upper insulating film part is used for the capacitor element
This is a means of being thicker than the insulating film. 6 and
The thickness of the dielectric film of the arranged capacitor elements is
In other words, they are different configurations. So
As 7 of the above, the arranged rectifying elements are
It is a means of separation by oxidation. As the eighth, P
It is a means to flatten the polysilicon surface of TF.
You. As the ninth, the transistor of the rectifying element in the MLD
This is a means of forming a source and a drain. That
10, the source of the rectifying transistor has the LDD structure.
It is a means of doing. Eleven, polysilicon
Of forming a rectifier by excimer laser recrystallization
It is a step. As the 12th, by diffusion from polysilicon
This is a method of forming an impurity region of the opposite conductivity type. The fifth means 1 is an EL (elect.
(Luminescence, electronic excitation fluorescence)
The voltage booster circuit of the EL element control electric circuit for light
This is a means of forming by a pumping method. That
2. EL element control electric circuit for EL element emission
Voltage booster circuit by the switched capacitor method
There is a means that there is. Third, the EL element drive
To generate power by receiving voltage boost and light for
The charging is switched by an external signal.
You. As the fourth, it is said that it has a built-in oscillation signal circuit.
Means. As the fifth, built-in oscillation signal circuit and oscillation
The signal generated by the signal generation circuit is
Ground (GN)
D) of positive and negative power supply voltage
It is a means of having a voltage. Sixth, switch
Grounding of the oscillation signal system (como
) And the ground (GND) on the boosted voltage side
It is a means of being separated. As the seventh, oscillation signal
By changing the ratio of the positive and negative times of the signal generated by the signal circuit
It is a means of adjusting the voltage or current of the boosted voltage.
You. As the eighth, the frequency of the signal generated by the oscillation signal circuit is
Adjust the voltage or current of the boost voltage by changing
That means. Ninth, the end of the boosted output
Periodically when there is a capacitive element at the end and EL driving is not performed
A step of outputting a boosted output and precharging the capacitive element
It is a step. At the end of the boosted output,
With EL elements and inverter elements and not EL driven
During a period of time (a period when the EL terminal is in the ground state).
Means for pre-charging, and the inverter element
A timer circuit for driving the
Output boosted by setting can be applied at arbitrary time intervals.
It is a means to cut. As the eleventh, the EL element was driven.
Using two booster circuits to operate, and both sides of the EL element
Means to alternately apply the boosted output. As a sixth means, an input terminal of the booster circuit and
Between the clock terminal and the clock bar terminal and between the output terminal
High between the lock terminal and clock bar terminal to protect against electrostatic damage
This is a means of providing a voltage breakdown diode. Seventh
In the means, the primary battery is a primary battery or a secondary battery.
First boosting means for boosting the voltage of the power supply comprising
1 A step-up circuit for generating a step-up output voltage level pulse
A clock pulse generating means for boosting the voltage, and a first boosting means.
The boosted voltage of the stage is changed by the clock pulse generating means for boosting.
When the second booster for boosting by the lock pulse is provided,
Means. Further, as the second step, the step-up semiconductor integrated circuit
The basic unit that constitutes the path is a MOS transistor or
N is a positive integer greater than or equal to 1
The basic unit constituting the boosted semiconductor integrated circuit is n stages
And the number of stages of the first booster circuit is n / 2.
It is a means of doing. In the eighth means, as the first step, the boosting circuit
The output boosted in the circuit is
Of the drive clock signal of the output adjustment circuit
Output boosted by varying the duty ratio
This is a means for varying the signal. Second, the booster stage in the booster circuit
By changing the number, the output signal
It is a means to make it. The following actions can be obtained by taking the above-mentioned means.
You. The following effects can be obtained by taking the first means. You
That is, charge pump method and switched capacitor method
Rectifier / capacitor pair is completely
So far, monolithic
For high voltage boosting from several V to several hundred V, which was not possible
A semiconductor integrated circuit device becomes possible. The following effects can be obtained by taking the second means.
It is. That is, the area of such a semiconductor integrated circuit device
(Chip size) is reduced, resulting in great economic effects
No. The following effects can be obtained by using the third means. You
That is, a semiconductor integrated circuit device having such a boosting function
Have the function of receiving light and outputting electrical signals
become. Switch to the charging semiconductor integrated circuit device
That is. The following effects can be obtained by taking the fourth means.
It is. That is, such a semiconductor integrated circuit device is
It can be obtained at low cost due to high performance. By taking the fifth measure
The following effects are obtained. That is, such a semiconductor collection
By using integrated circuit devices, thin
An electronic device with a built-in EL light emitting element can be realized. Also,
It has a charging function and the EL light emission method (color
Function to indicate various messages and alarms
It is also possible to realize electronic devices equipped with such devices. The following effects can be obtained by adopting the sixth means.
It is. That is, a semiconductor to which such a high electric field is applied
In integrated circuits, noise and other unwanted static electricity
Do not provide additional protection from outside
It can be prevented before it happens. The following effects are obtained by adopting the seventh means.
It is. That is, the power supply voltage is boosted once by the first booster.
After that, the clock pulse of the boosted voltage level is
The lock pulse is generated by the lock pulse
By driving the booster, the booster circuit is configured.
High boost voltage even with a small number of charge pump stages
And the chip size can be reduced.
As a result, the size of an electronic device to which this is applied can be reduced. The following effects can be obtained by taking the eighth means.
It is. That is, the booster circuit must have an output adjustment circuit.
To make the number of boosting stages of the booster circuit variable
Therefore, the output boosted by the booster circuit can be
Output characteristics and output state of the output element
It can be changed. Preferred embodiments of the present invention will be described below with reference to the accompanying drawings.
Will be described in detail. FIG. 1 shows a first embodiment according to the present invention.
Rectifier / capacitor pair
It is a schematic sectional view. The Si layer 18 is now a P-type semiconductor substrate
Forming a P-type layer 24 and having an N + type layer 19;
SiO2 16 and LOCOS, which have a rectification function consisting of an N-junction
The oxide film 17 and the Si substrate 15 which is a support substrate and
Rectifying element part A is formed completely separated from other elements
You. A capacitor insulating film 22 is provided on the Si layer 18 and
Has a capacitor electrode 21 and is similarly separated from other elements.
A capacitor portion B is formed. FIG. 2 shows the first embodiment.
FIG. 3 is a schematic plan view of an electrode showing the semiconductor integrated circuit device of FIG.
You. FIG. 3 shows a semiconductor integrated circuit device according to the first embodiment.
One rectifier / capacitor of charge pump type booster circuit
A schematic block diagram showing a pair (hereinafter sometimes referred to as a pair)
FIG. The configuration shown in FIG. 1 is shown in FIG.
These are connected to each other by such wirings to form a circuit as shown in FIG.
A large number of these pairs are connected as shown in FIG.
A step-up semiconductor integrated circuit device is realized. In the semiconductor integrated circuit of the present invention,
The insulating film, i.e., the dielectric film of the silicon oxide film
By adopting a three-layer structure of a con-nitride film and a silicon oxide film
And a large-capacity capacitor can be obtained in a small area.
You. Furthermore, the dielectric film of the capacitor is changed to a silicon oxide film.
Tantalum oxide film (Ta2 O5) Barium titanate
Nb (Bax, Sr1-x) TiO3 (BS
T-based film) {lead zirconate titanate} Pb (Z
r, Ti) O3, (hereinafter referred to as PZT-based film)
The conductor film structure makes it possible to
Capacitors can be formed. Also, between the rectifier and the capacitor
Film on the rectifier crossed by the wiring that electrically connects
From the insulating film used for the capacitor element
By increasing the thickness, the effect of the parasitic capacitance can be reduced.
Wear. The thickness of the dielectric film of the arranged capacitor elements is small.
At least different configurations (low voltage
Part is thin insulating film, high voltage part is thick insulating film) Capacitor surface
The product can be reduced. FIG. 4 shows a semiconductor device according to a second embodiment of the present invention.
Of rectifier-capacitor pair showing integrated circuit device
FIG. The Si layer 18 is now a P-type semiconductor substrate,
Having an N + type layer 19 and having a rectifying function of a PN junction;
At the same time, a capacitor insulating film 22 is provided on the N + type layer 19.
Further, a capacitor portion is formed having a capacitor electrode 21.
Have been. FIG. 5 shows a semiconductor integrated circuit device of this embodiment.
FIG. 3 is a schematic plan view of a scanning electrode. Take this configuration
And put the pair as described in the first embodiment on the same plane.
FIG. 6 shows a semiconductor integrated circuit device according to a third embodiment of the present invention.
FIG. 2 is a schematic cross-sectional view of a rectifier / capacitor pair showing the arrangement.
Capacitors formed on a normal non-SOI semiconductor substrate
A capacitor comprising the insulator film 22 and the capacitor electrode 67
Is a polysilicon substrate 6 formed on the same semiconductor substrate.
0, the drain region 61, the source electrode 63, and the gate
Polysilicon MOS transistor consisting of electrode 69
In other words, as shown in FIG.
Form a pair of capacitors. FIG. 7 shows a semiconductor integrated circuit device of this embodiment.
FIG. 3 is a schematic plan view of a scanning electrode. Many of these pairs are connected
A charge pump booster circuit as shown in FIG. 22 is formed.
You. According to this embodiment, the SOI substrate is not used, and the substrate effect is improved.
And low cost without Vth increase of MOS transistor
A simple booster circuit can be realized. FIG. 9 shows a semiconductor device according to a fourth embodiment of the present invention.
Rectifier and photovoltaic / capacitor plot showing integrated circuit device
It is a typical sectional view of a. From the polysilicon electrode 92
The N + type layer 91 introduced in a self-aligned manner serves as a rectifying element.
When connected to capacitor part B and receives light at the same time,
Voltage or current can be taken out as an electric element
You. FIG. 10A shows a semiconductor integrated circuit according to this embodiment.
FIG. 2 is a schematic block diagram showing an electric circuit of the device. On the circuit
MOS transistor CS104 as a changeover switch
And when CS105 is placed and a signal comes into CS
(When CS is not coming, CS is automatically selected.
Rectifier element as a charge pump circuit
The elements are connected in series and perform a boost operation {FIG. 10 (b)}. CS
Most of the time, when there are no rectifiers, about 6 rectifiers (Li
Or a capacitor-type rechargeable battery. Series connection
Battery or a battery that requires a completely different charging voltage
In some cases, the appropriate number) connected in series and all
Secondary battery BAT. Keep charging 103
{FIG. 10 (c)}. Take the configuration as in this embodiment
Electronic device having a booster circuit such as EL light emitting element drive
The battery drain, frequent replacement, etc.
It is very convenient. FIG. 11 shows a half of the fifth embodiment according to the present invention.
Sectional drawing in order of the manufacturing process which shows the manufacturing method of a conductor integrated circuit device
It is. Formed on the single crystal Si layer 11 on the SOI substrate
The patterned SiN layer 115 is patterned by the photoresist 114.
11 (b). Next, photoresist 1
The single crystal Si layer 11 is partially patterned at 17
Etch in a range that does not reach the underlying SiO2 insulating layer 112
(FIG. 11C). Next, through the oxidation process
As a result, the LOCOS oxide film 118 was formed and separated.
An Si layer 119 is formed. FIG. 12 is a view showing E of the sixth embodiment according to the present invention.
FIG. 3 is a schematic block diagram illustrating an L light emitting element drive circuit. Rise
The pressure device 122 is a charge pump system as described above.
Is a semiconductor integrated circuit device that takes
Are arranged in series. In this embodiment
In this case, it is assumed that the EL element Ce125 has a capacity of several nF.
The charge / discharge cycle by the immer circuit is set to 2 to 3 kHz.
About 100V for Vout124 to obtain proper brightness
Voltage and 1 * 10 -5 F / sec charge transport capacity
is necessary. Set at Vin3V connected to Vdd
The current / capacitor pair consists of about 40 stages and one capacitor.
The amount is about 10 pF, CK and inverted CK are 1 to 4 MH
z will be required. Approximately 80 steps at Vin1.5V
I need it. Outside the last diode 130
The attached capacity Cx129 is about the same number as the EL element Ce125.
A capacitance of nF is required. At this time, for example, CK and inversion
CK minus GND at CK voltage amplitude
When the same boost ratio is obtained by oscillating with the voltage of
Only the number of stages is needed. Also, for example, such a charge pump
In the circuit, the desired Vout voltage is
It takes a considerable amount of time to be caught.
The rise time is several tens to several hundred milliseconds
However, the timer circuit operates to prevent this
One time or several minutes from a few seconds to a few minutes
Start up by operating and pre-charging Cx and Ce
The setting time is short and convenient. FIG. 25 shows an example of a conventional EL element driving circuit.
However, the transformer 1053 has a size problem as described above.
Or problems with electromagnetic harmonics, plus driving a transformer
Transistor 1057 and capacitor Cb1055 for
The self-excited oscillation circuit consisting of the resistor Rb1054
The power rises to several mW and is very inefficient. Apply the present invention
That all these problems can be solved
It can be seen how excellent the present invention is. FIG. 13 is a block diagram of a seventh embodiment according to the tree invention.
FIG. 3 is a schematic block diagram illustrating an L light emitting element drive circuit. V
The dd131 voltage is 1.5 V, 3.
0V, 5.0V, or 12V power supply
In many cases, a variation of 5% to 10% is indispensable.
It comes from batteries, much less
In this case, there is a considerable voltage difference between the initial
It is In the present embodiment, the output power of Vout 132 is
The voltage is monitored by a comparator 133 having a built-in reference voltage.
And PWM (pulse wave modulation) circuit 1
The duty ratio of the CK and inverted CK signals via 34
(On / off ratio, tonck1 142 in FIG. 14)
And Tck141) changed to tonck2 143.
To change the charge transport efficiency and keep the EL brightness constant
It is to keep it. When the voltage drops
Save time turning on. Also, the PWM circuit is PWM
VCO (Voltage Control Oscillator)
Use a circuit that changes the frequency of CK
It is equally effective. Boost circuit is switched capacitor
The effect of this embodiment is exactly the same even in the case of the
You. FIGS. 15 and 16 show an eighth embodiment of the present invention.
The electric circuit of the semiconductor integrated circuit device having the boost function of the embodiment
It is a schematic block diagram which shows a road. Switched capacity
This is an excitation that constitutes a step-up circuit. Here is a common sui
It is important to explain the switched capacitor booster circuit.
I do. FIG. 24 shows a Fibonacci type switched capacity.
The principle configuration of the sita booster circuit is that Tra1 1051 and T1
rb1 1052, capacity 1055, and Trc1 1053
Assuming that the circuit to be processed is one block, this
Output voltage Vout is Vout = Fib (n + 1) · Vin−Rsc · Iou
t. Here, Rsc is an output resistance, and the Fib function is represented by Fib (0) = 0, Fib (1) = 1 Fib (n) = Fib (n−2) + Fib (n−1). . That is, the voltage was increased by the charge pump method.
Much fewer stages (rectifiers or capacitors
The number of) makes it possible to increase the pressure. But
Therefore, the MOS transistors in this circuit are ideal switches.
, And is actually monolithic semiconductor integration.
It is difficult to realize in a circuit device. Because the example
For example, in order for the transistor Tra1 1052 to turn on,
The voltage of CK1 applied to the gate is
The voltage must be high, but the first stage is good
The voltage of the node at the subsequent stage is the boosted voltage
Therefore, turning on the transistor is virtually impossible.
Because. Therefore, as shown in FIG.
K1 and CK2 are COM1 and COM2.
In each, it is separated from GND by a diode.
When connecting to the node, back up with each diode.
Configuration. By doing so, the booster GN
D and CK COM have the same starting potential as GND.
Separate voltage backup system with separate diode backup
And became practically feasible. FIG. 16 shows a cascaded switched capacitor.
This is an example in which the present invention is applied to a booster circuit. This type
(2m + 1) capacitors and (4m + 1) transformers
The booster can be boosted by 2m times with a resistor. I'll show you
It can be realized with a similar diode backup
It is. FIG. 17A shows a ninth embodiment according to the present invention.
FIG. 2 is a schematic cross-sectional view showing a rectifying element of an example semiconductor integrated circuit device.
It is. The anode electrode 3 having an opening in the N- type layer 301
02 is in contact, and now the electrode is Al (aluminum
(Appropriate processing for semiconductor process)
Surface treatment or heat treatment after contacting Al, for example, 400
Temperature from about 600 ° C to 600 ° C)
A Schottky junction 303 is obtained. Such a so-called
The Schottky diode must be configured as a rectifying function element.
And a rectifying element that does not form a P + type layer as an anode region
Is obtained. FIG. 17B is an enlarged view of a Schottky junction.
FIG. Here, Al is directly applied to the N-Si surface.
Schottky gold as barrier metal instead of touching
An example in which the genus 307 is interposed is shown. Schottky
Chrome (Cr), molybdenum (Mo), white as metal
Gold (Pt), tungsten (W), etc. are considered good
However, the necessary diode Vf and reverse leakage (lead
H) selected and used. Here, for example, Pt or
It is recommended to add several thousand W. Explained so far
The embodiment of the semiconductor integrated circuit device of the present invention
In addition, by adopting such a configuration, a normal PN junction
Is about 0.6V, whereas the Schottky is
0.4 to 0.5 V
A pressure circuit can be realized. In recent years, the trend of electric circuits
Standard power supply voltage using semiconductor integrated circuit devices
For example, corresponding to 5V to 3V, and 1.5V
Very convenient, in fact V at 1.5V power supply voltage
With the present embodiment, boosting from in becomes possible only for the first time.
You. FIG. 18 shows this embodiment not using an SOI substrate but
This is an example applied to a single very standard P-type substrate 310.
You. Schottky instead of PN junction as in this application example
By using the junction as a rectifying function element, the circuit configuration and
As shown in FIG. 19, the boosting is possible.
Become. In other words, the base (N- type layer)
311) and the Schottky metal
Injection of minority carrier at the key joint 313
This is because the transistor does not operate. Also in this case
The final PN diode Dn325 withstands the final boosted voltage
But it is an advantage because of the normal PN junction.
Yes, that is, Schottky disadvantageous for withstand voltage (leakage current)
-Diodes are used to supply power for one stage as described
It is only necessary to endure. FIG. 29 shows a tenth embodiment of the present invention.
FIG. 3 is a schematic block diagram illustrating an EL light emitting element drive circuit.
The booster 122 is a charge pump as described above.
Rectifier / capacitor pair
Are arranged in series. In the case of this embodiment,
The boosted output from the booster is printed on the EL element Ce125.
In order to make the EL element emit light,
At a certain time interval and stored in the EL element.
It is necessary to discharge the charge. Mark of this boosted output
Addition and discharge are performed using an inverter 2901.
Transported by the booster during the EL element discharge
Effective use of waste charge without wasting it outside
can do. Further, the boosted output is marked on the EL element.
Output of the timing of addition and discharge from the timer circuit 127
The duty ratio of this timing is 5 to 15
%, The frequency of the cycle of application and discharge is
The emission brightness of the EL device.
The degree can be increased sufficiently. Further, application and discharge of the boosted output are performed.
The inverter 2901 has a high voltage tolerance of 50 to 100V.
DDD (Double Diffus)
M having an edDrain) structure or a LOCOS drain structure
It is composed of OS transistors. This inverter 2901 is connected to another booster.
Device 122, capacitive element Cx129, timer circuit 127
Integration on the same substrate as
And the chip size can be reduced.
Equipment can be downsized. FIG. 30 shows a second embodiment according to the present invention.
11 is a schematic block diagram showing an EL light emitting element driving circuit according to an eleventh embodiment.
FIG. The booster 122 is a switch as described above.
This is a semiconductor integrated circuit that uses a charge pump method.
The capacitor pairs are arranged in series. E
The boosted output for causing the L element to emit light is
From both sides of the EL element using barters 2902 and 2903
This is the method of applying. In this way, the position is
When using a method of applying boosted outputs with different phases
In this case, Vout 124 required to obtain sufficient brightness is 5
Charge transfer of 2 * 10 −5 F / sec at a voltage of about 0 V
It only needs sending capacity. When Vin connected to Vdd is 3V
Rectifier / capacitor pair has about 20 stages, one capacity
Capacitor is about 10 pF, CK and inverted CK are from 2
8 MHz. By doing so, the EL element
Voltage required to emit light with sufficient brightness
The pressure can be reduced, and the area of the booster 122 can be reduced.
I can do it. FIG. 31 shows a twelfth embodiment of the present invention.
FIG. 3 is a schematic block diagram illustrating an EL light emitting element drive circuit.
The boosters 3101 and 3102 are the
This is a semiconductor integrated circuit that uses a
Capacitor pairs are arranged in series. EL
Apply boosted outputs with different phases from both sides of the device
As a method, two boosters 3101 and 3102 are used.
In this case, Vout 310 required to obtain sufficient brightness
3 and 3104 each have a voltage of about 50 V and 1 * 10
Requires only -5 F / sec charge transport capability, connected to Vdd
When the applied Vin is 3V, the rectifier-capacitor pair is about
20 stages, the capacitance of one capacitor is about 10 pF, CK
And the inverted CK is 1 to 4 MHz. Like this
As a result, the EL element emits light with sufficient brightness.
The boost voltage required to
And C for driving the boosters 3101 and 3102.
K and inverted CK generators also require lower frequency, lower power consumption
Current consumption can be reduced. FIG. 32 shows a thirteenth embodiment of the present invention.
FIG. 3 is a schematic block diagram illustrating an EL light emitting element drive circuit.
The boosters 3101 and 3102 are the
This is a semiconductor integrated circuit that uses a
Capacitor pairs are arranged in series. EL
Apply boosted outputs with different phases from both sides of the device
As a method, two boosters 3101 and 3102 are used.
In this case, Vout 310 required to obtain sufficient brightness
3 and 3104 each have a voltage of about 50 V and 1 * 10
Requires only -5 F / sec charge transport capability, connected to Vdd
When the applied Vin is 3V, the rectifier-capacitor pair is about
20 stages, the capacitance of one capacitor is about 10 pF, CK
And the inverted CK is 1 to 4 MHz. Like this
As a result, the EL element emits light with sufficient brightness.
The boost voltage required to
And C for driving the boosters 3101 and 3102.
K and inverted CK generators also require smaller frequencies. Ma
In addition, a charge channel for causing the EL element Ce125 to emit light.
Output Vo for boosting and discharging
out 3103 and 3104 are connected to inverters 2902 and 290
3, the EL element Ce125 is decompressed.
Transported by the booster during the discharge
Effective use without wasting the charge
It can greatly reduce current consumption. FIG. 33 shows a fourteenth embodiment of the present invention.
FIG. 3 is a schematic block diagram of a step-up semiconductor integrated circuit. Boost
The device 122 uses the charge pump method as described above.
Rectifier / capacitor pair
They are arranged in columns. In this embodiment, the high voltage breakdown diode 3
303, 3304, 3305, 3306 are the breakdown voltages
Is higher than the voltage required for the EL element to emit light, and
It is set lower than the breakdown voltage of the capacitive element at the termination
Things. For example, an EL element is emitted at a voltage of about 100 V.
When light is used, the normal use of the capacitive element
Usable electric field strength uses silicon oxide film as insulator
Is 3 MV / cm, which is 300 nm in terms of film thickness.
Becomes The silicon oxide film having this thickness has a voltage of 6 MV / cm.
When a field is added, a minute current starts to flow, and deterioration progresses
become. Therefore, the high voltage breakdown diodes 3303, 3303
The breakdown voltage of 304, 3305, 3306 is 300 nm
When silicon oxide having a film thickness is used as an insulator, 6 MV
/ Cm of electric field or less, about 120 to 1
It is set to 80V. The booster 1 which is this booster semiconductor integrated circuit
22 input terminal Vin123 and terminal CK3301
High voltage breakdown diode 3305 so that n side is Low
At the same time as the input terminal Vin123
CK 3302 and a high voltage breakdown diode 3306
Connect. Further, the output terminal Vout 124 and the terminal C
High voltage drop of K3301 so that Vout side is Low.
When the diode 3304 is connected,
Connect terminal Vout124 to terminal inverted CK3302
Due to external noise and other unnecessary static electricity
Using an additional protection circuit from outside
Can be prevented beforehand. Like the booster of the present invention
Unnecessary static electricity, especially for devices with many capacitors
It is highly probable that the element will be destroyed by the application of air.
The effect is particularly large by incorporating such a protection device,
Device handling is also easier. FIG. 35 shows a fifteenth embodiment of the present invention.
FIG. 2 is a schematic electric circuit diagram of the boosting semiconductor integrated circuit. Primary
The voltage of the power source 3501 which is a battery or a secondary battery is the first voltage.
The voltage is boosted to twice the voltage by the booster circuit 3502. Doubled
The compressed voltage is stored in the smoothing capacitor 3524.
The double voltage stored in the smoothing capacitor 3524 is the second voltage
The input terminal Vin of the booster circuit 3503 and the first and second boosters
Supplied to the boost pulse generating means 3504 for driving the circuit.
You. The step-up pulse generation circuit 3504 operates at the voltage of the power supply 3501.
A first booster circuit 3502
To a booster with a voltage level twice as high as the voltage of the power supply 3501.
The lock pulse is output to the second booster circuit 3503. The boosting clock pulse generating circuit 3504 is
When the control line to be controlled becomes VDD level,
The path 3531 starts oscillating and the voltage level is
The first booster circuit 3 supplies the same booster clock pulse as the voltage of
Output to the capacitor 3522 of 502. As a result,
1 The power supply 3 is connected to the smoothing capacitor 3524 of the booster circuit 3502.
A voltage twice as large as that of 501 is stored. Next, the second booster circuit 3504 is controlled.
When the control line A goes to the VDD level, the pulse generation circuit 35
The gate 3532 that has blocked the output pulse of 31 operates
And a pulse is transmitted to the level shifter 3533.
The level shifter 3533 outputs the voltage of the boosting clock pulse.
Power supply voltage stored in leveling capacitor 3524
And outputs it to the output gate 3534.
You. The power supply voltage of output gates 3534 and 3535 is
Power supply 350
A clock pulse having a voltage level twice as high as 1
3504 clock pulse input CL and I inverted CL
It can be output to NVCL. This CL and INVC
The phase relationship of L differs by 180 degrees. With the above configuration, the power supply voltage differs from the power supply voltage.
Voltage can be boosted. In this way, the second rise
The input Vin to the voltage circuit 3503 can be increased.
Therefore, even if the number of rectifier circuit / capacitor pairs is small
High boosted voltage output could be obtained. In FIG. 35, the voltage twice the power supply voltage is raised to the second voltage.
The input voltage of the voltage circuit, but the present invention is limited to this.
Input voltage of the second booster circuit
Voltage. First booster circuit and second booster circuit
Rectifier circuit / capacitor pair (charge pump
N) is the total number of stages in the first step-up circuit and the second step-up circuit.
Change the number of steps for the road so that the total is N steps.
Change the output voltage of the second booster circuit
The child is shown in FIG. (The voltage drop Vf due to the rectifier circuit is
In the table, N is the rectification circuit of the second booster circuit.
Is the total number of circuit / capacitor pairs, (N-1, N-
2,...) Are the number of stages of the first boosting. For example, 2 in the figure
0.VDD means that a voltage 20 times the power supply voltage VDD
The output voltage level of the second booster circuit is shown.
You. As can be seen from the table, half of the total number N of pairs is
・ Highest boosted voltage output when allocated to the second booster circuit
It shows that power can be obtained. FIG. 37 shows a sixteenth embodiment according to the present invention.
It is the block diagram shown. The present embodiment is a step-up semiconductor of the present invention.
EL device for illumination of display device of electronic watch
This is an example used. The time measured by the oscillation circuit 3601
The reference signal is frequency-divided by a frequency dividing circuit 3602. Frequency division
The one-second clock signal divided by the circuit 3602 is output by the clock circuit 3
It is counted at 603 and becomes time data. Clock circuit 360
The time data of No. 3 is displayed on the display element 3604. table
Electroluminescent plate installed behind display element
In order to obtain a high voltage driving the 3610, the booster of the present invention is used.
Uses semiconductor integrated circuits. When the external operation switch 3605 is turned on
The step-up pulse generation circuit 3606 is provided with a frequency dividing circuit 3602
The first boosting circuit 3608 and the second boosting circuit 3608
A pulse for boosting is output to the pressure circuit 3609. this
As a result, the electroluminescent plate 3610 is boosted
Charged with high voltage. Electroluminescent plate
High voltage is discharged at a certain frequency by the discharge circuit 3611.
It is. As a result. The display element 3604 is illuminated and in the dark
The time can be easily read. Note that the boosted semiconductor integrated circuit of the present invention
Applicable only to EL elements for illumination of display elements such as
In addition, high voltage is required for driving motors and buzzers.
Application to various required output elements is also possible. FIG.
8 is a block diagram showing a seventeenth embodiment according to the present invention.
It is. The driving circuit 3801 is increased to an oscillation circuit 3802.
From the voltage circuit 3803 and the output signal adjusting circuit 3804
Be composed. The booster circuit 3803 is a switch as described above.
This is a semiconductor integrated circuit that uses a charge pump method.
The capacitor pairs are arranged in series. Departure
The oscillation circuit 3802 generates a clock signal.
The boosting operation is performed by the boosting circuit 3803 according to the signal period.
You. The output adjustment circuit 3804 is provided with an oscillation circuit 3802 or
By operating a part of the booster circuit 3803, the driving circuit
Of the boosted output 3805 output from the
Adjust the wave number. In FIG. 39, the oscillation circuit 3902 generates a CR signal.
It operates with a swing, and a pair of C3903 and RL4913, or
Is determined by the time constant of the pair C3903 and RH3914.
The oscillation frequency is determined. CR oscillation circuit is a crystal oscillation circuit
The oscillation frequency can be easily changed unlike the ceramic oscillation circuit
can do. Switch S3917 to terminal 3915
Alternatively, by connecting to either terminal 3916
RL3913 and RH3914 can be selected by
Set RL3913 to low resistance and RH3914 to high resistance.
The oscillation frequency can be controlled by selecting the level of the resistor
Can be RS3901 is an inverter 390
4 is an input protection resistor. The booster 3912
Clock signal input terminals CLK3921 and CLK3920.
Signals are input to rectangles having opposite phases, respectively. Voltage input terminal
The power supply voltage VDD input to VIN3908 becomes a high voltage.
The voltage is boosted and the voltage signal is passed through the diode De3918.
Then, the EL element Ce3919 is charged. Ce3919
Is also connected to the collector terminal of the transistor Tr3910.
On the other hand, the base of Tr3910 is another oscillation
It is connected to the circuit 3911. The oscillation circuit 3911 is empty
A periodic signal is sequentially applied to the base of Tr3910,
Tr3910 is ON / O in signal cycle of oscillation circuit 3911
Repeat the FF operation. When Tr3910 is OFF
Indicates that the electric charge stored in Ce3919 remains unchanged.
When Tr3910 is turned ON, Ce3919
The charged electric charge is discharged through Tr3910.
You. By repeating the charging / discharging operation as described above,
Accordingly, the EL element Ce3919 emits light. Here the oscillation circuit
The oscillation frequency of 3902 is, for example, 10K to several KHz.
And the signal output from the oscillation circuit 3911
Is sufficiently slow, for example, about several tens to several KHz.
You. FIG. 40 shows a clock input to the booster circuit 3912.
Lock signal CLK (4001, 4003) and EL
The waveform of the voltage applied to the element Ce (4002, 400
It is a chart figure of 4). As the clock signal elapses,
The electric charge is gradually charged to Ce3919.
The amount of charge varies depending on the magnitude of the vibration resistance. FIG.
Signal 4101 output from the oscillation circuit 3911 and E
The waveform of the voltage applied to the L element Ce3919 (410
2, 4103). High by switch 3917
When the anti-RH3914 is selected, the EL element Ce391
9 is charged enough to emit light, but the switch
When low resistance RL3913 is selected by 3917
Is charged before the EL element 3914 is sufficiently charged.
The load is discharged. In other words, the cross
Adjusting the output voltage by changing the frequency of the
And the emission luminance of the EL element 3919 can be controlled.
Can be controlled. FIG. 42 shows an eighteenth embodiment according to the present invention.
It is the circuit diagram shown. The oscillation circuit 4214 in this embodiment is also
It operates by CR oscillation in the same manner as in the seventeenth embodiment.
And R14207, R24208, R34209, etc.
The oscillation frequency is determined by the time constant of the circuit performed. Rise
The voltage circuit 4219 and the oscillation circuit 4223 are the same as in the sixteenth embodiment.
It has a similar configuration. Switch S4212 is connected to terminal 4210
Alternatively, by connecting to either terminal 4211
To change the time constant of charging and discharging. FIG.
Clock signal waveform 430 input to booster circuit 4219
1, 4303 and EL element Ce4221
These are voltage waveforms 4302 and 4304. Clock signal waveform
At 4201, t1 is the diode D1 (4205)
In the state where only the current is conducted, the resistance is R1 (4207).
And the resistance of the left half of R3 (7209) (this is R3L)
), And t1 = 1.1C (R2 + R3L).
Similarly, t2 conducts only to diode D2 (4206).
In this state, the resistance components are R1 (4207) and R3 (72
09) is the resistance of the left half (this is R3R),
t2 = 1.1C (R2 + R3R). In this circuit, the switch 4212 is connected
By switching to terminal 4210 or terminal 4211
The resistance division ratio of the resistor R3 (4209)
Can be. Connect switch S4212 to terminal 4210
Then, the value of (R1 + R3L) becomes smaller and t1 becomes shorter.
Conversely, if switch 4212 is connected to terminal 4211
The value of (R1 + R3R) increases, and t1 becomes longer.
You. In other words, the switch is activated by the switch 4212.
The duty ratio of the vibration frequency can be controlled.
Wear. In FIG. 43, when t1 is long (waveform 4
301) is sufficient time for electric charge to be charged in Ce4221
There is a large amount of charge (waveform 4302), but t1 is short
In the case (waveform 4303), the electric charge is charged in Ce4221.
Time is short and the charge amount is small (waveform 4304). FIG. 44 shows an output from the oscillation circuit 4223.
Signal 4401 and applied to EL element Ce4221
It is a voltage waveform (4402, 4403). Switch S
EL element when t1 is selected long according to 4212
4221 is charged with enough charge to emit light,
If t1 is selected short by switch S4212
Charge is released before charge is charged in EL element 4221
Resulting in. In other words, the duty of the clock signal waveform
The output voltage can be adjusted according to the ratio.
Control the emission luminance of the EL element 4221.
Can be. FIG. 45 shows a nineteenth embodiment according to the present invention.
It is the block diagram shown. The oscillation circuit 4501 is provided according to the present invention.
The CR oscillation circuit used in the seventeenth and eighteenth embodiments may be used.
However, a crystal or ceramic oscillation circuit may be used. Oscillation times
The road 4504 has the same configuration as the seventeenth and eighteenth embodiments.
You. Details of the booster circuit are as shown in FIG. Boost times
The path 4529 includes capacitors C1 to C50 (4618 to 46
27) and diodes D1 to D50 (4602 to 461).
0), D51 (4611), D52 (461)
2). In addition, the output of the ascending pair is
There are two types, 45th stage 4631 and 50th stage 4632.
Output can be selected by switch S4613
You. In FIG. 46, VIN4601 and
Lock signal (4616, 4617) voltage of 3V, die
Forward direction of Aether D1-D52 (4602-4612)
The threshold voltage VF is set to 0.6V. Switch S4613 is
When connected to the terminal 4615, the booster circuit 4529 has 5
Consists of 0 boosting stages and diode D51 (4611)
And the output voltage VOUT (50) becomes VOU
T (50) = VDD + 50 × VIN− (50 + 1) × V
From F [V], VOUT (50) = 122.4V. On the other hand, the switch S 4613 is connected to the terminal 4614
When connected, the booster circuit 4529 has 45 booster stages.
It will consist of a diode D52 (4612).
The output voltage VOUT (45) is VOUT (45) = V
DD + 45 × VIN− (45 + 1) × VF [V]
OUT (45) = 110.4V. As described above, by switching the number of boosting stages,
The output voltage can be changed, and the EL element Ce4528 can be used.
Can be adjusted. As described above, the semiconductor device of the present invention
The integrated circuit and the electronic equipment using the same have the following effects.
There is. In other words, the charge pump method and switch trigger
In a capacitor type booster circuit,
Is completely separated from the dielectric,
From several volts to hundreds of volts that were not possible with monolithic
, A semiconductor integrated circuit device for boosting with a high magnification. Further, in such a semiconductor integrated circuit device,
The area (chip size) is reduced, resulting in economic effects
Can be Furthermore, semiconductor integration with such a boost function
The function that the circuit device receives the light and outputs the electric signal
Will also have. Switch to charge semiconductor integrated circuit
It is also a device. Further, such a semiconductor integrated circuit device is
Thin EL light-emitting element that was impossible until now by using
Built-in electronic equipment becomes feasible. It also has a charging function
Or the way the EL emits light (color and brightness)
An electronic device with a function to indicate various messages and alarms
Equipment is also feasible.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a schematic sectional view of a rectifier / capacitor pair showing a semiconductor integrated circuit device according to a first embodiment of the present invention. FIG. 2 is a schematic plan view of an electrode showing the semiconductor integrated circuit device of the first embodiment. FIG. 3 is a schematic circuit diagram showing one rectifier / capacitor pair (hereinafter, sometimes referred to as a pair) of a charge pump type booster circuit showing the semiconductor integrated circuit device of the first embodiment. FIG. 4 is a schematic sectional view of a rectifier / capacitor pair showing a semiconductor integrated circuit device according to a second embodiment of the present invention. FIG. 5 is a schematic plan view of an electrode showing a semiconductor integrated circuit device according to a second embodiment. FIG. 6 is a schematic sectional view of a rectifier / capacitor pair showing a semiconductor integrated circuit device according to a third embodiment of the present invention. FIG. 7 is a schematic plan view of an electrode showing a semiconductor integrated circuit device according to a third embodiment. FIG. 8 is a schematic circuit diagram of a pair including a transistor and a capacitor according to a third embodiment. FIG. 9 is a schematic sectional view of a rectifier and a photovoltaic / capacitor pair showing a semiconductor integrated circuit device according to a fourth embodiment of the present invention. FIG. 10 is a schematic electric circuit diagram of a semiconductor integrated circuit device according to a fourth embodiment. FIG. 11 is a sectional view illustrating a method of manufacturing a semiconductor integrated circuit device according to a fifth embodiment of the present invention in the order of manufacturing steps. FIG. 12 is a schematic block diagram showing an EL light emitting element driving circuit according to a sixth embodiment of the present invention. FIG. 13 is a schematic block diagram showing an EL light emitting element driving circuit according to a seventh embodiment of the present invention. FIG. 14 is a schematic diagram showing an input signal of a seventh embodiment. FIG. 15 is a schematic electric circuit diagram of a semiconductor integrated circuit device having a boosting function according to an eighth embodiment of the present invention. FIG. 16 is a schematic electric circuit diagram of a semiconductor integrated circuit device having a boosting function according to an eighth embodiment of the present invention. FIG. 17 is a schematic sectional view showing a rectifier of a semiconductor integrated circuit device according to a ninth embodiment of the present invention. FIG. 18 is a schematic cross-sectional view showing a semiconductor integrated circuit device in which the ninth embodiment according to the present invention is applied to a single very standard P-type substrate 310 instead of an SOI substrate. FIG. 19 is a schematic circuit diagram of a semiconductor integrated circuit device according to a ninth embodiment of the present invention applied to a single substrate. FIG. 20 is a schematic circuit diagram of a charge pump system which is a conventional booster circuit without using a transformer. FIG. 21 is a schematic diagram showing CK and inversion of CK in a conventional booster circuit. FIG. 22 is a schematic circuit diagram in which a conventional charge pump circuit is configured using MOS transistors. FIG. 23 is a schematic view showing a conventional general MOS transistor. FIG. 24 is a circuit diagram showing a schematic principle configuration of a conventional Fibonacci type switched capacitor booster circuit. FIG. 25 is a schematic circuit diagram of an example of a conventional EL element driving circuit. FIG. 26 is a schematic cross-sectional view showing a conventional semiconductor integrated circuit device using PN junctions arranged on a single substrate. FIG. 27 is a schematic circuit diagram of a conventional semiconductor integrated circuit device using PN junctions arranged on a single substrate in a discrete manner. FIG. 28 is a schematic circuit diagram of a conventional semiconductor integrated circuit device using PN junctions arranged on a single substrate in consideration of actual operation. FIG. 29 is a schematic block diagram showing an EL light emitting element driving circuit according to a tenth embodiment of the present invention. FIG. 30 is a schematic block diagram showing an EL light emitting element drive circuit according to an eleventh embodiment of the present invention. FIG. 31 is a schematic block diagram showing an EL light emitting element drive circuit according to a twelfth embodiment of the present invention. FIG. 32 is a schematic block diagram showing an EL light emitting element drive circuit according to a thirteenth embodiment of the present invention. FIG. 33 is a schematic electric circuit diagram showing a boosting semiconductor integrated device according to a fourteenth embodiment of the present invention. FIG. 34 is a schematic block diagram showing one example of a step-up semiconductor integrated device of the present invention. FIG. 35 is a schematic circuit diagram showing a boosted semiconductor integrated device of a fifteenth embodiment according to the present invention. FIG. 36 is a numerical value explanatory diagram showing a change in boosted output when the number N of stages of the charge pump is constant in the fifteenth embodiment according to the present invention. FIG. 37 is a schematic block diagram showing a boosted semiconductor integrated device of a sixteenth embodiment according to the present invention. FIG. 38 is a schematic block diagram showing one example of a step-up semiconductor integrated device of the present invention. FIG. 39 is a schematic circuit diagram showing a boosted semiconductor integrated device of a seventeenth embodiment according to the present invention. FIG. 40 is an explanatory diagram of a clock output signal input to a booster circuit and a voltage waveform applied to an EL element according to a seventeenth embodiment of the present invention. FIG. 41 is an explanatory diagram of an output signal of an oscillation circuit and a voltage waveform applied to an EL element according to a seventeenth embodiment of the present invention. FIG. 42 is a schematic circuit diagram showing a boosted semiconductor integrated device according to an eighteenth embodiment of the present invention. FIG. 43 is an explanatory diagram of a clock output signal input to a booster circuit and a voltage waveform applied to an EL element according to an eighteenth embodiment of the present invention. FIG. 44 is an explanatory diagram of output signals of an oscillator circuit and a voltage waveform applied to an EL element according to an eighteenth embodiment of the present invention. FIG. 45 is a schematic block diagram showing a boosted semiconductor integrated device according to a nineteenth embodiment of the present invention. FIG. 46 is a schematic circuit diagram showing a boosted semiconductor integrated device according to a nineteenth embodiment of the present invention. [Description of Signs] 11 Anode electrode 12 Cathode electrode 13 Wiring 14 CK electrode 15 Si substrate 16 SiO2 insulating layer 17 Locos oxide film 18 Si layer 19 N + type layer 20 P + type layer

   ────────────────────────────────────────────────── ─── Continuation of front page    (31) Priority claim number Japanese Patent Application No. 5-56206 (32) Priority date March 16, 1993 (March 16, 1993) (33) Priority country Japan (JP) (72) Inventor Hiroyuki Odagiri             1-8 Nakase, Mihama-ku, Chiba-shi, Chiba             Iko Instruments Inc. (72) Inventor Katsuhiro Horiguchi             1-8 Nakase, Mihama-ku, Chiba-shi, Chiba             Iko Instruments Inc.

Claims (1)

Claims: 1. A power supply, and the voltage of the power supply is increased, and the voltage is increased on a support substrate via an insulating film.
The provided semiconductor curtain and the rectifying element provided on the semiconductor film
, Each of which is dielectrically separated and connected in series.
An electronic device comprising: a semiconductor integrated circuit including a plurality of boosting circuits; and an electroluminescent element driven by a boosted voltage output by the semiconductor integrated circuit. Wherein said semiconductor integrated circuit is a power receiving light, the electronic device according to claim 1, characterized in that it has a charging function for charging the battery. 3. The electronic apparatus according to claim 1, characterized in that said semiconductor integrated circuit has a built-in oscillation signal circuit. Claim 3 in which the signal generated by said oscillation signal circuit and having positive and negative voltages of the power supply voltage
Electronic device as described. 5. A capacitor having a capacitor at an end of an output boosted by the booster circuit, and periodically precharging the capacitor with the boosted output during a period in which the EL element is not driven. The electronic device according to claim 1, wherein: 6. A booster circuit comprising a capacitor at the end of an output boosted by said booster circuit, further comprising an inverter element, wherein said boosted output is supplied to said capacitive element during a period when said EL element is not driven. Reserved, characterized by charging, further electronic apparatus according to claim 1, wherein applying the output boosted by the timer circuit to said EL element at arbitrary time intervals for driving the inverter elements. 7. The use of a plurality of said step-up circuit for an EL element drives, electronic apparatus according to claim 1, wherein applying the output boosted alternately on both sides of the EL element. Wherein said power supply from the primary battery or secondary battery
And a booster circuit configured to boost a voltage of the power supply.
A boosting voltage for generating a pulse having a boosted output voltage level of the first boosting means, a boosting clock pulse generating means, and a boosting voltage for the first boosting means being controlled by a clock pulse generated by the boosting clock pulse generating means. 2. The power supply according to claim 1, further comprising a second booster for boosting the voltage.
Child equipment . 9. a basic unit constituting the booster semiconductor integrated circuit MOS transistor or a diode and a pair of capacitors, where n is an integer of 2 or higher, a basic unit constituting the booster semiconductor integrated circuit is constituted by n stages 9. The electronic apparatus according to claim 8, wherein the number of stages of the first booster circuit is n / 2. 10. A boosted output signal is varied by varying a frequency or a duty ratio of a drive clock signal of the output adjustment circuit using an output adjustment circuit for an output boosted by the booster circuit. The electronic device according to claim 1 . 11. The electronic apparatus of claim 1, wherein the varying the output signal is boosted by a number of boosting stages variable in said boosting circuit.