JP2001196744A - Method for manufacturing multilayer printed wiring substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing a multilayer printed wiring substrate, which has no fear that neighboring conductor circuits are short- circuited as a plating resist can be formed with no undercuts and a flat surface, and does not generate a signal delay or signal error, and is sufficient in adherence between the conductor circuit and an interlayer resin insulation layer or solder resist layer, and is hard to generate cracks in the interlayer resin insulation layer or solder resist layer under a heat cycle conditions or high temperatures and high humidities, and is hard to release the conductor circuit, and is superior in connection reliability. SOLUTION: This method for manufacturing a multilayer printed wiring substrate comprises the steps of 1) sticking a photosensitive dry film on an interlayer resin insulation layer formed with a thin-film conductor layer, 2) exposing and developing on the photosensitive dry film, thereby forming a plating resist, and 3) forming a conductor circuit in a plating resist non-formed part, and in this method for manufacturing a multilayer printed wiring substrate in the step (1), after a coat layer is formed on the thin film conductor layer, the photosensitive dry film is stuck.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

[0001] The present invention relates to a method for manufacturing a multilayer printed wiring board.

[0002]

2. Description of the Related Art A multilayer printed wiring board called a so-called multilayer build-up wiring board is manufactured by a semi-additive method or the like.
m on a resin substrate reinforced with glass cloth, etc.
It is manufactured by alternately laminating a conductor circuit made of copper or the like and an interlayer resin insulating layer. The connection between the conductor circuits via the interlayer resin insulation layer of the multilayer printed wiring board is performed by via holes.

Conventionally, build-up multilayer printed wiring boards have been manufactured by a method disclosed in, for example, Japanese Patent Application Laid-Open No. 9-130050. That is, first, a through hole is formed in the copper-clad laminate to which the copper foil is attached, and then a through hole is formed by performing an electroless copper plating process. Subsequently, the surface of the substrate is etched into a conductor pattern to form a conductor circuit, and a roughened surface is formed on the surface of the conductor circuit by electroless plating, etching, or the like. After forming an interlayer resin insulation layer, an exposure and development process is performed, or a via hole opening is formed by laser processing, and then the interlayer resin insulation layer is formed through UV curing and main curing.

Further, after a roughening process is performed on the interlayer resin insulating layer, a thin electroless plating film is formed on the roughened surface, and a plating resist is formed on the electroless plating film. Thickening is performed by plating, and etching is performed after the plating resist is stripped to form a conductive circuit connected to the lower conductive circuit by a via hole.

After repeating this, a solder resist layer for protecting the conductor circuit is formed as an outermost layer, an opening is formed in the solder resist layer, and the conductor layer in the opening is plated or the like to form a pad. Then, a build-up multilayer printed wiring board is manufactured by forming solder bumps.

In such a method of manufacturing a multilayer printed wiring board, a plating resist is formed by directly attaching a photosensitive dry film on a thin conductor layer such as a thin electroless plating film.
The photosensitive dry film was formed by exposing and developing.

[0007]

As described above, when a photosensitive dry film is directly adhered to an interlayer resin insulating layer having a thin film conductor layer on its surface and subjected to an exposure treatment, the light source 22 as shown in FIG. From the thin film conductor layer 112
Due to irregular reflection on the surface, a part of the plating resist non-formed portion is also exposed (see FIG. 12A), and subsequently, when a developing process is performed, the shape of the formed plating resist 103 becomes a footed shape 103a. (See FIG. 12B).
Therefore, by performing electroplating in the next step,
After the electroplating layer 113 is formed in the plating resist non-formed portion 19 (see FIG. 12C), the plating resist 103 is formed.
When the conductor circuit 105 composed of the electroplating layer 113 and the thin film conductor layer 112 is formed by peeling off and etching the thin film conductor layer 112, the cross-sectional shape of the conductor circuit 105 becomes an undercut shape ( FIG.
(D)). In FIG. 12, reference numeral 18 denotes a photosensitive dry film, reference numeral 21 denotes a mask, and reference numeral 102 denotes an interlayer resin insulating layer.

[0008] Therefore, peeling is likely to occur between the conductor circuit and the interlayer resin insulation layer covering the conductor circuit. In particular, this phenomenon was remarkably observed in a portion where the distance between the plating resists was narrow, that is, in a portion where the plating resist was not formed in a narrow width.

Further, as shown in FIG. 13, in order to reduce the amount of light reflected on the surface of the thin film conductor layer 112 during the exposure processing, the amount of light emitted from the light source 22 is reduced (FIG. 13).
(Refer to FIG. 13A), although the shape of the plating resist 103 does not have a skirted shape, the shape of the plating resist 103 may be an undercut shape (see FIG. 13B). In this case, the electroplating layer 113 formed in the plating resist non-formed portion 19 has a trapezoidal shape with a widened bottom (see FIG. 13C).
When the conductor circuit 105 composed of the electroplating layer 113 and the thin film conductor layer 112 is formed by peeling off and etching the thin film conductor layer 112, the cross-sectional shape of the conductor circuit 105 becomes a trapezoidal shape with an expanded bottom. (Fig. 13
(D)). For this reason, there has been a problem that the interval between the bottoms of the adjacent conductor circuits is reduced, and a short circuit is likely to occur between the adjacent conductor circuits. In particular, L / S = 35/3
The problem described above is likely to occur between conductor circuits having a small width such as 5. Note that the L / S is a ratio between the width of the conductor wiring and the distance between the conductor wirings, and is simply referred to as L / S in this specification.

Further, the above-mentioned thin film conductor layer may be denatured due to oxidation of a part of its surface.
In this case, the physical properties of the surface of the thin film conductor layer are not uniform. Therefore, when the photosensitive dry film is directly adhered on the thin film conductor layer, swelling or the like is easily generated in the photosensitive dry film. Therefore, when forming the plating resist,
Due to this swelling, the surface of the plating resist may be wavy, and a gap may be formed at the bottom, and thereafter, a conductor circuit formed by performing electroplating or the like may have a gap in the gap. Because of the formation, the bottom may have a widened shape. In the conductor circuit having such a shape, it is difficult to match the impedance of the multilayer printed wiring board, and a signal delay or a signal error may occur.

SUMMARY OF THE INVENTION The present invention has been made to solve such a problem, and an object of the present invention is to provide a plating resist having no undercut and having a flat surface, so that an adjacent conductor circuit can be formed. There is no danger of short circuit between them, no signal delay or signal error occurs, the adhesion between the conductor circuit and the interlayer resin insulation layer or solder resist layer is sufficient, and under heat cycle conditions or high temperature and high humidity It is another object of the present invention to provide a method of manufacturing a multilayer printed wiring board which is less likely to crack in an interlayer resin insulating layer or a solder resist layer and which is less likely to cause peeling of a conductor circuit and has excellent connection reliability.

[0012]

Means for Solving the Problems The inventors of the present invention have conducted intensive studies for realizing the above object, and as a result, by forming a coating layer on a thin film conductor layer, the surface of the thin film conductor layer generated at the time of exposure is formed. It has been found that the reflection of light can be prevented and a plating resist without swelling or the like can be formed.

That is, the method for manufacturing a multilayer printed wiring board according to the present invention comprises the following steps: 1) a step of attaching a photosensitive dry film on an interlayer resin insulating layer having a thin-film conductor layer formed thereon; 2) exposing the photosensitive dry film to light. A step of forming a plating resist by performing a development process, and 3) a method of manufacturing a multilayer printed wiring board including a step of forming a conductor circuit in a plating resist non-formed portion, wherein in the step of 1), After forming the coating layer on the thin film conductor layer, a photosensitive dry film is attached.

In the above method for manufacturing a multilayer printed wiring board, the coating film is preferably an oxide film.

[0015]

BEST MODE FOR CARRYING OUT THE INVENTION The method for manufacturing a multilayer printed wiring board according to the present invention comprises the following steps: 1) a step of attaching a photosensitive dry film on an interlayer resin insulating layer having a thin-film conductor layer formed thereon; Exposing, developing a plating resist by performing a developing process, and 3) a method of manufacturing a multilayer printed wiring board including a step of forming a conductive circuit in a plating resist non-formed portion, wherein the step of 1) At
After forming the coating layer on the thin film conductor layer, a photosensitive dry film is attached.

According to such a method for manufacturing a multilayer printed wiring board of the present invention, after forming a coating layer on a thin film conductor layer, a photosensitive dry film is attached, and exposure and development are performed. Even if exposure processing is performed with a sufficient amount of light so that the shape of the thin film conductor layer does not become an undercut shape, light does not reflect on the surface of the thin film conductor layer, and the shape of the plating resist does not become a tailed shape, and plating of a desired shape is performed. A resist can be formed.

Therefore, after forming a plating resist,
When a conductor circuit is formed in the plating resist non-formed portion, a conductor circuit having a rectangular cross section can be formed, and sufficient adhesion between the conductor circuit and the interlayer resin insulating layer or the solder resist layer can be secured. It is possible to manufacture a multilayer printed wiring board having excellent connection reliability in which cracks are less likely to occur in the interlayer resin insulation layer and the solder resist layer under heat cycle conditions and high temperature and high humidity, and peeling of the conductor circuit is less likely to occur. .

In addition, even when the physical properties of the surface of the thin-film conductor layer are not uniform due to the oxidation of a part of the surface of the thin-film conductor layer, a coating layer having uniform physical properties on the surface of the thin-film conductor layer. Is formed, when the photosensitive dry film is stuck on the thin-film conductor layer, the photosensitive dry film does not swell. Therefore, when the plating resist is formed, the surface of the plating resist becomes flat, and the cross section of the conductor circuit formed by performing electroplating or the like becomes rectangular, so that occurrence of signal delay and signal error can be prevented. .

In the manufacturing method of the present invention, in the step of sticking a photosensitive dry film on the interlayer resin insulating layer on which the thin film conductor layer is formed, after forming the coating layer on the thin film conductor layer, Paste.

The coating layer is not particularly limited as long as it can reduce the glossiness of the surface of the thin film conductor layer and prevent irregular reflection of light during the exposure treatment. What is. Further, it may be formed by subjecting the surface of the thin film conductor layer to a chemical treatment such as an oxide film formed by performing a blackening-reducing treatment.

As the metal, Sn and Pd are desirable. This is because these metals can be removed by a pretreatment liquid used for electroplating or an etching liquid used for removing the thin film conductor layer. Examples of a method for forming a coating layer made of these metals include methods such as plating and vapor deposition.

Examples of the above agents include silicone resin paints, matting coating agents, trithiol-based rust preventives and the like. Examples of the film include those obtained by curing the matting coating agent and forming the film into a film shape.

Among these, those which can be dissolved and removed with an acid or alkali are desirable, and those which can be dissolved and removed with a developing solution or sulfuric acid used for forming a plating resist are more desirable. Specifically, an oxide film formed by performing a blackening-reducing treatment is desirable. This is because it can be dissolved and removed with a developing solution or sulfuric acid and a coating layer having uniform physical properties can be easily formed.

It is desirable that the coating layer is removed before forming a conductor circuit by performing electroplating or the like. This is because by removing the coating layer, it is possible to avoid a decrease in connection reliability due to a difference in electrical characteristics between the thin film conductor layer, the coating layer, and the electroplated layer. This is because a decrease in reliability can be avoided. Further, when a conductor circuit is formed by electroplating, a plating lead is necessary. Therefore, when the covering layer is formed of an insulating material, the covering layer is removed before performing the electroplating. There is a need.

As a method for removing the coating layer, for example, in addition to the above-described removal with a developer or sulfuric acid, for example,
A method of removing using hydrochloric acid, nitric acid, or the like can be given. Of these, removal with a developer or sulfuric acid is desirable.
This is because when the coating layer formed on the thin film conductor layer made of copper is dissolved and removed, there is no possibility that copper smut is generated.

The thickness of the coating layer is not particularly limited, and a thickness that does not cause irregular reflection of light on the surface of the thin film conductor layer during the exposure processing and is easily dissolved and removed at the time of the development processing or after the development processing is appropriately selected. Good. Usually 0.01 to 0.5
μm is desirable.

FIGS. 1A and 1B are cross-sectional views showing a part of a manufacturing process of a multilayer printed wiring board used in the manufacturing method of the present invention. In such a method for manufacturing a multilayer printed wiring board according to the present invention, as shown in FIG. 1, the coating layer 23 is formed on the thin-film conductor layer 112, and the photosensitive dry film 18 is further adhered thereon. Therefore, when performing the exposure process, even if the light source 22 irradiates a sufficient amount of light so that the shape of the plating resist 103 does not become an undercut shape,
The irradiated light does not reflect on the surface of the thin-film conductor layer 112 (see FIG. 1A). Therefore, by subsequently performing the developing process, the plating resist 103 having neither the undercut shape nor the skirted shape can be formed (FIG. 1).
(B)). Therefore, after this, when electroplating is performed,
The electroplating layer 113 having excellent adhesion to the thin film conductor layer and having a rectangular cross section can be formed (see FIG. 1C).
Furthermore, by removing the plating resist 103 and removing the thin film conductor layer by etching, there is no possibility that a short circuit will occur between adjacent conductor circuits, and the conductor having excellent adhesion to the interlayer resin insulating layer and the solder resist layer Circuit 1
05 can be formed (see FIG. 1D).

As shown in FIG. 1, when the coating layer existing in the plating resist non-formed portion 19 is removed at the time of the developing process, the conductor circuit 105 having more excellent connection reliability can be formed.

Next, a method for manufacturing such a multilayer printed wiring board of the present invention will be briefly described in the order of steps.

(1) First, a wiring board having a lower conductive circuit on the surface of a resin substrate is manufactured. As the resin substrate, a resin substrate having inorganic fibers is desirable, specifically, for example, a glass cloth epoxy substrate, a glass cloth polyimide substrate,
A glass cloth bismaleimide-triazine resin substrate, a glass cloth fluororesin substrate, and the like can be given. Further, a copper-clad laminate in which copper foil is stuck on both surfaces of the resin substrate may be used.

Normally, a through hole is formed in the resin substrate by a drill, and a through hole is formed by applying electroless plating to the wall surface of the through hole and the surface of the copper foil. Copper plating is preferred as the electroless plating. Further, electroplating may be performed for thickening the copper foil. Copper plating is preferred as the electroplating. Thereafter, the inner wall of the through-hole may be subjected to a roughening treatment, the through-hole may be filled with a resin paste or the like, and the conductive layer covering the surface may be formed by electroless plating or electroplating.

Examples of the method of the roughening treatment include blackening (oxidation) -reduction treatment, spray treatment with a mixed aqueous solution of an organic acid and a cupric complex, and treatment with Cu-Ni-P needle-like alloy plating. No. Through the above steps, an etching resist is formed on the solid copper pattern formed on the entire surface of the substrate by using a photolithography technique, and then etching is performed to form a lower conductive circuit. Thereafter, if necessary, a resin or the like may be filled in the recessed portion formed by the formation of the conductor circuit.

(2) Next, the formed lower conductor circuit is subjected to a roughening treatment if necessary. As the method of the roughening treatment, the above-mentioned methods, that is, blackening (oxidation) -reduction treatment, spray treatment with a mixed aqueous solution of an organic acid and a cupric complex, Cu
-Ni-P needle-like alloy plating.
In addition, without subjecting the lower conductor circuit to a roughening treatment, the substrate on which the lower conductor circuit is formed is immersed in a solution in which a resin component is dissolved to form a resin layer on the surface of the lower conductor circuit. The adhesion to the interlayer resin insulating layer formed on the substrate may be ensured.

(3) Next, an interlayer resin insulating layer is formed on both surfaces of the wiring board having the lower conductive circuit manufactured in the above (2). As a material for the interlayer resin insulating layer, a thermosetting resin, a thermoplastic resin, a resin obtained by sensitizing a part of the thermosetting resin, or a composite resin thereof can be used. The interlayer resin insulating layer may be formed by applying an uncured resin, or may be formed by thermocompression bonding an uncured resin film. Further, a resin film in which a metal layer such as a copper foil is formed on one surface of an uncured resin film may be attached. When such a resin film is used, an opening is formed by irradiating a laser beam after etching a metal layer in a via hole forming portion. As the resin film having the metal layer formed thereon, a resin-coated copper foil or the like can be used.

Specific examples of the material for forming these interlayer resin insulating layers include polyolefin resins, polyphenylene resins (PPE, PPO, etc.), and fluorine resins. As the polyolefin resin,
For example, the above-mentioned polyethylene, polypropylene, polyisobutylene, polybutadiene, polyisoprene, 2-norbornene, 5-ethylidene-2-norbornene, copolymers of these resins, and the like can be mentioned. Examples include tetrafluoroethylene copolymer resin (ETFE) and polychlorotrifluoroethylene (PCTFE).

In addition to the above materials, for example, an adhesive layer for electroless plating can also be used. The most suitable adhesive for electroless plating is one in which heat-resistant resin particles soluble in a cured acid or oxidizing agent are dispersed in an uncured heat-resistant resin hardly soluble in an acid or oxidizing agent. is there. By treating with an acid or an oxidizing agent, the heat-resistant resin particles are dissolved and removed, and a roughened surface composed of an octopus pot-shaped anchor can be formed on the surface.

In the above-mentioned adhesive for electroless plating, the heat-resistant resin particles particularly subjected to the curing treatment include (a) a heat-resistant resin powder having an average particle diameter of 10 μm or less, and (b) a heat-resistant resin powder having an average particle diameter of 2 μm or less. Aggregated particles obtained by aggregating heat-resistant resin powder,
(c) a mixture of a heat-resistant resin powder having an average particle diameter of 2 to 10 μm and a heat-resistant resin powder having an average particle diameter of 2 μm or less, (d) an average particle diameter on the surface of the heat-resistant resin powder having an average particle diameter of 2 to 10 μm Pseudo particles obtained by adhering at least one of a heat-resistant resin powder or an inorganic powder having a particle size of 2 μm or less, and (e) a heat-resistant powder resin powder having an average particle size of 0.1 to 0.8 μm and an average particle It is desirable to use a mixture with a heat-resistant resin powder having a diameter of more than 0.8 μm and less than 2 μm, and (f) a heat-resistant powder resin powder having an average particle diameter of 0.1 to 1.0 μm. This is because these can form a more complicated anchor.

Examples of the heat-resistant resin hardly soluble in an acid or an oxidizing agent include a “resin composite composed of a thermosetting resin and a thermoplastic resin” and a “resin composite composed of a photosensitive resin and a thermoplastic resin”. desirable. This is because the former has high heat resistance, and the latter can form a via hole opening by photolithography.

As the thermosetting resin, for example, epoxy resin, phenol resin, polyimide resin and the like can be used. Examples of the photosensitized resin include those obtained by subjecting a thermosetting group to methacrylic acid or acrylic acid to undergo an acrylation reaction. In particular, an acrylated epoxy resin is most suitable. As the epoxy resin, a novolak type epoxy resin such as a phenol novolak type and a cresol novolak type, and an alicyclic epoxy resin modified with dicyclopentadiene can be used.

As the thermoplastic resin, for example, polyether sulfone (PES), polysulfone (PS
F), polyphenylene sulfone (PPS), polyphenylene sulfide (PPES), polyphenyl ether (PPE), polyetherimide (PI), a fluororesin, or the like can be used. The mixing ratio of the thermosetting resin (photosensitive resin) and the thermoplastic resin is preferably thermosetting resin (photosensitive resin) / thermoplastic resin = 95/5 to 50/50. This is because a high toughness value can be secured without impairing the heat resistance.

The mixing ratio by weight of the heat-resistant resin particles is preferably from 5 to 50% by weight, more preferably from 10 to 40% by weight, based on the solid content of the heat-resistant resin matrix. As the heat-resistant resin particles, an amino resin (a melamine resin, a urea resin, a guanamine resin), an epoxy resin or the like is desirable.

(4) Next, while the interlayer resin insulating layer is cured, the interlayer resin insulating layer is exposed and developed or laser-processed to form a via hole opening. When the resin matrix of the adhesive for electroless plating is a thermosetting resin, a polyolefin-based resin, a cycloolefin-based resin, or the like, the opening of the interlayer resin insulating layer is performed using a laser beam, oxygen plasma, or the like. In some cases, exposure and development are performed. In the exposure and development processing, a photomask (a glass substrate is preferable) on which a circular pattern for forming an opening for a via hole is drawn is placed with the circular pattern side in close contact with the photosensitive interlayer resin insulating layer. After that, exposure is performed, and immersion in a developing solution or spraying of the developing solution is performed. By curing the interlayer resin insulating layer formed on the conductor circuit having a roughened surface with a sufficient unevenness, an interlayer resin insulating layer having excellent adhesion to the conductor circuit can be formed.

When an opening for a via hole is provided by using the above laser light, the laser light to be used is, for example,
Examples include a carbon dioxide (CO ₂ ) laser, an ultraviolet laser, an excimer laser, and a YAG laser. Of these, excimer lasers and short-pulse carbon dioxide lasers are preferred.

As will be described later, the excimer laser can form a large number of via hole openings at once by using a mask or the like in which through light is formed in a portion where the via hole openings are formed. This is because the short-pulse carbon dioxide laser has less resin residue in the opening and less damage to the resin around the opening.

It is desirable to use a hologram type excimer laser among the excimer lasers. The hologram method is a method of irradiating a laser beam to a target object through a hologram, a condensing lens, a laser mask, a transfer lens, and the like. The opening can be formed efficiently.

When a carbon dioxide laser is used, the pulse interval is desirably 10 ⁻³ to 10 ⁻¹⁰ seconds. The time for irradiating the laser for forming the opening is preferably 10 to 500 μsec. The through-hole of the mask in which the through-hole is formed in the portion where the opening for via-hole is formed needs to be a perfect circle in order to make the spot shape of the laser beam a perfect circle, and the diameter of the through-hole is 0.0
About 5 to 0.4 mm is desirable.

When the opening is formed by a laser beam, particularly when a carbon dioxide laser is used, desmearing is preferably performed. The desmear treatment can be performed using an oxidizing agent composed of an aqueous solution such as chromic acid and permanganate. Alternatively, the treatment may be performed using oxygen plasma, a mixed plasma of CF ₄ and oxygen, corona discharge, or the like. The surface can also be modified by irradiating ultraviolet rays using a low-pressure mercury lamp.

(5) Next, if necessary, the surface of the interlayer resin insulating layer provided with the via hole opening is roughened. When an interlayer resin insulation layer is formed using an electroless plating adhesive,
The roughening of the interlayer resin insulating layer is performed by dissolving and removing the heat-resistant resin particles present on the surface of the adhesive layer for electroless plating with an acid or an oxidizing agent. The height of the roughened surface formed by acid treatment or the like is desirably Rmax = 0.01 to 20 μm.
This is for ensuring adhesion to the conductor circuit. In particular, in the semi-additive method, 0.1 to 5 μm is desirable. This is because the metal layer can be removed while ensuring adhesion.

When performing the above acid treatment, phosphoric acid, hydrochloric acid,
Sulfuric acid or an organic acid such as formic acid or acetic acid can be used, and it is particularly preferable to use an organic acid. This is because, when the roughening process is performed, the metal conductor layer exposed from the via hole is hardly corroded. The oxidation treatment is performed using chromic acid,
It is desirable to use permanganate (such as potassium permanganate).

(6) Next, a thin film conductor layer made of a metal such as Cu, Ni, P, Pd, Co and W is formed on the surface of the interlayer resin insulating layer and the opening of the via hole. The thin film conductor layer may be composed of a single metal,
It may be made of more than one kind of metal. Further, the thin film conductor layer may be a single layer, or may be two or more layers. The thickness of this thin-film conductor layer is preferably from 0.1 to 5 μm, more preferably from 0.5 to 2 μm. Further, it is desirable that the thin film conductor layer is formed by performing sputtering, plating, or sputtering and plating. In particular, when the thin film conductor layer is formed by sputtering, the thickness is desirably 0.5 to 2 μm.

(7) Next, a coating layer is formed on the thin film conductor layer. The coating layer is formed by plating or sputtering a metal such as Sn or Pd, or by forming an oxide film by a blackening-reduction treatment.

(8) Subsequently, a plating resist is formed on the coating layer formed in the above (7). This plating resist
It is formed by laminating a photosensitive dry film on a thin film conductor layer, and then performing exposure and development treatments. It is most desirable to remove the coating layer at the same time as the developing process by using the developing solution used in the above-described developing process. It is desirable to remove it.

(9) Next, electroplating is performed using the thin-film conductor layer formed on the interlayer resin insulating layer or the coating layer on the thin-film conductor layer as a plating lead to thicken the conductor circuit. The thickness of the electroplated film is preferably 5 to 30 μm. It is desirable to use copper plating as the electroplating. At this time, the via hole opening may be filled with electroplating to form a filled via structure.

(10) After forming the electroplating film, the plating resist is peeled off, and the coating layer and the thin film conductor layer existing under the plating resist are removed by etching to form an independent conductor circuit. As an etchant, for example,
Sulfuric acid-hydrogen peroxide aqueous solution, aqueous solution of persulfate such as ammonium persulfate, sodium persulfate and potassium persulfate, aqueous solution of ferric chloride and cupric chloride, hydrochloric acid, nitric acid, hot dilute sulfuric acid and the like. Alternatively, a roughened surface may be formed simultaneously with etching between conductor circuits using an etching solution containing the above-described cupric complex and an organic acid.

(11) If necessary, repeat the steps (3) to (9).
Electroless plating, etching, or the like is performed under the same conditions as in step (3) to form a roughened layer or a roughened surface on the uppermost conductive circuit.

Next, a solder resist resin composition is applied to the surface of the substrate including the uppermost conductive circuit by a roll coater method or the like, and an opening process such as a laser process, an exposure process, and a developing process is performed, and a curing process is performed. Thus, a solder resist layer is formed. Then, after this, the manufacture of the printed wiring board is completed by forming solder bumps in the openings of the solder resist layer.

In this step, a plasma treatment with oxygen, carbon tetrachloride, or the like may be performed as needed in order to perform a character printing step for forming product recognition characters or the like or to modify a solder resist layer. Although the above method is based on the semi-additive method, a full additive method may be employed.

[0058]

The present invention will be described in more detail below.

Example 1 A. Preparation of resin film made of polyolefin resin composition (i) 104 g of styrene in 500 ml of n-heptane
And 10.8 g of butyllithium were dissolved and heated at 70 ° C. for 3 hours. (ii) 70 ° C. while blowing a mixed gas having a volume ratio of ethylene: butadiene of 3: 1 into the solution subjected to the above treatment.
For 5 hours.

(Iii) Thereafter, I ₂ was further added, and 10
The n-heptane was removed by leaving at 0 ° C. for 1 hour. (iv) The remaining product was washed with acetone to remove unreacted substances and LiI. Thereafter, spherical melanin having a particle size of 0.1 μm and spherical melanin having a particle size of 0.05 μm were mixed at a ratio of 2: 1 and mixed so as to be dispersed without aggregation.

(V) Of the mixture obtained in the step (iv),
After dissolving 50 g again in 500 ml of n-heptane and further dissolving 1 g of benzoyl peroxide, the solution was spread thinly on a polyethylene terephthalate film, and the film was heated to 50 ° C. and further heated at 1 ° C. /
After slowly heating for 100 minutes and reaching 100 ° C., the solvent was removed by allowing to stand for 30 minutes. Thus, 4
A resin film made of a semi-cured polyolefin oligomer having a thickness of 0 μm was obtained.

B. Preparation of resin filler (i) 100 parts by weight of bisphenol F type epoxy monomer (manufactured by Yuka Shell Co., molecular weight: 310, YL983U),
SiO ₂ spherical particles having an average particle diameter of 1.6 μm and a maximum particle diameter of 15 μm or less (manufactured by Admatechs, CRS 11)
01-CE) 170 parts by weight and 1.5 parts by weight of a leveling agent (Perenol S4 manufactured by San Nopco) are placed in a container and mixed by stirring to obtain a resin filler having a viscosity of 23 ± 1 ° C. and 40 to 50 Pa · s. Prepared. As a curing agent, an imidazole curing agent (2E, manufactured by Shikoku Chemicals Co., Ltd.)
4MZ-CN) 6.5 parts by weight.

C. Manufacturing method of printed wiring board (1) 1 mm thick glass epoxy resin or BT (bismaleimide triazine) resin
A copper-clad laminate on which an 8 μm copper foil 8 was laminated was used as a starting material (see FIG. 2A). First, the copper-clad laminate was drilled, subjected to an electroless plating treatment, and etched in a pattern to form a lower conductor circuit 4 and a through hole 9 on both surfaces of the substrate 1.

(2) Through-hole 9 and lower conductor circuit 4
After the substrate on which was formed was washed with water and dried, NaOH (1
0 g / l), NaClO ₂ (40 g / l), Na ₃ PO
₄ A blackening treatment using an aqueous solution containing (6 g / l) as a blackening bath (oxidizing bath), NaOH (10 g / l), NaBH
₄ A reduction treatment was performed using an aqueous solution containing (6 g / l) as a reducing bath, and roughened surfaces 4a and 9a were formed on the entire surface of the lower conductor circuit 4 including the through holes 9 (see FIG. 2 (b)). .

(3) After preparing the resin filler described in the above B, within 24 hours after the preparation by the following method, the inside of the through hole 9 and the conductive circuit non-molded portion on one side of the substrate 1 and the conductive circuit 4 A layer of the resin filler 10 was formed on the outer edge.
That is, first, the resin filler was pressed into the through holes using a squeegee, and then dried at 100 ° C. for 20 minutes. Next, a mask having an opening corresponding to the conductive circuit non-forming portion is placed on the substrate, and a layer of the resin filler 10 is formed in the concave conductive circuit non-forming portion using a squeegee, It was dried at 100 ° C. for 20 minutes (FIG. 2).
(C)).

(4) One side of the substrate after the treatment of the above (3) is subjected to belt sander polishing using # 600 belt polishing paper (manufactured by Sankyo Rikagaku Co., Ltd.) to fill the resin formed on the outer edge of the conductor circuit. The upper portion of the layer of the material 10 and the layer of the resin filler 10 formed on the portion where the conductive circuit was not formed were polished, and then buffing was performed to remove the scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. If necessary, the lands 9a of the through holes 9 and the roughened surface 4a formed in the lower conductor circuit 4 may be planarized by etching before and after polishing. Thereafter, a heat treatment was performed at 100 ° C. for 1 hour and at 150 ° C. for 1 hour to completely cure the resin filler layer.

In this way, the surface portion of the resin filler 10 formed in the through-hole 9 and the portion where the conductor circuit is not formed and the surface of the lower conductor circuit 4 are flattened, and the resin filler 10 and the side surface of the lower conductor circuit 4 are flattened. 4a is firmly adhered through the roughened surface, and the inner wall surface 9a of the through hole 9 and the resin filler 10
Was firmly adhered through the roughened surface to obtain an insulating substrate (see FIG. 2D).

(5) Next, the same etching solution as that used in the above (2) is sprayed on both surfaces of the substrate after the treatment in the above (4) to spray the lower conductor circuit once flattened. By etching the surface of the lower conductor circuit 4 and the land surface of the through-hole 9, roughened surfaces 4a and 9a were formed on the entire surface of the lower conductive circuit 4 (see FIG. 3A).

(6) Next, the film made of the polyolefin resin composition having a thickness of 40 μm prepared in the above A was applied to both surfaces of the substrate at a temperature of 160 ° C. and a pressure of 10 kg / cm ^2.
To form an interlayer resin insulating layer 2 made of the polyolefin resin composition (see FIG. 3B).
The thickness of the formed interlayer resin insulating layer was 30 μm.

(7) Next, a via hole opening 6 having a diameter of 80 μm was formed in the interlayer resin insulating layer 2 made of a polyolefin resin composition by an excimer laser having a wavelength of 0.248 μm (see FIG. 3C). ). Thereafter, a desmear treatment was performed using oxygen plasma.

(8) Next, SV manufactured by Japan Vacuum Engineering Co., Ltd.
Using −4540, sputtering with Ni as the target was performed at a pressure of 0.6 Pa, a temperature of 80 ° C., a power of 200 W,
This was performed under the conditions of a time of 5 minutes to form the Ni metal layer 12a on the surface of the interlayer resin insulating layer 2 (see FIG. 3D). At this time, the thickness of the formed Ni metal layer 12a was 0.1 μm.

(9) Next, using the above SV-4540,
Sputtering with Cu as the target is performed at a pressure of 0.8
Pa, temperature 80 ° C., power 4500 W, time 2 minutes, and a 0.2 μm thick C
The u metal layer 12b was formed. (See FIG. 4A).

(10) Subsequently, a 0.1 μm-thick oxide film (not shown) is formed on the surface of the Cu metal layer 12 b by subjecting the Cu metal layer 12 b to a blackening-reduction treatment using the following method. Was formed. That is, NaOH (10 g / l),
NaClO ₂ (40 g / l), Na ₃ PO ₄ (6 g / l)
a blackening treatment using an aqueous solution containing l) as a blackening bath (oxidizing bath);
And NaOH (10 g / l), NaBH ₄ (6 g / l
l) is subjected to a reduction treatment using an aqueous solution containing
An oxide film was formed on the surface of the metal layer 12b.

(11) A commercially available photosensitive dry film is stuck on the surface of the oxide film, a mask is placed thereon, and 100 mJ / c
Exposure was performed with m ² , and a development treatment was performed with a 0.8% aqueous sodium carbonate solution to provide a plating resist 3 having a thickness of 15 μm (see FIG. 4B). After this development process,
By performing an acid treatment using a 10% by volume sulfuric acid solution, the oxide film in the plating resist non-formed portion of the oxide film formed in the above (10) was dissolved and removed.

(12) Next, the copper-free copper plating film 13 having a thickness of 15 μm was formed on the resist non-formed portion under the following conditions (see FIG. 4C). [Electroplating aqueous solution] sulfuric acid 2.24 mol / l copper sulfate 0.26 mol / l additive 19.5 ml / l (manufactured by Atotech Japan, capparaside HL) [electroplating conditions] current density 1 A / dm ² hours 65 minutes Temperature 22 ± 2 ℃

(13) After the plating resist is peeled off with a 5% KOH aqueous solution, the oxide film and the electroless plating film under the plating resist are dissolved and removed by etching with a mixed solution of sulfuric acid and hydrogen peroxide. Independent upper layer conductor circuit 5
(Including the via hole 7) (see FIG. 4D).

(14) Subsequently, the above steps (5) to (13) were repeated to form a further upper layer conductor circuit (see FIGS. 5A to 6A). In addition, the steps described above
The surface of the conductor circuit (including the via hole 7) 5 is etched by using the same etching solution as that used in (5) to roughen the surface of the conductor circuit (including the via hole 7). Was formed (see FIG. 6B).

(15) Next, a cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) dissolved in diethylene glycol dimethyl ether (DMDG) to a concentration of 60% by weight was used. 46.67 parts by weight of an oligomer for imparting property (molecular weight: 4000), 15 parts by weight of a bisphenol A type epoxy resin (trade name: Epicoat 1001 manufactured by Yuka Shell Co., Ltd.) dissolved in methyl ethyl ketone, and 15 parts by weight of an imidazole curing agent ( (Shikoku Chemicals, trade name: 2E4MZ-CN)
6 parts by weight, 3 parts by weight of polyfunctional acrylic monomer (trade name: R604, manufactured by Nippon Kayaku Co., Ltd.), which is a photosensitive monomer, and polyvalent acrylic monomer (trade name: DP, manufactured by Kyoei Chemical Co., Ltd.)
E6A) 1.5 parts by weight and 0.71 part by weight of a dispersion antifoaming agent (manufactured by San Nopco, trade name: S-65) in a container,
A mixed composition was prepared by stirring and mixing, and 2.0 parts by weight of benzophenone (manufactured by Kanto Kagaku) as a photopolymerization initiator and Michler's ketone (manufactured by Kanto Kagaku) as a photosensitizer were added to the mixed composition. Add 0.2 parts by weight and adjust viscosity to 25 ° C
To obtain a solder resist resin composition adjusted to 2.0 Pa · s. The viscosity was measured using a B-type viscometer (DVL-B type, manufactured by Tokyo Keiki Co., Ltd.) at 60 rpm with rotor N.
o. In the case of 4, 6 rpm, the rotor No. According to 3.

(16) Next, the above-mentioned solder resist composition is applied to both sides of the multilayer wiring board in a thickness of 20 μm.
After performing a drying process under the conditions of 20 ° C. for 20 minutes and 70 ° C. for 30 minutes, a 5 mm-thick photomask on which a pattern of the opening of the solder resist is drawn is brought into close contact with the solder resist layer, and an ultraviolet ray of 1000 mJ / cm ² is applied. Exposure with DM
Development was performed with a TG solution to form an opening having a diameter of 200 μm. Then, at 80 ° C. for 1 hour, and at 100 ° C. for 1 hour.
The solder resist layer is cured by performing heat treatment under the conditions of 120 ° C. for 1 hour and 150 ° C. for 3 hours, and the solder pad portion is opened, and the solder resist layer having a thickness of 20 μm (organic interlayer resin insulation) Layer 14 was formed.

(17) Next, the substrate on which the solder resist layer (organic interlayer resin insulating layer) 14 is formed is coated with nickel chloride (2.3 × 10 ^-1 mol / l) and sodium hypophosphite (2.8). × 10 ^-1 mol / l) and an electroless nickel plating solution of pH = 4.5 containing sodium citrate (1.6 × 10 ^-1 mol / l) for 20 minutes, and a thickness of 5 μm at the opening. Was formed. further,
The substrate was washed with potassium cyanide (7.6 × 10 ⁻³ mol)
/ L), ammonium chloride (1.9 × 10 ^-1 mol /
l), sodium citrate (1.2 × 10 ⁻¹ mol /
l), sodium hypophosphite (1.7 × 10 ⁻¹ mol /
1) is immersed for 7.5 minutes at 80 ° C. in an electroless plating solution containing
m of the gold plating layer 16 was formed.

(18) Thereafter, a solder paste is printed in the openings of the solder resist layer 14 and reflowed at 200 ° C. to form the solder bumps 17, thereby producing a multilayer wiring printed board having the solder bumps 17 ( FIG. 6C).

Example 2 A. Production of a resin film made of a polyolefin-based resin composition and preparation of a resin filler were performed in the same manner as in Example 1.

B. Manufacturing method of printed wiring board (1) 1 mm thick glass epoxy resin or BT (bismaleimide triazine) resin
A copper-clad laminate on which an 8 μm copper foil 8 was laminated was used as a starting material (see FIG. 7A). First, the copper-clad laminate was drilled, subjected to an electroless plating treatment, and etched in a pattern to form a lower conductor circuit 4 and a through hole 9 on both surfaces of the substrate 1.

(2) Through-hole 9 and lower conductor circuit 4
After the substrate on which was formed was washed with water and dried, NaOH (1
0 g / l), NaClO ₂ (40 g / l), Na ₃ PO
₄ A blackening treatment using an aqueous solution containing (6 g / l) as a blackening bath (oxidizing bath), NaOH (10 g / l), NaBH
₄ A reduction treatment was performed using an aqueous solution containing (6 g / l) as a reduction bath, and roughened surfaces 4a and 9a were formed on the entire surface of the lower conductor circuit 4 including the through holes 9 (see FIG. 7B). .

(3) After preparing the resin filler described in the above B, within 24 hours after the preparation by the following method, the inside of the through hole 9 and the conductive circuit non-molded portion on one side of the substrate 1 and the conductive circuit 4 A layer of the resin filler 10 was formed on the outer edge.
That is, first, the resin filler was pressed into the through holes using a squeegee, and then dried at 100 ° C. for 20 minutes. Next, a mask having an opening corresponding to the conductive circuit non-forming portion is placed on the substrate, and a layer of the resin filler 10 is formed in the concave conductive circuit non-forming portion using a squeegee, It was dried at 100 ° C. for 20 minutes (FIG. 7).
(C)).

(4) One side of the substrate after the treatment of the above (3) is subjected to belt sanding using # 600 belt abrasive paper (manufactured by Sankyo Rikagaku Co., Ltd.) to fill the resin formed on the outer edge of the conductor circuit. The upper portion of the layer of the material 10 and the layer of the resin filler 10 formed on the portion where the conductive circuit was not formed were polished, and then buffing was performed to remove the scratches caused by the belt sander polishing. Such a series of polishing was similarly performed on the other surface of the substrate. If necessary, the lands 9a of the through holes 9 and the roughened surface 4a formed in the lower conductor circuit 4 may be planarized by etching before and after polishing. Thereafter, a heat treatment was performed at 100 ° C. for 1 hour and at 150 ° C. for 1 hour to completely cure the resin filler layer.

In this way, the surface layer of the resin filler 10 formed in the through-hole 9 and the portion where the conductor circuit is not formed and the surface of the lower conductor circuit 4 are flattened, and the resin filler 10 and the side surfaces of the lower conductor circuit 4 are flattened. 4a is firmly adhered through the roughened surface, and the inner wall surface 9a of the through hole 9 and the resin filler 10
Was firmly adhered through the roughened surface to obtain an insulating substrate (see FIG. 7D).

(5) Next, the same etching solution as that used in the above (2) is sprayed on both surfaces of the substrate after the treatment in the above (4) by spraying, and the lower conductor circuit once flattened is sprayed. By etching the surface of the lower conductor circuit 4 and the land surface of the through hole 9, roughened surfaces 4a and 9a were formed on the entire surface of the lower conductor circuit 4 (see FIG. 8A).

(6) Next, the film made of the polyolefin resin composition having a thickness of 40 μm prepared in the above A was applied to both surfaces of the substrate at a temperature of 160 ° C. and a pressure of 10 kg / cm ^2.
To form an interlayer resin insulating layer 2 made of the above polyolefin-based resin composition (see FIG. 8B).
The thickness of the formed interlayer resin insulating layer was 30 μm.

(7) Next, a via hole opening 6 having a diameter of 80 μm was formed in the interlayer resin insulation layer 2 made of a polyolefin resin composition by an excimer laser having a wavelength of 0.248 μm (see FIG. 8C). ). Thereafter, a desmear treatment was performed using oxygen plasma.

(8) Next, SV manufactured by Japan Vacuum Engineering Co., Ltd.
Using −4540, sputtering with Ni as the target was performed at a pressure of 0.6 Pa, a temperature of 80 ° C., a power of 200 W,
This was performed under the condition of a time of 5 minutes to form the Ni metal layer 12a on the surface of the interlayer resin insulating layer 2 (see FIG. 8D). At this time, the thickness of the formed Ni metal layer 12a was 0.1 μm.

(9) Next, using the above SV-4540,
Sputtering with Cu as the target is performed at a pressure of 0.8
Pa, temperature 80 ° C., power 4500 W, time 2 minutes, and a 0.2 μm thick C
The u metal layer 12b was formed. (See FIG. 9A).

(10) Subsequently, the Cu metal layer 12b is subjected to electroless tin plating under the following conditions so that the Cu metal layer 12b has a thickness of 0.0
A 1 μm tin plating film (not shown) was formed. [Electroless tin plating aqueous solution] Tin borofluoride 0.50 mol / l Thiourea 0.37 mol / l PEG 1.00 g / l Sodium hypophosphite 20.0 g / l [Plating conditions] Temperature 25 ° C Time 1 minute

(11) A commercially available photosensitive dry film was stuck on the surface of the tin plating film, a mask was placed thereon, and a 100 m
Exposure was performed at J / cm ² , and a development treatment was performed with a 0.8% aqueous sodium carbonate solution to provide a plating resist 3 having a thickness of 25 μm (see FIG. 9B). Further, after the completion of the developing treatment, the tin plating film in the portion where the plating resist was not formed was dissolved and removed with a 10% by volume aqueous solution of hydrogen peroxide-nitric acid.

(12) Next, the copper-free copper plating film 13 having a thickness of 15 μm was formed on the non-resist-formed portion under the following conditions (see FIG. 9C). [Electroplating aqueous solution] sulfuric acid 2.24 mol / l copper sulfate 0.26 mol / l additive 19.5 ml / l (manufactured by Atotech Japan, capparaside HL) [electroplating conditions] current density 1 A / dm ² hours 65 minutes Temperature 22 ± 2 ℃

(13) Further, after the plating resist is stripped and removed with a 5% KOH aqueous solution, the electropalladium plating film and the electroless plating film under the plating resist are dissolved and removed by etching with a mixed solution of sulfuric acid and hydrogen peroxide. As a result, an independent upper-layer conductor circuit 5 (including a via hole 7) was formed (FIG. 9).
(D)). (14) Subsequently, the above steps (5) to (13) were repeated to form a further upper-layer conductor circuit (FIGS. 10A to 10C).
FIG. 11A). Further, the surface of the conductor circuit (including the via hole 7) 5 is etched by using the same etching solution as that used in the above step (5) to form the conductor circuit (including the via hole 7) 5. A roughened surface was formed on the surface (see FIG. 11B).

(15) Next, a cresol novolak type epoxy resin (manufactured by Nippon Kayaku Co., Ltd.) dissolved in diethylene glycol dimethyl ether (DMDG) to a concentration of 60% by weight was used. 46.67 parts by weight of an oligomer for imparting property (molecular weight: 4000), 15 parts by weight of a bisphenol A type epoxy resin (trade name: Epicoat 1001 manufactured by Yuka Shell Co., Ltd.) dissolved in methyl ethyl ketone, and 15 parts by weight of an imidazole curing agent ( (Shikoku Chemicals, trade name: 2E4MZ-CN)
6 parts by weight, 3 parts by weight of polyfunctional acrylic monomer (trade name: R604, manufactured by Nippon Kayaku Co., Ltd.), which is a photosensitive monomer, and polyvalent acrylic monomer (trade name: DP, manufactured by Kyoei Chemical Co., Ltd.)
E6A) 1.5 parts by weight and 0.71 part by weight of a dispersion antifoaming agent (manufactured by San Nopco, trade name: S-65) in a container,
A mixed composition was prepared by stirring and mixing, and 2.0 parts by weight of benzophenone (manufactured by Kanto Kagaku) as a photopolymerization initiator and Michler's ketone (manufactured by Kanto Kagaku) as a photosensitizer were added to the mixed composition. Add 0.2 parts by weight and adjust viscosity to 25 ° C
To obtain a solder resist resin composition adjusted to 2.0 Pa · s. The viscosity was measured using a B-type viscometer (DVL-B type, manufactured by Tokyo Keiki Co., Ltd.) at 60 rpm with rotor N.
o. In the case of 4, 6 rpm, the rotor No. According to 3.

(16) Next, the solder resist composition is applied to both sides of the multilayer wiring board in a thickness of 20 μm.
After performing a drying process under the conditions of 20 ° C. for 20 minutes and 70 ° C. for 30 minutes, a 5 mm-thick photomask on which a pattern of the opening of the solder resist is drawn is brought into close contact with the solder resist layer, and an ultraviolet ray of 1000 mJ / cm ² is applied. Exposure with DM
Development was performed with a TG solution to form an opening having a diameter of 200 μm. Then, at 80 ° C. for 1 hour, and at 100 ° C. for 1 hour.
The solder resist layer is cured by performing heat treatment under the conditions of 120 ° C. for 1 hour and 150 ° C. for 3 hours, and the solder pad portion is opened, and the solder resist layer having a thickness of 20 μm (organic interlayer resin insulation) Layer 14 was formed.

(17) Next, the substrate on which the solder resist layer (organic interlayer resin insulating layer) 14 was formed was coated with nickel chloride (2.3 × 10 ^-1 mol / l) and sodium hypophosphite (2.8). × 10 ^-1 mol / l) and an electroless nickel plating solution of pH = 4.5 containing sodium citrate (1.6 × 10 ^-1 mol / l) for 20 minutes, and a thickness of 5 μm at the opening. Was formed. further,
The substrate was washed with potassium cyanide (7.6 × 10 ⁻³ mol)
/ L), ammonium chloride (1.9 × 10 ^-1 mol /
l), sodium citrate (1.2 × 10 ⁻¹ mol /
l), sodium hypophosphite (1.7 × 10 ⁻¹ mol /
1) is immersed for 7.5 minutes at 80 ° C. in an electroless plating solution containing
m of the gold plating layer 16 was formed.

(18) Thereafter, a solder paste is printed in the openings of the solder resist layer 14 and reflowed at 200 ° C. to form the solder bumps 17, thereby manufacturing a multilayer wiring printed board having the solder bumps 17. FIG. 11 (c)
reference).

Comparative Example 1 A multilayer printed wiring board was manufactured in the same manner as in Example 1 except that the oxide film was not formed in the step (10). After exposing and developing the photosensitive dry film, the cross section of the substrate provided with the plating resist 3 was observed with a microscope, and the shape of the plating resist was a skirt shape.

With respect to the multilayer printed wiring boards obtained in Examples 1 and 2 and Comparative Example 1, the multilayer printed wiring boards were cut with a cutter, and their cross sections were observed with a microscope.
In the multilayer printed wiring boards of Examples 1 and 2, no conductive circuit having an undercut cross section was found, whereas in the multilayer printed wiring board of Comparative Example 1, a part of the conductive circuit having an undercut shape was partially observed. Was seen.

Further, with respect to the multilayer printed wiring boards obtained in Examples 1 and 2 and Comparative Example 1, a heat cycle in which a heat cycle of holding at −55 ° C. for 30 minutes and then holding at 125 ° C. for 30 minutes is repeated 1,000 times. Was performed, the multilayer printed wiring board was cut with a cutter, and the cross section was observed with a microscope. As a result, in the multilayer printed wiring boards of Examples 1 and 2, there was no peeling of the conductor circuit, and no crack was observed in the interlayer resin insulating layer, whereas in the multilayer printed wiring board of Comparative Example 1, there was a part. A peeled conductor circuit was observed, and cracks were observed in a part of the interlayer resin insulating layer.

Further, the multilayer printed wiring boards obtained in Examples 1 and 2 and Comparative Example 1 were subjected to a heat cycle test and then to a conduction test.
In the multilayer printed wiring board of Comparative Example 1, no conduction failure occurred, whereas in the multilayer printed wiring board of Comparative Example 1,
In some cases, conduction failure occurred.

[0105]

As described above, according to the method for manufacturing a multilayer printed wiring board of the present invention, a plating resist having a flat surface can be formed without having an undercut shape or a skirted shape. There is no risk of short circuit between the conductor circuits, no signal delay or signal error,
Adhesion between the conductor circuit and the interlayer resin insulation layer or solder resist layer is sufficient. Under heat cycle conditions or high temperature and high humidity, cracks are less likely to occur in the interlayer resin insulation layer or solder resist layer, and the conductor circuit peels off. It is possible to manufacture a multilayer printed wiring board which is excellent in connection reliability in which the occurrence of blemishes is difficult.

[Brief description of the drawings]

FIGS. 1A to 1D are cross-sectional views showing a part of a manufacturing process of a multilayer printed wiring board using the manufacturing method of the present invention.

FIGS. 2A to 2D are cross-sectional views showing a part of a manufacturing process of a multilayer printed wiring board using the manufacturing method of the present invention.

FIGS. 3A to 3D are cross-sectional views showing a part of a manufacturing process of a multilayer printed wiring board using the manufacturing method of the present invention.

FIGS. 4A to 4D are cross-sectional views showing a part of a manufacturing process of a multilayer printed wiring board using the manufacturing method of the present invention.

FIGS. 5A to 5C are cross-sectional views showing a part of a manufacturing process of a multilayer printed wiring board using the manufacturing method of the present invention.

FIGS. 6A to 6C are cross-sectional views showing a part of a manufacturing process of a multilayer printed wiring board using the manufacturing method of the present invention.

FIGS. 7A to 7D are cross-sectional views showing a part of a manufacturing process of a multilayer printed wiring board using the manufacturing method of the present invention.

FIGS. 8A to 8D are cross-sectional views showing a part of a manufacturing process of a multilayer printed wiring board using the manufacturing method of the present invention.

FIGS. 9A to 9D are cross-sectional views showing a part of a manufacturing process of a multilayer printed wiring board using the manufacturing method of the present invention.

FIGS. 10A to 10C are cross-sectional views showing a part of a manufacturing process of a multilayer printed wiring board using the manufacturing method of the present invention.

FIGS. 11A to 11C are cross-sectional views showing a part of a manufacturing process of a multilayer printed wiring board using the manufacturing method of the present invention.

12 (a) to 12 (d) are cross-sectional views showing a part of a manufacturing process of a conventional multilayer printed wiring board.

13 (a) to 13 (d) are cross-sectional views showing a part of a manufacturing process of a conventional multilayer printed wiring board.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Substrate 2, 102 Interlayer resin insulation layer 3 Plating resist 4 Lower conductor circuit 4a Roughened surface 5 Upper conductor circuit 6 Via hole opening 7 Via hole 8 Copper foil 9 Through hole 9a Roughened surface 10 Resin filler 12a Ni metal layer 12b Cu metal layer 13, 113 Electroplating film 14 Solder resist layer 15 Nickel plating film 16 Gold plating film 17 Solder bump 18 Photosensitive dry film 19 Plating resist non-formed part 20 Residue of photosensitive dry film 21 Mask 22 Light source 23 Coating Layer 105 Conductor circuit 112 Thin film conductor layer

 ──────────────────────────────────────────────────続 き Continued on the front page F term (reference) 5E343 AA15 AA17 AA37 BB24 BB71 CC62 DD43 DD46 DD47 DD48 EE53 ER16 ER18 FF16 GG03 5E346 AA42 CC08 CC09 CC32 CC33 CC37 CC52 CC57 DD17 DD24 DD44 EE13 EE19 GG15 GG17 GG17 GG18 GG17 GG18

Claims (2)

[Claims] 1. A step of attaching a photosensitive dry film on an interlayer resin insulating layer having a thin film conductor layer formed thereon, 2) forming a plating resist by subjecting the photosensitive dry film to exposure and development. A method of manufacturing a multilayer printed wiring board including a step of forming a conductive circuit in a plating resist non-formed portion, and a step of forming a coating layer on the thin film conductive layer in the step of 1). A method for manufacturing a multilayer printed wiring board, comprising attaching a photosensitive dry film. 2. The method according to claim 1, wherein the coating layer is an oxide film.