JP2000017240A - Adhesive sheet and semiconductor device using same - Google Patents
Adhesive sheet and semiconductor device using sameInfo
- Publication number
- JP2000017240A JP2000017240A JP10187712A JP18771298A JP2000017240A JP 2000017240 A JP2000017240 A JP 2000017240A JP 10187712 A JP10187712 A JP 10187712A JP 18771298 A JP18771298 A JP 18771298A JP 2000017240 A JP2000017240 A JP 2000017240A
- Authority
- JP
- Japan
- Prior art keywords
- adhesive sheet
- adhesive
- semiconductor element
- semiconductor device
- epoxy resin
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
- H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Adhesive Tapes (AREA)
- Adhesives Or Adhesive Processes (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Description
【０００１】[0001]
【発明の属する技術分野】本発明は、接着シートおよび
それを用いた半導体装置に関するものであり、詳しく
は、半導体パッケージの配線回路基板と半導体素子との
間の応力を緩和する接着シートおよびそれを用いた半導
体装置に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an adhesive sheet and a semiconductor device using the same. The present invention relates to a semiconductor device used.
【０００２】[0002]
【従来の技術】半導体パッケージと称される従来の半導
体装置は、一般に、半導体チップをダイパッドに対し、
半田、銀ペースト、エポキシ樹脂等のダイボンディング
材によって接合し、これを樹脂によって封止したもので
あって、近年における電子機器の小型化、高性能化に伴
い、薄型化、小型化、軽量化され、表面実装型半導体パ
ッケージとして広く活用されている。2. Description of the Related Art In a conventional semiconductor device called a semiconductor package, a semiconductor chip is generally attached to a die pad.
It is bonded with a die bonding material such as solder, silver paste, epoxy resin, etc., and sealed with a resin. With the recent miniaturization and high performance of electronic equipment, it has become thinner, smaller, and lighter. It is widely used as a surface mount type semiconductor package.
【０００３】しかしながら、従来用いられている、エポ
キシ樹脂、ポリイミド樹脂、シリコーン系樹脂等のダイ
ボンディング材は、一般に弾性率が高く、温度差によっ
て半導体チップに大きな熱応力が生じるため、電気接続
部の信頼性に劣り、半導体チップまたは半導体パッケー
ジが破壊する等の問題が生じる。この場合、ダイボンデ
ィング材として弾性率の低いシリコーン系樹脂を用いる
ことが考えられるが、液状樹脂のため、生産性が低く、
実用性に劣るという難点がある。なお、生産性の改善の
ため、スクリーン印刷等の方法もとられているが、歩留
りが低減するといった難点がある。[0003] However, conventionally used die bonding materials such as epoxy resin, polyimide resin and silicone resin generally have a high elastic modulus and a large thermal stress is generated in the semiconductor chip due to a temperature difference. Poor reliability may cause problems such as breakage of the semiconductor chip or semiconductor package. In this case, it is conceivable to use a silicone resin having a low elastic modulus as the die bonding material.
There is a disadvantage that it is inferior in practicality. In order to improve the productivity, a method such as screen printing has been adopted, but there is a problem that the yield is reduced.
【０００４】[0004]
【発明が解決しようとする課題】これらの問題を解決す
るため、特開平８−１５７６２１号公報に見られるよう
に、フッ素樹脂多孔質体に所定の比誘電率に設定された
エポキシ樹脂を含浸等してなる接着シート、および特表
平９−５００４１８号公報に見られるように、ポリテト
ラフルオロエチレン（ＰＴＦＥ）多孔質体にエポキシ樹
脂、ポリイミド樹脂等を含浸等してなる接着シートが提
案されている。しかしながら、エポキシ樹脂を用いた接
着シートは、Ｂステージ（半硬化）の接着時にエポキシ
樹脂の溶融粘度が低く流れやすいため、接着層を厚く形
成することができず、また、接着シートを半導体素子に
貼りつける時にエポキシ樹脂がはみ出す等の難点があ
る。一方、ポリイミド樹脂を用いた接着シートは、弾性
率が高く、半導体素子の接着用途において、半導体素子
と配線回路基板との間の熱応力を充分に緩和することが
できないという難点がある。In order to solve these problems, as disclosed in Japanese Patent Application Laid-Open No. Hei 8-157621, a porous fluororesin is impregnated with an epoxy resin having a predetermined dielectric constant. And an adhesive sheet obtained by impregnating a porous body of polytetrafluoroethylene (PTFE) with an epoxy resin, a polyimide resin, or the like as disclosed in Japanese Patent Publication No. 9-500418. I have. However, an adhesive sheet using an epoxy resin cannot easily form a thick adhesive layer because the melt viscosity of the epoxy resin is low at the time of bonding at the B stage (semi-cured), so that the adhesive sheet cannot be formed on a semiconductor element. There is a problem that the epoxy resin sticks out when pasting. On the other hand, an adhesive sheet using a polyimide resin has a high modulus of elasticity, and has a drawback in that it is not possible to sufficiently reduce thermal stress between the semiconductor element and the printed circuit board in a semiconductor element bonding application.
【０００５】本発明は、このような事情に鑑みなされた
もので、半導体素子の接着用途において、半導体素子と
配線回路基板との間の熱応力を充分に緩和でき、電気接
続部の信頼性に優れ、半導体チップまたは半導体パッケ
ージのクラックの発生を防止することができる接着シー
トおよびそれを用いた半導体装置の提供をその目的とす
る。SUMMARY OF THE INVENTION The present invention has been made in view of the above circumstances, and in a bonding application of a semiconductor element, the thermal stress between the semiconductor element and the printed circuit board can be sufficiently reduced, and the reliability of the electric connection portion can be improved. An object of the present invention is to provide an adhesive sheet which is excellent and can prevent cracks in a semiconductor chip or a semiconductor package, and a semiconductor device using the same.
【０００６】[0006]
【課題を解決するための手段】上記の目的を達成するた
め、本発明は、硬化後において、２５℃における引張弾
性率が３００〜１５０００ＭＰａである接着シートを第
１の要旨とし、配線回路基板上に半導体素子が搭載さ
れ、この半導体素子が樹脂封止されてなる半導体装置で
あって、上記配線回路基板と半導体素子との間に、上記
接着シートからなる硬化物層が形成されている半導体装
置を第２の要旨とする。SUMMARY OF THE INVENTION In order to achieve the above object, the present invention provides, as a first gist, an adhesive sheet having a tensile modulus at 25 ° C. of 300 to 15000 MPa after curing. A semiconductor device in which a semiconductor element is mounted on the substrate, and the semiconductor element is sealed with a resin, wherein a cured product layer made of the adhesive sheet is formed between the wiring circuit board and the semiconductor element Is the second gist.
【０００７】すなわち、この発明者は、半導体素子の接
着用途において、半導体素子と配線回路基板との間の熱
応力を充分に緩和でき、電気接続部の信頼性に優れ、半
導体チップまたは半導体パッケージのクラックの発生を
防止することができる接着シートを得るため鋭意研究を
重ねた。その一連の研究の過程で、この発明者は、接着
シートの引張弾性率に着目し、好ましい引張弾性率につ
いて種々研究を重ねた結果、硬化後において、２５℃に
おける引張弾性率が３００〜１５０００ＭＰａである接
着シートにより所期の目的を達成できることを見出し、
本発明に到達した。That is, the inventor of the present invention can sufficiently alleviate the thermal stress between the semiconductor element and the printed circuit board in the application of the bonding of the semiconductor element, has excellent reliability of the electric connection portion, and has a high reliability. Intensive research was conducted to obtain an adhesive sheet that can prevent the occurrence of cracks. In the course of the series of studies, the inventor focused on the tensile modulus of the adhesive sheet and conducted various studies on a preferable tensile modulus. As a result, after curing, the tensile modulus at 25 ° C. was 300 to 15000 MPa. We found that an adhesive sheet could achieve the intended purpose,
The present invention has been reached.
【０００８】そして、本発明の接着シートを用いてなる
半導体装置は、電気接続部の信頼性に優れ、半導体チッ
プまたは半導体パッケージのクラックの発生を防止する
ことができる。[0008] The semiconductor device using the adhesive sheet of the present invention is excellent in the reliability of the electrical connection portion and can prevent the occurrence of cracks in the semiconductor chip or the semiconductor package.
【０００９】[0009]
【発明の実施の形態】つぎに、本発明の実施の形態を詳
しく説明する。Next, embodiments of the present invention will be described in detail.
【００１０】本発明の接着シートとしては、例えば、図
１に示すように、シート状多孔質基材１の両面に接着剤
層２が形成された構造のものがあげられる。この接着シ
ートにおいて、接着剤はシート状多孔質基材１の微孔に
含浸されていてもよく、あるいは含浸されていなくても
よい。なお、接着剤層２の厚みは、通常、５〜５００μ
ｍである。図２は本発明の他の例であり、接着剤層を形
成せず（あるいは形成してもその厚みは極薄である）シ
ート状多孔質基材１の微孔に接着剤を含浸させたタイプ
の接着シートを示している。図２に示す接着シートにお
ける接着剤の含浸率は、通常、５〜５０％に設定され
る。この含浸率は、シート状多孔質基材１に含浸された
接着剤の重量を、シート状多孔質基材１と含浸された接
着剤の合計重量で除し、これに１００を乗じて算出され
る値である。The adhesive sheet of the present invention has, for example, a structure in which an adhesive layer 2 is formed on both sides of a sheet-like porous substrate 1 as shown in FIG. In this adhesive sheet, the adhesive may or may not be impregnated into the micropores of the sheet-like porous substrate 1. The thickness of the adhesive layer 2 is usually 5 to 500 μm.
m. FIG. 2 shows another example of the present invention, in which the adhesive was impregnated into the micropores of the sheet-like porous substrate 1 without forming an adhesive layer (or even if formed, the thickness is extremely thin). 1 shows a type of adhesive sheet. The impregnation rate of the adhesive in the adhesive sheet shown in FIG. 2 is usually set to 5 to 50%. This impregnation ratio is calculated by dividing the weight of the adhesive impregnated in the sheet-shaped porous substrate 1 by the total weight of the sheet-shaped porous substrate 1 and the impregnated adhesive, and multiplying the result by 100. Value.
【００１１】上記多孔質基材の材質としては、特に限定
するものではないが、フッ素樹脂が好ましい。具体的に
は、ポリテトラフルオロエチレン（ＰＴＦＥ）、テトラ
フルオロエチレン−ヘキサフルオロプロピレン共重合体
（ＦＥＰ）、ポリフッ化ビニル、ポリフッ化ビニリデン
等があげられ、特にＰＴＦＥが好ましい。これらは単独
でもしくは２種以上併せて用いられる。この多孔質基材
の厚み、微孔の孔径、気孔率は適宜設定できるが、通
常、厚みは１〜５００μｍ、気孔率は１０〜９５％、微
孔の孔径は０．０５〜５μｍである。The material of the porous substrate is not particularly limited, but is preferably a fluororesin. Specific examples include polytetrafluoroethylene (PTFE), tetrafluoroethylene-hexafluoropropylene copolymer (FEP), polyvinyl fluoride, and polyvinylidene fluoride, and PTFE is particularly preferred. These may be used alone or in combination of two or more. The thickness, pore size and porosity of the porous substrate can be appropriately set, but usually the thickness is 1 to 500 μm, the porosity is 10 to 95%, and the pore size of the micropores is 0.05 to 5 μm.
【００１２】上記接着剤としては、特に限定するもので
はないが、熱硬化性樹脂およびゴムを必須成分とする接
着剤組成物を用いることが好ましい。Although the adhesive is not particularly limited, it is preferable to use an adhesive composition containing a thermosetting resin and rubber as essential components.
【００１３】上記熱硬化性樹脂としては、特に限定する
ものではないが、エポキシ樹脂が好ましい。具体的に
は、ビフェニル型エポキシ樹脂、クレゾールノボラック
型エポキシ樹脂、フェノールノボラック型エポキシ樹
脂、ビスフェノールＡ型エポキシ樹脂等があげられ、特
にビフェニル型エポキシ樹脂が好ましい。これらは単独
でもしくは２種以上併せて用いられる。なお、上記ビフ
ェニル型エポキシ樹脂と、他のエポキシ樹脂とを併用す
る場合は、ビフェニル型エポキシ樹脂の配合量を、エポ
キシ樹脂全体の２０重量％以上となるように設定するこ
とが好ましく、特に好ましくは５０重量％以上である。The thermosetting resin is not particularly limited, but is preferably an epoxy resin. Specific examples include a biphenyl type epoxy resin, a cresol novolak type epoxy resin, a phenol novolak type epoxy resin, a bisphenol A type epoxy resin and the like, and a biphenyl type epoxy resin is particularly preferable. These may be used alone or in combination of two or more. When the biphenyl-type epoxy resin is used in combination with another epoxy resin, the amount of the biphenyl-type epoxy resin is preferably set to 20% by weight or more of the entire epoxy resin, and particularly preferably. 50% by weight or more.
【００１４】上記ビフェニル型エポキシ樹脂としては、
下記の一般式（１）で表されるビフェニル型エポキシ樹
脂が特に好ましい。このビフェニル型エポキシ樹脂は、
グリシジル基を有するフェニル環に、下記のＲ1 〜Ｒ4
で表される炭素数１〜４のアルキル基が付加されたもの
である。As the biphenyl type epoxy resin,
A biphenyl type epoxy resin represented by the following general formula (1) is particularly preferred. This biphenyl type epoxy resin is
A phenyl ring having a glycidyl group has the following R 1 to R 4
Wherein an alkyl group having 1 to 4 carbon atoms represented by
【００１５】[0015]
【化３】 Embedded image
【００１６】上記一般式（１）中のＲ1 〜Ｒ4 で表され
る炭素数１〜４のアルキル基としては、メチル基、エチ
ル基、プロピル基、イソプロピル基、ブチル基、イソブ
チル基、ｓｅｃ−ブチル基、ｔｅｒｔ−ブチル基等の直
鎖状または分岐状の低級アルキル基があげられ、特にメ
チル基が好ましく、上記Ｒ1 〜Ｒ4 は互いに同じであっ
ても異なっていてもよい。なかでも、上記Ｒ1 〜Ｒ4 が
全てメチル基である下記の構造式で表されるビフェニル
型エポキシ樹脂を用いることが特に好適である。The alkyl group having 1 to 4 carbon atoms represented by R 1 to R 4 in the above general formula (1) includes methyl, ethyl, propyl, isopropyl, butyl, isobutyl, sec. Examples thereof include a linear or branched lower alkyl group such as -butyl group and tert-butyl group, and a methyl group is particularly preferable, and the above R 1 to R 4 may be the same or different. Among them, it is particularly preferable to use a biphenyl type epoxy resin represented by the following structural formula, wherein R 1 to R 4 are all methyl groups.
【００１７】[0017]
【化４】 Embedded image
【００１８】上記一般式（１）で表されるビフェニル型
エポキシ樹脂としては、エポキシ当量が１７７〜２４０
ｇ／ｅｑで、軟化点が８０〜１３０℃のものを用いるこ
とが好ましく、なかでも、エポキシ当量が１７７〜２２
０ｇ／ｅｑで、軟化点が８０〜１２０℃のものを用いる
ことが特に好ましい。The biphenyl type epoxy resin represented by the general formula (1) has an epoxy equivalent of 177 to 240.
It is preferable to use those having a softening point of 80 to 130 ° C. in g / eq, and especially, an epoxy equivalent of 177 to 22.
It is particularly preferable to use those having 0 g / eq and a softening point of 80 to 120 ° C.
【００１９】接着剤の材料である接着剤組成物における
熱硬化性樹脂の配合割合は、特に１０〜９６重量％の範
囲が好ましく、なかでも２０〜９４重量％の範囲が好適
である。すなわち、熱硬化性樹脂の配合割合が１０重量
％未満であると、半導体素子の接着用途において、撥水
性および低吸湿性が発揮され難く、９６重量％を超える
と、得られる接着シート自身が脆くなり、取り扱いが容
易でなくなるからである。The mixing ratio of the thermosetting resin in the adhesive composition, which is the material of the adhesive, is preferably in the range of 10 to 96% by weight, more preferably 20 to 94% by weight. That is, when the blending ratio of the thermosetting resin is less than 10% by weight, it is difficult to exhibit water repellency and low hygroscopicity in the bonding application of the semiconductor element, and when it exceeds 96% by weight, the obtained adhesive sheet itself becomes brittle. This is because handling becomes difficult.
【００２０】熱硬化性樹脂とともに用いられるゴムとし
ては、特に限定するものではないが、アクリロニトリル
−ブタジエン系共重合体が好ましい。このアクリロニト
リル−ブタジエン系共重合体は、アクリロニトリル−ブ
タジエン共重合体（ＮＢＲ）の含有量が１００重量％で
ある場合のみならず、このＮＢＲに他の共重合成分が含
まれている場合をも含む広い意味での共重合体をいう。
他の共重合成分としては、例えば、水添アクリロニトリ
ル−ブタジエンゴム、アクリル酸、アクリル酸エステ
ル、スチレン、メタクリル酸等があげられ、なかでも、
金属、プラスチックとの接着力に優れる等の点で、アク
リル酸、メタクリル酸が好適である。すなわち、アクリ
ロニトリル−ブタジエン−メタクリル酸共重合体、アク
リロニトリル−ブタジエン−アクリル酸共重合体が好適
に用いられる。また、上記ＮＢＲにおけるアクリロニト
リルの含有量は、１０〜５０重量％が好ましく、なかで
も、１５〜４０重量％のものが特に好適である。The rubber used together with the thermosetting resin is not particularly limited, but is preferably an acrylonitrile-butadiene copolymer. The acrylonitrile-butadiene copolymer includes not only the case where the content of the acrylonitrile-butadiene copolymer (NBR) is 100% by weight but also the case where the NBR contains other copolymer components. Refers to a copolymer in a broad sense.
As other copolymerization components, for example, hydrogenated acrylonitrile-butadiene rubber, acrylic acid, acrylate, styrene, methacrylic acid, etc., among others,
Acrylic acid and methacrylic acid are preferred in that they have excellent adhesion to metals and plastics. That is, an acrylonitrile-butadiene-methacrylic acid copolymer and an acrylonitrile-butadiene-acrylic acid copolymer are preferably used. The content of acrylonitrile in the NBR is preferably 10 to 50% by weight, and particularly preferably 15 to 40% by weight.
【００２１】接着剤の材料である接着剤組成物における
ゴムの配合割合は、特に２〜６０重量％の範囲が好まし
く、なかでも３〜５０重量％の範囲が好適である。すな
わち、ゴムの配合割合が２重量％未満であると、半導体
素子の接着用途において、冷熱サイクル下、高温高湿下
の各ストレス試験において、優れた耐久性を発揮するこ
とが困難であり、６０重量％を超えると、高温下での固
着力が低下する傾向がみられるからである。The compounding ratio of rubber in the adhesive composition, which is the material of the adhesive, is preferably in the range of 2 to 60% by weight, more preferably 3 to 50% by weight. That is, when the compounding ratio of the rubber is less than 2% by weight, it is difficult to exhibit excellent durability in a stress test under a high-temperature and high-humidity cycle under a thermal cycle in a bonding application of a semiconductor element. If the content is more than 10% by weight, there is a tendency that the fixing force under high temperature tends to decrease.
【００２２】また、接着剤組成物には、熱硬化性樹脂の
硬化剤を配合することができる。このような硬化剤とし
ては、特に限定するものではなく、通常用いられている
各種硬化剤、例えば、フェノール樹脂、メチルヘキサヒ
ドロ無水フタル酸等の酸無水物、アミン化合物等があげ
られ、信頼性の点から、特にフェノール樹脂が好適に用
いられる。なかでも、接着性等の点から、ノボラック型
フェノール樹脂を用いることがより好ましい。そして、
より一層良好な接着力、吸湿性等の点から、特に下記の
一般式（２）で表されるフェノール樹脂を用いることが
好適である。Further, a curing agent for a thermosetting resin can be added to the adhesive composition. Such a curing agent is not particularly limited, and includes various commonly used curing agents, for example, phenol resins, acid anhydrides such as methylhexahydrophthalic anhydride, amine compounds, and the like. In this respect, a phenol resin is particularly preferably used. Among them, it is more preferable to use a novolak type phenol resin from the viewpoint of adhesiveness and the like. And
From the viewpoints of better adhesion, hygroscopicity and the like, it is particularly preferable to use a phenol resin represented by the following general formula (2).
【００２３】[0023]
【化５】 Embedded image
【００２４】上記一般式（２）中の繰り返し数ｍは、０
または正の整数を示すが、特にｍは０〜１０の整数であ
ることが好ましく、なかでもｍは０〜８の整数であるこ
とがより好適である。The number of repetitions m in the general formula (2) is 0
Or a positive integer, m is particularly preferably an integer of 0 to 10, and more preferably, m is an integer of 0 to 8;
【００２５】上記一般式（２）で表されるフェノール樹
脂は、例えば、アラルキルエーテルとフェノールとを、
フリーデルクラフツ触媒で反応させることにより得られ
る。The phenolic resin represented by the general formula (2) is, for example, an aralkyl ether and phenol,
It is obtained by reacting with a Friedel Crafts catalyst.
【００２６】上記フェノール樹脂としては、特に、水酸
基当量が１４７〜２５０ｇ／ｅｑ、軟化点が６０〜１２
０℃のものが好ましく、なかでも、水酸基当量が１４７
〜２２０ｇ／ｅｑ、軟化点が６０〜１１０℃のものが好
適である。Particularly, the phenol resin has a hydroxyl equivalent of 147 to 250 g / eq and a softening point of 60 to 12 g / eq.
The thing of 0 degreeC is preferable, and especially, a hydroxyl equivalent is 147.
Those having a softening point of from 60 to 110 ° C. are suitable.
【００２７】上記フェノール樹脂のビフェニル型エポキ
シ樹脂に対する配合割合は、ビフェニル型エポキシ樹脂
中のエポキシ基１当量当たり、上記フェノール樹脂中の
水酸基が０．７〜１．３当量となるように配合すること
が好適であり、なかでも０．９〜１．１当量となるよう
に配合することがより好適である。The compounding ratio of the phenol resin to the biphenyl type epoxy resin is such that the hydroxyl groups in the phenol resin are 0.7 to 1.3 equivalents per equivalent of epoxy group in the biphenyl type epoxy resin. Is more preferable, and it is more preferable to mix them so as to be 0.9 to 1.1 equivalents.
【００２８】接着剤組成物には、熱硬化性樹脂の硬化剤
の他に、さらに硬化促進剤を配合することもできる。こ
のような硬化促進剤としては、従来からエポキシ樹脂の
硬化促進剤として知られている種々の硬化促進剤が使用
可能であり、例えば、アミン系、リン系、ホウ素系、リ
ン−ホウ素系等の硬化促進剤があげられる。なかでも、
トリフェニルホスフィン、ジアザビシクロウンデセン等
が好適である。これらは単独でもしくは２種以上併せて
用いられる。The adhesive composition may further include a curing accelerator in addition to the curing agent for the thermosetting resin. As such a curing accelerator, various curing accelerators conventionally known as epoxy resin curing accelerators can be used, for example, amine-based, phosphorus-based, boron-based, phosphorus-boron-based and the like. Curing accelerators. Above all,
Triphenylphosphine, diazabicycloundecene and the like are preferred. These may be used alone or in combination of two or more.
【００２９】なお、上記接着剤組成物には、必要に応じ
て他の材料（有機材料、無機材料）を適宜配合すること
もできる。上記有機材料としては、シランカップリング
剤、チタンカップリング剤、表面調整剤、酸化防止剤等
があげられ、無機材料としては、アルミナ、シリカ、窒
化珪素等の各種無機質充填剤、銅、銀、アルミニウム、
ニッケル、半田等の金属粒子、その他、顔料、染料等が
あげられる。上記無機材料の配合割合は、特に限定され
るものではないが、全配合物（接着剤組成物全体）中の
８５重量％以下に設定することが好ましく、より好まし
くは８０重量％以下である。すなわち、上記配合割合を
超えて多量に配合すると、半導体素子の電極と配線回路
基板の電極との電気的接合が良好に行われなくなり、不
都合が生じ易くなるからである。It should be noted that other materials (organic materials and inorganic materials) can be appropriately added to the adhesive composition as needed. Examples of the organic material include a silane coupling agent, a titanium coupling agent, a surface conditioner, and an antioxidant. Examples of the inorganic material include alumina, silica, various inorganic fillers such as silicon nitride, copper, silver, and the like. aluminum,
Examples include metal particles such as nickel and solder, as well as pigments and dyes. The mixing ratio of the inorganic material is not particularly limited, but is preferably set to 85% by weight or less, more preferably 80% by weight or less in the whole composition (the whole adhesive composition). That is, if the amount is larger than the above-mentioned compounding ratio, the electrical connection between the electrode of the semiconductor element and the electrode of the printed circuit board will not be performed well, and problems will easily occur.
【００３０】本発明の接着シートは、例えば、つぎのよ
うにして製造することができる。まず、前記熱硬化性樹
脂およびゴムを所定量配合し、これに必要に応じて各種
成分、例えば、硬化剤、硬化促進剤、各種充填剤等を所
定量配合して接着剤組成物を調製する。そして、この接
着剤組成物を、トルエン、メチルエチルケトン、酢酸エ
チル等の溶剤に混合溶解し、この混合溶液を離型処理し
たポリエステルフィルム等の基材フィルム上に塗布す
る。つぎに、これを加熱して溶剤を除去することによ
り、上記基材フィルム上にシート状接着材料を形成する
ことができる。また、他の方法として、トルエン等の溶
剤を用いることなく、上記接着剤組成物を加熱溶融押し
出しすることによっても、シート状接着材料を形成する
ことができる。そして、このようにして得たシート状接
着材料を加熱加圧してＰＴＦＥ等からなるシート状多孔
質基材の両面にラミネートすれば、図１に示した接着シ
ートを製造できる。なお、ラミネートする際の加熱加圧
条件は、例えば、温度５０〜１６０℃、圧力０．１〜１
０ｋｇ／ｃｍ2 に設定できる。また、シート状多孔質基
材を上記溶液中に浸漬して引き上げ、ついで、加熱して
溶剤を除去すれば、図２に示す接着シートを製造でき
る。The adhesive sheet of the present invention can be manufactured, for example, as follows. First, a predetermined amount of the thermosetting resin and rubber is blended, and if necessary, various components such as a curing agent, a curing accelerator, and various fillers are blended in a predetermined amount to prepare an adhesive composition. . Then, the adhesive composition is mixed and dissolved in a solvent such as toluene, methyl ethyl ketone, or ethyl acetate, and the mixed solution is applied on a base film such as a polyester film subjected to a release treatment. Next, by heating this to remove the solvent, a sheet-like adhesive material can be formed on the base film. Further, as another method, the sheet-like adhesive material can also be formed by extruding the adhesive composition by heating and melting without using a solvent such as toluene. Then, if the sheet-like adhesive material thus obtained is heated and pressed to be laminated on both sides of a sheet-like porous substrate made of PTFE or the like, the adhesive sheet shown in FIG. 1 can be manufactured. The heating and pressurizing conditions for laminating are, for example, a temperature of 50 to 160 ° C and a pressure of 0.1 to 1.
It can be set to 0 kg / cm 2 . Further, if the sheet-like porous substrate is immersed in the above solution and pulled up, and then heated to remove the solvent, the adhesive sheet shown in FIG. 2 can be manufactured.
【００３１】このようにして得られた本発明の接着シー
トは、接着剤を硬化させた後の引張弾性率が３００〜１
５０００ＭＰａの範囲のものである。接着剤の硬化は、
例えば、温度１００〜２２５℃で３〜３００分間加熱す
ることにより行うことができる。なお、硬化に際しては
加圧してもよく、このときの圧力は０．５〜５０ｋｇ／
ｃｍ2 に設定できる。なかでも、半導体素子の接着用途
において、配線回路基板と半導体素子にかかる応力をバ
ランスよく緩和できる点で、上記引張弾性率は１０００
〜１００００ＭＰａの範囲に設定することが好ましい。
なお、上記引張弾性率は、ＪＩＳ Ｋ ６９００に準じ
て測定される値であって、具体的には、万能引張試験機
（オートグラフ、島津製作所製）によって測定される。The adhesive sheet of the present invention thus obtained has a tensile modulus of 300 to 1 after the adhesive is cured.
It is in the range of 5000 MPa. The curing of the adhesive
For example, it can be performed by heating at a temperature of 100 to 225 ° C. for 3 to 300 minutes. In addition, you may pressurize at the time of hardening, and the pressure at this time is 0.5 to 50 kg /.
cm 2 can be set. Above all, the tensile elastic modulus is 1000 in that the stress applied to the printed circuit board and the semiconductor element can be alleviated in a well-balanced manner in the bonding application of the semiconductor element.
It is preferable to set in the range of 1 to 10000 MPa.
The tensile modulus is a value measured according to JIS K 6900, and is specifically measured by a universal tensile tester (Autograph, manufactured by Shimadzu Corporation).
【００３２】そして、本発明の半導体装置は、配線回路
基板上に半導体素子が搭載され、この半導体素子が樹脂
封止され、かつ、上記配線回路基板と半導体素子との間
に本発明の接着シートからなる硬化物層が形成された構
成であれば、特に限定するものではない。本発明の半導
体装置は、例えば図３に示すように、配線回路基板７上
に接着シート３からなる硬化物層３′を介して半導体素
子４が載置され、ワイヤーボンディング５により半導体
素子４と配線回路基板７とが電気的に接続されて構成さ
れている。なお、図３において、６は封止樹脂、８は配
線回路基板７に取り付けられた半田ボールである。In the semiconductor device of the present invention, a semiconductor element is mounted on a printed circuit board, the semiconductor element is sealed with a resin, and the adhesive sheet of the present invention is provided between the printed circuit board and the semiconductor element. The configuration is not particularly limited as long as a cured product layer made of In the semiconductor device of the present invention, for example, as shown in FIG. 3, a semiconductor element 4 is placed on a printed circuit board 7 via a cured product layer 3 ′ made of an adhesive sheet 3, and is connected to the semiconductor element 4 by wire bonding 5. The printed circuit board 7 is electrically connected. In FIG. 3, reference numeral 6 denotes a sealing resin, and 8 denotes a solder ball attached to the printed circuit board 7.
【００３３】上記配線回路基板７の材質としては、特に
限定するものではないが、セラミック基板、プラスチッ
ク基板等があげられる。上記プラスチック基板として
は、例えば、エポキシガラス基板、ビスマレイミドトリ
アジン基板、ポリフェニレンエーテル基板等があげられ
る。The material of the printed circuit board 7 is not particularly limited, and examples thereof include a ceramic substrate and a plastic substrate. Examples of the plastic substrate include an epoxy glass substrate, a bismaleimide triazine substrate, and a polyphenylene ether substrate.
【００３４】図３に示した本発明の半導体装置は、例え
ばつぎのようにして製造することができる。すなわち、
まず、配線回路基板７上に接着シート３を載置し、その
上に半導体素子４を載置した後、上記接着シート３を所
定の条件で加熱硬化させ硬化物層３′を形成することに
より配線回路基板７と半導体素子４とを接着する。続い
て、ワイヤーボンディング５により、半導体素子４と配
線回路基板７とを電気的に接続した後、封止材料を用い
て封止樹脂６を形成することにより樹脂封止する。そし
て、上記配線回路基板７の裏面に半田ボール８を取り付
けることにより、目的とする半導体装置を製造すること
ができる。The semiconductor device of the present invention shown in FIG. 3 can be manufactured, for example, as follows. That is,
First, the adhesive sheet 3 is placed on the printed circuit board 7, the semiconductor element 4 is placed thereon, and then the adhesive sheet 3 is heated and cured under predetermined conditions to form a cured product layer 3 '. The printed circuit board 7 and the semiconductor element 4 are bonded. Subsequently, after the semiconductor element 4 and the wiring circuit board 7 are electrically connected by wire bonding 5, the resin is sealed by forming a sealing resin 6 using a sealing material. Then, by attaching the solder balls 8 to the back surface of the printed circuit board 7, a target semiconductor device can be manufactured.
【００３５】つぎに、実施例について比較例と併せて説
明する。Next, examples will be described together with comparative examples.
【００３６】まず、実施例および比較例に先立って、下
記に示す各成分を準備した。First, prior to Examples and Comparative Examples, the following components were prepared.
【００３７】〔エポキシ樹脂＊１〕下記の構造式で表さ
れるビフェニル型エポキシ樹脂（エポキシ当量１９５ｇ
／ｅｑ、軟化点１０５℃）[Epoxy resin * 1] A biphenyl type epoxy resin represented by the following structural formula (epoxy equivalent: 195 g)
/ Eq, softening point 105 ° C)
【化６】 Embedded image
【００３８】〔エポキシ樹脂＊２〕クレゾールノボラッ
ク型エポキシ樹脂（エポキシ当量１９５ｇ／ｅｑ、軟化
点８０℃）[Epoxy resin * 2] Cresol novolak type epoxy resin (epoxy equivalent: 195 g / eq, softening point: 80 ° C.)
【００３９】〔エポキシ樹脂＊３〕スミエポキシ ＬＤ
Ｘ−４１２７、住友化学工業株式会社製（エポキシ当量
３９５ｇ／ｅｑ）[Epoxy resin * 3] Sumiepoxy LD
X-4127, manufactured by Sumitomo Chemical Co., Ltd. (epoxy equivalent: 395 g / eq)
【００４０】〔硬化剤＊４〕下記の構造式で表されるフ
ェノール樹脂（水酸基当量１７５ｇ／ｅｑ、軟化点７５
℃）[Curing agent * 4] A phenol resin represented by the following structural formula (hydroxyl equivalent: 175 g / eq, softening point: 75)
℃)
【化７】 Embedded image
【００４１】〔硬化剤＊５〕フェノールノボラック樹脂
（水酸基当量１０５ｇ／ｅｑ、軟化点６０℃）[Curing agent * 5] Phenol novolak resin (hydroxyl equivalent 105 g / eq, softening point 60 ° C.)
【００４２】〔硬化剤＊６〕フェノール樹脂 ＰＰ−７
００−３００、日本石油化学株式会社製（水酸基当量３
２０ｇ／ｅｑ）[Curing agent * 6] Phenol resin PP-7
00-300, manufactured by Nippon Petrochemical Co., Ltd. (hydroxyl equivalent 3
20g / eq)
【００４３】〔アクリロニトリル−ブタジエン−メタク
リル酸共重合体〕ムーニー粘度５０、アクリロニトリル
成分３０重量％、カルボキシル基量０．０５ｅｐｈｒ
（ゴム１００ｇ当たりのモル数）[Acrylonitrile-butadiene-methacrylic acid copolymer] Mooney viscosity 50, acrylonitrile component 30% by weight, carboxyl group content 0.05 ephr
(Moles per 100 g of rubber)
【００４４】[0044]
【実施例１〜５、比較例１〜４】各成分を表１および表
２に示す割合で配合し、接着剤組成物を調製した。この
接着剤組成物をトルエンに混合溶解し、この混合溶液を
離型処理したポリエステルフィルム上に塗布した。つぎ
に、１２０℃に加熱してトルエンを除去することによ
り、上記ポリエステルフィルム上に厚み５０μｍのシー
ト状接着材料を形成した。そして、このシート状接着材
料をＰＴＦＥ多孔質基材（厚み１５０μｍ、気孔率８０
％、微孔の孔径０．５μｍ）の両面に、温度９０℃、圧
力０．５ｋｇ／ｃｍ2 の条件で１分間加熱加圧してラミ
ネートすることにより、図１と同構造の接着シートを製
造した。Examples 1 to 5 and Comparative Examples 1 to 4 The components were blended in the proportions shown in Tables 1 and 2 to prepare adhesive compositions. This adhesive composition was mixed and dissolved in toluene, and this mixed solution was applied on a polyester film subjected to a release treatment. Next, a sheet-like adhesive material having a thickness of 50 μm was formed on the polyester film by removing the toluene by heating to 120 ° C. Then, this sheet-shaped adhesive material is coated with a PTFE porous substrate (thickness 150 μm, porosity 80).
%, With a pressure of 0.5 kg / cm 2 for 1 minute, and laminated on both sides of a micropore having a pore diameter of 0.5 μm) to produce an adhesive sheet having the same structure as that of FIG. .
【００４５】ついで、各実施例および比較例の接着シー
トを用い、前述の製法に従って半導体装置を製造した。
すなわち、図３に示すように、配線回路基板７（厚み１
ｍｍのガラスエポキシ基板）上に、上記接着シート３
（厚み２５０μｍ、大きさ１３ｍｍ×９ｍｍ）を載置
し、その上に半導体素子４（厚み３５０μｍ、大きさ１
３ｍｍ×９ｍｍ）を載置した後、温度１５０℃、圧力１
０ｋｇ／ｃｍ2 の条件で６０分間加熱加圧して硬化させ
て硬化物層３′を形成することにより、配線回路基板７
と半導体素子４とを接着した。続いて、ワイヤーボンデ
ィング５により、半導体素子４と配線回路基板７とを電
気的に接続した後、封止樹脂６を用いて樹脂封止した。
そして、上記配線回路基板７に半田ボール８を取り付け
ることにより、目的とする半導体装置を製造した。Then, using the adhesive sheets of the respective examples and comparative examples, semiconductor devices were manufactured according to the above-described manufacturing method.
That is, as shown in FIG.
mm) on the glass epoxy substrate).
(Thickness: 250 μm, size: 13 mm × 9 mm), and a semiconductor element 4 (thickness: 350 μm, size: 1
3mm x 9mm), temperature 150 ° C, pressure 1
By applying heat and pressure for 60 minutes under the condition of 0 kg / cm 2 and curing to form a cured material layer 3 ′, the printed circuit board 7
And the semiconductor element 4 were bonded. Subsequently, the semiconductor element 4 and the printed circuit board 7 were electrically connected by wire bonding 5 and then resin-sealed using a sealing resin 6.
Then, the intended semiconductor device was manufactured by attaching the solder balls 8 to the printed circuit board 7.
【００４６】[0046]
【表１】 [Table 1]
【００４７】[0047]
【表２】 [Table 2]
【００４８】このようにして得られた各実施例，比較例
の接着シートおよび各半導体装置を用いて、引張弾性
率、チップ反り変形量、チップクラックおよび打抜き貼
りつけ時の位置ずれ量を、下記に示す方法に従い測定し
た。これらの結果を、後記の表３および表４に併せて示
した。Using the thus obtained adhesive sheets of Examples and Comparative Examples and the respective semiconductor devices, the tensile elasticity, the amount of chip warpage, the amount of chip cracks and the amount of misalignment at the time of punching and sticking were determined as follows. The measurement was performed according to the method described in (1). These results are shown in Tables 3 and 4 below.
【００４９】〔引張弾性率〕接着シートを温度１５０℃
で６０分間加熱して硬化させ、シート状硬化物を得た。
このシート状硬化物の２５℃における引張弾性率を、Ｊ
ＩＳ Ｋ７１１３に準じて測定した。なお、測定には万
能引張試験機（オートグラフ、島津製作所製）を用い
た。[Tensile modulus] The adhesive sheet was heated to a temperature of 150 ° C.
And cured for 60 minutes to obtain a sheet-shaped cured product.
The tensile modulus at 25 ° C. of the cured sheet is expressed by J
It was measured according to IS K7113. Note that a universal tensile tester (Autograph, manufactured by Shimadzu Corporation) was used for the measurement.
【００５０】〔チップ反り変形量〕１０ｍｍ×１０ｍｍ
の大きさのシリコーンチップに各接着シートを１００℃
×１０秒で仮固着し、その時のレベルを０とする。つい
で、１５０℃×６０分キュアして、完全に硬化接着した
ときの中央部と端部の高さの差を測定し、これをチップ
反り変形量とした。[Amount of chip warpage deformation] 10 mm × 10 mm
100 ° C each adhesive sheet on silicone chip of size
Temporarily fixed in 10 seconds, and the level at that time is set to 0. Then, curing was performed at 150 ° C. for 60 minutes, and the difference in height between the center and the end when completely cured and bonded was measured, and this was defined as the amount of chip warpage deformation.
【００５１】〔チップクラック〕半導体装置を各例４個
ずつ用いて、サーマルショックテスト〔ＴＳＴ試験（条
件：−５０℃×５分⇔１２５℃×５分）５００サイクル
を行い、半導体チップのクラックの有無検査を行った。[Chip Crack] Using four semiconductor devices in each example, a thermal shock test [TST test (conditions: -50 ° C. × 5 minutes⇔125 ° C. × 5 minutes) 500 cycles] A presence test was performed.
【００５２】〔打抜き貼りつけ時の位置ずれ量〕接着シ
ートを１０ｍｍ×１０ｍｍの大きさに打抜き、これを１
０ｍｍ×１０ｍｍの大きさのシリコーンチップに貼りつ
け、１５０℃×６０分の条件で加熱して接着させた時の
収縮した位置のずれ量を測定した。[Position shift during punching and pasting] The adhesive sheet was punched into a size of 10 mm x 10 mm,
It was attached to a silicone chip having a size of 0 mm × 10 mm, and the amount of displacement of the contracted position when bonded by heating at 150 ° C. × 60 minutes was measured.
【００５３】[0053]
【表３】 [Table 3]
【００５４】[0054]
【表４】 [Table 4]
【００５５】上記表３および表４の結果から、実施例の
接着シートは、シート状硬化物の２５℃における引張弾
性率が３００〜１５０００ＭＰａの範囲に設定されてい
るため、実施例の接着シートを用いてなる半導体装置
は、チップクラックの発生がなく、チップ反り変形量お
よび打抜き貼りつけ時の位置ずれ量も小さいことがわか
る。これに対して、比較例１，３の接着シートは、シー
ト状硬化物の引張弾性率が３００ＭＰａ未満であるた
め、この接着シートを用いてなる半導体装置は、打抜き
貼りつけ時の位置ずれ量が大きいことがわかる。また、
比較例２，４の接着シートは、シート状硬化物の引張弾
性率が１５０００ＭＰａを超えるため、この接着シート
を用いてなる半導体装置は、チップ反り変形量が大き
く、チップクラックが発生することがわかる。From the results shown in Tables 3 and 4, the adhesive sheet of the example has a tensile modulus of elasticity at 25 ° C. in the range of 300 to 15000 MPa at 25 ° C. It can be seen that the semiconductor device used does not generate chip cracks, and has a small amount of chip warpage and a small amount of displacement during punching and bonding. On the other hand, in the adhesive sheets of Comparative Examples 1 and 3, the tensile elastic modulus of the cured sheet is less than 300 MPa. Therefore, the semiconductor device using this adhesive sheet has a misalignment amount at the time of punching and bonding. It turns out that it is big. Also,
Since the adhesive sheets of Comparative Examples 2 and 4 had a tensile modulus of elasticity of more than 15000 MPa, the semiconductor device using this adhesive sheet had a large amount of chip warpage and chip cracks. .
【００５６】[0056]
【発明の効果】以上のように、本発明の接着シートは、
２５℃における引張弾性率が３００〜１５０００ＭＰａ
であるため、半導体素子の接着用途において、半導体素
子と配線回路基板との間の熱応力を充分に緩和すること
ができる。そして、この接着シートを用いてなる半導体
装置は、電気接続部の信頼性に優れ、半導体チップまた
は半導体パッケージのクラックの発生を防止することが
できるという優れた効果を奏する。As described above, the adhesive sheet of the present invention
Tensile modulus at 25 ° C. is 300-15000 MPa
Therefore, in the bonding application of the semiconductor element, the thermal stress between the semiconductor element and the printed circuit board can be sufficiently reduced. The semiconductor device using this adhesive sheet has an excellent effect that the reliability of the electrical connection portion is excellent and the occurrence of cracks in the semiconductor chip or the semiconductor package can be prevented.
【図１】本発明の接着シートの一例を示す断面図であ
る。FIG. 1 is a sectional view showing an example of an adhesive sheet of the present invention.
【図２】本発明の接着シートの他の例を示す断面図であ
る。FIG. 2 is a sectional view showing another example of the adhesive sheet of the present invention.
【図３】本発明の接着シートを用いた半導体装置の一例
を示す断面図である。FIG. 3 is a cross-sectional view illustrating an example of a semiconductor device using the adhesive sheet of the present invention.
１ シート状多孔質基材 ２ 接着剤層 ３ 接着シート ３′接着シートからなる硬化物層 ４ 半導体素子 ６ 封止樹脂 ７ 配線回路基板 DESCRIPTION OF SYMBOLS 1 Sheet-shaped porous base material 2 Adhesive layer 3 Adhesive sheet 3 Cured material layer made of an adhesive sheet 4 Semiconductor element 6 Sealing resin 7 Wiring circuit board
Claims (9)
性率が３００〜１５０００ＭＰａであることを特徴とす
る接着シート。1. An adhesive sheet having a tensile modulus at 25 ° C. of 300 to 15000 MPa after curing.
請求項１記載の接着シート。2. The adhesive sheet according to claim 1, comprising a sheet-like porous substrate and an adhesive.
ロエチレンからなり、かつ、接着剤が熱硬化性樹脂およ
びゴムを必須成分とする接着剤組成物からなる請求項２
記載の接着シート。3. The sheet-like porous substrate is made of polytetrafluoroethylene, and the adhesive is made of an adhesive composition containing a thermosetting resin and rubber as essential components.
The adhesive sheet according to the above.
項３記載の接着シート。4. The adhesive sheet according to claim 3, wherein the thermosetting resin is an epoxy resin.
表されるビフェニル型エポキシ樹脂である請求項４記載
の接着シート。 【化１】 5. The adhesive sheet according to claim 4, wherein the epoxy resin is a biphenyl type epoxy resin represented by the following general formula (1). Embedded image
共重合体、アクリロニトリル−ブタジエン−アクリル酸
共重合体およびアクリロニトリル−ブタジエン−メタク
リル酸共重合体からなる群から選ばれた少なくとも一つ
である請求項３〜５のいずれか一項に記載の接着シー
ト。6. The rubber according to claim 3, wherein the rubber is at least one selected from the group consisting of acrylonitrile-butadiene copolymer, acrylonitrile-butadiene-acrylic acid copolymer and acrylonitrile-butadiene-methacrylic acid copolymer. 6. The adhesive sheet according to any one of 5.
ある請求項３〜６のいずれか一項に記載の接着シート。7. The adhesive sheet according to claim 3, wherein the adhesive composition contains a curing agent.
るフェノール樹脂である請求項７記載の接着シート。 【化２】 8. The adhesive sheet according to claim 7, wherein the curing agent is a phenol resin represented by the following general formula (2). Embedded image
れ、この半導体素子が樹脂封止されてなる半導体装置で
あって、上記配線回路基板と半導体素子との間に、請求
項１〜８のいずれか一項に記載の接着シートからなる硬
化物層が形成されていることを特徴とする半導体装置。9. A semiconductor device in which a semiconductor element is mounted on a printed circuit board and the semiconductor element is sealed with a resin, wherein a semiconductor device is provided between the printed circuit board and the semiconductor element. A semiconductor device comprising a cured product layer made of the adhesive sheet according to any one of the preceding claims.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18771298A JP4049452B2 (en) | 1998-07-02 | 1998-07-02 | Adhesive sheet for semiconductor element and semiconductor device using the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP18771298A JP4049452B2 (en) | 1998-07-02 | 1998-07-02 | Adhesive sheet for semiconductor element and semiconductor device using the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2000017240A true JP2000017240A (en) | 2000-01-18 |
| JP4049452B2 JP4049452B2 (en) | 2008-02-20 |
Family
ID=16210861
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP18771298A Expired - Fee Related JP4049452B2 (en) | 1998-07-02 | 1998-07-02 | Adhesive sheet for semiconductor element and semiconductor device using the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP4049452B2 (en) |
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