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GB1363815A - Semiconductor device and method of producing same - Google Patents

Semiconductor device and method of producing same

Info

Publication number
GB1363815A
GB1363815A GB5102172A GB5102172A GB1363815A GB 1363815 A GB1363815 A GB 1363815A GB 5102172 A GB5102172 A GB 5102172A GB 5102172 A GB5102172 A GB 5102172A GB 1363815 A GB1363815 A GB 1363815A
Authority
GB
United Kingdom
Prior art keywords
layer
metallization
insulating layer
windows
top surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5102172A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tektronix Inc
Original Assignee
Tektronix Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tektronix Inc filed Critical Tektronix Inc
Publication of GB1363815A publication Critical patent/GB1363815A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)

Abstract

1363815 Semi-conductor devices TEKTRONIX Inc 6 Nov 1972 [6 Dec 1971] 51021/72 Heading H1K Deleterious steps in a second layer metallization 30 of a multi-layer interconnection arrangement for an integrated circuit are avoided by making the top surface of an upper insulating layer 29 carrying the metallization 30 substantially flat. This is achieved by depositing the first layer metallization 28 in aligned windows formed through first and second insulating layers 20, 26, the top surface of the first metallization layer 28 being substantially flush with that of the second insulating layer 26. Preferably the windows in the second insulating layer 26 are larger in area than the corresponding windows in the first insulating layer 20. Conventional SiO 2 photo-resist etching techniques are used to define the various windows.
GB5102172A 1971-12-06 1972-11-06 Semiconductor device and method of producing same Expired GB1363815A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US20480971A 1971-12-06 1971-12-06

Publications (1)

Publication Number Publication Date
GB1363815A true GB1363815A (en) 1974-08-21

Family

ID=22759521

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5102172A Expired GB1363815A (en) 1971-12-06 1972-11-06 Semiconductor device and method of producing same

Country Status (6)

Country Link
JP (1) JPS555699B2 (en)
CA (1) CA984061A (en)
DE (1) DE2259267A1 (en)
FR (1) FR2162657B1 (en)
GB (1) GB1363815A (en)
NL (1) NL7216472A (en)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4960870A (en) * 1972-10-16 1974-06-13
FR2284981A1 (en) * 1974-09-10 1976-04-09 Radiotechnique Compelec PROCESS FOR OBTAINING AN INTEGRATED SEMICONDUCTOR CIRCUIT
US4045594A (en) * 1975-12-31 1977-08-30 Ibm Corporation Planar insulation of conductive patterns by chemical vapor deposition and sputtering
JPS5425178A (en) * 1977-07-27 1979-02-24 Fujitsu Ltd Manufacture for semiconductor device

Also Published As

Publication number Publication date
DE2259267A1 (en) 1973-06-28
FR2162657B1 (en) 1977-07-22
NL7216472A (en) 1973-06-08
FR2162657A1 (en) 1973-07-20
CA984061A (en) 1976-02-17
JPS555699B2 (en) 1980-02-08
JPS4866381A (en) 1973-09-11

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Legal Events

Date Code Title Description
PS Patent sealed
PCNP Patent ceased through non-payment of renewal fee