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EP2537244A1 - Procédé pour faire fonctionner un circuit convertisseur ainsi que dispositif pour mettre en oeuvre le procédé - Google Patents

Procédé pour faire fonctionner un circuit convertisseur ainsi que dispositif pour mettre en oeuvre le procédé

Info

Publication number
EP2537244A1
EP2537244A1 EP11706261A EP11706261A EP2537244A1 EP 2537244 A1 EP2537244 A1 EP 2537244A1 EP 11706261 A EP11706261 A EP 11706261A EP 11706261 A EP11706261 A EP 11706261A EP 2537244 A1 EP2537244 A1 EP 2537244A1
Authority
EP
European Patent Office
Prior art keywords
converter system
partial converter
carrier signals
switching cells
switching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
EP11706261A
Other languages
German (de)
English (en)
Inventor
Manfred Winkelnkemper
Arthur Korn
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ABB Schweiz AG
Original Assignee
ABB Schweiz AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by ABB Schweiz AG filed Critical ABB Schweiz AG
Priority to EP11706261A priority Critical patent/EP2537244A1/fr
Publication of EP2537244A1 publication Critical patent/EP2537244A1/fr
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4835—Converters with outputs that each can have more than two voltages levels comprising two or more cells, each including a switchable capacitor, the capacitors having a nominal charge voltage which corresponds to a given fraction of the input voltage, and the capacitors being selectively connected in series to determine the instantaneous output voltage
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation

Definitions

  • the invention relates to the field of power electronics. It is based on a method for Berieb a converter circuit according to the preamble of the independent claims.
  • each phase component comprises a first and a second partial converter system and the partial converter systems are connected in series with one another.
  • the connection point of the two series-connected partial converter systems forms an output connection, for example for an electrical load.
  • Each subconverter system includes n bipolar switching cells, where n> 2 and the switching cells of a partial converter system are connected in series.
  • Each bipolar switching cell has controllable bidirectional power semiconductor switches with controlled unidirectional current-carrying direction and a capacitive energy store. In Fig. 1, each switching cell has two series-connected controllable bidirectional power semiconductor switches with controlled unidirectional
  • each switching cell it is also conceivable for each switching cell to have four controllable bidirectional power semiconductor switches connected in the manner of a bridge circuit with controlled unidirectional current-carrying direction and a capacitive energy store connected in parallel with the bridge circuit of the power semiconductor switches, as shown in FIG. 2.
  • the converter circuit according to FIG. 1 is suitable for converting a DC voltage into an AC voltage
  • the converter circuit according to FIG. 2 is suitable for converting an alternating voltage of a first amplitude and a first frequency into an AC voltage of a second amplitude and a second frequency.
  • each sub-converter system has an inductance in series with the series connection of the switching cells, as shown by way of example in FIGS. 1 and 2.
  • the voltage of the individual switching cells is selected so that the sum voltage of n switching cells of a partial converter system is equal to the total input DC voltage in the converter circuit of FIG. 1 or equal to the peak value of the AC voltage in the converter circuit of FIG.
  • An output AC voltage is generated by shifting the output terminal "up” and “down” with respect to the potential, while the sum voltage across the entire phase module (first and second subcircuit system) is always equal to the input side voltage.
  • n / 2 switching cells are switched on and n / 2 switching cells are switched off in both subcircuit systems.
  • the same statement applies.
  • the sum voltage of the capacitive energy storage of the n switching cells of a partial converter system is regulated to a desired value. It may happen that after some time, the voltages of the capacitive energy storage of the switching cells of a Sectionumrichtersystems deviate strongly, the sum voltage of the capacitive energy storage of n switching cells of the subcircuit system but remains constant. Due to the different voltages across the capacitive energy storage of the switching cells of a partial converter system, power differences or differences in energy consumption occur in the switching cells, which finally lead to a large current ripple in the currents through the partial converter systems with relatively small aforementioned inductances of the partial converter systems. which is in principle undesirable. FIG.
  • FIG 8 shows a time profile of a voltage across the capacitive energy store of a switching cell of the first partial converter system and a time profile of a voltage across the capacitive energy supply of another switching cell of the same partial converter system according to FIG. 1 or FIG. 2 according to the prior art, FIG shows how the two voltages differ more and more over time.
  • a method for operating a converter circuit which contributes to the balancing of the voltages on the capacitive energy stores of the switching cells of the partial converter systems, is specified in WO2008 / 086760 A1. Therein, depending on the current through the respective partial converter system, switching cells are selected whose capacitive energy stores are to be charged or discharged next and the power semiconductor switches are switched on or off accordingly, wherein the order of when which capacitive energy storage is charged or discharged becomes variable is.
  • carrier rotation ie the exchange of carrier signals
  • PD PWM methods PD, POD, APOD
  • APOD PD PWM methods
  • the carrier signals must be exchanged for two reasons. On the one hand, the exchange is necessary in the case that the reference signal is so much smaller than the full scale that at least the outer switch cells would not switch at all (see, for example, Fig. 11) A balancing of this switch cell is then not possible, since yes
  • the carrier signals must therefore be exchanged so that all switching cells are switched on the average, and the exchange is necessary if the switching cells actually connected are to be loaded uniformly. is the switching frequency of a cell from the slope and the amplitude of the reference signals dependent. For example, if it is a sinusoidal reference signal, then the reference signal remains at a reversal point (ie minimum or maximum) in a band for a relatively long time, while at zero crossing it is only very short in a band.
  • FIG. 12 shows this method using the example of the sawtooth-shaped carrier signals, associated sinusoidal reference signal and then resulting switching signals. Effectively results in a PWM method, which is completely identical to the so-called “phase shifted carrier” method (PS PWM method)
  • PS PWM method the switching cells are not assigned to the carrier bands but directly to the carrier signals.
  • a PS PWM method with triangular carrier signals in Fig.
  • a constant phase shift from each other by two carrier signals and an additional adjustable time shift of all carrier signals from a predetermined time is in "Performance Evaluation of Half-Bridge Cascaded Multiievei Converters Operated with Multicarrier Sinussoidal PWM Techniques", GS Konstantinou et al, ICIEA 25.05.2009 thus Furthermore, the publication in "Performance Evaluation of Half-Bridge Cascaded Multiievei Converters Operated with Multicarrier Sinussoidal PWM Techniques", GS Konstantinou et al, ICIEA 25.05.2009 also does not indicate that in each case two carrier signals have a constant phase shift to each other then the Assignment of at least two carrier signals to the switching cells is changed from a predetermined time.
  • GB 2 294 821 A specifies a method for operating a multilevel converter, in which method the carrier signals are likewise arranged one above the other. If the reference signal is small (see FIG. 19), then in GB 2 294 821 A, not all switching cells are switched. In this case, the output voltage according to FIG. 19 will only have five stages instead of the seven stages shown and thus the lowest current curve will become zero, i. the switching cell would be unbalanced.
  • the object of the invention is to provide a simplified and alternative method for operating a converter circuit that is further developed with respect to the state of the art, by means of which voltages on capacitors of switching cells of the partial converter systems of the converter circuit can be compensated or balanced.
  • the converter circuit has at least two phase components, each phase component comprises a first and a second partial converter system and for each phase component, the partial converter systems are connected to one another in series.
  • Each subcircuit system comprises n series switched bipolar switch cells, where n> 2, and each switch cell has controllable bidirectional power semiconductor switches with controlled unidirectional current carrying direction and a capacitive energy store.
  • the power semiconductor switches of each switching cell of the first partial converter system are controlled by means of an associated drive signal and the power semiconductor switches of the switching cells of the second partial converter system by means of an associated further drive signal.
  • the respective drive signal is formed from a periodic carrier signal assigned to each switching cell of the first partial converter system and a reference signal with respect to the voltage across the first partial converter system.
  • the respective further drive signal is formed from a periodic carrier signal assigned to each switching cell of the second partial converter system and a reference signal with respect to the voltage across the second partial converter system.
  • two carrier signals of the switching cells of the first partial converter system have a constant phase shift to each other, wherein the carrier signals of the switching cells of the first partial converter system are shifted from a predetermined time by an adjustable period of time.
  • the sequence of the control of the switching cells ie the switching sequence of the switching cells is also fixed in this alternative, both before the predetermined time and after the change of assignment of the carrier signals, whereby the order, when which capacitive energy storage is charged or discharged, is fixed.
  • two carrier signals of the switching cells of the first partial converter system always have a constant phase shift relative to one another, in which case the frequency of the carrier signals of the switching cells of the first partial converter system is changed from a predefinable time.
  • two carrier signals of the switching cells of the second partial converter system always have a constant phase shift relative to each other, wherein the frequency of the carrier signals of the switching cells of the second partial converter system is changed from a predeterminable time.
  • the change in the frequency of the carrier signals also causes the voltages on the capacitive energy stores of the switching cells of the partial converter systems to be advantageously compensated or balanced within the respective partial converter system.
  • the order of driving the switching cells, i. the switching sequence of the switching cells is also fixed in this alternative, both before the specifiable date and after the change of the frequency of the carrier signals, whereby the order of when which capacitive energy storage is charged or discharged, is fixed.
  • Fig. 5 shows a third time course of the carrier signals and the reference signal for
  • Fig. 7 shows a fifth time course of the carrier signals and the reference signal for
  • Fig. 8 is a time course of a voltage across the capacitive energy storage of a
  • Fig. 9 is a time course of a voltage across the capacitive energy storage of a
  • Fig. 11 Time course of sawtooth carrier signals, associated sinusoidal reference signal and resulting switching signals according to the prior art of "Performance Evaluation of Half-Bridge Cascaded Multilevel Converters Operated with Multicarrier Sinussoidal PWM Techniques", G. S. Konstantinou et al, ICIEA 25.05.2009 and
  • FIG. 12 Time course of sawtooth-shaped carrier signals, associated sinusoidal reference signal and resulting switching signals according to the carrie rotation method of the prior art of the "Performance Evaluation of Half-Bridge Cascaded Multilevel Converters Operated with Multicarrier Sinusoidal PWM Techniques", FIG. GS Konstantinou et al, ICIEA 25.05.2009.
  • each phase component 4 comprises a first and a second partial converter system 1, 2.
  • the partial converter systems 1, 2 are connected in series with each other.
  • Each subcircuit system 1, 2 generally comprises n series switched bipolar switching cells X.1 X.n; Y.1, Y.n, where n> 2 and each
  • Switching cell X.1, Xn; Y.1, Yn controllable bidirectional power semiconductor switch with controlled unidirectional current-carrying direction and a capacitive energy storage.
  • n 4 switching modes are shown by way of example. cells are shown. It is also possible that each partial converter system 1, 2 has an inductance in series with the series connection of the switching cells, as shown by way of example in FIG. 1 and FIG. 2 by way of example.
  • the respective controllable power semiconductor switch of the switching cells X.1, ..., Xn; Y.1, Yn of the partial converter systems 1, 2 is designed in particular as a turn-off thyristor (GTO) or as an integrated thyristor with a commutated drive electrode (IGCT), each having an antiparallel-connected diode.
  • GTO turn-off thyristor
  • IGCT commutated drive electrode
  • a controllable power semiconductor switch for example, as a power MOSFET with an additional antiparallel-connected diode or as a bipolar transistor with insulated gate electrode (IGBT) with additionally antiparallel-connected diode.
  • the power semiconductor switches of each switching cell X.1, Xn of the first partial converter system 1 by means of an associated drive signal S1.1, S1.n and the power semiconductor switch of each switching cell Y.1, Yn of the second partial converter system 2 by means of an associated further on - Control signal S2.1, ... S2.n controlled.
  • the respective control signal S1.1, S1.n is a assigned to each switching cell X.1, Xn of the first partial converter system 1 periodic carrier signal V T ii, V T1 n and a reference signal V ref, ui respect to the voltage U1 via the first sub-converter 1 formed.
  • FIG. 3 shows a time profile of the reference signal V ref, ui with respect to the voltage U1 across the first partial converter system 1.
  • the respective further drive signal S2.1, S2.n is from a periodic carrier signal V T2 1 , V T2.n assigned to each switching cell Y.1, Yn of the second partial converter system 2 and a reference signal V ref, U2 with respect to the voltage U2 formed over the second partial converter system 2.
  • V T2 1 periodic carrier signal
  • V T2.n assigned to each switching cell Y.1, Yn of the second partial converter system 2
  • V ref reference signal
  • U2 with respect to the voltage U2 formed over the second partial converter system 2.
  • all modulation methods based on carrier methods, such as the aforementioned pulse width modulation, but also space vector modulations or modulations with a hysteresis characteristic are conceivable for the formation of the respective drive signal S1.1, S n and the respective further drive signal S2.1, S2.n.
  • the carrier signals V T1 1 , V T1 n of the switching cells X.1, Xn of the first partial converter system 1 have a constant phase shift relative to each other, the carrier signals V T1 1 , V T1 n of the switching cells X.1, Xn of first subcircuit system 1 from a predetermined time t Z i be moved by an adjustable period of time.
  • FIG. 4 shows by way of example a second time profile of the carrier signals VT-U, V T 1.4 of the first partial converter system 1 for the switching cells X.1,..., X.4 of the first partial converter system 1 according to FIG. 1 or FIG represented, wherein the carrier signals V T i . i
  • FIG. 4 shows a temporal profile of the reference signal V ref, ui with respect to the voltage U1 across the first partial converter system 1.
  • V ref constant phase shift of two respective carrier signals V T .i, V T1.n ; V T 2.i, - - -, V T2 .n of the switching cells X.1, Xn; Y.1, Yn of the first or second partial converter system 1, 2 is a so-called "phase shifted carrier" method (PS PWM method), the time shift of the carrier signals V T , V T i, n , V T2 .
  • PS PWM method phase shifted carrier
  • the switch cells X.1, Xn; Y.1, Yn of the first and second partial converter system 1, 2 causes the voltages at the capacitive energy storage of the switching cells X.1, Xn; Y.1, Yn the partial converter systems 1, 2 within the respective partial converter system 1, 2 are advantageously balanced or balanced, respectively,
  • Y.1, Yn is both before the respective predeterminable time t Z i, t Z2 and after the displacement of the carrier signals V T1 1 , V T n ; V T2 1 , V T2 n by the respective adjustable period of time, whereby the order of when which capacitive energy store is charged or discharged, is fixed.
  • V T i. n ; V T2 1 , V T2 . n was discharged after the effect described above, after the said time shift is now loaded.
  • V T i .i, V T i. n ; V T 2.i, V T 2. n is likewise counteracted in the same way as described above, so that a desired compensation or the balancing of the voltages UZ1.1, UZ1.n; UZ2.1, UZ2.n at the capacitive energy sources of the switching cells X.1, Xn; Y.1, Yn of the partial converter systems 1, 2 takes place.
  • V T1 n of the switching cells X.1, Xn of the first partial converter system 1 is preferably a multiple of the period of the current i1 predetermined by the first partial converter system 1.
  • V T2 n of the switching cells Y.1, Yn of the second partial converter system 2 a multiple of the period duration of the current i2 through the second partial converter system 2 is specified as the period duration.
  • the above-mentioned multiple of the period duration of the respective current i1, i2, by the associated partial converter system 1, 2 can generally be an integer multiple or a non-integer multiple.
  • V T1 . n of the switching cells X.1, Xn of the first partial converter system 1 have a constant phase shift to each other, in which case the assignment of at least two carrier signals V T1 1 V T1.n to the switching cells X.1, Xn of the first partial converter system 1 from a predetermined time t Z i is changed.
  • the change in the assignment of only two carrier signals at the time t Z i, t Z 2 advantageously has the effect that no so-called "spikes", ie large voltage jumps in the voltage at the output terminal of the phase module 4 due to an alternatively possible simultaneous change of the assignment of all carrier signals occur.
  • V T2.n to the switching cells X.1, ..., Xn; Y.1, ..., Yn, that the voltages at the capacitive energy stores of the switching cells X.1, Xn; Y.1, Yn of the partial converter systems 1, 2 are advantageously balanced or balanced within the respective partial converter system 1, 2.
  • the order of activation of the switching cells X.1, Xn; Y.1, Yn, ie the switching sequence of the switching cells .1 Xn; Y.1, Yn, is also in this alternative both before the specifiable time t z1 , t Z2 and after the change of the assignment of the carrier signals V T1 A , V T i. n ; V T2 1 , V T2 n , whereby the order of when which capacitive energy storage is charged or discharged, is fixed.
  • Xn of the first partial converter system 1 takes place from the predeterminable time t z1 periodically with a predefinable period T1. Furthermore, the change takes place, the assignment of the carrier signals V T2 1 , V T 2. n to the switching cells Y.1, Yn of the second partial converter system 2 from the predetermined time t Z2 also periodically with a predetermined period period T2.
  • the aforementioned periodic change of the assignment of the carrier signals of the carrier signals V T i .i, V T1 V T2 .i, V T2 . n to the switching cells X.1, ..., ⁇ . ⁇ ; Y.1, Yn of the associated partial converter system 1, 2 can be implemented, for example, very easily by software in the aforementioned modulation methods.
  • a multiple of the period of the current i1 is predetermined by the first partial converter system 1.
  • a multiple of the period duration of the current i2 by the second partial converter system 2 is specified.
  • the change of the assignment of the carrier signals V T1 .i, V T i. n to the switching cells X.1, Xn of the first partial converter system 1 from the predetermined time t Z i also be aperiodic.
  • the change in the assignment of the carrier signals V T2 .i, V T2.n to the switching cells Y.1, Yn of the second partial converter system 2 from the predeterminable time t Z2 also take place aperiodically.
  • n of the switching cells X.1, Xn of the first partial converter system 1 is changed from a predetermined time t z .
  • two carrier signals V T2 1 , V T2.n of the switching cells Y.1, Yn of the second partial converter system 2 have a constant phase shift relative to one another, wherein the frequency of the carrier signals V T2 , V T2 .n of the switching cells Y .1, Yn of the second partial converter system 2 is changed from a predeterminable time t Z2 .
  • n causes the voltages at the capacitive energy storage of the switching cells X.1, ..., Xn; Y.1, Yn of the partial converter systems 1, 2 are advantageously balanced or balanced within the respective partial converter system 1, 2.
  • the order of activation of the switching cells X.1, Xn; Y.1, Yn, ie the switching sequence of the switching cells X.1, ..., ⁇ . ⁇ ; Y.1, Yn, is also in this alternative both before the specifiable time t z1 , t Z2 and after the change of the frequency of the carrier signals Vn.i, ⁇ .., V T i.
  • the change of the frequency of the carrier signals V T2 .i, V T2 n of the switching cells Y.1, Yn of the second partial converter system 2 from the predetermined time t Z2 also takes place periodically with a predetermined period T2.
  • V T 2.i, V T2 .n can be implemented very easily by software in the aforementioned modulation methods.
  • the period T1 of the change frequency of the carrier signals V T 1 , V T i. n of the switching cells X.1, Xn of the first partial converter system 1 is then given a multiple of the period of the current i1 by the first partial converter system 1, and as the period T2 of the change frequency of the carrier signals V T2 1 , V T2 n of the switching cells Y.1, Yn of the second partial converter system 2, a multiple of the period of the current i2 is set by the second partial converter system 2.
  • V T i. n V T2 .i, V T2 n can be the change of the frequency of the carrier signals Vn.i,
  • V T1 n of the switching cells X.1, Xn of the first partial converter system 1 also take place aperiodically from the specifiable time t z1 .
  • the change of the frequency of the carrier signals V T2 , V T2 n of the switching cells Y.1, Yn of the second partial converter system 2 from the predeterminable time t Z2 also take place aperiodically.
  • FIG. 9 shows, by way of example, a time profile of a voltage U Z1 1 on the capacitive energy store of the switching cell X.1 of the first partial converter system 1 and a time profile of a voltage U Z1 2 on the capacitive energy store of the further switching cell X.2 of the same partial converter system 1 according to FIG.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)

Abstract

L'invention concerne un procédé pour faire fonctionner un circuit convertisseur, ce dernier présentant au moins deux composants de phase (4). Chaque composant de phase (4) présente un premier et un deuxième système convertisseur partiel (1, 2) et, pour chaque composant de phase (4), les systèmes convertisseurs partiels (1, 2) sont reliés en série l'un à l'autre, chaque système convertisseur partiel (1, 2) comprenant plusieurs cellules de commutation (X.1,..., X.n; Y.1,..., Y.n) bipolaires connectées en série. Selon ce procédé les signaux de commande (S1.1,..., S1.n; S2.1,..., S2.n) pour les cellules de commutation (X.1,..., X.n; Y.1,..., Y.n) sont formées d'un signal porteur périodique (VT1.1,..., VT1.n;VT2.1,..., VT2.n) associé à chaque cellule de commutation (X.1,..., X.n; Y.1,..., Y.n) et d'un signal de référence (Vref, U1, Vref,U2), deux signaux porteurs (VT1.1,..., VT1.n;VT2.1,..., VT2 n) présentant toujours un décalage de phase constant l'un par rapport à l'autre. Les signaux porteurs (VT1.1,..., VT1.n;VT2.1,..., VT2.n) sont décalés d'une durée de temps réglable à partir d'un moment prédéfinissable (tZ1; tZ2) pour éviter une absorption d'énergie différente des cellules de commutation individuelles (X.1,..., X.n; Y.1,..., Y.n) qui pourraient conduire à des courants indésirables (i1, i2) dans le système convertisseur partiel (1, 2). En variante, l'association d'au moins deux signaux porteurs (VT1.1,..., VT1.n; VT2.1,..., VT2.n) aux cellules de commutation (X.1,..., X.n; Y.1,..., Y.n) est modifiée à partir d'un moment prédéfinissable (tZ1; tZ2). Comme autre variante, la fréquence des signaux porteurs (VT1.1,..., VT1.n; VT2.1,..., VT2.n) des cellules de commutation (X.1 X.n; Y.1,..., Y.n) est modifiée à partir d'un moment prédéfinissable (tz1; tZ2).
EP11706261A 2010-03-10 2011-03-03 Procédé pour faire fonctionner un circuit convertisseur ainsi que dispositif pour mettre en oeuvre le procédé Withdrawn EP2537244A1 (fr)

Priority Applications (1)

Application Number Priority Date Filing Date Title
EP11706261A EP2537244A1 (fr) 2010-03-10 2011-03-03 Procédé pour faire fonctionner un circuit convertisseur ainsi que dispositif pour mettre en oeuvre le procédé

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP10156096 2010-03-10
PCT/EP2011/053203 WO2011110472A1 (fr) 2010-03-10 2011-03-03 Procédé pour faire fonctionner un circuit convertisseur ainsi que dispositif pour mettre en oeuvre le procédé
EP11706261A EP2537244A1 (fr) 2010-03-10 2011-03-03 Procédé pour faire fonctionner un circuit convertisseur ainsi que dispositif pour mettre en oeuvre le procédé

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EP2537244A1 true EP2537244A1 (fr) 2012-12-26

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JP5775033B2 (ja) * 2012-07-11 2015-09-09 株式会社日立製作所 電圧型電力変換装置の制御装置及び制御方法
DE102013212426A1 (de) * 2013-06-27 2014-12-31 Siemens Aktiengesellschaft Umrichteranordnung mit parallel geschalteten Mehrstufen-Umrichtern sowie Verfahren zu deren Steuerung
CN105794099B (zh) * 2013-12-11 2019-05-14 Abb瑞士股份有限公司 电气转换器以及控制其的方法
CN105900328B (zh) * 2014-01-06 2018-11-06 东芝三菱电机产业系统株式会社 功率转换装置

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2294821A (en) 1994-11-04 1996-05-08 Gec Alsthom Ltd Multilevel converter
JP5247723B2 (ja) 2007-01-17 2013-07-24 シーメンス アクチエンゲゼルシヤフト マルチレベル電力変換器の相モジュールアームの制御方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See references of WO2011110472A1 *

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