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DE3485467D1 - Selbstpruefende rechnerschaltungsanordnung. - Google Patents

Selbstpruefende rechnerschaltungsanordnung.

Info

Publication number
DE3485467D1
DE3485467D1 DE8484102664T DE3485467T DE3485467D1 DE 3485467 D1 DE3485467 D1 DE 3485467D1 DE 8484102664 T DE8484102664 T DE 8484102664T DE 3485467 T DE3485467 T DE 3485467T DE 3485467 D1 DE3485467 D1 DE 3485467D1
Authority
DE
Germany
Prior art keywords
circuit
complete
functionally
halves
control unit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8484102664T
Other languages
English (en)
Inventor
Jack J Stiffler Jack Stiffler
Michael J Budwey
Nolan, Jr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sequoia Systems Inc
Original Assignee
Sequoia Systems Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sequoia Systems Inc filed Critical Sequoia Systems Inc
Application granted granted Critical
Publication of DE3485467D1 publication Critical patent/DE3485467D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1629—Error detection by comparing the output of redundant processing systems
    • G06F11/1633—Error detection by comparing the output of redundant processing systems using mutual exchange of the output between the redundant processing components
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1016—Error in accessing a memory location, i.e. addressing error
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G06F11/1012—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices using codes or arrangements adapted for a specific type of error
    • G06F11/1028—Adjacent errors, e.g. error in n-bit (n>1) wide storage units, i.e. package error

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Hardware Redundancy (AREA)
  • Detection And Correction Of Errors (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)
DE8484102664T 1983-03-21 1984-03-12 Selbstpruefende rechnerschaltungsanordnung. Expired - Fee Related DE3485467D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/477,536 US4541094A (en) 1983-03-21 1983-03-21 Self-checking computer circuitry

Publications (1)

Publication Number Publication Date
DE3485467D1 true DE3485467D1 (de) 1992-03-05

Family

ID=23896328

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8484102664T Expired - Fee Related DE3485467D1 (de) 1983-03-21 1984-03-12 Selbstpruefende rechnerschaltungsanordnung.

Country Status (7)

Country Link
US (1) US4541094A (de)
EP (1) EP0120384B1 (de)
JP (1) JPS59183437A (de)
AT (1) ATE72066T1 (de)
AU (1) AU580730B2 (de)
CA (1) CA1209268A (de)
DE (1) DE3485467D1 (de)

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US4739505A (en) * 1985-07-01 1988-04-19 Unisys Corp. IC chip error detecting and correcting apparatus with automatic self-checking of chip operation
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US5115499A (en) * 1986-05-14 1992-05-19 Sequoia Systems, Inc. Shared computer resource allocation system having apparatus for informing a requesting computer of the identity and busy/idle status of shared resources by command code
JPH0831049B2 (ja) * 1986-05-31 1996-03-27 日本電気株式会社 ロツクドプロセツサ方式
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US5185877A (en) * 1987-09-04 1993-02-09 Digital Equipment Corporation Protocol for transfer of DMA data
EP0306244B1 (de) * 1987-09-04 1995-06-21 Digital Equipment Corporation Fehlertolerantes Rechnersystem mit Fehler-Eingrenzung
EP0306211A3 (de) * 1987-09-04 1990-09-26 Digital Equipment Corporation Synchronisiertes Doppelrechnersystem
CA1320276C (en) * 1987-09-04 1993-07-13 William F. Bruckert Dual rail processors with error checking on i/o reads
US4907228A (en) * 1987-09-04 1990-03-06 Digital Equipment Corporation Dual-rail processor with error checking at single rail interfaces
AU616213B2 (en) * 1987-11-09 1991-10-24 Tandem Computers Incorporated Method and apparatus for synchronizing a plurality of processors
CA2003338A1 (en) * 1987-11-09 1990-06-09 Richard W. Cutts, Jr. Synchronization of fault-tolerant computer system having multiple processors
US5170401A (en) * 1988-06-02 1992-12-08 Rockwell International Corporation High integrity single transmission line communication system for critical aviation information
JPH0721769B2 (ja) * 1988-08-12 1995-03-08 日本電気株式会社 マイクロプロセッサの冗長構成による機能監視方式
US4965717A (en) * 1988-12-09 1990-10-23 Tandem Computers Incorporated Multiple processor system having shared memory with private-write capability
AU625293B2 (en) * 1988-12-09 1992-07-09 Tandem Computers Incorporated Synchronization of fault-tolerant computer system having multiple processors
US5068851A (en) * 1989-08-01 1991-11-26 Digital Equipment Corporation Apparatus and method for documenting faults in computing modules
US5048022A (en) * 1989-08-01 1991-09-10 Digital Equipment Corporation Memory device with transfer of ECC signals on time division multiplexed bidirectional lines
US5153881A (en) * 1989-08-01 1992-10-06 Digital Equipment Corporation Method of handling errors in software
US5068780A (en) * 1989-08-01 1991-11-26 Digital Equipment Corporation Method and apparatus for controlling initiation of bootstrap loading of an operating system in a computer system having first and second discrete computing zones
US5251227A (en) * 1989-08-01 1993-10-05 Digital Equipment Corporation Targeted resets in a data processor including a trace memory to store transactions
ATE139632T1 (de) * 1989-08-01 1996-07-15 Digital Equipment Corp Verfahren zur softwarefehlerbehandlung
US5163138A (en) * 1989-08-01 1992-11-10 Digital Equipment Corporation Protocol for read write transfers via switching logic by transmitting and retransmitting an address
US5065312A (en) * 1989-08-01 1991-11-12 Digital Equipment Corporation Method of converting unique data to system data
US5295258A (en) * 1989-12-22 1994-03-15 Tandem Computers Incorporated Fault-tolerant computer system with online recovery and reintegration of redundant components
US5317752A (en) * 1989-12-22 1994-05-31 Tandem Computers Incorporated Fault-tolerant computer system with auto-restart after power-fall
US5203004A (en) * 1990-01-08 1993-04-13 Tandem Computers Incorporated Multi-board system having electronic keying and preventing power to improperly connected plug-in board with improperly configured diode connections
JPH05128080A (ja) * 1991-10-14 1993-05-25 Mitsubishi Electric Corp 情報処理装置
US5838894A (en) 1992-12-17 1998-11-17 Tandem Computers Incorporated Logical, fail-functional, dual central processor units formed from three processor units
US5751932A (en) * 1992-12-17 1998-05-12 Tandem Computers Incorporated Fail-fast, fail-functional, fault-tolerant multiprocessor system
DE59410250D1 (de) * 1993-08-30 2003-04-10 Infineon Technologies Ag Prozessorschaltung mit Testeinrichtung
US5504859A (en) * 1993-11-09 1996-04-02 International Business Machines Corporation Data processor with enhanced error recovery
US5422837A (en) * 1993-12-14 1995-06-06 Bull Hn Information Systems Inc. Apparatus for detecting differences between double precision results produced by dual processing units operating in parallel
US5604754A (en) * 1995-02-27 1997-02-18 International Business Machines Corporation Validating the synchronization of lock step operated circuits
JP2001527713A (ja) * 1997-03-27 2001-12-25 エラン・シャルテレメンテ・ゲーエムベーハー・ウント・コンパニー・カーゲー 安全性指向の制御システム、ならびにこのシステムを運営する方法
US6173414B1 (en) * 1998-05-12 2001-01-09 Mcdonnell Douglas Corporation Systems and methods for reduced error detection latency using encoded data
US6393582B1 (en) 1998-12-10 2002-05-21 Compaq Computer Corporation Error self-checking and recovery using lock-step processor pair architecture
US6948092B2 (en) * 1998-12-10 2005-09-20 Hewlett-Packard Development Company, L.P. System recovery from errors for processor and associated components
FR2803057B1 (fr) * 1999-12-22 2002-11-29 Centre Nat Etd Spatiales Systeme informatique tolerant aux erreurs transitoires et procede de gestion dans un tel systeme
US6604177B1 (en) 2000-09-29 2003-08-05 Hewlett-Packard Development Company, L.P. Communication of dissimilar data between lock-stepped processors
DE60200213T2 (de) * 2002-04-06 2004-12-16 Agilent Technologies, Inc. (n.d.Ges.d.Staates Delaware), Palo Alto Elektrisches System zur Überprüfung der Kanäle in einem Kommunikationssystem
EP1588380B1 (de) * 2003-01-15 2009-03-04 Continental Teves AG & Co. oHG Verfahren zur erkennung und/oder korrektur von speicherzugriffsfehlern und elektronische schaltungsanordnung zur durchführung des verfahrens
JP2006178636A (ja) * 2004-12-21 2006-07-06 Nec Corp フォールトトレラントコンピュータ、およびその制御方法
US7444540B2 (en) * 2005-06-21 2008-10-28 Hewlett-Packard Development Company, L.P. Memory mirroring apparatus and method
JP2009087485A (ja) * 2007-10-01 2009-04-23 Elpida Memory Inc 半導体装置
US9607715B1 (en) 2016-06-03 2017-03-28 Apple Inc. Memory internal comparator testing system
US11424621B2 (en) 2020-01-28 2022-08-23 Qualcomm Incorporated Configurable redundant systems for safety critical applications

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US3476922A (en) * 1966-08-05 1969-11-04 Sperry Rand Corp Failure monitor for redundant channel systems
US3426922A (en) * 1967-04-07 1969-02-11 Dormont Allen Co Inc Order picking mechanism
GB1317714A (en) * 1971-01-28 1973-05-23 Ibm Data handling systems
CA1026850A (en) * 1973-09-24 1978-02-21 Smiths Industries Limited Dual, simultaneously operating control system with fault detection
SE397013B (sv) * 1976-12-17 1977-10-10 Ellemtel Utvecklings Ab Sett och anordning for att overfora datainformationer till tva parallellt arbetande datamaskindelar
US4358823A (en) * 1977-03-25 1982-11-09 Trw, Inc. Double redundant processor
US4270168A (en) * 1978-08-31 1981-05-26 United Technologies Corporation Selective disablement in fail-operational, fail-safe multi-computer control system
US4253144A (en) * 1978-12-21 1981-02-24 Burroughs Corporation Multi-processor communication network
US4245344A (en) * 1979-04-02 1981-01-13 Rockwell International Corporation Processing system with dual buses
US4486826A (en) * 1981-10-01 1984-12-04 Stratus Computer, Inc. Computer peripheral control apparatus

Also Published As

Publication number Publication date
EP0120384A2 (de) 1984-10-03
US4541094A (en) 1985-09-10
ATE72066T1 (de) 1992-02-15
AU2566084A (en) 1984-09-27
CA1209268A (en) 1986-08-05
JPS59183437A (ja) 1984-10-18
EP0120384A3 (en) 1988-01-07
JPH0430619B2 (de) 1992-05-22
AU580730B2 (en) 1989-02-02
EP0120384B1 (de) 1992-01-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee