CN218548366U - Plasma processing apparatus and HDP-CVD apparatus - Google Patents

Abstract

The present disclosure relates to semiconductor technologies, and more particularly to a plasma processing apparatus and an HDP-CVD apparatus. The plasma processing device comprises an electrostatic chuck and a focusing ring structure, wherein a wafer setting area which is coaxial with the electrostatic chuck is arranged above the electrostatic chuck and used for placing a wafer, and the outer periphery of the wafer setting area is arranged to protrude out of the outer peripheral side wall of the electrostatic chuck; the focusing ring structure comprises a first ring body part and a protruding part protruding out of the upper surface of the first ring body part, the protruding part is arranged around the outer periphery of the wafer arrangement area, the first ring body part is arranged around the outer peripheral side wall of the electrostatic chuck, and a first gap is reserved between the bottom surface of the outer periphery of the wafer arrangement area and the upper surface of the first ring body part. The plasma processing device and the HDP-CVD equipment solve the technical problems that the leakage current is too large and the wafer and the electrostatic chuck are possibly broken down.

Description

Plasma processing device and HDP-CVD equipment

Technical Field

The present disclosure relates to semiconductor technologies, and more particularly to a plasma processing apparatus and an HDP-CVD apparatus.

Background

In the field of semiconductors, a high density plasma chemical vapor deposition (HDP-CVD) apparatus using an HDP-CVD process is widely used in a manufacturing process of a semiconductor integrated circuit, and a principle thereof is that plasma is brought into contact with a surface of a wafer in a reaction chamber under a low pressure to form a thin film, and in order to form the high density plasma, the high density plasma is generated and maintained by an Inductively Coupled Plasma (ICP) generator in the reaction chamber of the HDP-CVD apparatus.

However, in practical applications, it has been found that the HDP-CVD apparatus can generate an arc between the backside of the outer edge of the wafer and the electrostatic chuck during the process, which can easily cause the plasma to enter into the gap, and cause the breakdown of the wafer and the electrostatic chuck, and at the same time, the problem of large leakage current is also accompanied.

SUMMERY OF THE UTILITY MODEL

The present application is directed to a plasma processing apparatus and an HDP-CVD apparatus, which can solve the technical problem of excessive leakage current and possible breakdown of the wafer and the electrostatic chuck.

In a first aspect, the present application provides a plasma processing apparatus comprising:

the wafer installation area is coaxially arranged above the electrostatic chuck and used for placing a wafer, and the outer peripheral part of the wafer installation area is arranged to protrude out of the outer peripheral side wall of the electrostatic chuck; and

the focusing ring structure is arranged around the periphery of the wafer arrangement area;

the focusing ring structure comprises a first ring body part and a protruding part protruding out of the upper surface of the first ring body part, the protruding part is close to one side, far away from the wafer setting area, of the first ring body part, the protruding part surrounds the outer peripheral part of the wafer setting area, the first ring body part surrounds the outer peripheral side wall of the electrostatic chuck, and a first gap is reserved between the bottom surface of the outer peripheral part of the wafer setting area and the upper surface of the first ring body part.

Further, the protruding portion has a first sidewall disposed toward the outer peripheral portion of the wafer disposing region, the first ring portion has a second sidewall disposed toward the outer peripheral sidewall of the electrostatic chuck, a bottom edge of the first sidewall and a top edge of the second sidewall are disposed by connecting the upper surface of the first ring portion, and the second sidewall and at least a portion of the upper surface are located below the outer peripheral portion of the wafer disposing region.

Further, the outer peripheral portion of the wafer mounting region has a structure in which the top surface and the bottom surface thereof gradually incline and contract in the edge direction, the bottom surface is an inclined surface, and the minimum value of the first gap is 0.1 to 0.33 mm.

Furthermore, a second gap is reserved between the second side wall and the peripheral side wall of the electrostatic chuck, and the second gap is 0.18-0.75 mm.

Furthermore, a first distance is reserved between the bottom edge of the first side wall and the periphery edge, and the first distance is 0.2-1.2 mm.

Furthermore, the first side wall is an inclined side wall which is gradually and upwards inclined from the bottom edge to the top edge, and the inclination angle of the inclined side wall is between 28 and 90 degrees.

Further, the plasma processing apparatus further comprises an insulating ring structure disposed below the focus ring structure and surrounding the outer peripheral sidewall of the electrostatic chuck;

and a third gap is reserved between the top surface of the insulating ring structure and the bottom surface of the first ring body part, and the third gap is 0.05-0.31 mm.

Furthermore, an insulating layer structure is arranged between the bottom surface of the wafer arrangement area and the top surface of the electrostatic chuck;

the insulating layer structure is a ceramic dielectric layer;

the insulation ring structure is a ceramic dielectric ring.

Further, the height of the first ring body part is 2.5-5.8 mm; and/or

The top surface of the protruding part is higher than the top surface of the wafer setting area, and the height of the protruding part is 0.5-3 mm.

In a second aspect, the present application provides an HDP-CVD apparatus comprising a plasma processing device according to any one of the preceding claims.

Compared with the prior art, a first gap is reserved between the bottom surface of the outer peripheral part of the wafer arrangement area for placing the wafer and the upper surface of the first ring body part of the focusing ring structure of the plasma processing device. The electrostatic chuck is arranged, so that the wafer arranged in the wafer arrangement area can be sufficiently sucked, the current leakage is greatly reduced, the outer ring flow and the inner ring flow of the electrostatic chuck are reduced, the electric arc phenomenon is effectively avoided, and the breakdown of the wafer and the electrostatic chuck is effectively avoided.

Drawings

In order to more clearly illustrate the detailed description of the present application or the technical solutions in the prior art, the drawings used in the detailed description or the prior art description will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present application, and other drawings can be obtained by those skilled in the art without creative efforts.

FIG. 1 is a schematic circuit diagram of a plasma processing apparatus according to an embodiment of the present disclosure;

FIG. 2 is a schematic partial structural view of a plasma processing apparatus according to an embodiment of the present disclosure;

FIG. 3 is a diagram of data after adjusting a first gap according to an embodiment of the present disclosure;

FIG. 4 is a diagram of data after a first gap has been adjusted but before a second gap has been adjusted, as provided by an embodiment of the present application;

fig. 5 is a data diagram after adjusting the first gap and the second gap according to an embodiment of the present application.

Reference numerals:

10-plasma;

20-a wafer setting area;

21-an outer peripheral portion;

30-an electrostatic chuck;

31-coolant line;

311-coolant inlet;

312-coolant outlet;

40-a focus ring structure;

41-a first ring body portion;

411-upper surface;

412-a second sidewall;

42-a projection;

421-a first sidewall;

50-an insulator ring structure;

60-an insulating layer structure;

71-a first void;

72-a second void;

73-third gap.

Detailed Description

In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.

Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.

In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", and the like indicate orientations or positional relationships based on orientations or positional relationships shown in the drawings or orientations or positional relationships that the product of the application is conventionally placed in use, and are used only for convenience of describing the present application and simplifying the description, but do not indicate or imply that the device or element referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present application. Furthermore, the terms "first," "second," "third," and the like are used solely to distinguish one from another, and are not to be construed as indicating or implying relative importance.

Furthermore, the terms "horizontal", "vertical", "overhang" and the like do not imply that the components are required to be absolutely horizontal or overhang, but may be slightly inclined. For example, "horizontal" merely means that the direction is more horizontal than "vertical" and does not mean that the structure must be perfectly horizontal, but may be slightly inclined.

In the description of the present application, it is further noted that, unless expressly stated or limited otherwise, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.

Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The embodiments and features of the embodiments described below can be combined with each other without conflict.

The embodiment of the application provides a plasma processing device and HDP-CVD equipment applying the same. As shown in fig. 1 and fig. 2, the plasma processing apparatus may include a plasma 10 for providing magnetic field energy, a wafer disposing region 20 located below the plasma 10 for placing a wafer, an electrostatic chuck 30, a focus ring structure 40 disposed around the periphery of the wafer disposing region 20, an insulating ring structure 50 disposed below the focus ring structure 40 and surrounding the peripheral sidewall of the electrostatic chuck 30, and an insulating layer structure 60 located between the bottom surface of the wafer disposing region 20 and the top surface of the electrostatic chuck 30, the wafer disposing region 20 coaxially disposed with the electrostatic chuck 30 is located above the electrostatic chuck 30, the insulating ring structure 50 may be a ceramic dielectric ring, the insulating layer structure 60 may be a ceramic dielectric layer, and the electrostatic chuck 30 includes a cooling liquid pipe 31 therein, which enters from a cooling liquid inlet 311 and exits from a cooling liquid outlet 312.

The outer peripheral portion 21 of the wafer mounting region 20 is provided to protrude from the outer peripheral sidewall of the electrostatic chuck 30, and preferably, the outer peripheral portion 21 has a structure in which the top surface and the bottom surface thereof gradually taper in the edge direction. The focus ring structure 40 may include a first ring body portion 41 and a protrusion portion 42 protruding from an upper surface 411 of the first ring body portion 41, the protrusion portion 42 is disposed near a side of the first ring body portion 41 relatively far from the wafer mounting region 20, the protrusion portion 42 has a first sidewall 421 disposed toward the outer peripheral portion 21 of the wafer mounting region 20, the first ring body portion 41 has a second sidewall 412 disposed toward the outer peripheral sidewall of the electrostatic chuck 30, a bottom side of the first sidewall 421 and a top side of the second sidewall 412 are connected by the upper surface 411 of the first ring body portion 41, and the second sidewall 412 and at least a portion of the upper surface 411 are located below the outer peripheral portion 21 of the wafer mounting region 20. And a first gap 71 is left between the bottom surface of the outer peripheral portion 21 and the upper surface 411 of the first ring body portion 41. The electrostatic chuck 30 is arranged in this way, so that the wafer arranged in the wafer arrangement area 20 can be sufficiently sucked, the current leakage is greatly reduced, the outer ring flow and the inner ring flow of the electrostatic chuck 30 are reduced, the arc phenomenon is effectively avoided, and the breakdown of the wafer and the electrostatic chuck is effectively avoided.

As shown in table 1 below, the inner ring pressure, the outer ring pressure, the inner ring flow, the outer ring flow and the leakage current of the conventional apparatus under three conditions are tested before structural adjustment, wherein the "inner ring pressure" refers to the pressure of the inner ring cooling helium gas, the "outer ring pressure" refers to the pressure of the outer ring cooling helium gas, the "inner ring flow" refers to the leakage flow of the inner ring cooling helium gas, the "outer ring flow" refers to the leakage flow of the outer ring cooling helium gas, the "Torr" is a vacuum pressure unit, 1Torr is equivalent to the pressure of a 1mm mercury column, i.e., 133.322 n/m, and the "sccm" is an english abbreviation of a volume flow unit, which is called "standard cubic center meter per minute" throughout. As can be seen from table 1, the three cases are all guaranteed to be performed under the same pressure condition that the inner ring pressure is 5Torr and the outer ring pressure is 7Torr, the first case is the case that no wafer is present, and the electrostatic chuck voltage is 0V, and it is found that the inner ring flow rate of the existing device is up to 13.5sccm and the outer ring flow rate is up to 23.8sccm, and it is obvious that the inner ring leakage flow rate and the outer ring leakage flow rate of the electrostatic chuck are both large, and reasons need to be found out and the structure needs to be adjusted; the second condition is that the wafer is electrified, the pressure of the electrostatic chuck is-1100V, and the inner ring flow of the existing device is still up to 13.6sccm, the outer ring flow is still up to 24sccm, and the leakage current is 0.2mA, which shows that the leakage flow of the electrostatic chuck is increased or decreased after the wafer is arranged; the third condition is that the electrostatic film blocks the air holes on the surface of the electrostatic chuck, and the inner ring flow of the electrostatic chuck is directly reduced to 2.2sccm, and the outer ring flow is directly reduced to 3.3sccm, so that the qualified standard level is reached; when the second and third conditions are compared, it is known that the electrostatic chuck of the conventional apparatus does not suck the wafer, so that the wafer does not cover the air holes on the surface of the electrostatic chuck, resulting in leakage of flow and current, which is easy to cause an arc phenomenon, which is a gas discharge phenomenon, and is an instantaneous spark generated when current passes through some insulating medium (e.g., air), and plasma easily enters from the gap, resulting in breakdown of the wafer and the electrostatic chuck. The reason for the occurrence of the arcing phenomenon: the surface of the contact metal is subjected to electron escape due to primary electron emission (thermionic emission, field emission or photoemission), gas atoms or molecules in the gap generate electrons and ions due to ionization (impact ionization, photoionization and thermionic ionization), the electrons or ions bombard the emission surface to cause secondary electron emission, and when the concentration of ions in the gap is sufficiently high, the gap is electrically broken down to generate an arc.

TABLE 1

As shown in fig. 2 to 4, the minimum value of the first gap 71 is preferably set to 0.1 to 0.33 mm. As can be seen from fig. 3, after such setting, the outer flow of the electrostatic chuck 30 is reduced to about 6-9 sccm by applying 1000V of the electrostatic chuck, which greatly reduces the outer flow of the electrostatic chuck 30 compared to the outer flow of the conventional apparatus as high as 23.8sccm or 24 sccm; meanwhile, the inner ring flow of the electrostatic chuck 30 is reduced to about 2.5sccm, and compared with the inner ring flow of the existing device which is up to 13.5sccm or 13.6sccm, the inner ring flow of the electrostatic chuck 30 is greatly reduced. As can be seen from FIG. 4, the leakage current of the electrostatic chuck 30 is substantially below 0.5mA, and occasionally becomes unstable and reaches about 1.3 mA. The minimum value of the first gap 71 is set to be 0.1-0.33 mm, so that the electrostatic chuck 30 can fully suck the wafer arranged in the wafer arrangement area 20, the inner ring leakage flow, the outer ring leakage flow and the leakage current of the electrostatic chuck 30 can be greatly reduced, the occurrence of an arc phenomenon can be effectively avoided, and the breakdown of the wafer and the electrostatic chuck can be effectively avoided.

Further, as shown in fig. 2 and 5, a second gap 72 is left between the second sidewall 412 of the first ring body portion 41 of the focus ring structure 40 and the outer peripheral sidewall of the electrostatic chuck 30, and the second gap is preferably 0.18 to 0.75 mm. As can be seen from fig. 5, after the above setting, a pressure of 900V is applied to the electrostatic chuck (e.g. curve 4), the outer-ring flow rate (e.g. curve 1) of the electrostatic chuck 30 is reduced to 3.3 to 4.5sccm, which is substantially reduced to the flow rate value of the case where the "electrostatic film blocks the surface air holes" in the electrostatic chuck in table 1 above, and simultaneously, the inner-ring flow rate (e.g. curve 2) of the electrostatic chuck 30 is reduced to 1.8sccm to 2sccm, which is smaller than the flow rate value of the case where the "electrostatic film blocks the surface air holes" in table 1 above, and meanwhile, the leakage current (e.g. curve 3) of the electrostatic chuck 30 is reduced to 0.07mA to 0.08mA, which is far smaller than the qualified standard value of leakage current, which is 0.5mA. Each data reaches a value even lower than that under the condition that the electrostatic film blocks the air holes on the surface of the electrostatic chuck, which indicates that the wafer is completely adsorbed by the electrostatic chuck 30, and the cooling helium gas on the surface of the electrostatic chuck 30 basically does not escape from the air holes, so that the electric arc phenomenon can be basically prevented, and the breakdown of the wafer and the electrostatic chuck 30 can be effectively prevented.

In a preferred embodiment, as shown in fig. 2, a third gap 73 may be left between the top surface of the insulating ring structure 50 and the bottom surface of the first ring body portion 41 of the focusing ring structure 40, and the third gap 73 is preferably between 0.05 and 0.31 mm. By such an arrangement, heat transfer of the focus ring structure 40 can be reduced, and oxide accumulation on the surface of the focus ring structure 40 can be avoided.

In another preferred embodiment, as shown in fig. 2, the first sidewall 421 of the protrusion 42 of the focusing ring structure 40 may be an inclined sidewall gradually inclined upward from the bottom edge to the top edge thereof, and the inclination angle a may be between 28 ° and 90 °. This can effectively prevent the process oxide from depositing near the outer periphery 21 of the wafer-disposing region 20, and can suppress the generation of particles on the surface of the wafer disposed in the wafer-disposing region 20 to different degrees. Further, a first distance L1 may be left between the bottom side of the first sidewall 421 and the edge of the outer peripheral portion 21 of the wafer mounting region 20, and the first distance L1 is preferably 0.2 to 1.2 mm. The deposition of process oxide near the outer periphery 21 of the wafer placement area 20 can be further effectively prevented, and the generation of particles on the wafer surface can be inhibited to different degrees.

As a more specific example, as shown in fig. 2, the height of the first ring body 41 of the focusing ring structure 40 may be set to be between 2.5 and 5.8mm, and preferably, the top surface of the protrusion 42 of the focusing ring structure 40 is set to be higher than the top surface of the wafer setting region 20, and the height of the protrusion 42 may be set to be between 0.5 and 3 mm.

Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present application, and not to limit the same; although the present application has been described in detail with reference to the foregoing embodiments, it should be understood by those of ordinary skill in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and these modifications or substitutions do not depart from the scope of the technical solutions of the embodiments of the present application.

Claims (10)

1. A plasma processing apparatus, comprising:

the wafer setting area is coaxially arranged with the electrostatic chuck and used for placing a wafer, and the outer periphery of the wafer setting area is arranged to protrude out of the outer peripheral side wall of the electrostatic chuck; and

the focusing ring structure is arranged around the periphery of the wafer arrangement area;

the focusing ring structure comprises a first ring body part and a protruding part protruding out of the upper surface of the first ring body part, the protruding part is close to one side, far away from the wafer setting area, of the first ring body part, the protruding part surrounds the outer peripheral part of the wafer setting area, the first ring body part surrounds the outer peripheral side wall of the electrostatic chuck, and a first gap is reserved between the bottom surface of the outer peripheral part of the wafer setting area and the upper surface of the first ring body part.

2. The plasma processing apparatus according to claim 1,

the protruding portion has a first sidewall disposed toward the outer peripheral portion of the wafer disposing region, the first ring portion has a second sidewall disposed toward the outer peripheral sidewall of the electrostatic chuck, a bottom edge of the first sidewall and a top edge of the second sidewall are disposed by being connected to the upper surface of the first ring portion, and the second sidewall and at least a portion of the upper surface are located below the outer peripheral portion of the wafer disposing region.

3. The plasma processing apparatus according to claim 2,

the outer periphery of the wafer setting area is a structure that the top surface and the bottom surface of the wafer setting area gradually incline and shrink towards the edge direction, the bottom surface is an inclined surface, and the minimum value of the first gap is 0.1-0.33 mm.

4. The plasma processing apparatus according to claim 2 or 3,

and a second gap is reserved between the second side wall and the peripheral side wall of the electrostatic chuck, and the second gap is 0.18-0.75 mm.

5. The plasma processing apparatus according to claim 4,

a first distance is reserved between the bottom edge of the first side wall and the periphery edge, and the first distance is 0.2-1.2 mm.

6. The plasma processing apparatus according to claim 5,

the first side wall is an inclined side wall which is gradually inclined upwards from the bottom edge to the top edge, and the inclination angle of the first side wall is between 28 and 90 degrees.

7. The plasma processing apparatus of claim 1 or 2, further comprising an insulating ring structure disposed below the focus ring structure and around the peripheral sidewall of the electrostatic chuck;

and a third gap is reserved between the top surface of the insulating ring structure and the bottom surface of the first ring body part, and the third gap is 0.05-0.31 mm.

8. The plasma processing apparatus of claim 7, wherein an insulating layer structure is disposed between a bottom surface of the wafer disposing region and a top surface of the electrostatic chuck;

the insulating layer structure is a ceramic dielectric layer;

the insulating ring structure is a ceramic dielectric ring.

9. The plasma processing apparatus according to claim 1 or 2,

the height of the first ring body part is 2.5-5.8 mm; and/or

The top surface of the protruding part is higher than the top surface of the wafer setting area, and the height of the protruding part is 0.5-3 mm.

10. An HDP-CVD apparatus, comprising the plasma processing apparatus according to any one of claims 1to 9.

Images