CN209980793U - Durability testing device - Google Patents

Abstract

The utility model provides a durability testing arrangement, including host computer and next unit, the host computer with next unit connection, next unit is including bearing device and a n next machine, every the next machine all includes control module, storage module, address selection module and a m detection connection module, storage module address selection module, m detect connection module with the host computer all with control module connects, just control module with bear the device and connect, and m and n are the natural number that is greater than 0. In the durability testing device, the lower machine set comprises n lower computers, the lower computers comprise m detection connecting modules, and the m detection connecting modules can enable the durability testing device to be connected with a plurality of storage devices to be tested simultaneously, so that simultaneous detection of the plurality of storage devices to be tested is realized, and the detection efficiency is improved.

Description

Durability testing device

Technical Field

The utility model relates to a memory test technical field especially relates to a durability testing arrangement.

Background

An Electrically Erasable Programmable Read-Only memory (EEPROM) is a non-volatile memory, and the device is widely applied to application occasions with high requirements on data storage safety and reliability, such as an access control and attendance system, but the EEPROM has a service life within a certain range, so the durability of the EEPROM needs to be tested.

Therefore, there is a need to provide a new durability testing apparatus to solve the above problems in the prior art.

SUMMERY OF THE UTILITY MODEL

An object of the utility model is to provide a durability testing arrangement can detect a plurality of memory devices that await measuring simultaneously to improve detection efficiency.

In order to achieve the above object, the utility model discloses a durability testing arrangement, including host computer and next unit, the host computer with next unit connection, next unit is including bearing device and a n next machine, every the next machine all includes control module, storage module, address selection module and a m detection link module, storage module address selection module, m detect link module with the host computer all with control module connects, just control module with bear the device and connect, and m and n are the natural number that is greater than 0.

The beneficial effects of the utility model reside in that: because the lower machine set comprises n lower machines, the lower machines comprise m detection connecting modules, and the m detection connecting modules can enable the durability testing device to be connected with a plurality of storage devices to be tested simultaneously, so that the simultaneous detection of the plurality of storage devices to be tested is realized, and the detection efficiency is improved.

Preferably, the storage module is a non-volatile memory, and has the advantages that: prevent data loss from power-off.

Further preferably, the non-volatile memory is an electrically erasable programmable read only memory, which has the advantages that: the storage safety and reliability of the data are ensured, and the data loss is avoided.

Preferably, the control module is a single chip microcomputer.

Preferably, the detection connection module is an interface based on a universal serial bus, and has the advantages that: the connection of the memory device to be tested is facilitated.

Preferably, the bearing device is a circuit board, and the beneficial effects are that: the position of the lower computer is fixed, the circuit is saved, and the disorder of the circuit and the lower computer is avoided.

Preferably, the bearing device comprises a communication connecting device, and the communication connecting device is connected with the upper computer through a bus.

Further preferably, the communication connection device is a universal asynchronous receiver transmitter, which has the advantages that: facilitating the transmission of multiple pieces of data.

Drawings

Fig. 1 is a block diagram of the durability testing apparatus according to the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention clearer, the drawings of the present invention are combined to clearly and completely describe the technical solutions in the embodiments of the present invention, and obviously, the described embodiments are some embodiments of the present invention, not all embodiments. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention. Unless defined otherwise, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this invention belongs. As used herein, the word "comprising" and similar words are intended to mean that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items.

To the problem that prior art exists, the embodiment of the utility model provides a durability testing arrangement, durability testing arrangement includes host computer and next unit, the host computer with next unit connection, next unit is including bearing device and a n next machine, every the next machine all includes control module, storage module, address selection module and a m detection connection module, storage module address selection module, m detect connection module with the host computer all with control module connects, just control module with bear the device and connect, and m and n are the natural number that is greater than 0.

And the upper computer is used for communicating with the lower computer set to realize the statistics of the test result.

The bearing device is used for fixing the n lower computers and realizing the communication between the n lower computers and the upper computer.

The control module is used for detecting the durability of the storage device to be detected.

The storage module is used for storing the error address, data and erasing times of the storage device to be tested.

The address selection module is used for setting the control module into different addresses, so that the upper computer can communicate with x lower computers, and x is a natural number which is greater than 0 and less than or equal to n, thereby avoiding unnecessary communication and reducing the waste of resources.

The detection connection module is used for connecting the storage device to be detected.

In some embodiments of the present invention, the storage module is a non-volatile memory.

In some embodiments of the present invention, the non-volatile Memory is an Electrically Erasable Programmable Read Only Memory (EEPROM).

In some embodiments of the utility model, control module is the singlechip.

In some embodiments of the present invention, the single chip microcomputer is stm32F405 series single chip microcomputer produced by standard semiconductor corporation (STMicroelectronics), the program for detecting the durability of the storage device to be detected is stored in the single chip microcomputer, and the program is a known technology.

In some embodiments of the present invention, the detection connection module is an interface based on a Universal Serial Bus (USB).

In some embodiments of the present invention, the carrier device is a circuit board.

In some embodiments of the utility model, bear the weight of the device and include the communication connecting device, the communication connecting device pass through the bus with the host computer is connected.

In some embodiments of the present invention, the communication connector is a Universal Asynchronous Receiver/Transmitter (UART).

In some embodiments of the present invention, the bus is a data bus.

The utility model discloses an in some embodiments, the host computer still includes indicating module, indicating module with control module connects, indicating module is including erasing indicating unit, verification indicating unit and status indicating unit.

The utility model discloses an in some embodiments, erasing and writing instruction unit and status indication unit all with next computer one-to-one, erasing and writing instruction unit is used for instructing whether right the memory device that awaits measuring carries out the erasing and writing operation, it is right whether the instruction unit is used for instructing to examine the memory device that awaits measuring reads the operation, status indication unit with detect the link module one-to-one, and be used for instruct with detect the link module and connect whether erasing and writing or reading error appear in the memory that awaits measuring, the memory device that awaits measuring specifically is the electrically erasable programmable read only memory.

The utility model discloses a some embodiments, erasing and writing indicating unit, verification indicating unit and status indicating unit are the pilot lamp.

Fig. 1 is a block diagram of the durability testing apparatus according to some embodiments of the present invention. Referring to fig. 1, taking n equal to 2 and m equal to 2 as examples, the endurance testing apparatus 10 includes an upper computer 101 and a lower computer set 102, the upper computer 101 is connected to the lower computer set 102, the lower computer set 102 includes a carrying device 1021, a first lower computer 1022 and a second lower computer 1023, the first lower computer 1022 includes a first control module 10221, a first storage module 10222, a first storage address module 10223, a first detection connection module 10224 and a second detection connection module 10225, the first storage module 10222, the first storage address module 10223, the first detection connection module 10224 and the second detection connection module 10225 are all connected to the first control module 10221, the first control module 10221 is connected to the carrying device 1021, and the second lower computer 1023 includes a second control module 10231, a second storage module 10232, a second storage address module 10233, a second detection connection module 10233, A third detecting connection module 10234 and a fourth detecting connection module 10235, wherein the second memory module 10232, the second memory address module 10233, the third detecting connection module 10234 and the fourth detecting connection module 10235 are all connected with the second control module 10231, and the second control module 10231 is connected with the carrier device 1021.

Although the embodiments of the present invention have been described in detail hereinabove, it is apparent to those skilled in the art that various modifications and variations can be made to these embodiments. However, it is to be understood that such modifications and variations are within the scope and spirit of the present invention as set forth in the appended claims. Moreover, the invention as described herein is capable of other embodiments and of being practiced or of being carried out in various ways.

Claims (8)

1. The utility model provides an endurance test device, its characterized in that, includes host computer and next unit, the host computer with next unit connection, next unit is including bearing device and a n lower computer, every the lower computer all includes control module, storage module, address selection module and a m detection connection module, storage module address selection module, m detect connection module with the host computer all with control module connects, just control module with bear the device and connect, and m and n are the natural number that is greater than 0.

2. The endurance testing apparatus of claim 1, wherein the storage module is a non-volatile memory.

3. The endurance testing apparatus of claim 2, wherein the non-volatile memory is an eeprom.

4. The durability test device according to claim 1, wherein the control module is a single chip microcomputer.

5. The endurance testing apparatus according to claim 1, wherein the detection connection module is a universal serial bus based interface.

6. The durability testing apparatus according to claim 1, wherein the carrier device is a circuit board.

7. The endurance testing apparatus according to claim 1, wherein the carrier device includes a communication connection device, and the communication connection device is connected to the upper computer through a bus.

8. The endurance testing apparatus of claim 7, wherein the communication connection device is a universal asynchronous receiver transmitter.

Images