CN205122630U - Full high power density LED chip package structure of establishing ties - Google Patents
Full high power density LED chip package structure of establishing ties Download PDFInfo
- Publication number
- CN205122630U CN205122630U CN201520825588.4U CN201520825588U CN205122630U CN 205122630 U CN205122630 U CN 205122630U CN 201520825588 U CN201520825588 U CN 201520825588U CN 205122630 U CN205122630 U CN 205122630U
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- China
- Prior art keywords
- led chip
- square
- high power
- power density
- chip package
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
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- Led Device Packages (AREA)
Abstract
The utility model belongs to the technical field of semiconductor lighting device and specifically relates to full high power density LED chip package structure of establishing ties. Packaging structure contains N M single chip package device, arranges into the capable M of N and is listed as the structure, and the outside cramps with insulation frame, electrical pillar and adjacent electric connection of negative pole tubular metal resonator that encapsulates the base are led to the positive pole of every single chip package device, form the packaging structure that establishes ties entirely. The structure of single chip package device, the centre is the square electrical pillar that leads, and the square electrical pillar of leading skin is interior insulating heat transfer layer, interior insulating heat transfer layer outside is the tubular metal resonator. The P utmost point of LED chip bottom with electrical pillar is led to device square or the current conducting plate is connected, pad and the tubular metal resonator or the becket electricity of the LED chip top N utmost point are connected. The utility model discloses a packaging structure establishes ties all high power density LED chips are whole, when realizing the high -power LED device encapsulation of ten multikilowatts, can reduce the line footpath of power wire, and the security leads to the fact hidden danger to the circuit to avoid the super large electric current.
Description
Technical field
The utility model belongs to semiconductor lighting devices technical field, is specifically related to the high power density LED chip encapsulating structure of full series connection.
Background technology
Along with the fast development of semiconductor illumination technique, LED technology obtains significant progress, and high-power LED encapsulation device is also applied to various general lighting and special lighting application gradually.Numerous industrial application, to the demand of high power density light output, promotes continuous research and development that is high-power or high power density LED technology.
CN201410291560.7 and CN201410176671.3 proposes the integrated encapsulation structure of formal dress and inverted structure chip respectively, can realize the LED component of high power density.But in these two kinds of structures, the positive and negative electrode of the LED chip of encapsulation has all carried out a large amount of parallel connection, the electric current of single module has depended on number of chips in parallel, defines the encapsulation module of low-voltage, high electric current.Along with the continuous increase of single chips power, chip current has reached tens amperes even higher, and therefore cause module electric current very large, the inflow-rate of water turbine of docking electric line proposes very high requirement.
Summary of the invention
The purpose of this utility model is to provide a kind of high power density LED chip encapsulating structure of full series connection of good reliability, while realizing ten multikilowatt high power LED device encapsulation, avoids super-large current to cause a hidden trouble to line security.
The high power density LED chip encapsulating structure of the full series connection that the utility model provides, comprise N × M single LED chip packaging, N >=1, M >=1, is arranged in the capable M array structure of N, outside with insulation frame banding; The positive conductive post of each single-chip package device is electrically connected with the negative metal pipe of adjacent package pedestal, forms full Series Package structure.
In the utility model, the similar of described single-chip package device is in square coaxial cable, and centre is square conductive pole, and square conductive pole skin is interior thermal insulation layer; Square metal tube outside interior thermal insulation layer; External insulation heat-conducting layer is adopted to carry out electric insulation between the square metal tube of adjacent devices.
In the utility model, be square conductive plate in the middle of described single-chip package device, square conductive plate skin is interior thermal insulation layer; It is square metal ring outside thermal insulation layer; External insulation heat-conducting layer is adopted to carry out electric insulation between the square metal ring of adjacent devices.
In the utility model, square conductive pole or the conductive plate of the P pole bottom LED chip and described device are connected, and adopt the mode of eutectic weldering; The pad of N pole, LED chip top is electrically connected with metal tube or becket, and gold thread can be adopted to weld or welded by tinsel eutectic.
In the utility model, after N × M described single-chip package device insulation frame banding, bottom polishing, bonding with conductive and heat-conductive insulation board with thermal conductive insulation glue, form the base plate for packaging by super-large current.
Encapsulating structure of the present utility model, all connects all high power density LED chips, while realizing ten multikilowatt high power LED device encapsulation, can reduce the wire diameter of power lead, avoid super-large current to cause a hidden trouble to line security.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of the high power density LED chip encapsulating structure embodiment of full series connection of the present utility model.
Fig. 2 is the end view of the high power density LED chip encapsulating structure of full series connection of the present utility model.
Fig. 3 is the vertical view of the high power density LED chip encapsulating structure of full series connection of the present utility model.
Number in the figure: 1 ~ 3-single-chip package device; 4-insulation frame; 11,21,31-square copper post; 12,22,32-interior thermal insulation layer; 13,23,33-metal tube; 14,24,34-LED thin-film LED; 15,25,35-eutectic weldering; 16,26,36-gold thread; 17,27,37-negative pole link; 18,28,38-anode connection terminal; 39-electrode input end; 51,52-external insulation layer.
Embodiment
Below in conjunction with drawings and Examples, the utility model is described further.Described embodiment is only section Example of the present utility model.Do not make other all embodiments of creative achievement based on the embodiment in the utility model, all belong to protection range of the present utility model.
The high power density LED chip encapsulating structure of full series connection of the present utility model, comprises 1 × 3 single-chip package device 1 ~ 3, and there is frame 4 banding that insulate outside, as shown in Figure 1.As shown in Figures 2 and 3, centre is square copper post 11,21,31 to the structure of single-chip package device 1 ~ 3 respectively, peripheral respectively successively coated insulation heat-conducting layer 12,22,32, metal tube 13,23,33.Adjacent device 1 and 2, external insulation layer 51,52 between 2 and 3, is adopted to carry out electric insulation.Copper post 11,21,31 is respectively as the positive pole of single-chip package device 1 ~ 3, and metal tube 13,23,33 is respectively as negative pole.On device 1 ~ 3, each arrangement area is 3 × 7mm
2light emitting diode (LED) chip with vertical structure 14,24,34.Chip bottom P pole forms eutectic with corresponding copper post 11,21,31 respectively and welds 15,25,35; N pole, top is connected by gold thread 16,26,36 with corresponding metal tube 13,23,33 respectively.For the ease of the series connection of encapsulation base, there is outstanding link 17,27,37 side of metal tube 13,23,33, and opposite side then cuts the link 18,28,38 exposing middle copper post open.Link 18 and 27, eutectic between 28 with 37, is adopted to weld, link 38 eutectic welds an outstanding anode interface 39, then three packagings realize series connection, and port one 7 is negative inputs of whole full Series Package structure, and port 39 is electrode input ends of whole encapsulating structure.This voltage of entirely connecting high power density LED chip encapsulating structure is 15V, and electric current 75A, power reaches 1125W, may be used for TiO
2photocatalysis Decomposition organic exhaust gas.
Claims (5)
1. the high power density LED chip encapsulating structure of full series connection, is characterized in that: described encapsulating structure comprises N × M single-chip package device, N >=1, M >=1, is arranged in the capable M array structure of N, outside with insulation frame banding; The positive conductive post of each single-chip package device is electrically connected with the negative metal pipe of adjacent package pedestal, forms full Series Package structure.
2. the high power density LED chip encapsulating structure of full series connection according to claim 1, is characterized in that: the similar of described single-chip package device is in square coaxial cable, and centre is square conductive pole, and square conductive pole skin is interior thermal insulation layer; It is square metal tube outside thermal insulation layer; External insulation heat-conducting layer is adopted to carry out electric insulation between the metal tube of adjacent devices.
3. the high power density LED chip encapsulating structure of full series connection according to claim 1, is characterized in that: be square conductive plate in the middle of described single-chip package device, square conductive plate skin is interior thermal insulation layer; It is square metal ring outside interior thermal insulation layer; External insulation heat-conducting layer is adopted to carry out electric insulation between the becket of adjacent devices.
4. the high power density LED chip encapsulating structure of the full series connection according to Claims 2 or 3, is characterized in that: square conductive pole or the conductive plate of the P pole bottom LED chip and described device are connected, and adopt the mode of eutectic weldering; The pad of N pole, LED chip top is electrically connected with metal tube or becket, adopts gold thread welding or is welded by tinsel eutectic.
5. the high power density LED chip encapsulating structure of full series connection according to claim 4, it is characterized in that: after N × M described single-chip package device insulation banding, bottom polishing, bonding with heat conductive insulating plate with thermal conductive insulation glue, form the base plate for packaging by super-large current.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520825588.4U CN205122630U (en) | 2015-10-25 | 2015-10-25 | Full high power density LED chip package structure of establishing ties |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201520825588.4U CN205122630U (en) | 2015-10-25 | 2015-10-25 | Full high power density LED chip package structure of establishing ties |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN205122630U true CN205122630U (en) | 2016-03-30 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201520825588.4U Expired - Fee Related CN205122630U (en) | 2015-10-25 | 2015-10-25 | Full high power density LED chip package structure of establishing ties |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN205122630U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105261689A (en) * | 2015-10-25 | 2016-01-20 | 复旦大学 | Full series connection high power density LED chip packaging structure |
-
2015
- 2015-10-25 CN CN201520825588.4U patent/CN205122630U/en not_active Expired - Fee Related
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105261689A (en) * | 2015-10-25 | 2016-01-20 | 复旦大学 | Full series connection high power density LED chip packaging structure |
| CN105261689B (en) * | 2015-10-25 | 2018-10-16 | 复旦大学 | Complete concatenated high power density LED core chip package |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CF01 | Termination of patent right due to non-payment of annual fee | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20160330 Termination date: 20191025 |