CN112885936B - 一种透明电极结构的Micro-LED阵列及制备方法 - Google Patents
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Abstract
本发明公开了一种透明电极结构的Micro‑LED阵列及制备方法,该结构主要包括发光像素单元、像素单元深隔离槽、衬底。发光像素单元包括:N型GaN、量子阱有源区、P型GaN、绝缘层、透明电极、N型金属电极、P型金属电极。本发明使用ITO作为透明电极,将其完全覆盖在P型GaN上,将P型金属电极制备在N型GaN上面的ITO上,正向电流通过P型金属电极流向ITO再导入到发光层,避免了由于Micro‑LED的P型金属电极面积占比大对发光效率的影响。由于ITO折射率处于空气与外延材料之间,可以提高出光角度,有助于光的逸出,增加了Micro‑LED阵列的光通量,并使其在相同电流下表现出更高的亮度。
Description
技术领域
本发明涉及光电子技术领域,特别涉及一种透明电极结构的Micro-LED阵列及制备方法。
背景技术
LED(Light emitting diode)作为发光器件,在生活中扮演着重要的角色。在照明领域,已经替代了白炽灯,节约了大量能源。在显示领域,如液晶显示器(LCD)和有机发光二极管(OLED),微发光二极管(Micro-LED)显示技术等,为人们提供了优质的显示面板,尤其是近年来迅速发展的Micro-LED显示技术,作为一种独特的显示器,应用于智能眼镜,头戴式显示器(HMDs)和抬头显示器(HUDs)等领域,而受到业界内广泛关注。与传统的LCD和OLED相比,Micro LED具有低功耗,高亮度,短响应时间和使用寿命长等优点。
普通LED由于发光面积大,P型金属电极面积相比整个发光面积,比例较小。因此对出光的影响不大。但由于Micro-LED尺寸微小,P型金属电极面积占比大,因此P型金属电极的面积对Micro-LED出光有很大影响。ITO(Indium Tin Oxide)作为铟锡金属氧化物,具有良好的透明性,导电性,低电阻率和化学稳定性,还可以切断对人体有害的电子辐射,紫外线及远红外线,在众多可作为透明电极的材料中,ITO是被最广泛应用的一种。
因此,本发明在P型GaN上覆盖一层透明电极ITO,并将P型金属电极制备在位于N型GaN上的ITO上,从而提高发光效率和亮度。
发明内容
本发明的目的在于提供了一种透明电极结构的Micro-LED阵列及制备方法,用以提高器件的发光效率和亮度。
本发明所提出的一种透明电极结构的Micro-LED阵列,包括发光阵列1和衬底2,发光阵列1包括多个发光二极管单元11,像素单元深隔离槽10。所述的发光像素单元11包含N型GaN 3,N型金属电极9,量子阱有源区4,P型GaN 5,P型金属电极8,透明电极ITO 6和绝缘层a 7和绝缘层b 13。
所述像素单元深隔离槽的尺寸在5μm到10μm之间,发光像素单元的尺寸在10μm到100μm之间。
本发明所提出的一种透明电极结构的Micro-LED阵列及制备方法,包括以下步骤:
S1.在衬底上依次生长N型GaN,量子阱有源区,P型GaN,得到外延材料;
S2.在外延材料上使用光刻胶做为掩膜,保护不需要被刻蚀的区域,通过干法刻蚀外延材料至N型GaN,形成台阶;
S3.使用光刻胶或者SiO2作为掩膜,干法刻蚀外延材料至衬底,形成像素单元深隔离槽;
S4.在外延材料上制备一层绝缘层,然后旋涂光刻胶,曝光显影将需要腐蚀的区域光刻胶去掉,再通过湿法腐蚀将不需要的绝缘层腐蚀掉,留下绝缘层b;
S5.溅射透明电极ITO,然后旋涂光刻胶,曝光显影将需要腐蚀区域的光刻胶去掉,再通过湿法腐蚀将不需要的透明电极腐蚀掉;
S6.旋涂光刻胶,曝光显影将需要制备电极的区域光刻胶去掉,随后制备N型金属电极,将每个发光像素单元的N型金属电极互联;
S7.制备绝缘层,旋涂光刻胶,曝光显影将需要腐蚀区域的光刻胶去掉,留下绝缘层a 7,在透明电极上制备P型金属电极,将每行发光像素单元的P型金属电极连在一起。
所述步骤S1中,衬底为硅,蓝宝石,碳化硅,氮化镓中的一种,N型GaN的厚度为2~4μm;量子阱有源区的厚度200nm~300nm和P型GaN的厚度为70~150nm;量子阱有源区是由InGaN层和GaN层交替循环组成,长N型GaN,量子阱有源区和P型GaN的制备方法为MOCVD生长。
所述步骤S5中,透明电极使用铟锡金属氧化物ITO(Indium Tin Oxide)。
所述步骤S4和S7中,绝缘层a和绝缘层b使用SiO2、SiNx、聚酰亚胺绝缘导电层中的一种,绝缘层的制备方法为等离子体增强型化学气相沉积法;
所述步骤S6和S7中,N型金属电极和P型金属电极使用使用Ti/Al/Ti/Au,Ni/Al等,制备方法为电子束蒸发法。
附图说明
图1是制备好的n×m透明电极结构的Micro-LED阵列芯片的俯视图;
图2是图1A-A截面图;
图3是图2中单个发光像素单元截面图;
图4是图2中单个发光像素单元3D结构图
图5是制备好的3×3透明电极结构的Micro-LED阵列芯片3D结构图;
附图标记说明:
1、发光阵列;2、衬底;3、N型GaN;4、量子阱有源区;5、P型GaN;6、透明电极ITO;7、绝缘层a;8、P型金属电极;9、N型金属电极;10、像素单元深隔离槽;11、发光像素单元;12、台阶;13、绝缘层b;14、台阶的后侧;15、台阶的左侧;16、台阶的前侧;17、台阶的右侧。
具体实施方式
为使本发明要解决的技术问题、技术方案更加清楚,下面结合附图进行详细描述。
参考图1,图2一种透明电极结构的Micro-LED阵列,包括:
衬底2;
N型GaN 3,其制备在衬底2上面;
量子阱有源区4,制备在N型GaN 3上面;
P型GaN 5,制备在量子阱有源区4上面;
台阶12,通过刻蚀外延材料至N型GaN形成;
透明电极ITO 6,制备在P型GaN和台阶侧壁以及N型GaN上;
N型金属电极9,制备在N型GaN上面;
P型金属电极制备在N型GaN上的透明电极上面;
像素单元深隔离槽10,刻蚀外延材料至衬底,使Micro-LED像素单元电隔离;
本发明中金属电极为Ti/Al/Ti/Au,Ni/Al等,衬底为硅,蓝宝石,碳化硅,氮化镓中的一种,绝缘层使用SiO2、SiNx、聚酰亚胺绝缘导电层中的一种
下面结合图2,图3,图4具体阐述透明电极结构的Micro-LED阵列及制备,方法如下:
S1.在蓝宝石衬底2上通过MOCVD的方法依次生长N型GaN 3(厚度2μm)、量子阱有源区4(厚度250nm),量子阱有源区是由InGaN层(2nm)和GaN层(10nm)交替循环组成,和P型GaN5(厚度100nm),得到LED外延材料,随后用丙酮和无水乙醇各清洗两次,去除表面有机物质,最后用去离子水冲洗若干次。
S2.在外延材料上使用PD2100正光刻胶作为ICP刻蚀掩膜,保护不需要刻蚀的区域,通过ICP干法刻蚀外延片至N型GaN 3,形成台阶12;
S3.再次在外延片上使用光刻胶或者光刻胶加SiO2作为掩膜,保护不需要刻蚀的区域,通过ICP干法刻蚀外延片至蓝宝石衬底,形成像素单元深隔离槽10,发光像素单元尺寸为60μm×60μm,隔离槽尺寸为4μm;
S4.通过PECVD(等离子体增强化学气相淀积),在外延材料上制备一层SiO2绝缘层,然后旋涂光刻胶,曝光显影将需要腐蚀掉的区域光刻胶去掉,再通过湿法腐蚀将不需要的绝缘层腐蚀掉,留下绝缘层b 13;
S5.溅射透明电极ITO,然后旋涂光刻胶,曝光显影将需要腐蚀区域的光刻胶去掉,再通过湿法腐蚀将不需要的透明电极ITO腐蚀掉,并在580℃条件下退火8min;
S6.旋涂光刻胶,曝光显影将需要制备N型金属电极的区域光刻胶去掉,随后使用电子束蒸发方法制备N型金属电极9,快速热退火形成良好的欧姆接触,将每个发光像素单元的N型金属电极进行互联,并且为了保证N型金属电极在过桥部分的可靠性,做了加宽处理;
S7.通过PECVD(等离子体增强化学气相淀积),在外延材料上制备一层SiO2绝缘层,然后旋涂光刻胶,曝光显影将需要腐蚀掉的区域光刻胶去掉,再通过湿法腐蚀将不需要的绝缘层腐蚀掉,留下绝缘层a 7;
S8.在N型GaN上的透明电极上制备P型金属电极,快速热退火形成良好的欧姆接触,并将每个发光像素单元的P型金属电极进行互联,并且对P型金属电极爬坡处统一加宽了电极宽度,防止断裂;
最终获得一种透明电极结构的Micro-LED阵列。
以上所述,仅为本发明的具体实施方式,以上结构和实施只用于帮助理解本发明方法和核心思想。对于本技术领域的普通技术人员来说,在不脱离本发明核心思想的前提下,还可以对本发明进行改进和修饰,这些改进和修饰也落入本发明权利要求的保护范围内。
Claims (7)
1.一种透明电极结构的Micro-LED阵列,其特征在于,包括发光阵列(1)和衬底(2);发光阵列(1)包括多个发光像素单元(11)、像素单元深隔离槽(10),所述的发光像素单元(11)包括N型GaN(3),N型金属电极(9),量子阱有源区(4),P型GaN(5),P型金属电极(8),透明电极ITO(6)和绝缘层a(7)与绝缘层b(13);
P型GaN上表面(5)完全被透明电极ITO(6)覆盖,所述P型金属电极(8)位于N型GaN上的透明电极上,没有阻碍光从P型GaN上表面的逸出;
所述透明电极ITO(6)包括三部分:
位于P型GaN上面的部分;
位于台阶(12)侧壁的部分,所述部分覆盖三侧侧壁,分别为台阶后侧(14),台阶左侧(15),台阶前侧(16),并通过绝缘层b(13)与侧壁隔离;
位于N型GaN上绝缘层上的部分,用来连接P型金属电极到透明电极ITO与P型GaN;
所述绝缘层b(13)包括两部分:
位于台阶(12)侧壁的部分,所述部分覆盖三侧侧壁,分别为台阶后侧(14),台阶左侧(15),台阶前侧(16),用于隔离N型GaN(3),量子阱有源区(4),和P型GaN(5)与透明电极ITO的接触;
位于N型GaN(3)与透明电极ITO(6)之间,用于防止透明电极与N型GaN接触从而发生短路;
所述绝缘层a(7)包括两部分:
位于P型金属电极(8)与N型金属电极(9)之间,为了防止P型金属电极在进行像素单元互联时与N型金属电极短接;
位于台阶右侧(17),用于防止侧壁漏电。
2.根据权利要求1所述的一种透明电极结构的Micro-LED阵列,其特征在于,所述像素单元深隔离槽(10)的尺寸在5μm到10μm之间,发光像素单元的尺寸在10μm到100μm之间。
3.制备如权利要求1所述的一种透明电极结构的Micro-LED阵列的方法,其特征在于包括以下步骤:
S1.在衬底上依次生长N型GaN(3),量子阱有源区(4),P型GaN(5),得到外延材料;
S2.刻蚀外延材料至N型GaN(3),形成台阶(12);
S3.刻蚀外延材料至衬底,形成像素单元深隔离槽(10);
S4.在外延材料上制备一层绝缘层,然后旋涂光刻胶,曝光显影后通过湿法腐蚀将不需要的绝缘层腐蚀掉,留下绝缘层b(13);
S5.溅射透明电极,然后旋涂光刻胶,曝光显影后通过湿法腐蚀将不需要的透明电极腐蚀掉,留下透明电极(6);
S6.旋涂光刻胶,曝光显影将需要制备N型金属电极区域的光刻胶去掉,湿法腐蚀在N型GaN上开出N型金属电极窗口,制备N型金属电极(9),并连接每个发光像素单元的N型金属电极;
S7.再次制备绝缘层,然后旋涂光刻胶,曝光显影后通过湿法腐蚀将不需要的绝缘层腐蚀掉,留下绝缘层a(7);
S8.将P型金属电极(8)制备在N型GaN上的透明电极上,并连接每行发光像素单元的P型金属电极。
4.根据权利要求3所述的方法,其特征在于,所述步骤S1中,衬底为硅,蓝宝石,碳化硅,氮化镓中的一种,N型GaN的厚度为2~4μm,量子阱有源区的厚度200nm~300nm,P型GaN的厚度为70nm~150nm;量子阱有源区是由InGaN层和GaN层交替循环组成,N型GaN,量子阱有源区和P型GaN的制备方法为MOCVD生长。
5.根据权利要求3所述的方法,所述步骤S5中,透明电极使用铟锡金属氧化物ITO,ITO折射率处于空气与外延材料之间。
6.根据权利要求3所述的方法,所述步骤S4和S7中,绝缘层a(7)和绝缘层b(13)使用SiO2、SiNx、聚酰亚胺中的一种,绝缘层的制备方法为等离子体增强型化学气相沉积法。
7.根据权利要求3所述的方法,所述步骤S6和S7中,N型金属电极和P型金属电极使用Ti/Al/Ti/Au或Ni/Al,制备方法为电子束蒸发法。
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