CN111756091A - Power supply switching circuit and intelligent door lock - Google Patents
Power supply switching circuit and intelligent door lock Download PDFInfo
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- CN111756091A CN111756091A CN202010614444.XA CN202010614444A CN111756091A CN 111756091 A CN111756091 A CN 111756091A CN 202010614444 A CN202010614444 A CN 202010614444A CN 111756091 A CN111756091 A CN 111756091A
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- 239000003990 capacitor Substances 0.000 claims description 32
- 230000002265 prevention Effects 0.000 claims description 16
- 238000010586 diagram Methods 0.000 description 9
- 230000001737 promoting effect Effects 0.000 description 4
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
- H02J7/00—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
- H02J7/0063—Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries with circuits adapted for supplying loads from the battery
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- E—FIXED CONSTRUCTIONS
- E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
- E05B—LOCKS; ACCESSORIES THEREFOR; HANDCUFFS
- E05B47/00—Operating or controlling locks or other fastening devices by electric or magnetic means
- E05B47/0001—Operating or controlling locks or other fastening devices by electric or magnetic means with electric actuators; Constructional features thereof
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- E—FIXED CONSTRUCTIONS
- E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
- E05B—LOCKS; ACCESSORIES THEREFOR; HANDCUFFS
- E05B49/00—Electric permutation locks; Circuits therefor ; Mechanical aspects of electronic locks; Mechanical keys therefor
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- E—FIXED CONSTRUCTIONS
- E05—LOCKS; KEYS; WINDOW OR DOOR FITTINGS; SAFES
- E05B—LOCKS; ACCESSORIES THEREFOR; HANDCUFFS
- E05B47/00—Operating or controlling locks or other fastening devices by electric or magnetic means
- E05B2047/0048—Circuits, feeding, monitoring
- E05B2047/0057—Feeding
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Abstract
The embodiment of the application provides a power supply switching circuit and intelligent lock relates to the electronic equipment field, and this power supply switching circuit includes: the first wiring end of the DC-DC power supply circuit is connected with the to-be-supplied equipment, the inverting circuit is connected with the second wiring end of the LDO power supply circuit, the second wiring end of the inverting circuit is connected with the control circuit, and the second wiring end of the DC-DC power supply circuit is connected with the control circuit. The application utilizes the control circuit to realize the switching of the LDO power supply circuit and the DC-DC power supply circuit, and the service efficiency of the power supply can be improved to a certain extent.
Description
Technical Field
The application relates to the technical field of electronic equipment, in particular to a power supply switching circuit and an intelligent door lock.
Background
With the rapid development of science and technology, more and more electronic devices enter people's lives. At present, most electronic devices, especially electronic devices with low power consumption, can usually supply power by multiple power sources, so that users can use the electronic devices conveniently. However, when the electronic device is powered by multiple power sources, the power loss may increase due to the difference in the power supply voltage of each power source.
Disclosure of Invention
An object of this application is to provide a power supply switching circuit and intelligent lock, not only can promote the availability factor of power through power supply switching circuit, power supply switching circuit design is simple moreover, nimble more easy realization.
In a first aspect, an embodiment of the present application provides a power switching circuit, where the power switching circuit includes: the first terminal of the LDO power supply circuit is connected with the equipment to be powered; the first terminal of the DC-DC power supply circuit is connected with the equipment to be powered; the first terminal of the inverting circuit is connected with the second terminal of the LDO power supply circuit; the control circuit is used for sending a low level signal to the inverting circuit and switching the low level signal into a high level signal by using the inverting circuit when the equipment to be powered is in a dormant state, so that the LDO power supply circuit supplies power to the equipment to be powered, and the control circuit respectively sends the high level signal to the inverting circuit and the DC-DC power supply circuit when the equipment to be powered is in an awakening state and switches the high level signal into the low level signal by using the inverting circuit, so that the LDO power supply circuit and the equipment to be powered are cut off and the DC-DC power supply circuit is controlled to supply power to the equipment to be powered.
Furthermore, the LDO power supply circuit comprises a first control unit, the first control unit is used for supplying power to the equipment to be powered when the LDO power supply circuit is conducted with the equipment to be powered, the DC-DC power supply circuit comprises a second control unit, and the second control unit is used for supplying power to the equipment to be powered when the DC-DC power supply circuit is conducted with the equipment to be powered; and a first terminal of the inverting circuit is connected with an enabling end of the first control unit, and an enabling end of the second control unit is connected with the control circuit.
Furthermore, the inverting circuit comprises a triode, a collector of the triode is connected with an enabling end of the first control unit, a base of the triode is connected with the control circuit, and an emitter of the triode is grounded.
Furthermore, the LDO power supply circuit further comprises a first resistor, the first resistor is connected with a first power supply, and a second terminal of the first resistor is connected with an enabling end of the first control unit and a collector of the triode respectively.
Furthermore, the inverting circuit further comprises a second resistor, a first terminal of the second resistor is connected with an enabling end of the first control unit and a second terminal of the first resistor respectively, and a second terminal of the second resistor is connected with a collector of the triode.
Furthermore, the inverting circuit further comprises a diode, the anode of the diode is respectively connected with the base electrode of the triode and the control circuit, and the cathode of the diode is connected with a second power supply.
Furthermore, the DC-DC power supply circuit is connected with a backflow prevention circuit, and the backflow prevention circuit is used for preventing backflow current from occurring between the first power supply and the third power supply.
Further, the backflow prevention circuit comprises: the MOS transistor comprises a first MOS transistor and a second MOS transistor; the drain electrode of the first MOS tube is connected with the LDO power supply circuit or the DC-DC power supply circuit, the source electrode of the first MOS tube is connected with the source electrode of the second MOS tube, and the grid electrode of the first MOS tube is grounded; and the source electrode of the second MOS tube is connected with a third power supply, and the grid electrode of the second MOS tube is grounded.
Furthermore, the DC-DC power supply circuit further comprises an inductor and a first capacitor, wherein a first terminal of the inductor is connected with an inductor current input end of a second control unit of the DC-DC power supply circuit, and a second terminal of the inductor is connected with a drain electrode of the first MOS tube.
In a second aspect, an embodiment of the present application provides an intelligent door lock, and this intelligent door lock system includes the power supply switching circuit of intelligent door lock and the first aspect, and intelligent door lock and power supply switching circuit electric connection.
The application provides a power supply switching circuit and intelligent lock realizes the switching to LDO supply circuit and DC-DC supply circuit through setting up control circuit and fetching reverse circuit. Wherein, a first terminal of the LDO power supply circuit is connected with a device to be powered, a first terminal of the DC-DC power supply circuit is connected with the device to be powered, a first terminal of the inverting circuit is connected with a second terminal of the LDO power supply circuit, a second terminal of the inverting circuit is connected with the control circuit, a second terminal of the DC-DC power supply circuit is connected with the control circuit, when the device to be powered is in a dormant state, the control circuit sends a low level signal to the inverting circuit and switches the low level signal into a high level signal by using the inverting circuit, so that the LDO power supply circuit supplies power to the device to be powered, when the device to be powered is in a wake-up state, the control circuit respectively sends a high level signal to the inverting circuit and the DC-DC power supply circuit, and switches the high level signal into the low level signal by using the inverting circuit, so that the LDO power supply circuit and the device to be powered are cut, and controls the DC-DC power supply circuit to supply power to the equipment to be powered. This application can effectively realize switching LDO supply circuit and DC-DC supply circuit more fast through introducing control circuit, can reduce the power extravagant when promoting power availability factor.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a functional block diagram of a power switching circuit provided by an embodiment of the present application;
FIG. 2 is a schematic diagram of an LDO power supply circuit in a power switching circuit according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a DC-DC power supply circuit in a power switching circuit according to an embodiment of the present application;
FIG. 4 is a functional block diagram of a power switching circuit provided in another embodiment of the present application;
FIG. 5 is a schematic diagram of a DC-DC power supply circuit in a power switching circuit according to another embodiment of the present application;
fig. 6 is a schematic structural diagram of an intelligent door lock system according to an embodiment of the present application.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the description of the present application, it is noted that the terms "first", "second", "third", and the like are used merely for distinguishing between descriptions and are not intended to indicate or imply relative importance.
In the description of the present application, it is further noted that, unless expressly stated or limited otherwise, the terms "disposed," "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
At present, in order to improve the power utilization efficiency of Low-power consumption equipment, a Low-power consumption LDO (Low dropout regulator) is generally adopted for supplying power, and when the Low-power consumption LDO is in a sleep state, a peripheral device is in a disconnected state; and when the device is awakened, the DC-DC is added to supply power to the peripheral device. In the sleep state, the current consumed by the LDO is of the uA level, and although the efficiency is low, the energy consumed is low because the current is small, but in the awake state, the current consumed by the LDO is of the mA level, and the energy consumption ratio is large at this time, and particularly when the difference between the input voltage and the output voltage is large, the loss is further increased.
Therefore, in view of the above problems, the inventor proposes a power switching circuit and an intelligent door lock in the embodiments of the present application, and the embodiments of the present application will be described in detail below with reference to the drawings.
Referring to fig. 1, fig. 1 shows a schematic block diagram of a power switching circuit provided by an embodiment of the present application, which may include an LDO power supply circuit 110, a DC-DC power supply circuit 120, a control circuit 140, and a device to be powered 150. The first terminal of the LDO power supply circuit 110 is connected to the device to be powered 150, the second terminal of the LDO power supply circuit 110 is connected to the control circuit 140, the first terminal of the DC-DC power supply circuit 120 is connected to the device to be powered 150, and the second terminal of the DC-DC power supply circuit 120 is connected to the control circuit 140.
In one way, a first terminal of inverting circuit 130 is connected to a second terminal of LDO supply circuit 110, and a second terminal of inverting circuit 130 is connected to control circuit 140. In this embodiment, the control circuit 140 is connected to the inverting circuit 130 and the DC-DC power supply circuit 120, respectively, when the device 150 to be powered is in a sleep state, the control circuit 140 sends a low level signal to the inverting circuit 130, and switches the low level signal into a high level signal by using the inverting circuit 130, so that the LDO power supply circuit 110 supplies power to the device 150 to be powered.
As a mode, when the device to be powered 150 is in an awake state, the control circuit 140 sends a high level signal to the inverting circuit 130 and the DC-DC power supply circuit 120, and switches the high level signal to a low level signal by using the inverting circuit 130, so that the LDO power supply circuit 110 and the device to be powered 150 are turned off, and meanwhile, the control circuit 140 may further control the DC-DC power supply circuit 120 to supply power to the device to be powered 150, where the model of the LDO may be SGM2202, and the DC-DC may be SY 8120. Optionally, the sleep state of the device to be powered 150 may be represented by a high level "0", and the wake state of the device to be powered 150 may be represented by a low level "1", and if the states acquired by the control circuit 140 are different, the circuit for providing power to the device to be powered 150 is also different.
As one way, the device to be powered 150 may include at least one sub-device, each of the sub-devices is configured with a voltage terminal, and the control circuit 140 may detect whether the voltage of the voltage terminal of each sub-device is smaller than a voltage threshold, and if the voltage of the voltage terminal of the sub-device is smaller than the voltage threshold, it indicates that the sub-device of the device to be powered 150 is in a sleep state, and at this time, the control circuit 140 may determine that the device to be powered 150 is in the sleep state. And when the voltage of the sub-device voltage end of the device 150 to be powered is greater than the voltage threshold, it indicates that the device 150 to be powered is in the complete machine wake-up state.
As one manner, the sub-device of the device to be powered 150 may be configured with an enable terminal, when a voltage of the enable terminal is a low voltage, it indicates that the sub-device of the device to be powered 150 is in a sleep state, that is, the device to be powered 150 is in the sleep state, and when a voltage of the enable terminal is a high voltage, it indicates that the sub-device of the device to be powered 150 is in a wake-up state, that is, the device to be powered 150 is in a complete machine wake-up state.
As a manner, the control circuit 140 may also determine the state of the to-be-powered device 150 according to the device parameter sent by the to-be-powered device 150, that is, when the device parameter sent by the to-be-powered device 150 is a first parameter, the to-be-powered device 150 is in a sleep state, and when the device parameter sent by the to-be-powered device 150 is a second parameter, the to-be-powered device 150 is in a complete machine wake-up state. The first parameter and the second parameter may be parameters of the sub-devices of the device to be powered 150 in different states. For example, when the computer screen is in a sleep state, the parameter is a first parameter, and when the computer screen is in an awake state, the parameter is a second parameter. Therefore, the control circuit 140 can determine what state it is in according to the first parameter and the second parameter sent by the device to be powered 150, wherein the first parameter and the second parameter can be obtained by configuring an electronic device such as a voltage or a resistance.
In some embodiments, as shown in fig. 2, the LDO power supply circuit 110 may include a first control unit U1, an input of the first control unit U1 is connected to a first power source V1, wherein the first power source V1 may be VCC _ BAT, and the first control unit is mainly configured to supply power to the device to be powered 150 when the LDO power supply circuit 110 is turned on with the device to be powered 150. The enable terminal of the first control unit U1 may be connected to the inverting circuit 130, the zero potential terminal of the first control unit U1 is grounded, and the LDO power supply circuit 110 may be connected to the device to be powered 150 through the test point TP 1. As shown in fig. 3, the DC-DC power supply circuit 120 may include a second control unit U2, an input terminal of the second control unit U2 is connected to the first power source V1, an enable terminal of the second control unit U2 may be connected to the control circuit 140, a zero potential terminal of the second control unit U2 is grounded, and the second control unit U2 is configured to supply power to the device 150 to be powered when the DC-DC power supply circuit 120 is conducted with the device 150 to be powered, where the DC-DC power supply circuit 120 may be connected to the device 150 to be powered through a test point TP 2.
In some embodiments, the level state of the enable terminal of the first control unit U1 and the level state of the enable terminal of the second control unit U2 may be the same or different, that is, the enable terminal of the first control unit U1 may be an active high enable terminal, and the enable terminal of the first control unit U1 may be an active low enable terminal. Similarly, the enable terminal of the second control unit U2 may be an active high enable terminal, and the enable terminal of the second control unit U1 may also be an active low enable terminal.
In the embodiment of the present application, the level states of the enable terminals of the first control unit U1 and the second control unit U2 are the same, and therefore, the power switching circuit 100 may include the negation circuit 130, where the enable terminal of the first control unit U1 is an active high enable terminal, and the enable terminal of the second control unit U2 is also an active high enable terminal; alternatively, the enable terminal of the first control unit U1 is an active low enable terminal, and the enable terminal of the second control unit U2 is also an active low enable terminal, i.e., the enable terminal of the first control unit U1 is connected to the first terminal of the negation circuit 130.
By one approach, the first control unit U1 may be a low dropout regulator LDO, the second control unit U2 may be DC-DC, and the first control unit U1 may be connected to the inverting circuit 130 when the state of the voltage level at the enable terminal of the first control unit U1 is the same as the state of the voltage level at the enable terminal of the second control unit U2. The inverting circuit 130 may include a transistor Q1, a collector of the transistor Q1 is connected to an enable terminal of the first control unit U1, a base of the transistor Q1 may be connected to the control circuit 140, and an emitter of the transistor Q1 is grounded.
By way of example, the LDO power supply circuit 110 may further include a first resistor R1, the first resistor R1 is connected to the first power source V1, and a second terminal of the first resistor R1 is connected to an enable terminal of the first control unit U1 and a collector of the transistor Q1, respectively. In addition, the inverting circuit 130 further includes a second resistor R2, a first terminal of the second resistor R2 is respectively connected to an enable terminal of the first control unit U1 and a second terminal of the first resistor R1, and a second terminal of the second resistor R2 is connected to a collector of the transistor Q1.
As one mode, the inverting circuit 130 further includes a diode D1, the anode of the diode D1 is connected to the base of the transistor Q1 and the control circuit 140, and the cathode of the diode D1 is connected to a second power source V2, wherein the second power source V2 may be VCC _3V3_ disconnect.
When the level state of the enable terminal of the first control unit U1 is different from the level state of the enable terminal of the second control unit U2, the enable terminal of the first control unit U1 is connected to the control circuit 140, and the enable terminal of the second control unit U2 is also connected to the control circuit 140. Specifically, when the enable terminal of the first control unit U1 is a high enable terminal and the enable terminal of the second control unit U2 is a low enable terminal, the high enable terminal of the first control unit U1 is connected to the control circuit 140, and the low enable terminal of the second control unit U2 is connected to the control circuit 140; when the enable terminal of the first control unit U1 is a low enable terminal and the enable terminal of the second control unit U2 is a high enable terminal, the low enable terminal of the first control unit U1 is connected to the control circuit 140 and the high enable terminal of the second control unit U2 is connected to the control circuit 140.
As an alternative, the LDO power supply circuit 110 shown in fig. 2 may further include a second capacitor C2 and a third capacitor C3, wherein first terminals of the second capacitor C2 and the third capacitor C3 are respectively connected to the first power source V1, and second terminals of the second capacitor C2 and the third capacitor C3 are respectively connected to an output terminal of the first control unit. In addition, the LDO power supply circuit 110 may further include a fourth capacitor C4, a fifth capacitor C5, and a sixth capacitor C6, wherein a first terminal of the fourth capacitor C4 is connected to the bypass terminal of the first control unit U1, a second terminal of the fourth capacitor C4 is connected to the output terminal of the first control unit, a first terminal of the fifth capacitor C5 and a first terminal of the sixth capacitor C6 are respectively connected to the output terminal of the first control unit U1, and a first terminal of the sixth capacitor C6 is connected to a fourth power supply V4. Wherein, the fourth power supply V4 may be VCC _3V3_ SGM 2202.
As an implementation, the inverting circuit 130 may further include a third resistor R3, a fourth resistor R4, and a fifth resistor R5, where a first terminal of the third resistor R3 is connected to the base of the transistor Q1, a second terminal of the third resistor R3 is connected to a first terminal of the fifth resistor R5, a second terminal of the fifth resistor R5 is connected to the control circuit 140, and a first terminal of the fifth resistor R5 is further connected to a first terminal of the diode D1. A first terminal of the fourth resistor R4 is connected to the base of the transistor Q1 and a first terminal of the third resistor R3, respectively, and a second terminal of the fourth resistor R4 is grounded. In addition, the inverting circuit 130 may further include a sixth capacitor C6, a first terminal of the sixth capacitor C6 is connected to the base of the transistor Q1 and the first terminal of the third resistor R3, a second terminal of the sixth capacitor C6 is connected to ground, and a first terminal of the sixth capacitor C6 is further connected to the first terminal of the third resistor R3.
The power supply switching circuit provided by the application embodiment realizes the switching of the LDO power supply circuit and the DC-DC power supply circuit by arranging the control circuit. Wherein, a first terminal of the LDO power supply circuit is connected with a device to be powered, a first terminal of the DC-DC power supply circuit is connected with the device to be powered, a first terminal of the inverting circuit is connected with a second terminal of the LDO power supply circuit, a second terminal of the inverting circuit is connected with the control circuit, a second terminal of the DC-DC power supply circuit is connected with the control circuit, when the device to be powered is in a dormant state, the control circuit sends a low level signal to the inverting circuit and switches the low level signal into a high level signal by using the inverting circuit, so that the LDO power supply circuit supplies power to the device to be powered, when the device to be powered is in a wake-up state, the control circuit respectively sends a high level signal to the inverting circuit and the DC-DC power supply circuit, and switches the high level signal into the low level signal by using the inverting circuit, so that the LDO power supply circuit and the device to be powered are cut, and controls the DC-DC power supply circuit to supply power to the equipment to be powered. This application can effectively realize switching LDO supply circuit and DC-DC supply circuit more fast through introducing control circuit, can reduce the power extravagant when promoting power availability factor. In addition, the power supply switching circuit introduces devices such as a triode, a diode and a resistor, so that the power supply switching is more convenient and effective, and the stability of the power supply switching circuit can be improved to a certain extent.
Referring to fig. 4, fig. 4 shows a schematic block diagram of a power switching circuit according to another embodiment of the present disclosure, and it can be seen from fig. 4 that the power switching circuit 100 may include a backflow prevention circuit 160, the DC-DC power supply circuit 120 is connected to the backflow prevention circuit 160, and the backflow prevention circuit 160 is mainly used for preventing a backflow current between the first power supply V1 and the third power supply V3.
By one approach, the DC-DC power supply circuit 120 is connected to the backflow prevention circuit 160, and the backflow prevention circuit 160 may include a first MOS transistor Q2 and a second MOS transistor Q3. The drain of the first MOS transistor Q2 is connected to the DC-DC power supply circuit 120, the source of the first MOS transistor Q2 is connected to the source of the second MOS transistor Q3, and the source of the second MOS transistor Q3 is connected to the third power supply V3. Wherein, the third power supply V3 may be VCC _3V3_ CONTINUE.
Referring to fig. 5, the drain of the first MOS transistor Q2 of the backflow prevention circuit 160 is connected to the inductor current input terminal of the second control unit U2 of the DC-DC power supply circuit 120. In addition, the backflow prevention circuit 160 may further include a ninth resistor R9, a tenth resistor R10, and a transistor Q4, wherein a first terminal of the ninth resistor R9 is connected to the source of the first MOS transistor Q2, and a second terminal of the ninth resistor R9 is connected to the gate of the first MOS transistor Q2 and the transistor Q4, respectively; a first terminal of the tenth resistor R10 is connected to a gate of the second MOS transistor Q3, and a second terminal of the tenth resistor R10 is connected to a gate of the first MOS transistor Q2, a second terminal of the ninth resistor R9, and the transistor Q4; an emitter of the triode Q4 is connected to a ground terminal of the second control unit U2, and collectors of the triode Q4 are respectively connected to a gate of the first MOS transistor Q1, a second terminal of the tenth resistor R10, and a second terminal of the ninth resistor R9.
In one mode, the DC-DC power supply circuit 120 further includes an inductor L1 and a first capacitor C1, a first terminal of the inductor L1 is connected to an inductor current input terminal of the second control unit U2, and a second terminal of the inductor L1 is connected to a drain of the first MOS transistor Q2. The DC-DC power supply circuit 120 further includes a sixth resistor R6, a seventh resistor R7, and an eighth resistor R8, wherein a first terminal of the sixth resistor R6 is connected to the second terminal of the inductor L1 and the drain of the first MOS transistor Q2, a second terminal of the sixth resistor R6 is connected to the first terminal of the seventh resistor R7 and the feedback terminal of the second control unit U2, a first terminal of the seventh resistor R7 is connected to the feedback terminal of the second control unit U2, a second terminal of the seventh resistor R7 is connected to the second terminal of the emitter of the transistor Q4, a first terminal of the eighth resistor R8 is connected to the enable terminal of the second control unit U2 and the control circuit 140, and a second terminal of the eighth resistor R8 is connected to the second terminal of the seventh resistor R3542 and the emitter of the transistor Q4.
In one way, the DC-DC power supply circuit 120 further includes a seventh capacitor C7 and an eighth capacitor C8, wherein first terminals of the seventh capacitor C7 and the eighth capacitor C8 are respectively connected to the first power source V1, and second terminals of the seventh capacitor C7 and the eighth capacitor C8 are respectively connected to a second terminal of the seventh resistor R7, a second terminal of the eighth resistor R8, and an emitter of the transistor Q4.
In one mode, the DC-DC power supply circuit 120 further includes a ninth capacitor C9, an eleventh resistor R11 and a twelfth resistor R12, wherein first terminals of the ninth capacitor C9 and the eleventh resistor R11 are respectively connected to the second terminal of the inductor L1 and the drain of the first MOS transistor Q2, a first terminal of the eleventh resistor R11 is connected to the second power source V2, and a second terminal of the eleventh resistor R11 is respectively connected to the first terminal of the twelfth resistor R12 and the base of the transistor Q4. The second terminals of the ninth capacitor C9 and the twelfth resistor are respectively connected to the second terminal of the seventh capacitor C7, the second terminal of the eighth capacitor C8, the second terminal of the seventh resistor R7, the second terminal of the eighth resistor R8 and the emitter of the transistor Q4, and the second terminal of the twelfth resistor R12 is grounded.
As an example, in the embodiment of the present application, the control circuit 140 may include a signal output terminal through which the control circuit may output a control signal to the LDO power supply circuit 110 and the DC-DC power supply circuit 120, respectively, wherein the signal output terminal of the control circuit 140 may be EC _3V3_ disable. In other words, the control circuit 140 may be connected to the LDO power supply circuit 110 and the DC-DC power supply circuit 120 through signal output terminals, respectively.
As an example, when the second control unit U2 outputs 3.3V voltage to establish stability, VCC _3V3_ disable state is 1, since EN _3V3_ disable is also 1 in the wake-up state, the transistor Q1 may be driven to conduct, the enable terminal of the first control unit U1 is set low, and current loss of the first control unit U1 is avoided; when the 3.3V voltage output by the second control unit U2 is not stabilized, VCC _3V3_ distensinine is in a state of 0, and although EN _3V3_ distensinine is also in a state of 1 in an awake state, VCC _3V3_ distensinine clamps the transistor Q1, at this time, the transistor Q1 is turned off, and the first control unit U1 supplies power normally to avoid the system power failure.
The power supply switching circuit provided by the application embodiment realizes the switching of the LDO power supply circuit and the DC-DC power supply circuit by arranging the control circuit. The first wiring end of the LDO power supply circuit is connected with a device to be powered, the first wiring end of the DC-DC power supply circuit is connected with the device to be powered, the second wiring end of the LDO power supply circuit is connected with the control circuit, the second wiring end of the DC-DC power supply circuit is connected with the control circuit, the control circuit is used for controlling the LDO power supply circuit to supply power to the device to be powered under the condition that the device to be powered is in a dormant state, and the control circuit is used for controlling the DC-DC power supply circuit to supply power to the device to be powered under the condition that the device to be powered is in a complete machine awakening state. This application can effectively realize switching LDO supply circuit and DC-DC supply circuit more fast through introducing control circuit, can reduce the power extravagant when promoting power availability factor. In addition, the backflow prevention circuit is introduced, the backflow prevention circuit can avoid backflow due to different electric potentials of multiple power supplies, energy consumption can be saved, high-efficiency charging of equipment is guaranteed, meanwhile, whether complete stopping actions of the first control unit are completely triggered and enabled by the hardware circuit can be judged according to the stability of the second control unit, and the backflow prevention circuit has higher stability compared with software control.
Referring to fig. 6, fig. 6 shows a schematic structural diagram of an intelligent door lock system provided in the embodiment of the present application, where the intelligent door lock system includes an intelligent door lock and the above power switching circuit, and the intelligent door lock is electrically connected to the power switching circuit.
The power supply switching circuit provided by the application embodiment realizes the switching of the LDO power supply circuit and the DC-DC power supply circuit by arranging the control circuit. Wherein, a first terminal of the LDO power supply circuit is connected with a device to be powered, a first terminal of the DC-DC power supply circuit is connected with the device to be powered, a first terminal of the inverting circuit is connected with a second terminal of the LDO power supply circuit, a second terminal of the inverting circuit is connected with the control circuit, a second terminal of the DC-DC power supply circuit is connected with the control circuit, when the device to be powered is in a dormant state, the control circuit sends a low level signal to the inverting circuit and switches the low level signal into a high level signal by using the inverting circuit, so that the LDO power supply circuit supplies power to the device to be powered, when the device to be powered is in a wake-up state, the control circuit respectively sends a high level signal to the inverting circuit and the DC-DC power supply circuit, and switches the high level signal into the low level signal by using the inverting circuit, so that the LDO power supply circuit and the device to be powered are cut, and controls the DC-DC power supply circuit to supply power to the equipment to be powered. This application can effectively realize switching LDO supply circuit and DC-DC supply circuit more fast through introducing control circuit, can reduce the power extravagant when promoting power availability factor, and the circuit connection between these equipment is simple and easily realize simultaneously, and the power switching circuit design that this application embodiment provided promptly is simple, nimble and with low costs.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (10)
1. A power switching circuit, comprising:
the LDO power supply circuit (110), a first terminal of the LDO power supply circuit (110) is connected with a device to be powered (150);
a DC-DC power supply circuit (120), a first terminal of the DC-DC power supply circuit (120) is connected with the equipment to be powered (150);
an inverting circuit (130), a first terminal of the inverting circuit (130) being connected to a second terminal of the LDO supply circuit (110);
a control circuit (140), a second terminal of the inverting circuit (130) is connected to the control circuit (140), a second terminal of the DC-DC power supply circuit (120) is connected to the control circuit (140), when the device to be powered (150) is in a sleep state, the control circuit (140) sends a low level signal to the inverting circuit (130), and switches the low level signal to a high level signal by using the inverting circuit (130), so that the LDO power supply circuit (110) supplies power to the device to be powered (150), when the device to be powered (150) is in an awake state, the control circuit (140) sends high level signals to the inverting circuit (130) and the DC-DC power supply circuit (120), and switches the high level signal to a low level signal by using the inverting circuit (130), the LDO power supply circuit (110) is cut off from the device to be powered (150), and the DC-DC power supply circuit (120) is controlled to supply power to the device to be powered (150).
2. The power switching circuit according to claim 1, wherein the LDO power supply circuit (110) comprises a first control unit (U1), the first control unit (U1) being configured to power the device to be powered (150) when the LDO power supply circuit (110) is conductive with the device to be powered (150), the DC-DC power supply circuit (120) comprising a second control unit (U2), the second control unit (U2) being configured to power the device to be powered (150) when the DC-DC power supply circuit (120) is conductive with the device to be powered (150);
the first terminal of the inverting circuit (130) is connected with the enabling terminal of the first control unit (U1), and the enabling terminal of the second control unit (U2) is connected with the control circuit (140).
3. The power switching circuit according to claim 2, wherein the inverting circuit (130) comprises a transistor (Q1), a collector of the transistor (Q1) is connected to the enable terminal of the first control unit (U1), a base of the transistor (Q1) is connected to the control circuit (140), and an emitter of the transistor (Q1) is grounded.
4. The power switching circuit of claim 3, wherein the LDO power supply circuit (110) further comprises a first resistor (R1), the first resistor (R1) is connected to a first power supply (V1), and a second terminal of the first resistor (R1) is connected to an enable terminal of the first control unit (U1) and a collector of a transistor (Q1), respectively.
5. The power switching circuit according to claim 4, wherein the inverting circuit (130) further comprises a second resistor (R2), a first terminal of the second resistor (R2) is connected to the enable terminal of the first control unit (U1) and a second terminal of the first resistor (R1), respectively, and a second terminal of the second resistor (R2) is connected to the collector of the transistor (Q1).
6. The power switching circuit according to claim 3, wherein the inverting circuit (130) further comprises a diode (D1), the anodes of the diode (D1) are respectively connected to the base of the transistor (Q1) and the control circuit (140), and the cathode of the diode (D1) is connected to the second power supply (V2).
7. The power switching circuit according to any one of claims 1 to 6, wherein the DC-DC power supply circuit (120) is connected to a reverse flow prevention circuit (160), and the reverse flow prevention circuit (160) is configured to prevent a reverse flow between the first power supply (V1) and the third power supply (V3).
8. The power switching circuit of claim 7, wherein the back-flow prevention circuit (160) comprises: a first MOS transistor (Q2) and a second MOS transistor (Q3);
the drain electrode of the first MOS tube (Q2) is connected with the LDO power supply circuit (110) or the DC-DC power supply circuit (120), the source electrode of the first MOS tube (Q2) is connected with the source electrode of the second MOS tube (Q3), and the gate electrode of the first MOS tube (Q2) is grounded;
the source electrode of the second MOS tube (Q3) is connected with a third power supply (V3), and the grid electrode of the second MOS tube (Q3) is grounded.
9. The power switching circuit according to claim 8, wherein the DC-DC power supply circuit (120) further comprises an inductor (L1) and a first capacitor (C1), a first terminal of the inductor (L1) is connected to an inductor current input terminal of a second control unit (U2) of the DC-DC power supply circuit (120), and a second terminal of the inductor (L1) is connected to the drain of the first MOS transistor (Q2).
10. An intelligent door lock system, characterized in that the intelligent door lock system (100) comprises an intelligent door lock (210) and the power switching circuit (100) according to any one of claims 1 to 9, wherein the intelligent door lock (210) is electrically connected with the power switching circuit (100).
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010614444.XA CN111756091A (en) | 2020-06-30 | 2020-06-30 | Power supply switching circuit and intelligent door lock |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010614444.XA CN111756091A (en) | 2020-06-30 | 2020-06-30 | Power supply switching circuit and intelligent door lock |
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| CN111756091A true CN111756091A (en) | 2020-10-09 |
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| CN202010614444.XA Pending CN111756091A (en) | 2020-06-30 | 2020-06-30 | Power supply switching circuit and intelligent door lock |
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