Nothing Special   »   [go: up one dir, main page]

CN111052353B - 半导体装置 - Google Patents

半导体装置 Download PDF

Info

Publication number
CN111052353B
CN111052353B CN201980004101.7A CN201980004101A CN111052353B CN 111052353 B CN111052353 B CN 111052353B CN 201980004101 A CN201980004101 A CN 201980004101A CN 111052353 B CN111052353 B CN 111052353B
Authority
CN
China
Prior art keywords
semiconductor device
metal plate
conductive pattern
recess
circuit board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201980004101.7A
Other languages
English (en)
Other versions
CN111052353A (zh
Inventor
上里良宪
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Publication of CN111052353A publication Critical patent/CN111052353A/zh
Application granted granted Critical
Publication of CN111052353B publication Critical patent/CN111052353B/zh
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3735Laminates or multilayers, e.g. direct bond copper ceramic substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/585Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries comprising conductive layers or plates or strips or rods or rings
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B37/00Joining burned ceramic articles with other burned ceramic articles or other articles by heating
    • C04B37/02Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B37/00Joining burned ceramic articles with other burned ceramic articles or other articles by heating
    • C04B37/02Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles
    • C04B37/021Joining burned ceramic articles with other burned ceramic articles or other articles by heating with metallic articles in a direct manner, e.g. direct copper bonding [DCB]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367Cooling facilitated by shape of device
    • H01L23/3672Foil-like cooling fins or heat sinks
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2237/00Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
    • C04B2237/02Aspects relating to interlayers, e.g. used to join ceramic articles with other articles by heating
    • C04B2237/12Metallic interlayers
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2237/00Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
    • C04B2237/30Composition of layers of ceramic laminates or of ceramic or metallic articles to be joined by heating, e.g. Si substrates
    • C04B2237/32Ceramic
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2237/00Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
    • C04B2237/30Composition of layers of ceramic laminates or of ceramic or metallic articles to be joined by heating, e.g. Si substrates
    • C04B2237/40Metallic
    • CCHEMISTRY; METALLURGY
    • C04CEMENTS; CONCRETE; ARTIFICIAL STONE; CERAMICS; REFRACTORIES
    • C04BLIME, MAGNESIA; SLAG; CEMENTS; COMPOSITIONS THEREOF, e.g. MORTARS, CONCRETE OR LIKE BUILDING MATERIALS; ARTIFICIAL STONE; CERAMICS; REFRACTORIES; TREATMENT OF NATURAL STONE
    • C04B2237/00Aspects relating to ceramic laminates or to joining of ceramic articles with other articles by heating
    • C04B2237/30Composition of layers of ceramic laminates or of ceramic or metallic articles to be joined by heating, e.g. Si substrates
    • C04B2237/40Metallic
    • C04B2237/407Copper
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29109Indium [In] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29111Tin [Sn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29101Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/29113Bismuth [Bi] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29117Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/29118Zinc [Zn] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29139Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/291Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/29138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/29147Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83401Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
    • H01L2224/83413Bismuth [Bi] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83417Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/83424Aluminium [Al] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83439Silver [Ag] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83444Gold [Au] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83447Copper [Cu] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83438Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/83455Nickel [Ni] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83464Palladium [Pd] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83466Titanium [Ti] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83469Platinum [Pt] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/8347Zirconium [Zr] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83471Chromium [Cr] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83472Vanadium [V] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83479Niobium [Nb] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/8348Molybdenum [Mo] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83481Tantalum [Ta] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8338Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/83399Material
    • H01L2224/834Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/83463Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than 1550°C
    • H01L2224/83484Tungsten [W] as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/12Mountings, e.g. non-detachable insulating substrates
    • H01L23/14Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
    • H01L23/15Ceramic or glass substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3731Ceramic materials or glass
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/373Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
    • H01L23/3736Metallic materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L24/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group subclass H10D
    • H01L25/072Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group subclass H10D the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress
    • H01L2924/3512Cracking

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Materials Engineering (AREA)
  • Structural Engineering (AREA)
  • Organic Chemistry (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Structure Of Printed Boards (AREA)

Abstract

能够抑制热应力的产生以及品质的降低。半导体装置(10)在侧剖视时,导电图案(15a)的第一端面(15a1)的位置位于凹部(16a)的最外端部(16a1)的位置与凹部(16b)的最内端部(16b2)的位置之间。因此,即使在陶瓷电路基板(13)产生与半导体装置(10)中的温度变化对应的热应力,也可以通过多个凹部(16a、16b)缓和因温度变化导致的针对陶瓷电路基板(13)的变形。因此,能够防止陶瓷电路基板(13)的破裂、金属板(16)以及导电图案(15a)的剥落。

Description

半导体装置
技术领域
本发明涉及半导体装置。
背景技术
包含IGBT(Insulated Gate Bipolar Transistor:绝缘栅双极型晶体管)、功率MOSFET(Metal Oxide Semiconductor Field Effect Transistor:金属氧化物半导体场效应晶体管)等半导体元件的半导体装置用作例如电力转换装置。这样的半导体装置包含该半导体元件和陶瓷电路基板,该陶瓷电路基板具有:绝缘板、形成于绝缘板的正面且配置有半导体元件的多个导电图案、以及形成于绝缘板的背面的金属板。进一步地,半导体装置为了在动作时对半导体元件的发热进行冷却,上述陶瓷电路基板配置于例如由铜构成的散热器等散热部。
在这样的半导体装置中,在介由焊锡将半导体元件与陶瓷电路基板接合,并且介由焊锡将陶瓷电路基板与散热部接合时被加热后被冷却。另外,半导体装置根据本身的动作发生温度变化,另外,承受外部环境的温度变化。因此,由于绝缘板相对于导电图案的热膨胀系数之差和绝缘板相对于金属板的热膨胀系数之差,使得陶瓷电路基板会受到热应力。如果陶瓷电路基板受到热应力,则绝缘板可能会破裂。这关系到半导体装置的可靠性的降低。
因此,提出了通过在陶瓷电路基板形成凹部(孔),从而缓和在陶瓷电路基板产生的热应力(例如参照专利文献1)。
现有技术文献
专利文献
专利文献1:美国专利第5527620号说明书
发明内容
技术问题
专利文献1中记载的凹部形成于陶瓷电路基板的导电图案的正面。因此,半导体元件、电子部件和/或布线构件等的安装面积变小,相对需要大的陶瓷电路基板。
本发明是鉴于这样的情况而做出的,其目的在于提供一种能够小型化地缓和热应力并且可靠性高的半导体装置。
技术方案
本发明的一个观点,提供一种半导体装置,其具有:半导体元件;以及基板,其具备绝缘板、形成于上述绝缘板的正面且配置有上述半导体元件和布线构件的导电图案、以及形成于上述绝缘板的背面且具备位于比上述导电图案的第一端面的位置更靠向外侧的位置的第二端面的金属板,在上述金属板的背面以沿着外周缘部的至少一部分的方式形成有多个第一凹部,在侧剖视时,上述第一凹部的最外端部的位置比上述导电图案的上述第一端面的位置更靠向外侧。
另外,在上述金属板的背面,多个第二凹部以沿着上述外周缘部的方式形成于上述多个第一凹部的内侧。
另外,在侧剖视时,上述第二凹部的最内端部位于比上述第一端面更靠向内侧的位置。
另外,在侧剖视时,上述第二凹部的上述最内端部位于比上述半导体元件的第三端面的位置更靠向外侧的位置。
另外,在上述金属板的背面,沿着上述外周缘部在上述第一凹部与上述第二凹部之间形成有多列凹部。
另外,形成于上述金属板的背面的上述第一凹部彼此的间隔为0.1mm以上且0.5mm以下。
另外,从上述第一凹部的底部至上述金属板的正面为止存在有第一厚度的厚度。
另外,上述第一厚度相对于上述金属板的厚度为30%以上且95%以下。
另外,从上述第二凹部的底部至上述金属板的正面为止存在有第二厚度的厚度。
另外,上述第二厚度相对于上述金属板的厚度为30%以上且95%以下。
另外,上述多个第一凹部在上述金属板的背面沿着上述外周缘部形成为环状。
另外,上述半导体元件配置于与比上述金属板的背面的形成有上述第一凹部的第一区域更靠向中央侧的第二区域上对应的上述导电图案上。
另外,在侧剖视时,上述第一凹部的最内端部的位置比上述导电图案的上述第一端面的位置更靠向内侧。
另外,半导体装置还具有介由焊锡接合有上述基板的散热板。
技术效果
根据公开的技术,能够小型化地缓和热应力,防止半导体装置的可靠性降低。
通过表示优选的实施方式作为本发明的示例的附图和相关的以下说明将使本发明的上述及其他目的、特征和优点变得明确。
附图说明
图1是第一实施方式的半导体装置的侧截面图。
图2是第一实施方式的半导体装置的陶瓷电路基板的金属板的背面的平面图。
图3是参考例的半导体装置的主要部分放大侧截面图(其一)。
图4是参考例的半导体装置的主要部分放大侧截面图(其二)。
图5是第一实施方式的半导体装置的主要部分放大侧截面图。
图6是第二实施方式的半导体装置的主要部分放大侧截面图。
图7是第三实施方式的半导体装置的主要部分放大侧截面图。
符号说明
10、10a、10b 半导体装置
11a、11b 半导体元件
11a1 第三端面
12a、12b、18 焊锡
13 陶瓷电路基板
14 绝缘板
14a 最外端面
15a、15b 导电图案
15a1 第一端面
16 金属板
16a、16b、16f、16g 凹部
16a1 最外端部
16a2、16b2 最内端部
16c 第一区域
16d 第二区域
16e 第二端面
17 散热板
具体实施方式
以下,参照附图,对实施方式进行说明。
[第一实施方式]
首先,使用图1对第一实施方式的半导体装置进行说明。图1是第一实施方式的半导体装置的侧截面图。如图1所示,半导体装置10具有半导体元件11a、11b、正面与半导体元件11a、11b接合的陶瓷电路基板13(基板)、以及接合到陶瓷电路基板13的背面的散热板17。应予说明,这样在图1中示出的半导体装置10是包含后述的图2中的第一区域16c和第二区域16d这样的位置的截面图。
半导体元件11a、11b包括例如IGBT、功率MOSFET等开关元件。该开关元件由硅或碳化硅构成。这样的半导体元件11a、11b例如在背面具备漏电极(或集电极)且在正面具备栅电极和源电极(或发射电极)。另外,半导体元件11a、11b根据需要包括SBD(SchottkyBarrier Diode:肖特基势垒二极管)、FWD(Free Wheeling Diode:续流二极管)等二极管。这样的半导体元件11a、11b在背面具备阴极作为主电极且在正面具备阳极作为主电极。应予说明,图1所示的半导体元件11a、11b的数量(两个)是一个示例。不限于该情况,可以通过适当设计来确定数量。
陶瓷电路基板13具有绝缘板14、形成于绝缘板14的正面的导电图案15a、15b、以及形成于绝缘板14的背面的金属板16。绝缘板14由导热性优异的氧化铝、氮化铝、氮化硅等导热性高的陶瓷构成。绝缘板14的厚度优选为0.2mm以上且1.5mm以下,更加优选为0.25mm以上且1.0mm以下。导电图案15a、15b由导电性优异的材质构成。作为这样的材质,例如由铜、铝、或至少含有它们中的一种的合金等构成。导电图案15a、15b的厚度优选为0.1mm以上且1.0mm以下,更加优选为0.125mm以上且0.6mm以下。在这样的导电图案15a上介由焊锡12a接合有半导体元件11a,在这样的导电图案15b上介由焊锡12b接合有半导体元件11b。应予说明,在这样的导电图案15a、15b上,除了配置半导体元件11a、11b以外,还可以适当配置热敏电阻、电容器等电子部件、键合线、引线框、连接端子等布线构件。另外,导电图案15a、15b可以通过耐腐蚀性优异的材质来进行镀覆处理。这样的材质是例如镍、钛、铬、钼、钽、铌、钨、钒、铋、锆、铪、金、银、铂、钯、或至少含有它们中的一种的合金等。应予说明,图1所示的导电图案15a、15b的数量、配置位置以及形状是一个示例。不限于该情况,可以通过适当设计来确定数量、配置位置以及形状。
金属板16由导热性优异的铜、铝、铁、银、或至少含有它们中的一种的合金等金属构成。金属板16的厚度T1优选为0.1mm以上且1.0mm以下,更加优选为0.125mm以上且0.6mm以下。另外,在金属板16的背面分别形成有多个凹部16a、16b(凹部)。凹部16a、16b不贯通金属板16。凹部16a、16b的深度D优选为金属板16的厚度T1的30%以上且95%以下,更加优选为金属板16的厚度T1的60%以上且90%以下。通过使凹部16a、16b形成得深,从而能够增大缓和应力的效果。另一方面,如果过深,则焊锡18与凹部16a、16b之间容易产生空隙,可能发生散热性降低和/或局部放电。例如,在金属板16的厚度T1为0.3mm左右的情况下,凹部16a、16b的深度D为0.25mm左右,而从凹部16a、16b的底部至金属板16的正面为止的厚度T2为0.05mm左右。另外,如图1所示,在金属板16设定有第一区域和第二区域。应予说明,金属板16的凹部16a、16b以及第一区域和第二区域的详细情况将在后面描述。
作为具有这样的构成的陶瓷电路基板13,可以使用例如DCB(DirectCopperBonding:直接铜键合)基板、AMB(Active Metal Brazed:活性金属钎焊)基板。陶瓷电路基板13能够介由导电图案15a、导电图案15b、绝缘板14和金属板16使在半导体元件11a、11b产生的热传导到散热板17。应予说明,绝缘板14在俯视时例如呈矩形。另外,金属板16在俯视时呈面积比绝缘板14的面积小的矩形。因此,陶瓷电路基板13例如呈矩形。
如图1所示,散热板17在其正面介由焊锡18配置有陶瓷电路基板13。这样的散热板17由导热性优异的例如铝、铁、银、铜、或至少由它们中的一种构成的合金、包含铝和碳化硅的复合材料、包含镁和碳化硅的复合材料构成。另外,为了提高耐腐蚀性,也可以例如通过镀覆处理等在散热板17的表面形成镍等材料。具体而言,除了镍以外,还有镍-磷合金、镍-硼合金等。应予说明,也可以介由焊锡或银焊料等将冷却器(省略图示)接合于该散热板17的背面侧,或者介由导热膏等将冷却器(省略图示)机械安装于该散热板17的背面侧。由此也可以进一步提高散热性。这种情况下的冷却器由例如导热性优异的铝、铁、银、铜、或至少由它们中的一种构成的合金等构成。另外,作为冷却器,可以应用散热片或由多个散热片构成的散热器以及利用水冷的冷却装置等。另外,散热板17可以与这样的冷却器一体构成。在此情况下,由导热性优异的铝、铁、银、铜、或至少它们中的一种构成。而且,为了提高耐腐蚀性,例如可以通过镀覆处理等在与冷却器一体而成的散热板的表面形成镍等材料。具体而言,除了镍以外,还有镍-磷合金、镍-硼合金等。另外,也可以介由焊锡18将上述冷却器接合于上述陶瓷电路基板13的背面,来代替上述散热板17。应予说明,在上述半导体装置10中使用的焊锡12a、12b、18由例如以包含锡-银-铜的合金、包含锡-锌-铋的合金、包含锡-铜的合金、包含锡-银-铟-铋的合金中的至少任意一种合金为主要成分的无铅焊锡构成。进一步地,还可以含有镍、锗、钴或硅等添加物。
另外,在具有这样的构成的半导体装置10中,可以通过封装构件来封装散热板17上的半导体元件11a、11b和陶瓷电路基板13。或者,也可以将包围半导体元件11a、11b和陶瓷电路基板13的壳体安装于散热板17并通过封装构件对壳体内进行封装。应予说明,该情况下的封装构件可以使用例如环氧树脂、酚醛树脂、马来酰亚胺树脂、硅树脂、硅胶等热固性树脂。进一步地,也可以含有氧化硅、氧化铝、氮化硼或氮化铝等填充材料作为填料。而且,壳体为覆盖半导体元件11a、11b和陶瓷电路基板13的侧部的箱形,由热塑性树脂构成。作为该树脂,有聚苯硫醚(PPS)、聚对苯二甲酸丁二醇酯(PBT)树脂、聚丁二酸丁二醇酯(PBS)树脂、聚酰胺(PA)树脂,或丙烯腈丁二烯苯乙烯(ABS)树脂等。另外,这样的壳体介由粘结剂(省略图示)而与散热板17接合。
接着,利用图2对这样的半导体装置10的陶瓷电路基板13的金属板16的凹部16a、16b进行说明。图2是第一实施方式的半导体装置的陶瓷电路基板的金属板的背面的平面图。应予说明,图2示出了从背面对图1的半导体装置10的陶瓷电路基板13的金属板16进行观察的情况。这样的金属板16的背面设定有:凹部16a、16b以沿着外周缘部的方式呈环状形成的第一区域16c、以及未形成有凹部16a、16b的除了第一区域16c以外的第二区域16d。
第一区域16c设定为围绕金属板16的中央部的区域。在第一区域16c的外侧,凹部16a以预定的间隔W沿着金属板16的外周缘部形成为环状。在凹部16a的内侧,凹部16b以预定的间隔W沿着金属板16的外周缘部形成为环状。如果这样的间隔W过窄,则焊锡18的流动变差。另外,如果间隔W过大,则无法获得凹部16a、16b的效果。因此,凹部16a、16b的间隔W优选为0.1mm以上且0.5mm以下,更加优选为0.15mm以上且0.3mm以下。应予说明,在第一实施方式中,示出了在第一区域16c,以沿着金属板16的外周的方式形成有两列凹部16a、16b的情况。不限于该情况,也可以形成一列凹部或三列以上的凹部。
另外,第二区域16d是金属板16的中央部,其周围被第一区域16c围绕。如图1所示,半导体装置10中的半导体元件11a、11b配置于陶瓷电路基板13的金属板16的第二区域16d上。由半导体元件11a、11b产生的热经由导电图案15a、15b和绝缘板14向金属板16的第一区域16c传导。如果例如半导体元件11a、11b配置于陶瓷电路基板13的金属板16的第一区域16c上,则由于在金属板16的第一区域16c形成有多个凹部16a、16b,因此导热性会降低。另一方面,如果将半导体元件11a、11b配置于陶瓷电路基板13的金属板16的第二区域16d上,则与配置于第一区域16c上的情况相比,散热性的降低得到抑制。应予说明,在图1和图2中,示出了凹部16a、16b的俯视时的形状为圆形(截面为半球形)的情况,但不限于该情况。例如,作为凹部16a、16b的俯视时的形状,还可以是椭圆形、U形、方形。另外,作为凹部16a、16b的截面形状,还可以是例如方形、梯形、三角形等。
如此,上述半导体装置10在沿着陶瓷电路基板13的金属板16的背面的外周缘部而呈环状地偏向外周缘部的第一区域16c形成有多个凹部16a、16b。因此,即使在陶瓷电路基板13产生了与半导体装置10中的温度变化对应的热应力,通过多个凹部16a、16b也缓和了因温度变化导致的相对于陶瓷电路基板13的收缩。因此,能够防止陶瓷电路基板13的破裂、金属板16以及导电图案15a、15b的剥落。
另外,形成于金属板16的背面的凹部16a、16b不贯通金属板16。金属板16具备从凹部16a、16b的底面起至金属板16的正面的厚度。因此,可以在不减少半导体元件11a、11b等安装部件的情况下得到可靠性高的半导体装置10。另外,能够使焊锡18填充于凹部16a、16b内而使焊锡18与金属板16接合。进一步地,如果焊锡18填充于凹部16a、16b,则在凹部16a、16b不会出现空隙。因此,防止散热性的降低以及局部放电的产生。应予说明,在图2中示出了在陶瓷电路基板13的金属板16的背面的第一区域16c中,多个凹部16a、16b沿着外周缘部而形成为环状的情况,但不限于该情况。例如,也可以在第一区域16c中沿着矩形的金属板16的两条短边形成多个波纹16a、16b,并且在沿着两条长边的位置不形成凹部16a、16b。另外,例如多个凹部16a、16b也可以在第一区域16c中仅形成于金属板16的角部附近。另外,在图2中示出了凹部16a也形成于第一区域16c的与矩形状的金属板16的角部对应的角部的情况,但不限于该情况。例如,凹部16a也可以在第一区域16c的与金属板16的角部对应的角部附近呈弓形地排列有多个。另外,例如在金属板16的角部被倒角的情况下,第一区域16c的角部也可以被倒角。在此情况下,凹部16a可以排列地配置在与经倒角的第一区域对应的缘部。
然而,在半导体装置10中,根据凹部16a、16b相对于陶瓷电路基板13的位置,能够进一步抑制因针对陶瓷电路基板13的热应力引起的损伤。因此,以下,对用于可靠地抑制半导体装置10的因针对陶瓷电路基板13的热应力引起的损伤的凹部16a、16b相对于陶瓷电路基板13的适当的位置进行说明。
首先,利用图3和图4对作为参考例的半导体装置进行说明。图3和图4是参考例的半导体装置的主要部分放大侧截面图。应予说明,对于除了图1所示的半导体装置10的金属板16以外的构成,图3的半导体装置20和图4的半导体装置30具有与半导体装置10相同的构成,从而对其标注相同的符号,并省略对它们的详细说明。另外,图3所示的半导体装置20和图4所示的半导体装置30放大地示出了与图1所示部位的半导体装置10的左侧的凹部16a、16b相当的区域的周边。
如图3所示,半导体装置20具有:半导体元件11a、正面与半导体元件11a接合的陶瓷电路基板23、以及接合到陶瓷电路基板23的背面的散热板17。陶瓷电路基板23具有:绝缘板14、形成于绝缘板14的正面的导电图案15a、以及形成于绝缘板14的背面的金属板26。在金属板26的背面分别形成有多个凹部26a、26b。凹部26a、26b不贯通金属板26。
在这样的半导体装置20中,根据图3,将在陶瓷电路基板23中从绝缘板14的最外端面14a的位置至导电图案15a的最外端部的第一端面15a1的位置为止的距离设为距离a,并将从绝缘板14的最外端面14a的位置至金属板26的最外端部的第二端面26e的位置为止的距离设为距离b。在半导体装置20中,距离a与距离b相等。即,在陶瓷电路基板23中,导电图案15a的第一端面15a1的位置与金属板26的最外端部的第二端面26e的位置相等。另外,将从绝缘板14的最外端面14a的位置至形成于金属板26的背面的最外部的凹部26a的最外端部26a1的位置为止的距离设为距离c。在半导体装置20中,距离a=距离b,并且,距离c>距离a。即,在半导体装置20中,凹部26a、26b形成于比导电图案15a的第一端面15a1的位置更靠向内侧的位置。
在这样的半导体装置20中,距离a=距离b。因此,即使产生温度变化,在陶瓷电路基板23中,绝缘板14处的弯曲应力的产生也小。但是,无论有无凹部26a、26b,应力均集中于导电图案15a的第一端面15a1的正下方附近和金属板26的第二端面26e的正上方附近。由于应力集中于正反向对置的部分,因此绝缘板14可能会在该区域发生龟裂而破裂。
另外,如图4所示,半导体装置30具有:半导体元件11a、正面与半导体元件11a接合的陶瓷电路基板33、以及接合到陶瓷电路基板33的背面的散热板17。陶瓷电路基板33具有:绝缘板14、形成于绝缘板14的正面的导电图案15a、以及形成于绝缘板14的背面的金属板36。在金属板36的背面分别形成有多个凹部36a、36b。凹部36a、36b不贯通金属板36。
在这样的半导体装置30中,如图4所示,将在陶瓷电路基板33中从绝缘板14的最外端面14a的位置至导电图案15a的最外端部的第一端面15a1的位置为止的距离设为距离a,并将从绝缘板14的最外端面14a的位置至金属板36的最外端部的第二端面36e的位置为止的距离设为距离b。另外,将从绝缘板14的最外端面14a的位置至形成于金属板36的背面的最外部的凹部36a的最外端部36a1的位置为止的距离设为距离c。在半导体装置30中,距离a>距离b,并且,距离c>距离a。即,在半导体装置30中,凹部36a、36b形成于比导电图案15a的第一端面15a1的位置更靠向内侧的位置。在半导体装置30的陶瓷电路基板33中,如果产生因温度变化导致的热应力,则在导电图案15a的第一端面15a1的正下方附近产生拐点。因此,绝缘板14可能会在图4中的被虚线圆C包围的区域发生龟裂而破裂。
因此,鉴于上述情况,使用图5对在金属板16形成有凹部16a、16b的第一实施方式的半导体装置10进行说明。图5是第一实施方式的半导体装置的主要部分放大侧截面图。应予说明,图5放大地示出了图1的半导体装置10的左侧的凹部16a、16b的周边。另一方面,半导体装置10的右侧的凹部16a、16b的周边也是相同的构成。
根据图5,将在陶瓷电路基板13中从绝缘板14的最外端面14a的位置至导电图案15a的最外端部的第一端面15a1的位置为止的距离设为距离a。而且,将从绝缘板14的最外端面14a的位置至金属板16的最外端部的第二端面16e的位置为止的距离设为距离b。在这样的半导体装置10中,以使距离b<距离a成立的方式形成陶瓷电路基板13。应予说明,对于在图5中未图示的导电图案15b,从绝缘板14的最外端面14a的位置至导电图案15a的最外端部的第一端面的位置为止的距离也为距离a。另外,将从绝缘板14的最外端面14a的位置至形成于金属板16的背面的最外部的凹部16a的最外端部16a1的位置为止的距离设为距离c。将从绝缘板14的最外端面14a的位置至形成于金属板16的背面的最内部的凹部16b的最内端部16b2的位置为止的距离设为距离d。进一步地,将从绝缘板14的最外端面14a的位置至半导体元件11a的第三端面11a1为止的距离设为距离e。在这样的半导体装置10中,以使距离c<距离a,并且距离a<距离d,并且距离d<距离e成立的方式形成陶瓷电路基板13和凹部16a、16b。在半导体装置10的陶瓷电路基板13中,如果因温度变化导致热应力产生,则在从凹部16a的最外端部16a1的位置至凹部16b的最内端部16b2的位置为止的区域内应力得到缓和。因此,导电图案15a附近的变形小,不产生拐点。因此,可防止绝缘板14的破裂。
上述半导体装置10具有半导体元件11a、半导体元件11b和陶瓷电路基板13。陶瓷电路基板13具备:绝缘板14;导电图案15a、15b,其形成于绝缘板14的正面且配置有半导体元件11a、11b;以及金属板16,其形成于绝缘板14的背面且具备位于比导电图案15a的第一端面15a1的位置更靠向外侧的位置的第二端面16e,多个凹部16a以沿着外周缘部的至少一部分的方式形成于金属板16的背面。而且,在侧剖视时,在半导体装置10中,凹部16a的最外端部16a1位于比导电图案15a的第一端面15a1的位置更靠向外侧的位置。因此,即使在陶瓷电路基板13中产生与半导体装置10中的温度变化对应的热应力,也可以通过多个凹部16a、16b缓和因温度变化导致的针对陶瓷电路基板13的变形。因此,能够防止陶瓷电路基板13的破裂、金属板16以及导电图案15a、15b的剥落。
进一步地,在侧剖视时,在半导体装置10中,凹部16b的最内端部16b2位于比导电图案15a的第一端面15a1的位置更靠向内侧的位置。另外,在侧剖视时,凹部16b的最内端部16b2位于比半导体元件11a的第三端面11a1的位置更靠向外侧的位置。因此,进一步缓和因温度变化导致的针对陶瓷电路基板13的变形。另外,即使向陶瓷电路基板13的外缘部施加外力,也可防止绝缘板14的破裂。
而且,形成于金属板16的背面的凹部16a、16b不贯通金属板16,具备从凹部16a、16b的底面至金属板16的正面为止的厚度。因此,能够使焊锡18填充于凹部16a、16b内而使焊锡18与金属板16接合。另外,由于如果焊锡18填充于凹部16a、16b,则在凹部16a、16b无法产生空隙,因此可防止散热性的降低以及局部放电的产生。进一步地,形成于金属板16的背面的第一区域16c的凹部16a、16b的各间隔W为0.1mm以上且0.5mm以下。因此,能够使焊锡18扩展润湿到陶瓷电路基板13的外缘部,并通过焊锡18无间隙地可靠地将陶瓷电路基板13与散热板17接合。因此,这样的半导体装置10能够抑制品质降低而防止可靠性降低。
[第二实施方式]
在第二实施方式中,使用图6对使第一实施方式的金属板16增加凹部的数量的情况的半导体装置进行说明。图6是第二实施方式的半导体装置的主要部分放大侧截面图。应予说明,对于半导体装置10的除了金属板16以外的构成,图6的半导体装置10a具有与半导体装置10相同的构成。另外,对相同的构成标注相同的符号,并省略对它们的详细说明。另外,图6所示的半导体装置10a放大地示出了图1所示的部位的半导体装置10的左侧的凹部16a、16b的周边。
如图6所示,半导体装置10a具有半导体元件11a、正面与半导体元件11a接合的陶瓷电路基板13、以及接合到陶瓷电路基板13的背面的散热板17。陶瓷电路基板13具有绝缘板14、形成于绝缘板14的正面的导电图案15a、15b、以及形成于绝缘板14的背面的金属板16。金属板16在剖视时在金属板16的背面(第一区域16c(参照图2))的凹部16a、16b之间进一步分别形成有凹部16f、16g。凹部16f、16g不贯通金属板16。应予说明,凹部16f、16g的尺寸与凹部16a、16b的尺寸相同。另外,对这样的凹部16a、16b、16f、16g而言,在例如第一区域16c的外侧,凹部16a以预定的间隔W沿着金属板16的外周缘部形成为环状。在凹部16a的内侧,凹部16f以预定的间隔W沿着金属板16的外周缘部形成为环状。进一步地,在凹部16f的内侧,凹部16g以预定的间隔W沿着金属板16的外周缘部形成为环状。在最内部,凹部16b以预定的间隔W沿着金属板16的外周缘部形成为环状。
另外,在半导体装置10a中,在陶瓷电路基板13也设定有距离a、距离b、距离e。另外,将从绝缘板14的最外端面14a的位置至形成于金属板16的背面的最外部的凹部16a的最外端部16a1的位置为止的距离设为距离c。将从绝缘板14的最外端面14a的位置至形成于金属板16的背面的最内部的凹部16b的最内端部16b2的位置为止的距离设为距离d。在这样的半导体装置10a中,也以使距离c<距离a、并且距离a<距离d、并且距离d<距离e成立的方式形成陶瓷电路基板13和凹部16a、16b、16f、16g。
在半导体装置10a的陶瓷电路基板13中,如果因温度变化而产生热应力,则在从凹部16a的最外端部16a1的位置至凹部16b的最内端部16b2的位置为止的区域中,导电图案15a附近的应力得到缓和。因此,变形小且不产生拐点。因此,防止绝缘板14的破裂。应予说明,在第二实施方式中,列举以在凹部16a、16b之间增设了两个凹部16f、16g的情况为例进行了说明。在凹部16a、16b之间能够增设的凹部的数量可以是一个,也可以是三个以上。
[第三实施方式]
在第三实施方式中,使用图7对使第一实施方式的金属板16的凹部为一个的情况的半导体装置进行说明。图7是第三实施方式的半导体装置的主要部分放大侧截面图。应予说明,图7的半导体装置10b具有与半导体装置10相同的构成。对相同的构成标注相同的符号,并省略对其详细的说明。另外,图7所示的半导体装置10b放大地示出了图1所示的部位的半导体装置10的左侧的凹部16a、16b的周边。
如图7所示,半导体装置10b具有半导体元件11a、正面接合有半导体元件11a的陶瓷电路基板13、以及接合到陶瓷电路基板13的背面的散热板17。陶瓷电路基板13具有绝缘板14、形成于绝缘板14的正面的导电图案15a、15b、以及形成于绝缘板14的背面的金属板16。金属板16在侧剖视时在金属板16的背面(第一区域16c(参照图2))仅形成有凹部16a。另外,对这样的凹部16a而言,例如凹部16a以预定的间隔W沿着金属板16的外周形成于第一区域16c。另外,在半导体装置10b中,在陶瓷电路基板13中也设定有距离a、距离b、距离e。另外,将从绝缘板14的最外端面14a的位置至形成于金属板16的背面的最外部的凹部16a的最外端部16a1的位置为止的距离设为距离c,将从绝缘板14的最外端面14a的位置至形成于金属板16的背面的最内部的凹部16a的最内端部16a2的位置为止的距离设为距离d。在这样的半导体装置10b,也以使距离c<距离a、并且距离a<距离d、并且距离d<距离e成立的方式形成陶瓷电路基板13和凹部16a。
在半导体装置10b的陶瓷电路基板13中,如果因温度变化而产生热应力,则在从凹部16a的最外端部16a1的位置至凹部16a的最内端部16a2的位置为止的区域中,导电图案15a附近的应力得到缓和。因此,变形小且不产生拐点。因此,可防止绝缘板14的破裂。
进一步地,与第一实施方式的半导体装置10同样,在第二实施方式的半导体装置10a、第三实施方式的半导体装置10b中,形成于金属板16的背面的凹部16a、16b、16f、16g不贯通金属板16,且具备从凹部16a、16b、16f、16g的底面至金属板16的正面为止的厚度。因此,能够使焊锡18填充于凹部16a、16b、16f、16g内而使焊锡18与金属板16接合。另外,如果焊锡18填充于凹部16a、16b、16f、16g,则在凹部16a、16b、16f、16g不产生空隙,因此可防止散热性的降低以及局部放电的产生。
进一步地,形成于金属板16的背面的第一区域16c的凹部16a、16b、16f、16g的各间隔W为0.1mm以上且0.5mm以下。因此,能够使焊锡18扩展润湿到陶瓷电路基板13的外缘部,通过焊锡18无间隙地可靠地将陶瓷电路基板13与散热板17接合。因此,这样的半导体装置10a、10b能够抑制品质降低而防止可靠性降低。
以上仅示出本发明的原理。进一步地,对本领域技术人员而言可以进行大量的变形、改变,本发明不限于上述示出且说明的正确的构成和应用例,对应的全部变形例和等同物也被视为基于权利要求书和其等同物的本发明的范围。

Claims (18)

1.一种半导体装置,其特征在于,具有:
半导体元件;以及
基板,其具备绝缘板、形成于所述绝缘板的正面的多个导电图案中的在侧视时位于最外部且配置有所述半导体元件的最外导电图案、以及形成于所述绝缘板的背面且具备位于比所述导电图案的第一端面的位置更靠向外侧的位置的第二端面的金属板,在所述金属板的背面以沿着外周缘部的至少一部分的方式形成有多个第一凹部,
在侧剖视时,所述第一凹部的最外端部的位置比所述导电图案的所述第一端面的位置更靠向外侧。
2.根据权利要求1所述的半导体装置,其特征在于,在所述金属板的背面,多个第二凹部以沿着所述外周缘部的方式形成于所述多个第一凹部的内侧。
3.根据权利要求2所述的半导体装置,其特征在于,在侧剖视时,所述第二凹部的最内端部位于比所述第一端面更靠向内侧的位置。
4.根据权利要求3所述的半导体装置,其特征在于,在侧剖视时,所述第二凹部的所述最内端部位于比所述半导体元件的第三端面的位置更靠向外侧的位置。
5.一种半导体装置,其特征在于,具有:
半导体元件;以及
基板,其具备绝缘板、形成于所述绝缘板的正面且配置有所述半导体元件和布线构件的导电图案、以及形成于所述绝缘板的背面且具备位于比所述导电图案的第一端面的位置更靠向外侧的位置的第二端面的金属板,在所述金属板的背面以沿着外周缘部的至少一部分的方式形成有多个第一凹部,
在侧剖视时,所述第一凹部的最外端部的位置比所述导电图案的所述第一端面的位置更靠向外侧,
在所述金属板的背面,多个第二凹部以沿着所述外周缘部的方式形成于所述多个第一凹部的内侧,
在所述金属板的背面,沿着所述外周缘部在所述第一凹部与所述第二凹部之间形成有多列凹部,
在剖视时所述第一凹部为半球形。
6.根据权利要求1所述的半导体装置,其特征在于,形成于所述金属板的背面的所述第一凹部彼此的间隔为0.1mm以上且0.5mm以下。
7.根据权利要求1所述的半导体装置,其特征在于,从所述第一凹部的底部至所述金属板的正面为止存在有第一厚度的厚度。
8.根据权利要求7所述的半导体装置,其特征在于,所述第一厚度相对于所述金属板的厚度为30%以上且95%以下。
9.根据权利要求2所述的半导体装置,其特征在于,从所述第二凹部的底部至所述金属板的正面为止存在有第二厚度的厚度。
10.根据权利要求9所述的半导体装置,其特征在于,所述第二厚度相对于所述金属板的厚度为30%以上且95%以下。
11.根据权利要求1所述的半导体装置,其特征在于,所述多个第一凹部在所述金属板的背面沿着所述外周缘部形成为环状。
12.根据权利要求11所述的半导体装置,其特征在于,所述半导体元件配置于与比所述金属板的背面的形成有所述第一凹部的第一区域更靠向中央侧的第二区域上对应的所述导电图案上。
13.根据权利要求1所述的半导体装置,其特征在于,在侧剖视时,所述第一凹部的最内端部的位置比所述导电图案的所述第一端面的位置更靠向内侧。
14.根据权利要求1所述的半导体装置,其特征在于,半导体装置还具有介由焊锡接合有所述基板的散热板。
15.一种半导体装置,其特征在于,具有:
半导体元件;以及
基板,其具备绝缘板、形成于所述绝缘板的正面且配置有所述半导体元件和布线构件的导电图案、以及形成于所述绝缘板的背面且具备位于比所述导电图案的第一端面的位置更靠向外侧的位置的第二端面的金属板,在所述金属板的背面以沿着外周缘部的至少一部分的方式形成有多个第一凹部,
在侧剖视时,所述第一凹部的最外端部的位置比所述导电图案的所述第一端面的位置更靠向外侧,
所述导电图案的配置有所述半导体元件和所述布线部件的正面的除配置有所述半导体元件和所述布线部件的区域以外的整个面平滑。
16.根据权利要求1所述的半导体装置,其特征在于,在剖视时所述第一凹部为半球形。
17.根据权利要求1所述的半导体装置,其特征在于,所述第一凹部填充有焊锡。
18.根据权利要求10所述的半导体装置,其特征在于,所述第二厚度相对于所述金属板的厚度为60%以上且90%以下。
CN201980004101.7A 2018-03-01 2019-01-28 半导体装置 Active CN111052353B (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2018-036107 2018-03-01
JP2018036107 2018-03-01
PCT/JP2019/002647 WO2019167509A1 (ja) 2018-03-01 2019-01-28 半導体装置

Publications (2)

Publication Number Publication Date
CN111052353A CN111052353A (zh) 2020-04-21
CN111052353B true CN111052353B (zh) 2023-12-08

Family

ID=67806073

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201980004101.7A Active CN111052353B (zh) 2018-03-01 2019-01-28 半导体装置

Country Status (5)

Country Link
US (1) US11133271B2 (zh)
JP (1) JP7047895B2 (zh)
CN (1) CN111052353B (zh)
DE (1) DE112019001086T5 (zh)
WO (1) WO2019167509A1 (zh)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2020121680A1 (ja) * 2018-12-10 2020-06-18 富士電機株式会社 半導体装置
CN112352310B (zh) 2019-01-16 2024-11-08 富士电机株式会社 半导体装置
JP2021108321A (ja) * 2019-12-27 2021-07-29 京セラ株式会社 印刷配線板及び印刷配線板の製造方法
JP7459539B2 (ja) * 2020-02-07 2024-04-02 富士電機株式会社 半導体装置
CN116325128A (zh) 2021-04-12 2023-06-23 富士电机株式会社 半导体装置
JP2022188583A (ja) * 2021-06-09 2022-12-21 Ngkエレクトロデバイス株式会社 半導体装置用基板
CN114245633A (zh) * 2021-11-30 2022-03-25 中航光电科技股份有限公司 多通道数字光模块气密封装结构及陶瓷电路板

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105612614A (zh) * 2014-03-20 2016-05-25 富士电机株式会社 半导体装置及半导体装置的制造方法
CN107204321A (zh) * 2016-03-18 2017-09-26 富士电机株式会社 半导体装置及半导体装置的制造方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE4318241C2 (de) 1993-06-02 1995-06-29 Schulz Harder Juergen Metallbeschichtetes Substrat mit verbesserter Widerstandsfähigkeit gegen Temperaturwechselbeanspruchung
JP2003100965A (ja) 2001-09-20 2003-04-04 Denki Kagaku Kogyo Kk 回路基板の信頼性評価方法及び回路基板
JP2006245436A (ja) 2005-03-04 2006-09-14 Hitachi Metals Ltd 窒化珪素配線基板およびこれを用いた半導体モジュール
KR101391924B1 (ko) * 2007-01-05 2014-05-07 페어차일드코리아반도체 주식회사 반도체 패키지
US7821130B2 (en) * 2008-03-31 2010-10-26 Infineon Technologies Ag Module including a rough solder joint
JP2012114203A (ja) 2010-11-24 2012-06-14 Mitsubishi Electric Corp 絶縁基板とその製造方法および電力半導体装置
JP2013175525A (ja) 2012-02-24 2013-09-05 Denki Kagaku Kogyo Kk セラミックス回路基板の製造方法およびその回路基板
CN103855142B (zh) * 2012-12-04 2017-12-29 东芝照明技术株式会社 发光装置及照明装置
JP6278516B2 (ja) 2014-05-28 2018-02-14 Ngkエレクトロデバイス株式会社 パワーモジュール用基板
BE1023850B1 (nl) 2016-06-29 2017-08-14 C-Mac Electromag Bvba Verbeterde elektronische schakeling en substraat met identificatiepatroon voor afzonderlijke elektronische schakelingen en werkwijze voor het produceren daarvan
US10276472B2 (en) * 2017-04-01 2019-04-30 Ixys, Llc Heat transfer plate having small cavities for taking up a thermal transfer material

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105612614A (zh) * 2014-03-20 2016-05-25 富士电机株式会社 半导体装置及半导体装置的制造方法
CN107204321A (zh) * 2016-03-18 2017-09-26 富士电机株式会社 半导体装置及半导体装置的制造方法

Also Published As

Publication number Publication date
DE112019001086T5 (de) 2020-11-12
US11133271B2 (en) 2021-09-28
US20200194386A1 (en) 2020-06-18
JPWO2019167509A1 (ja) 2020-12-03
WO2019167509A1 (ja) 2019-09-06
JP7047895B2 (ja) 2022-04-05
CN111052353A (zh) 2020-04-21

Similar Documents

Publication Publication Date Title
CN111052353B (zh) 半导体装置
US10262953B2 (en) Semiconductor device
US9362192B2 (en) Semiconductor device comprising heat dissipating connector
CN110047807B (zh) 半导体装置
US11521941B2 (en) Semiconductor device with a substrate having depressions formed thereon
JP7379886B2 (ja) 半導体装置
JP7070661B2 (ja) 半導体装置
JP2007109880A (ja) 半導体装置
CN108735679B (zh) 半导体装置
CN112768515A (zh) 半导体装置
CN112397472A (zh) 半导体装置
US11996347B2 (en) Semiconductor device
JP7459539B2 (ja) 半導体装置
US20240379485A1 (en) Semiconductor device
US20230109985A1 (en) Semiconductor module
CN114446899B (zh) 半导体装置
US11901328B2 (en) Semiconductor device
US20230067156A1 (en) Semiconductor device
JP2023038533A (ja) 半導体装置
WO2024128062A1 (ja) 半導体装置
JP2024050081A (ja) 半導体装置
JP2022020969A (ja) 半導体装置
CN111681993A (zh) 半导体装置

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant