CN110707053A - Chip packaging structure and chip packaging method - Google Patents
Chip packaging structure and chip packaging method Download PDFInfo
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- CN110707053A CN110707053A CN201911107941.4A CN201911107941A CN110707053A CN 110707053 A CN110707053 A CN 110707053A CN 201911107941 A CN201911107941 A CN 201911107941A CN 110707053 A CN110707053 A CN 110707053A
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- solder paste
- solid glue
- solid
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 39
- 238000000034 method Methods 0.000 title claims abstract description 16
- 239000007787 solid Substances 0.000 claims abstract description 98
- 239000003292 glue Substances 0.000 claims abstract description 96
- 229910000679 solder Inorganic materials 0.000 claims abstract description 74
- 238000005476 soldering Methods 0.000 claims description 20
- 239000011159 matrix material Substances 0.000 claims description 8
- 230000000694 effects Effects 0.000 abstract description 16
- 230000009286 beneficial effect Effects 0.000 abstract description 5
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 17
- 239000000853 adhesive Substances 0.000 description 12
- 230000001070 adhesive effect Effects 0.000 description 12
- 239000006071 cream Substances 0.000 description 11
- 238000004519 manufacturing process Methods 0.000 description 4
- 230000002035 prolonged effect Effects 0.000 description 3
- 238000003466 welding Methods 0.000 description 3
- 238000001514 detection method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 230000003139 buffering effect Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000000155 melt Substances 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000009417 prefabrication Methods 0.000 description 1
- 238000007711 solidification Methods 0.000 description 1
- 230000008023 solidification Effects 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/564—Details not otherwise provided for, e.g. protection against moisture
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The invention belongs to the technical field of chip packaging, and particularly relates to a chip packaging structure which comprises a circuit board (1) and an IC chip (2) mounted on the circuit board (1), wherein a first solder paste (31) is arranged on the surface of the circuit board (1), the first solder paste (31) is arranged around the IC chip (2) or below the IC chip (2), a solid glue (4) is arranged on the first solder paste (31), and the solid glue (4) is used for bonding the IC chip (2) to the circuit board (1). The invention can fix the position of the solid glue, prevent the solid glue from displacing before the IC chip is bonded to the circuit board, and is beneficial to improving the packaging effect of the chip. In addition, the invention also discloses a chip packaging method.
Description
Technical Field
The invention belongs to the technical field of chip packaging, and particularly relates to a chip packaging structure and a chip packaging method.
Background
With the wide application and rapid development of mobile terminals and consumer electronics, the area of the chip is gradually reduced, and the chip is required to have better heat dissipation to meet the demand of rapid charging. This requires smaller, thinner, lighter, higher current, lower on-resistance, and better heat dissipation from the circuit chip.
However, since the leads of the lead frame are used to provide external electrical connections, additional lead space is required, which increases the area of the original chip by at least 20%. In other circuit chips, the chip is flip-chip bonded to the lead frame, although a large current capacity can be provided, the lead frame still needs an additional pin space, and the packaging area is large.
The inventors have found that the existing packaging solutions have at least the following drawbacks: before the IC chip is bonded to the circuit board, the glue between the IC chip and the circuit board is easy to displace, and the chip packaging effect is influenced.
Disclosure of Invention
One of the objects of the present invention is: aiming at the defects of the prior art, the chip packaging structure is provided, the position of solid glue can be fixed, the solid glue is prevented from displacing before the IC chip is bonded to the circuit board, and the chip packaging effect is improved.
In order to achieve the purpose, the invention adopts the following technical scheme:
a chip packaging structure comprises a circuit board and an IC chip mounted on the circuit board, wherein a first solder paste is arranged on the surface of the circuit board, the first solder paste is arranged around the IC chip or below the IC chip, solid glue is arranged on the first solder paste, and the solid glue is used for bonding the IC chip to the circuit board.
As an improvement of the chip packaging structure, a plurality of grooves are uniformly formed in the surface of the circuit board corresponding to the IC chip, and second solder paste is arranged in the grooves.
As an improvement of the chip package structure of the present invention, at least a portion of the grooves form a matrix.
As an improvement of the chip packaging structure of the present invention, the circuit board is further provided with a plurality of wires, and at least a portion of the grooves are electrically connected to the wires.
As an improvement of the chip package structure of the present invention, the solid adhesive is disposed around the circuit board and the IC chip at intervals.
As an improvement of the chip package structure of the present invention, a portion of the solid-state adhesive extends to the inside and/or outside of the IC chip.
As an improvement of the chip package structure of the present invention, the solid state adhesive located at the corner or below the IC chip forms a bar structure.
As an improvement of the chip packaging structure of the present invention, the first solder paste is in a dot or strip shape, and the solid glue is in a strip or sheet shape.
Another object of the present invention is to provide a chip packaging method, comprising:
printing a first solder paste on a circuit board such that the first solder paste surrounds a periphery or an underside of an IC chip;
placing a solid state paste on top of the first solder paste;
and through reflow soldering, the solid glue is heated, melted and solidified, so that one part of the solid glue extends to the inner side of the IC chip, and the other part of the solid glue extends to the outer side of the IC chip.
It should be noted that, in the packaging method of the present invention, a printer is used to print the first solder paste on the circuit board, and surround the surface of the circuit board corresponding to the IC chip or below the IC chip, the first solder paste may be printed in a dot shape, and the first solder paste is used to fix the solid glue; adopt the chip mounter, with the strip solid-state glue on first tin cream, at last reflow soldering is carried out, it melts to heat solid-state glue, part flows in the bottom of IC chip, solid-state glue solidification, some solid-state glue extends the inboard of IC chip, another part solid-state glue extends the outside of IC chip, play and fill the space between IC chip and the circuit board, make IC chip bonding to the circuit board, guarantee the reliability of being connected between IC chip and the circuit board, help improving the finished product quality, wherein, first tin cream and second tin cream can be printed on the circuit board in advance, judge whether the position of first tin cream and second tin cream is accurate through optical detection device, then set up solid-state glue at the top of first tin cream, at last with IC chip welding on the circuit board, first tin cream plays the effect of fixed solid-state glue, second tin cream is used for welding IC chip on the circuit board.
As an improvement of the chip packaging method, the maximum temperature of reflow soldering is 180-270 ℃.
The invention has the beneficial effects that the circuit board comprises a circuit board and an IC chip arranged on the circuit board, wherein the surface of the circuit board is provided with a first tin paste, the first tin paste is arranged around the IC chip or below the IC chip, and the first tin paste is provided with solid glue which is used for bonding the IC chip to the circuit board. Before the IC chip is bonded to the circuit board, glue between the IC chip and the circuit board is easy to displace, and the chip packaging effect is influenced, so that the surface of the circuit board is provided with first solder paste, the first solder paste is provided with solid glue, the first solder paste can be printed on the surface of the circuit board by a printer and surrounds the surface of the circuit board corresponding to the IC chip, or is arranged below the IC chip, the solid glue is heated and melted during reflow soldering, and part of the solid glue flows into the IC chip, so that the IC chip is bonded to the circuit board, and the probability of insufficient soldering of the IC chip and the circuit board is reduced; the solid glue is solid and has a multilayer structure, the solid glue is placed on the first solder paste because the solid glue does not have viscosity, the first solder paste plays a role in fixing the solid glue, the solid glue which is heated and melted has viscosity when a chip is packaged, the IC chip is bonded to the circuit board, and a gap between the IC chip and the circuit board is filled, so that the mechanical property of the packaging structure is improved, the IC chip is firmly fixed, the displacement of the IC chip caused by mechanical vibration in the using process is prevented, the battery cell packaging effect is improved, and the service life of an electronic product is prolonged; the gap between the IC chip and the circuit board is not limited to the edge of the IC chip, and a certain gap exists because the center of part of the IC chip is not welded with the circuit board, so that the surface of the circuit board corresponding to the center of the IC chip can be correspondingly provided with first tin paste and solid glue, the first tin paste can be printed in a point shape, and the size of the first tin paste can be adjusted according to the size of the actual circuit board, so that the effect of fixing the solid glue is achieved. The invention can fix the position of the solid glue, prevent the solid glue from displacing before the IC chip is bonded to the circuit board, and is beneficial to improving the packaging effect of the chip.
Drawings
Fig. 1 is a schematic structural diagram before packaging in the present invention.
Fig. 2 is a schematic diagram of a packaged structure according to the present invention.
Wherein: 1-a circuit board; 2-IC chip; 31-first solder paste; 32-second solder paste; 4-solid glue; 21-groove.
Detailed Description
As used in the specification and in the claims, certain terms are used to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This specification and claims do not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. "substantially" means within an acceptable error range, and a person skilled in the art can solve the technical problem within a certain error range to substantially achieve the technical effect.
In the description of the present invention, it is to be understood that the terms "upper", "lower", "front", "rear", "left", "right", horizontal ", and the like indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present invention.
In the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
The present invention will be described in further detail below with reference to the accompanying drawings, but the present invention is not limited thereto.
Example 1
As shown in fig. 1 to 2, a chip package structure includes a circuit board 1 and an IC chip 2 mounted on the circuit board 1, wherein a first solder paste 31 is disposed on a surface of the circuit board 1, the first solder paste 31 is disposed around the IC chip 2 or below the IC chip 2, a solid adhesive 4 is disposed on the first solder paste 31, and the solid adhesive 4 is used for bonding the IC chip 2 to the circuit board 1. Before the IC chip 2 is bonded to the circuit board 1, glue between the IC chip and the circuit board is easy to displace, and the chip packaging effect is influenced, so that the surface of the circuit board 1 is provided with the first solder paste 31, the solid glue 4 is arranged on the first solder paste 31, the first solder paste 31 can be printed on the surface of the circuit board 1 by a printer and surrounds the surface of the circuit board 1 corresponding to the IC chip 2, or is arranged below the IC chip 2, the solid glue 4 is heated and melted in reflow soldering, and part of the solid glue flows into the IC chip 2, so that the IC chip 2 is bonded to the circuit board 1, and the probability of false soldering between the IC chip 2 and the circuit board 1 is reduced; the solid glue 4 is solid and has a multilayer structure, because the solid glue 4 does not have viscosity, the solid glue 4 is placed on the first solder paste 31, the first solder paste 31 plays a role in fixing the solid glue 4, when the chip is packaged, the solid glue 4 which is heated and melted has viscosity, the IC chip 2 is bonded on the circuit board 1, and the gap between the IC chip 2 and the circuit board 1 is filled, so that the mechanical property of the packaging structure is improved, the IC chip 2 is firmly fixed, the IC chip 2 is prevented from being displaced due to mechanical vibration in the using process, the effect of packaging the electric core is improved, and the service life of an electronic product is prolonged; the gap between the IC chip 2 and the circuit board 1 is not limited to the edge of the IC chip 2, and a certain gap also exists because the center of part of the IC chip 2 is not welded to the circuit board 1, so that the first solder paste 31 and the solid adhesive 4 can be correspondingly arranged on the surface of the circuit board 1 corresponding to the center of the IC chip 2, the first solder paste 31 can be printed in a dot shape, and the size of the first solder paste 31 can be adjusted according to the size of the actual circuit board 1, thereby achieving the effect of fixing the solid adhesive 4.
Preferably, the surface of the circuit board 1 corresponding to the IC chip 2 is uniformly provided with a plurality of grooves 21, and the grooves 21 are provided with the second solder paste 32. In the reflow soldering process, the second solder paste 32 of the groove 21 on the surface of the circuit board 1 is melted to form a pad, so that the IC chip 2 is electrically connected with the circuit board 1 through the pad, the IC chip 2 is soldered on the circuit board 1, the production process is simplified, and the mounting efficiency of the circuit board 1 and the IC chip 2 is improved; wherein, the shape of the groove 21 is circular, but not limited to this, the shape and depth of the groove 21 can be adjusted according to the actual production process,
preferably, at least a portion of the grooves 21 form a matrix. The central recess 21 encloses a square matrix, the recesses 21 at the periphery of the square matrix enclose another square matrix, and so on, the size of each square matrix can be adjusted according to the actual circuit of the IC chip 2, but the invention is not limited thereto, and the recesses 21 can also enclose a circular, elliptical matrix or hollow rectangle.
Preferably, the circuit board 1 is further provided with a plurality of wires, and at least a part of the grooves 21 are electrically connected with the wires. The groove 21 is electrically connected to the lead, and the groove 21 is electrically connected to the IC chip 2 by reflow soldering, so that the IC chip 2 is connected to the corresponding lead, thereby realizing the function of the circuit.
Preferably, the solid glue 4 is spaced around the circuit board 1 and the IC chip 2. The solid glue 4 is arranged around the circuit board 1 and the IC chip 2 at intervals, so that the cost of the solid glue 4 can be reduced, and the reliability of connection between the IC chip 2 and the circuit board 1 is ensured.
Preferably, a portion of the solid glue 4 extends to the inside and/or outside of the IC chip 2. The solid glue 4 is softened and flows along the IC chip 2, and part of the solid glue 4 flows into the inner side of the IC chip 2, but does not contact with the bonding pad of the circuit board 1, so that the welding of the IC chip 2 to the circuit board 1 is not hindered, the reliability of the connection between the IC chip 2 and the circuit board 1 is ensured, and the gap between the IC chip 2 and the circuit board 1 is filled to play a role of buffering.
Preferably, the solid state glue 4 located at the corners or under the IC chip 2 forms a stripe structure. The solid glue 4 adopting a plurality of bar structures is placed at the corners or the lower part of the IC chip 2, the using amount of the solid glue 4 can be reduced, the cost of the solid glue 4 can be reduced, the reliability of connection between the IC chip 2 and the circuit board 1 is ensured, the solid glue 4 adopting a plurality of bar structures can be enclosed into a circle or a rectangle according to the process requirements, and the adjacent solid glue 4 is arranged at intervals.
Preferably, the first solder paste 31 is in the shape of a dot, and the solid paste 4 is in the shape of a stripe. The shape of the first solder paste 31 is designed to be point-shaped, the shape of the solid glue 4 is designed to be strip-shaped, the solid glue 4 is placed on the point formed by the first solder paste 31, and only 2-3 points formed by the first solder paste 31 are required to be fixed with the solid glue 4, wherein the solid glue 4 can be formed through prefabrication and is attached to the point formed by the first solder paste 31 through a chip mounter.
The working principle of the invention is as follows:
before the IC chip 2 is bonded to the circuit board 1, glue between the IC chip and the circuit board is easy to displace, and the chip packaging effect is influenced, so that the surface of the circuit board 1 is provided with the first solder paste 31, the solid glue 4 is arranged on the first solder paste 31, the first solder paste 31 can be printed on the surface of the circuit board 1 by a printer and surrounds the surface of the circuit board 1 corresponding to the IC chip 2, or is arranged below the IC chip 2, the solid glue 4 is heated and melted in reflow soldering, and part of the solid glue flows into the IC chip 2, so that the IC chip 2 is bonded to the circuit board 1, and the probability of false soldering between the IC chip 2 and the circuit board 1 is reduced; the solid glue 4 is solid and has a multilayer structure, because the solid glue 4 does not have viscosity, the solid glue 4 is placed on the first solder paste 31, the first solder paste 31 plays a role in fixing the solid glue 4, when the chip is packaged, the solid glue 4 which is heated and melted has viscosity, the IC chip 2 is bonded on the circuit board 1, and the gap between the IC chip 2 and the circuit board 1 is filled, so that the mechanical property of the packaging structure is improved, the IC chip 2 is firmly fixed, the IC chip 2 is prevented from being displaced due to mechanical vibration in the using process, the effect of packaging the electric core is improved, and the service life of an electronic product is prolonged; the gap between the IC chip 2 and the circuit board 1 is not limited to the edge of the IC chip 2, and a certain gap also exists because the center of part of the IC chip 2 is not welded to the circuit board 1, so that the first solder paste 31 and the solid adhesive 4 can be correspondingly arranged on the surface of the circuit board 1 corresponding to the center of the IC chip 2, the first solder paste 31 can be printed in a dot shape, and the size of the first solder paste 31 can be adjusted according to the size of the actual circuit board 1, thereby achieving the effect of fixing the solid adhesive 4.
Example 2
The difference from example 1 is: in the embodiment, a part of the solid adhesive 4 extends to the inner side or the outer side of the IC chip 2, the first solder paste 31 is in the shape of a strip, and the solid adhesive 4 is in the shape of a sheet. According to the actual production demand, can be the shape design of first tin cream 31 for the strip, increase the area of contact of first tin cream 31 and solid-state glue 4 to reach the effect of better fixed solid-state glue 4, the shape design of solid-state glue 4 is the slice, increases the area of contact of first tin cream 31 and solid-state glue 4, improves reliability between the two.
The other structures are the same as those of embodiment 1, and are not described again here.
Example 3
As shown in fig. 1-2, a chip packaging method includes:
printing a first solder paste 31 on the circuit board 1 such that the first solder paste 31 surrounds the periphery of or below the IC chip 2;
placing the solid glue 4 on top of the first solder paste 31;
by reflow soldering, the solid glue 4 is heated to melt and solidify, so that a part of the solid glue 4 extends to the inner side of the IC chip 2, and the other part of the solid glue 4 extends to the outer side of the IC chip 2.
In the packaging method of the present invention, a printer is used to print the first solder paste 31 on the circuit board 1, and the first solder paste 31 surrounds the surface of the circuit board 1 corresponding to the IC chip 2 or is disposed below the IC chip 2, the first solder paste 31 may be printed in a dot shape, and the first solder paste 31 is used to fix the solid adhesive 4; fixing the strip-shaped solid glue 4 on the first solder paste 31 by using a chip mounter, finally performing reflow soldering, heating the solid glue 4 to melt, enabling part of the solid glue to flow into the bottom of the IC chip 2, solidifying the solid glue 4, enabling one part of the solid glue 4 to extend to the inner side of the IC chip 2, enabling the other part of the solid glue 4 to extend to the outer side of the IC chip 2, filling a gap between the IC chip 2 and the circuit board 1, enabling the IC chip 2 to be bonded on the circuit board 1, ensuring the reliability of connection between the IC chip 2 and the circuit board 1, and being beneficial to improving the quality of a finished product, wherein the first solder paste 31 and the second solder paste 32 can be printed on the circuit board 1 in advance, judging whether the positions of the first solder paste 31 and the second solder paste 32 are accurate or not by using an optical detection device, then arranging the solid glue 4 on the top of the first solder paste 31, finally soldering the IC chip 2 on the circuit board 1, and enabling the, the second solder paste 32 is used for soldering the IC chip 2 to the circuit board 1.
Preferably, the maximum temperature of reflow soldering is 180 ℃ to 270 ℃. The highest temperature of reflow soldering is limited, the temperature is prevented from being too high, the production cost is increased, the physical properties of the second solder paste 32 and the solid glue 4 are also influenced, meanwhile, the temperature is prevented from being too low, part of the second solder paste 32 is still in a solid state, and the second solder paste 32 is not beneficial to soldering the IC chip 2 and the circuit board 1.
Variations and modifications to the above-described embodiments may also occur to those skilled in the art, which fall within the scope of the invention as disclosed and taught herein. Therefore, the present invention is not limited to the above-mentioned embodiments, and any obvious improvement, replacement or modification made by those skilled in the art based on the present invention is within the protection scope of the present invention. Furthermore, although specific terms are employed herein, they are used in a generic and descriptive sense only and not for purposes of limitation.
Claims (10)
1. A chip packaging structure is characterized in that: the solder paste comprises a circuit board (1) and an IC chip (2) installed on the circuit board (1), wherein a first solder paste (31) is arranged on the surface of the circuit board (1), the first solder paste (31) surrounds the periphery of the IC chip (2) or is arranged below the IC chip (2), a solid glue (4) is arranged on the first solder paste (31), and the solid glue (4) is used for bonding the IC chip (2) to the circuit board (1).
2. The chip package structure of claim 1, wherein: the surface of the circuit board (1) corresponding to the IC chip (2) is uniformly provided with a plurality of grooves (21), and the grooves (21) are provided with second solder pastes (32).
3. The chip package structure of claim 2, wherein: at least a part of the grooves (21) form a matrix.
4. The chip package structure of claim 2, wherein: the circuit board (1) is further provided with a plurality of conducting wires, and at least one part of the groove (21) is electrically connected with the conducting wires.
5. The chip package structure of claim 1, wherein: the solid glue (4) is arranged around the circuit board (1) and the IC chip (2) at intervals.
6. The chip package structure of claim 1, wherein: wherein a portion of the solid glue (4) extends to the inside and/or outside of the IC chip (2).
7. The chip package structure of claim 1, wherein: the solid glue (4) positioned at the corner or below the IC chip (2) forms a strip-shaped structure.
8. The chip package structure of claim 1, wherein: the shape of the first solder paste (31) is a point shape or a strip shape, and the shape of the solid glue (4) is a strip shape or a sheet shape.
9. A method of chip packaging, comprising:
printing a first solder paste (31) on a circuit board (1) such that the first solder paste (31) surrounds the periphery of or below an IC chip (2);
placing a solid glue (4) on top of the first solder paste (31);
and through reflow soldering, the solid glue (4) is heated, melted and solidified, so that one part of the solid glue (4) extends to the inner side of the IC chip (2), and the other part of the solid glue (4) extends to the outer side of the IC chip (2).
10. The chip packaging method according to claim 9, wherein: the maximum temperature of the reflow soldering is 180-270 ℃.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911107941.4A CN110707053A (en) | 2019-11-13 | 2019-11-13 | Chip packaging structure and chip packaging method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911107941.4A CN110707053A (en) | 2019-11-13 | 2019-11-13 | Chip packaging structure and chip packaging method |
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| Publication Number | Publication Date |
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| CN110707053A true CN110707053A (en) | 2020-01-17 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911107941.4A Pending CN110707053A (en) | 2019-11-13 | 2019-11-13 | Chip packaging structure and chip packaging method |
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6774497B1 (en) * | 2003-03-28 | 2004-08-10 | Freescale Semiconductor, Inc. | Flip-chip assembly with thin underfill and thick solder mask |
| JP2012017375A (en) * | 2010-07-07 | 2012-01-26 | Sumitomo Electric Ind Ltd | Film-like electroconductive adhesive |
| CN108901144A (en) * | 2018-07-17 | 2018-11-27 | 天津瑞爱恩科技有限公司 | Enhance the method for printed wiring board rigid-flex combined strength |
| CN108966522A (en) * | 2018-07-17 | 2018-12-07 | 天津瑞爱恩科技有限公司 | QFN chip welding spot reinforcement means and element solder joint intensifying method |
| CN109309069A (en) * | 2018-09-19 | 2019-02-05 | 深圳市心版图科技有限公司 | Welded ball array encapsulates chip and its welding method |
| CN208532673U (en) * | 2018-06-21 | 2019-02-22 | 天津瑞爱恩科技有限公司 | Film |
| CN109545754A (en) * | 2018-11-22 | 2019-03-29 | 京东方科技集团股份有限公司 | A kind of encapsulating structure of chip, packaging method, display device |
| CN210467805U (en) * | 2019-11-13 | 2020-05-05 | 东莞市新懿电子材料技术有限公司 | Chip packaging structure |
-
2019
- 2019-11-13 CN CN201911107941.4A patent/CN110707053A/en active Pending
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6774497B1 (en) * | 2003-03-28 | 2004-08-10 | Freescale Semiconductor, Inc. | Flip-chip assembly with thin underfill and thick solder mask |
| JP2012017375A (en) * | 2010-07-07 | 2012-01-26 | Sumitomo Electric Ind Ltd | Film-like electroconductive adhesive |
| CN208532673U (en) * | 2018-06-21 | 2019-02-22 | 天津瑞爱恩科技有限公司 | Film |
| CN108901144A (en) * | 2018-07-17 | 2018-11-27 | 天津瑞爱恩科技有限公司 | Enhance the method for printed wiring board rigid-flex combined strength |
| CN108966522A (en) * | 2018-07-17 | 2018-12-07 | 天津瑞爱恩科技有限公司 | QFN chip welding spot reinforcement means and element solder joint intensifying method |
| CN109309069A (en) * | 2018-09-19 | 2019-02-05 | 深圳市心版图科技有限公司 | Welded ball array encapsulates chip and its welding method |
| CN109545754A (en) * | 2018-11-22 | 2019-03-29 | 京东方科技集团股份有限公司 | A kind of encapsulating structure of chip, packaging method, display device |
| CN210467805U (en) * | 2019-11-13 | 2020-05-05 | 东莞市新懿电子材料技术有限公司 | Chip packaging structure |
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