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CN110444528A - 包含虚设下拉式引线键合体的半导体装置 - Google Patents

包含虚设下拉式引线键合体的半导体装置 Download PDF

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Publication number
CN110444528A
CN110444528A CN201810418341.9A CN201810418341A CN110444528A CN 110444528 A CN110444528 A CN 110444528A CN 201810418341 A CN201810418341 A CN 201810418341A CN 110444528 A CN110444528 A CN 110444528A
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China
Prior art keywords
semiconductor bare
bare chip
substrate
wire bonding
semiconductor
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Granted
Application number
CN201810418341.9A
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CN110444528B (zh
Inventor
陈含笑
廖致钦
邱进添
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Shengdai Information Technology (shanghai) Co Ltd
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Shengdai Information Technology (shanghai) Co Ltd
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Priority to CN201810418341.9A priority Critical patent/CN110444528B/zh
Priority to US16/398,511 priority patent/US11031372B2/en
Publication of CN110444528A publication Critical patent/CN110444528A/zh
Application granted granted Critical
Publication of CN110444528B publication Critical patent/CN110444528B/zh
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Abstract

公开了一种半导体装置，其包含基板上的半导体裸芯的堆叠体，其中使用虚设引线键合体将堆叠体中的半导体裸芯引线键合到基板。每个虚设引线键合体具有刚度，使得虚设引线键合体一同有效地将裸芯堆叠体拉向基板和/或向下保持抵靠基板。

Description

包含虚设下拉式引线键合体的半导体装置
技术领域
本技术总体上涉及一种半导体装置，并且特别地涉及一种包含虚设下拉式引线键合体的半导体装置。
背景技术
对便携式消费电子产品的需求的强劲增长推动了对大容量存储装置的需求。非易失性半导体存储器装置(诸如闪速存储器储存卡)正变得广泛使用，以满足对数字信息存储和交换的日益增长的需求。它们的便携性、多功能性和坚固的设计以其高可靠性和大容量已经使这样的存储器装置理想地用于各种电子装置中，例如包含数码相机、数码音乐播放器、视频游戏控制台、PDA和蜂窝电话。
然而很多不同的封装配置是已知的，闪速存储器储存卡一般可以制造为系统级封装(SiP)或多芯片模块(MCM)，其中多个裸芯被安装和互连在小足印(footprint)基板上。基板一般可以包含硬的、电介质基部，电介质基部具有在一侧或两侧上蚀刻的导电层。在裸芯和(多个)导电层之间形成电连接，并且(多个)导电层为裸芯去往主机装置的连接提供电引线结构。一旦完成裸芯和基板之间的电连接，该组件则典型地被包封在模塑料中，该模塑料提供保护性封装体。
为了最有效地使用封装足印，已知的是，将半导体裸芯上下叠置。为了提供对半导体裸芯上的键合垫的接入，或者在相邻的裸芯之间用间隔层将其彼此完全重叠来将裸芯堆叠，或者通过偏移将裸芯堆叠。在偏移配置中，将裸芯堆叠在另一裸芯的顶部上，使得下部裸芯的键合垫保持暴露。
常规的堆叠裸芯存在的问题是，裸芯在非引线键合侧倾向于翘曲或向上翘。现有技术图1示出了包含堆叠的存储器裸芯52的常规半导体封装体50的示例，堆叠的存储器裸芯52在非引线键合侧离开基板54向上翘起。在一些实例中，裸芯可以翘起到一定程度，顶部裸芯的边缘延伸穿过包封的模塑料56的表面，则该裸芯暴露于外部环境。另外，封装体制造商在封装体表面上印刷封装体名称、规格、标识和/或其他信息。考虑到裸芯边缘的已知突起，裸芯边缘突起的区域可以被指定为禁止区域，其中没有任何印刷。这限制了制造商在封装体表面上印刷的能力。
发明内容
在一个示例中，本技术涉及一种半导体装置，包括：基板，其包括接触垫的集合；一个或多个半导体裸芯，其安装在基板上并且电耦接到基板，一个或多个半导体裸芯中的至少一个半导体裸芯包括键合垫的集合；引线键合体的集合，其连接在至少一个半导体裸芯上的键合垫的集合与基板上的接触垫的集合之间，引线键合体的集合配置为在一个或多个半导体裸芯上施加力以将一个或多个半导体裸芯向下保持在基板上。
在又一个示例中，本技术涉及一种半导体装置，包括：基板，其包括接触垫的第一集合和接触垫的第二集合；一个或多个半导体裸芯，其安装在基板上，一个或多个半导体裸芯中的至少一个半导体裸芯包括键合垫的第一集合和键合垫的第二集合；引线键合体的第一集合，其将至少一个半导体裸芯上的键合垫的第一集合电连接到基板上的接触垫的第一集合，引线键合体的第一集合配置为在键合垫的第一集合与接触垫的第一集合之间传输信号；以及引线键合体的第二集合，其连接在至少一个半导体裸芯上的键合垫的第二集合与基板上的接触垫的第二集合之间，引线键合体的第二集合配置为在一个或多个半导体裸芯上施加力以将一个或多个半导体裸芯向下保持在基板上。
在另外的示例中，本技术涉及一种半导体装置，包括：基板，其包含接触垫的第一集合和接触垫的第二集合；多个半导体裸芯，其以偏移的阶梯式布置堆叠在基板上；部件，其安装在多个半导体裸芯的顶部上；虚设键合垫的集合，其沿着部件的边缘形成；信号传输引线键合体的集合，其配置为将多个半导体裸芯彼此电连接并且将多个半导体裸芯与基板上的接触垫的第一集合电连接；以及虚设引线键合体的集合，其连接在虚设键合垫的集合与基板上的接触垫的第二集合之间，虚设引线键合体的集合配置为在多个半导体裸芯上施加力以将多个半导体裸芯向下保持在基板上。
在另外的示例中，本技术涉及一种半导体装置，包括：基板构件，其包含接触垫构件的集合；一个或多个半导体裸芯，其安装在基板构件上，一个或多个半导体裸芯包括第一边缘和第二边缘，第一边缘与第二边缘相对；离开第一边缘的以将一个或多个半导体裸芯电耦接到基板构件的构件；用于在第二边缘上施加力以将一个或多个半导体裸芯向下保持在基板上的构件。
附图说明
图1是具有翘起的裸芯堆叠体的半导体封装体的现有技术视图。
图2是根据本技术的实施例的半导体装置的总体制造过程的流程图。
图3是根据本技术的实施例的在制造过程中的第一步骤处的半导体装置的侧视图。
图4是根据本技术的实施例的在制造过程中的第二步骤处的半导体装置的俯视图。
图5是根据本技术的实施例的在制造过程中的第三步骤处的半导体装置的侧视图。
图6是根据本技术的实施例的在制造过程中的第四步骤处的半导体装置的侧视图。
图7和图8是根据本技术的实施例的用于半导体装置中的半导体裸芯的俯视图。
图9是根据本技术的实施例的在制造过程中的第五步骤处的半导体装置的侧视图。
图10是根据本技术的实施例的在制造过程中的第六步骤处的半导体装置的侧视图。
图11是图10中所示的半导体装置的俯视图。
图12是根据本技术的实施例的完成的半导体装置的侧视图。
图13-19是本技术的替代实施例的俯视图和侧视图。
具体实施方式
现在将参照附图描述本技术，附图在实施例中涉及半导体装置，其包含虚设引线键合体，以将裸芯堆叠体平坦地抵靠基板固定。在实施例中，裸芯堆叠体可以包含以偏移、阶梯式配置堆叠的若干半导体裸芯。裸芯堆叠体中的裸芯的第一边缘包含裸芯键合垫，裸芯键合垫接收沿着堆叠体向下的引线键合体，以将堆叠体中的裸芯彼此电互连并且与基板电互连。
根据本技术的多个方面，裸芯堆叠体中的顶部半导体裸芯可以包括裸芯键合垫的两个集合。裸芯键合垫的第一集合可以沿着裸芯的第一边缘设置，并且可以用作裸芯堆叠体的第一边缘上的电互连的裸芯键合垫的一部分，以将信号传输到顶部半导体裸芯并从顶部半导体裸芯传输信号。沿着第二、相对的边缘设置的裸芯键合垫的第二集合可以是裸芯键合垫的“虚设”集合，因为它们不用于将信号传输到顶部半导体裸和/或从顶部半导体裸芯传输信号。
使用离开裸芯堆叠体的第二边缘的虚设引线键合体将裸芯键合垫的第二或虚设集合引线键合到基板。离开裸芯堆叠体的第二边缘的引线键合体可以是引线键合体的“虚设”集合，因为它们不用来将信号传输到顶部半导体裸芯/从顶部半导体裸芯传输信号。每个虚设引线键合体具有刚度，使得虚设引线键合体一同有效地将裸芯堆叠体拉向基板和/或向下保持抵靠基板。
可以理解的是，本技术可以以很多不同的形式来实施，而不应被解释限制为对本文阐述的实施例。确切地说，提供这些实施例使得本公开将是透彻和完整的，并将完全地向本领域的技术人员传达本技术。实际上，本技术旨在覆盖这些实施例的替代、修改和等同，这些实施例的替代、修改和等同被包括在由所附权利要求限定的本发明的范围和精神之内。此外，在本技术的以下详细描述中，提出许多具体的细节以便提供本技术的透彻理解。然而，对本领域的普通技术人员将清楚的是，本技术可以在没有这样的具体细节的情况下来实践。
如可以在本文中使用的术语“顶部”和“底部”、“上部”和“下部”以及“垂直”和“水平”仅是通过示例和说明性目的的方式，并且不意味着限制本技术的描述，因为所引用的项目可以在位置和取向进行交换。此外，如本文所使用的术语“实质上”、“近似”和/或“大约”意思是，指定的尺寸或参数对于给定的应用可以在可接受的制造公差内变化。在一个实施例中，可接受的制造公差为±0.25％。如本文所使用的，术语“半导体裸芯”或简称“裸芯”可以指一个或多个半导体裸芯。
现在将参照图2的流程图及图4至图16的俯视图、侧视图和立体图来进行说明本技术的实施例。尽管图3至图16各自示出了单独的半导体装置100或其部分，但应该理解的是，半导体装置100可以与基板面板上的多个其他封装体一起批量处理以实现规模经济。基板面板上的装置100的行数和列数可以变化。
用于制造半导体装置100的基板面板开始于多个基板102(再次地，图2至图18中示出了一个这样的基板)。基板102可以是各种不同的芯片载体介质，包括印刷电路板(PCB)、引线框架或者带自动键合(tape automated bonded，TAB)带。在基板102是PCB的情况下，基板可以由具有顶部导电层105和底部导电层107的芯103形成，如图3所示。芯103可以由各种电介质材料形成，诸如，例如聚酰亚胺层压体、包含FR4和FR5的环氧树脂、双马来酰亚胺三嗪(BT)等。芯可以具有在40微米(μm)至200μm之间的厚度，但是在替代实施例中，芯的厚度可以在该范围之外变化。在替代实施例中，芯103可以是陶瓷的。
围绕芯的导电层105、107可以由铜或铜合金、镀铜或镀铜的合金、合金42(42Fe/58Ni)、镀铜的钢或适合用于基板面板上的其他金属和材料来形成。导电层可以具有约10μm至25μm的厚度，但是在替代实施例中，层的厚度可以在该范围之外变化。
图2是根据本技术的实施例的用于形成半导体装置100的制造过程的流程图。在步骤200中，可以钻孔半导体装置100的基板102以在基板102中限定过孔通孔104。通孔104是作为示例，并且基板102可以包含比图中所示的更多得多的通孔104，并且它们可以处于与图中所示的不同的位置。接下来在步骤202中，在顶部导电层和底部导电层中的一个或两个上形成导电图案。(多个)导电图案可以包含在基板的顶表面上的电迹线106和接触垫109，以及在基板的底表面上的接触垫108，如在例如图4和图5中所示的。迹线106和接触垫109、108(其中在图中仅一些被编号)是作为示例，并且基板102可以包含比图中示出的更多的迹线和/或接触垫，并且它们可以处于与图中所示的不同的位置。
在一个实施例中，如图4所示，基板102可以在基板102的相对的边缘处包括一行或多行接触垫109。其他实施例可以采用多层基板，其包括除了在顶表面和/或底表面上的导电图案外的内部导电图案。
在各种实施例中，完成的半导体装置可以用作BGA(球栅阵列)封装体。基板102的下表面可以包含用于接收焊料球的接触垫108，如下所述。在各种实施例中，完成的半导体装置180可以是LGA(焊盘栅阵列)封装体，该LGA封装体包含用于将完成的装置180可移除地耦合在主机装置内的接触指。在这样的实施例中，下表面可以包含接触指而不是接收焊球的接触垫。基板102的顶表面和/或底表面上的导电图案可以通过各种适合的过程形成，包含例如各种光刻过程。
再次参照图2，接下来可以在步骤204中检查基板102。该步骤可以包括自动光学检查(AOI)。一旦检查，在步骤206中就可以将焊接掩模110(图5)施加到基板。在施加焊接掩模之后，可以对要焊接到导电图案上的接触垫和任何其他区域进行电镀，例如，在步骤208中，可以在已知的电镀或薄膜沉积工艺中用Ni/Au、合金42等电镀。然后基板102可以在步骤210中进行操作测试。在步骤212中，基板可以被目视检查，包括例如自动目视检查(AVI)和最终目视检查(FVI)以检查污染、划痕和变色。这些步骤中的一个或多个步骤可能被省略或以不同的顺序进行。
假设基板102通过检查，则接下来可以在步骤214中将无源部件112(图4)粘附到基板102。一个或多个无源部件可以包括例如一个或多个电容器、电阻器和/或电感器，但是可以预期其他部件。所示的无源部件112仅作为示例，并且在其他实施例中，数目、类型和位置可以不同。
参照图6，在步骤216中，控制器半导体裸芯114可以接着被表面安装到基板102，并且使用引线键合体116被引线键合到基板102。控制器114可以例如是ASIC，但是也可以预期其它控制器。虽然在基板上安装控制器114具有优点，但是在另外的实施例中，控制器可替代地安装在裸芯堆叠体(在下面解释)的顶部上。所示的引线键合体仅作为示例，并且可能有比所示的更多的引线键合体116。虽然引线键合体116显示为从控制器114的单侧离开(off)，但是在另外的实施例中，可以是从两侧、三侧或全部四侧离开的引线键合体。
在步骤220中，可以在基板上形成半导体裸芯堆叠体。半导体裸芯可以包括图7的俯视图中所示的半导体裸芯124和图8的俯视图中所示的半导体裸芯124t。半导体裸芯124可以包含沿着半导体裸芯124的第一边缘的裸芯键合垫126的集合。这些裸芯键合垫用于使半导体裸芯彼此电互连，并且使半导体裸芯与基板电互连，以与半导体裸芯之间来回信号传输。特别地，半导体裸芯124可以通过处理步骤以及金属化步骤来形成，该处理步骤限定裸芯124内的集成电路(未示出)，该金属化步骤沉积包含裸芯键合垫126和金属互连层的金属层以及通孔，以将集成电路与裸芯键合垫126电连接。裸芯键合垫126在本文中也可以被称为信号传输键合垫126。每个裸芯124、124t可以包含比图7中所示的更多得多的裸芯键合垫126。
半导体裸芯124t可以与半导体裸芯124相同，不同之处在于裸芯124t包含裸芯键合垫的第二集合，本文中称为虚设裸芯键合垫128。在实施例中，虚设裸芯键合垫128与信号传输键合垫126的可区别之处在于，虚设裸芯键合垫128未电连接到裸芯124t内的集成电路。在另外的实施例中，虚设裸芯键合垫128可以连接到裸芯124t内的集成电路，但是虚设裸芯键合垫128不用于将信号传输到半导体裸芯124t内的集成电路或从之传输信号。
与裸芯124一样，裸芯124t还可以包含位于裸芯124t的第一边缘上的信号传输键合垫126，其将信号传输到裸芯124t内的集成电路和从裸芯124t内的集成电路传输信号。虚设裸芯键合垫128可以沿着裸芯124t的与包含信号传输键合垫126的第一边缘相对的第二边缘设置。如下所述，裸芯124t可以包括比图8中所示的更多或更少的裸芯键合垫128。
参考图9，在步骤220中,可以将若干半导体裸芯124、124t堆叠在基板102上以形成裸芯堆叠体120。在实施例中，裸芯堆叠体可以包含单个裸芯124t，其可以是堆叠体120中最顶部的半导体裸芯。剩余的半导体裸芯可以是裸芯124(没有虚设裸芯键合垫128)。然而，在另外的实施例中，裸芯堆叠体可以包含多于一个的裸芯124t。在一个这样的另外的实施例中，裸芯堆叠体120可以包含全部裸芯124t而没有裸芯124。
半导体裸芯124、124t可以例如是存储器裸芯，诸如2D或3D的NAND闪速存储器裸芯，但是可以使用其他类型的半导裸芯。这些其他类型的半导体裸芯包括但不限于诸如ASIC的控制器裸芯或诸如SDRAM的RAM。在包含多个半导体裸芯的情况下，半导体裸芯可以以偏移的阶梯式配置上下叠置以形成裸芯堆叠体120。图中所图示的示例包括四个半导体裸芯124、124t，但是实施例可以包括不同数目的半导体裸芯，包括例如1、2、4、8、16、32或64个裸芯。在另外的实施例中可以存在其他数目的裸芯。可以使用裸芯贴附膜(DAF)层将裸芯粘附到基板和/或将裸芯彼此粘附。作为一个示例，裸芯贴附膜可以是来自Henkel AG&Co.KGaA的8988UV环氧树脂，其被固化到B阶段以将裸芯124、124t初步粘附在堆叠体120中，并且随后被固化到最终的C阶段以将裸芯124、124t永久粘附在堆叠体120中。
裸芯堆叠体120可以包含第一边缘120a(邻近裸芯键合垫126)和第二边缘120b(邻近裸芯键合垫128)。如图9所示以及在背景技术部分中讨论的，在基板上形成裸芯堆叠体120之后，力可能作用在裸芯堆叠体上，其克服最底部裸芯上的DAF层的粘附力，使得裸芯堆叠体120的边缘120b离开基板而翘起，如图9所示。根据本技术在引线键合步骤期间纠正该问题，如下文所解释的。
在步骤224中，可以在堆叠体120中在裸芯124、124t上形成引线键合体的两个集合。如图10和图11所示，可以沿裸芯堆叠体120的第一边缘向下、在相应的裸芯124、124t上的对齐的裸芯键合垫126之间形成引线键合体的第一集合，引线键合体130。引线键合体130也可以用来将裸芯堆叠体120电连接到基板102上的接触垫109。引线键合体可以用于将对齐的裸芯键合垫126彼此电连接并且将对齐的裸芯键合垫126电连接到基板102，从而允许在基板与堆叠体120中的半导体裸芯124、124t之间进行信号传输。引线键合体130在本文中也可以被称为信号传输引线键合体130。
在一个实施例中，引线键合体130可以形成为球形键合体，但是也可预期其他类型的键合体。引线键合体130可以由金、金合金或其他材料形成。引线键合体130总体上示出为以直的竖直列从裸芯堆叠体120中的一层裸芯到下一层裸芯、并且到基板102。然而，在替代实施例中，引线键合体中的一个或多个可以从一个裸芯对角线地延伸到下一个裸芯。此外，它可以是跳过裸芯堆叠体120中的一个或多个层的引线键合体。
在步骤224中，还可以在裸芯124t和基板102之间形成引线键合体的第二集合。如图10和图11所示，引线键合体的第二集合，引线键合体132可以形成在虚设裸芯键合垫128与基板102上的接触垫109之间。在实施例中，引线键合体132不在裸芯键合垫128和接触垫109之间携带信号，并且因此在本文中有时可以被称为虚设引线键合体132。根据本技术的各方面，为将裸芯堆叠体平坦地抵靠基板向下拉并将其保持在该位置的目的而提供引线键合体132。
具体而言，在虚设裸芯键合垫128与接触垫109之间形成的每个引线键合体在裸芯堆叠体的第二边缘上施加力，以将裸芯堆叠体向下拉和/或将其保持平坦地抵靠基板102。由每个虚设引线键合体所施加的力是由于用于虚设引线键合体的线的刚度。刚度可以是线直径、线的杨氏模量和/或几何刚度(即，由于引线键合体的形状引起的刚度)的因素。在一个示例中，每个虚设引线键合体132可以在裸芯垫上施加12至25克的力，但是这些值可以在另外的示例中变化，这部分取决于所使用的键合的类型、线的厚度和刚度、所使用的线的类型等。
在一个实施例中，虚设引线键合体132可以由金、铜或铝或其合金形成，但是在另外的实施例中可以使用其他材料。虚设引线键合体132可以具有0.6密耳、0.7密耳或0.8密耳的直径，但是在另外的实施例中引线键合体132的直径可以在这些值之上或之下变化。尽管在另外的实施例中，虚设引线键合体132的材料和/或厚度可以不同于信号传输引线键合体130的材料和/或厚度，但虚设引线键合体132可以由与信号传输引线键合体130相同的材料形成且具有相同的直径。
下面的表1中提供了由不同材料形成的虚设引线键合体132的属性的样本值。这些属性值仅作为示例提供，并且在实施例中可以变化。
表1
在一个实施例中，引线键合体132可以形成为球形键合体，但是也可预期其他类型的键合体。在使用引线键合体劈刀的形成期间，劈刀可以使用压力和热量在垫128上形成球。该压力还可帮助抵靠基板102使裸芯堆叠体的第二边缘变平坦。
图11示出了虚设引线键合体132的具体数目和配置，但是应该理解的是，虚设引线键合体132的数目和配置可以在实施例中变化，同时应该理解的是，虚设引线键合体132的数目和配置可以足以将裸芯堆叠体120的第二边缘120b抵靠基板102向下保持。在实施例中，可以存在比信号传输键合垫更少的虚设键合垫128，并且可以存在比信号传输引线键合体130更少的虚设引线键合体132。然而，在另外的实施例中，可以有相同数目的虚设键合垫128和信号传输键合垫126，并且可以存在相同数目的虚设引线键合体132和信号传输引线键合体130。
如图11所示，半导体裸芯124t上的与控制器裸芯114相邻的区域可以保留为没有虚设键合垫128和虚设引线键合体132，但是在另外的实施例中，虚设键合垫128和虚设引线键合体132可以设置在控制器裸芯114的区域中。
在裸芯堆叠体120的电连接和虚设引线键合体的形成之后，在步骤228中，半导体装置100可以被包封在模塑料142中，如图12所示。模塑料142可以包含例如固体环氧树脂、酚醛树脂、熔融二氧化硅、结晶二氧化硅、碳黑和/或金属氢氧化物。这样的模塑料例如从总部都设在日本的住友株式会社(Sumitomo Corp.)和日东电工株式会社(Nitto-DenkoCorp.)可获得。可以设想来自其他制造商的其他模塑料。模塑料可以通过FFT(无流体稀释(Flow Free Thin))工艺或通过其他已知工艺(包括通过传递模塑或注塑技术)来施加。
根据本技术的多个方面，虚设引线键合体将裸芯堆叠体120向下拉并保持其平坦地抵靠基板。因此，减轻了延伸穿过模塑料142的表面的翘起裸芯堆叠体中的半导体裸芯的边缘的问题。作为另外的益处，半导体装置100的制造商不需要将模塑料142的表面上的该区域维持并保持为禁止印刷，并且制造商可以自由地在模塑料的表面上的任何地方进行印刷。
在步骤232中，焊球154(图11)可以粘附到装置100的基板102的下表面上的接触垫108。焊球154可以用于将半导体装置100粘附到主机装置(未示出)，诸如印刷电路板。在将半导体装置100用作LGA封装体的情况下，可以省略焊球154。
如上所述，半导体装置100可以形成在基板的面板上。装置100在面板上形成和包封之后，装置100可以在步骤236中彼此单体化以形成完成的半导体装置100，如图12所示。半导体装置100可以通过各种切割方法中的任何方法来单体化，切割方法包含锯切、水射流切割、激光切割、水导引激光切割、干介质切割和金刚石涂层线切割。虽然直线切割一般将限定长方形或正方形形状的半导体装置100，可以理解的是，在本技术的另外的实施例中，半导体装置100可以具有除了长方形和正方形的形状。
如上所述，图11的俯视图中所示的虚设键合垫128和虚设引线键合体132的特定配置仅作为示例，并且在另外的实施例中可以变化。图13是虚设键合键128和虚设引线键合体132的另一个配置的俯视图，其示出了比图11中更高集中度的虚设键合键128和虚设引线键合体132。除了控制器114的中心区域之外，虚设键合垫128和虚设引线键合体132可以与在裸芯堆叠体120的第一侧120a上的信号传输键合垫126和信号传输引线键合体130具有相同的集中度。
图14是虚设键合键128和虚设引线键合体132的另一配置的俯视图。在该实施例中，基板102包含接触垫109的多个行和位置，其接收虚设引线键合体132。改变接触垫109的位置允许大量的虚设键合键128和虚设引线键合体132，并且允许虚设引线键合体132的长度变化。
在实施例中，包含虚设键合垫128的半导体裸芯124t是堆叠体120中的最顶部的半导体裸芯。然而，在另外的实施例中，裸芯124t不需要是堆叠体120中的最顶部的半导体裸芯。图15是示出了半导体裸芯124t不是顶部裸芯的实施例的侧视图。在该实施例中，它是堆叠体120中的第三裸芯，并且最顶部的半导体裸芯是裸芯124。在该实施例中，为了为顶部裸芯124下方的虚设引线键合体132留出空间，可以在裸芯124t和最顶部的裸芯124之间设置薄膜层160。可以使用硅间隔体来代替薄膜层160。在另外的实施例中，半导体裸芯124t在堆叠体120中可以更低。
在上述实施例中，与另一个裸芯124类似，包含虚设键合垫128的半导体裸芯124t是功能性半导体裸芯，诸如闪速存储器裸芯。在另外的实施例中，该部件包含不必是功能性半导体裸芯的虚设键合垫128。例如，如图16所示，裸芯堆叠体120可以包含若干功能性半导体裸芯124(在该示例中示出四个，但是可以更多或更少)。虚设裸芯164安装在裸芯堆叠体120上。虚设裸芯164可以由硅或其他材料制成，但不必是功能性半导体裸芯。例如，虚设裸芯164不需要具有任何集成电路。根据上述任一实施例，虚设裸芯164不包含虚设裸芯键合垫128，并且虚设引线键合体132在虚设裸芯键合垫128与基板102之间形成。
在上述实施例中，裸芯堆叠体120在单方向上阶梯式偏移。图17示出了另一替代实施例，其中裸芯堆叠体120包括在第一阶梯方向上偏移的第一组半导体裸芯和在与第一阶梯方向相对的第二阶梯方向上偏移的第二组半导体裸芯。第一组半导体裸芯包含裸芯124和裸芯124t(在第一组裸芯中示出为顶部半导体裸芯)。虽然第一组和第二组半导体裸芯被示出为各自包含四个半导体裸芯，但是在第一组和/或第二组中可以存在少于或多于四个裸芯。
插入体层170可以粘附在半导体裸芯124t的顶部上。如已知的，插入体层170包含在插入体层的相对侧上的信号传输键合垫126以及在它们之间延伸的电迹线的重新分布图案。这些信号传输键合垫和重新分布图案迹线可以用于将信号从第二组半导体裸芯中的半导体裸芯124传输到第一组半导体裸芯，并且从第一组半导体裸芯传输到基板，反之亦然。为了允许第一组半导体裸芯引线键合到插入体层170，可以在插入体层170和第二组半导体裸芯中的第一半导体裸芯之间设置薄膜层172。可以使用硅间隔体来代替薄膜层172。
如前述任意实施例所述，虚设引线键合体132可形成在半导体裸芯124t和基板102之间。如上所述，虚设引线键合体可以有效地将裸芯堆叠体120向下拉并将其平坦地抵靠基板保持。
图18示出了本技术的另一实施例。图18的实施例类似于图17的实施例。然而，在该实施例中，第一组半导体裸芯中的顶部裸芯不包含虚设键合垫128。顶部裸芯可以与裸芯堆叠体中的其他裸芯相同。在该实施例中，虚设键合垫128可以移动到插入体层170。如图所示，插入体层可以包含在插入体层的相对侧上的信号传输裸芯键合垫126，其用于在第一组和第二组半导体裸芯之间传输信号，如上所述。插入体还可以包含沿着一个边缘示出的虚设键合垫128。虚设引线键合体132可以在插入体层170上的虚设键合垫128和基板102之间形成，如前述实施例中的任意示例所述。如上所述，虚设引线键合体可以有效地将裸芯堆叠体120向下拉并将其平坦地抵靠基板保持。
在上述实施例中，以偏移、阶梯式配置提供的裸芯堆叠体120提供对信号传输裸芯键合垫的接入，以用于引线键合。在另外的实施例中，裸芯堆叠体120不需要偏移或是阶梯式的。例如，如图19所示，裸芯堆叠体120可以包含直接上下叠置的半导体裸芯124、124t。半导体裸芯124、124t可以用薄膜或间隔体层174彼此隔开，以允许接入用于信号传输引线键合体130的信号传输键合垫126。并非连接到下一个相邻的半导体裸芯，该实施例中的引线键合体130可以从每个半导体裸芯上的信号传输键合垫126直接延伸至基板102。
如上所述，裸芯堆叠体120可以包含具有虚设键合垫128的半导体裸芯124t，虚设键合垫128经由虚设引线键合体132将引线击打(hit)键合到基板102。虚设引线键合体132可以在基板102上的控制器裸芯114之上延伸，如例如图10和图12所示。替代地，如图19所示，虚设引线键合体132可以连接到基板上放置在裸芯堆叠体120和控制器裸芯114之间的接触垫。在另外的实施例中，一些虚设引线键合体132可以延伸过控制器裸芯114(如图10和图12所示)，并且一些可以连接到裸芯堆叠体120和控制器裸芯114之间的接触垫(如图19所示)。
图19示出了通过信号传输键合垫126和引线键合体130引线键合到基板的半导体裸芯124、124t。然而，在另外的实施例中，半导体裸芯124、124t可以通过其他电互连方案电耦接到基板102。在一个这样的方案中，半导体裸芯124、124t可以使用硅通孔(TSV)电耦接到基板102。
为了说明和描述的目的，本技术的前面的详细描述已经呈现。它不旨在穷尽或限制本技术为公开的精确形式。根据上述教导的许多修改和变化是可能的。选择所描述的实施例是为了最好地解释本技术的原理及其实际应用，从而使得本领域的技术人员能够最好地利用各种实施例中的技术和适合于预期的特定用途的各种修改。本技术的范围由所附的权利要求限定。

Claims (25)

1.一种半导体装置，包括：
基板，其包含接触垫的集合；
一个或多个半导体裸芯，其安装在所述基板上并且电耦接到所述基板，所述一个或多个半导体裸芯中的至少一个半导体裸芯包括键合垫的集合；以及
引线键合体的集合，其连接在所述至少一个半导体裸芯上的键合垫的集合与所述基板上的接触垫的集合之间，所述引线键合体的集合配置为在所述一个或多个半导体裸芯上施加力以将所述一个或多个半导体裸芯向下保持在所述基板上。
2.如权利要求1所述的半导体装置，其中所述一个或多个半导体裸芯包括多个堆叠的半导体裸芯，并且其中所述至少一个半导体裸芯包括所述多个堆叠的半导体裸芯中的最顶部的半导体裸芯。
3.如权利要求1所述的半导体装置，其中所述引线键合体的集合包括引线键合体的第一集合，并且其中所述一个或多个半导体裸芯通过引线键合体的第二集合电耦接到所述基板，所述引线键合体的第二集合不同于所述引线键合体的第一集合。
4.如权利要求3所述的半导体装置，其中在所述引线键合体的第二集合中比在所述引线键合体的第一集合中存在更多的引线键合体。
5.如权利要求1所述的半导体装置，其中所述基板上的接触垫的集合对齐为单个行。
6.如权利要求5所述的半导体装置，其中所述接触垫的单个行与所述基板的边缘相邻。
7.如权利要求1所述的半导体装置，其中所述基板上的接触垫的集合对齐为两行或更多行。
8.如权利要求1所述的半导体装置，其中所述裸芯键合垫的集合包括虚设键合垫的集合，并且其中所述一个或多个半导体裸芯包括以偏移的阶梯式布置堆叠的多个半导体裸芯，所述半导体装置还包括在每个半导体裸芯的由所述偏移的阶梯式布置暴露的部分上的信号传输键合垫的集合。
9.如权利要求8所述的半导体装置，其中所述引线键合体的集合包括虚设引线键合体的集合，所述半导体装置还包括信号传输引线键合体的集合，所述信号传输引线键合体的集合耦接到所述多个半导体裸芯的信号传输键合垫。
10.如权利要求9所述的半导体装置，其中所述基板上的接触垫的集合包括接触垫的第一集合，所述半导体装置还包括接触垫的第二集合，所述接触垫的第二集合由所述信号传输引线键合体电耦接到所述信号传输键合垫。
11.如权利要求8所述的半导体装置，还包括在以所述偏移的阶梯式布置堆叠的所述多个半导体裸芯中的一个或多个的下方安装在所述基板上的控制器裸芯。
12.如权利要求1所述的半导体装置，其中所述一个或多个半导体裸芯包括以偏移的阶梯式布置堆叠的多个半导体裸芯，并且所述至少一个半导体裸芯包括所述堆叠体上的最顶部的半导体裸芯，所述半导体装置还包括在所述堆叠体中的最顶部的半导体裸芯的下方安装在所述基板上的控制器裸芯。
13.如权利要求12所述的半导体装置，其中所述最顶部的半导体裸芯的在所述控制器裸芯上方的区域没有键合垫。
14.一种半导体装置，包括：
基板，其包含接触垫的第一集合和接触垫的第二集合；
一个或多个半导体裸芯，其安装在所述基板上，所述一个或多个半导体裸芯中的至少一个半导体裸芯包括键合垫的第一集合和键合垫的第二集合；
引线键合体的第一集合，其将所述至少一个半导体裸芯上的键合垫的第一集合电连接到所述基板上的接触垫的第一集合，所述引线键合体的第一集合配置为在所述键合垫的第一集合与所述接触垫的第一集合之间传输信号；以及
引线键合体的第二集合，其连接在所述至少一个半导体裸芯上的键合垫的第二集合与所述基板上的接触垫的第二集合之间，所述引线键合体的第二集合配置为在所述一个或多个半导体裸芯上施加力以将所述一个或多个半导体裸芯向下保持在所述基板上。
15.如权利要求14所述的半导体装置，其中所述引线键合体的第一集合延伸离开所述至少一个半导体裸芯的第一边缘，并且所述引线键合体的第二集合延伸离开所述至少一个半导体裸芯的第二、相对的边缘。
16.如权利要求14所述的半导体装置，其中所述一个或多个半导体裸芯包括在第一方向上呈阶梯式的多个偏移堆叠的半导体裸芯。
17.如权利要求16所述的半导体装置，其中所述至少一个半导体裸芯是所述堆叠体中的最顶部的半导体裸芯。
18.如权利要求16所述的半导体装置，其中所述多个半导体裸芯包括第一多个半导体裸芯，并且其中所述一个或多个半导体裸芯包括在与所述第一方向相对的第二方向上呈阶梯式的第二多个偏移堆叠的半导体裸芯。
19.如权利要求18所述的半导体装置，其中所述至少一个半导体裸芯位于所述第一多个半导体裸芯和所述第二多个半导体裸芯之间。
20.一种半导体装置，包括：
基板，其包含接触垫的第一集合和接触垫的第二集合；
多个半导体裸芯，其以偏移的阶梯式布置堆叠在所述基板上；
部件，其安装在所述多个半导体裸芯的顶部上；
虚设键合垫的集合，其沿着所述部件的边缘形成；
信号传输引线键合体的集合，其配置为将所述多个半导体裸芯彼此电连接并且将所述多个半导体裸芯与所述基板上的接触垫的第一集合电连接；以及
虚设引线键合体的集合，其连接在所述虚设键合垫的集合与所述基板上的接触垫的第二集合之间，所述虚设引线键合体的集合配置为在所述多个半导体裸芯上施加力以将所述多个半导体裸芯向下保持在所述基板上。
21.如权利要求20所述的半导体装置，其中所述部件没有集成电路。
22.如权利要求20所述的半导体装置，其中所述部件包括半导体裸芯，所述半导体裸芯包括集成电路。
23.如权利要求22所述的半导体装置，其中所述部件还包括沿着所述部件的与包含所述虚设键合垫的集合的边缘相对的边缘的信号传输键合垫的集合。
24.如权利要求23所述的半导体装置，其中所述部件经由所述信号传输引线键合体的集合电耦接到所述基板，所述信号传输引线键合体的集合连接到所述信号传输键合垫的集合。
25.一种半导体装置，包括：
基板构件，其包含接触垫构件的集合；
一个或多个半导体裸芯，其安装在所述基板构件上，所述一个或多个半导体裸芯包括第一边缘和第二边缘，所述第一边缘与所述第二边缘相对；
离开所述第一边缘的用于将所述一个或多个半导体裸芯电耦接到所述基板构件的构件；
用于在所述第二边缘上施加力以将所述一个或多个半导体裸芯向下保持在所述基板上的构件。
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