CN110333468A - Bearing calibration is tested in inversion applied to rectifier - Google Patents
Bearing calibration is tested in inversion applied to rectifier Download PDFInfo
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- CN110333468A CN110333468A CN201910630778.3A CN201910630778A CN110333468A CN 110333468 A CN110333468 A CN 110333468A CN 201910630778 A CN201910630778 A CN 201910630778A CN 110333468 A CN110333468 A CN 110333468A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
- G01R35/005—Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
- G01R35/02—Testing or calibrating of apparatus covered by the other groups of this subclass of auxiliary devices, e.g. of instrument transformers according to prescribed transformation ratio, phase angle, or wattage rating
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Abstract
The invention discloses the inversions for being applied to rectifier to test bearing calibration, the following steps are included: beginning, communication are read, phase compensation angle, offset angle clipping, Phase Locked Loop Synchronization signal progress phase compensation, the phase difference for calculating Phase Locked Loop Synchronization signal and mains voltage signal, software phlase locking adjusting, SPWM output phase frequency modulation is whole, terminates, and observation measures voltage current phase difference.The present invention can measure the deviation of inverter voltage and voltage on line side, and after carrying out phase compensation, net side input current is consistent with the phase of network voltage, and the present invention considers hardware coupling influence in the design process, this influence factor is eliminated, and realize unity power factor.
Description
Technical field
The invention belongs to rectifier technical fields, and in particular to bearing calibration is tested in the inversion applied to rectifier.
Background technique
Driving device of the frequency converter as motor, in order to guarantee that the operation of motor reliably and with long-term, the output of frequency converter need to protect
It is fixed to keep steady, and rectifier had not only been required to export DC stabilization, but also requires to eliminate most of current harmonics, current on line side sine；And it transports
Row improves the efficiency of rectifier in unity power factor, really realizes " green energy transformation ".
Using the rectifier of SPWM pulse modulation technology, in the case where nominal load, DC stabilization and input current
The distortion factor is functional less than 5%, but unity power factor is not implemented.
Although existing rectifier uses PHASE-LOCKED LOOP PLL TECHNIQUE on software, make the phase of Current Tracing voltage, phase
Difference is almost 0, and unity power factor theoretically may be implemented in powerfactorcosφ ≈ 1.But by rectifier boosting reactance
The influence of the inductance components such as device coupling, software control effect are not up to target, and power factor is only 0.8 or so, is not achieved
1。
Summary of the invention
The present invention proposes that the purpose is to provide the inversion survey for being applied to rectifier in order to solve the problems existing in the prior art
Try bearing calibration.
The technical scheme is that bearing calibration is tested in the inversion for being applied to rectifier, comprising the following steps:
I starts
System initialization；
Phase compensation angle is read in II communication
Phase compensation angle value is read by communication modes；
III offset angle clipping
Judge offset angle range: if it is greater than 360 °, offset angle 0；If it is greater than 180 °, offset angle is
180°-θ；If it is less than 180 °, offset angle θ；
IV Phase Locked Loop Synchronization signal carries out phase compensation
The counting periodic quantity of synchronization signal is subtracted into offset angle value；
The phase difference of V calculating Phase Locked Loop Synchronization signal and mains voltage signal
Calculate the phase difference of Phase Locked Loop Synchronization signal and mains voltage signal；
VI software phlase locking is adjusted
Software phase-lock loop PI control；
VII .SPWM output phase frequency modulation is whole
SPWM carrier cycle time value is calculated, pwm pulse is exported；
VIII terminates
Observation measures voltage current phase difference.
System initialization includes that system clock initializes, interrupt vector initializes, serial communication interface is initial in step I
Change.
Phase compensation angle value carries out parameter setting by the touch screen being connected with control panel in step II, will measure
The offset angle value input arrived, and control panel is sent to by the way of serial communication.
Read the count value for capturing register in step IV, as network voltage cycle count value, by its with communicate obtained by
To offset angle value subtract each other to get to mains voltage signal adjusted.
After network voltage is carried out level translation by the Acquisition Circuit of control panel in step V, the side of 3.3V is converted to
Wave signal, the signal acquisition as DSP capture unit.
The count value of read access time flag register, as the count value of current cycle signal, network voltage adjusted
Signal subtracts each other with it obtains phase difference QEK.
PI control is proportional plus integral control in step VI,
XIND=QEK*KP+ ∑ QEK*KI
Wherein KP and KI is respectively ratio, integral coefficient
Phase dropout regulator output valve XIND is added to the electric current week that can be obtained after adjusting with network voltage cycle count value
Phase signal-count value, by this count value divided by carrier wave ratio 120, the count value of each carrier cycle is can be obtained in carrier wave 6k
That is the locking phase for realizing current signal and network voltage is adjusted by difference, keeps its phase consistent the interrupt cycle of PWM.
Step VII uses dual channel oscilloscope, oscilloprobe ground connection is terminated at zero position, two test points are surveyed respectively
U is tried, U1 point voltage signal measures the zero crossing phase difference of two voltage signals, as offset angle value, the phase of TU-U1 and U
Potential difference, the periodic quantity of T-U1 voltage signal, offset angle 360*TU/T；
After measuring according to the method described above, using dual channel oscilloscope, differential probe measurement rectifier input power grid electricity is used
Pressure measures input current using current clamp, and network voltage and current phase are surveyed in the phase difference Td-rectifier input for measuring the two
Difference, the periodic quantity of T-U1 voltage signal, obtaining phase difference is θ=360*Td/T=2.89 °, calculating power-factor cos θ=
0.998 ≈ 1, i.e. realization unity power factor.
The present invention can measure the deviation of inverter voltage and voltage on line side, after carrying out phase compensation, net side input current with
The phase of network voltage is consistent, and the present invention considers hardware coupling influence in the design process, this influence factor is eliminated, and realizes
Unity power factor.
Detailed description of the invention
Fig. 1 is test correction principle figure of the invention；
Fig. 2 is test correcting process figure of the invention；
Wherein:
1 direct current inputs 2 storage capacitors
The output of 3 rectifier bridges 4 three.
Specific embodiment
Hereinafter, referring to drawings and examples, the present invention is described in detail:
As shown in Fig. 1~2, bearing calibration is tested in the inversion applied to rectifier, includes following steps:
I starts
System initialization；
Phase compensation angle is read in II communication
Phase compensation angle value is read by communication modes；
III offset angle clipping
Judge offset angle range: if it is greater than 360 °, offset angle 0；If it is greater than 180 °, offset angle is
180°-θ；If it is less than 180 °, offset angle θ；
IV Phase Locked Loop Synchronization signal carries out phase compensation
The counting periodic quantity of synchronization signal is subtracted into offset angle value；
The phase difference of V calculating Phase Locked Loop Synchronization signal and mains voltage signal
Calculate the phase difference of Phase Locked Loop Synchronization signal and mains voltage signal；
VI software phlase locking is adjusted
Software phase-lock loop PI control；
VII .SPWM output phase frequency modulation is whole
SPWM carrier cycle time value is calculated, pwm pulse is exported；
VIII terminates
Observation measures voltage current phase difference.
System initialization includes that system clock initializes, interrupt vector initializes, serial communication interface is initial in step I
Change.
Phase compensation angle value carries out parameter setting by the touch screen being connected with control panel in step II, will measure
The offset angle value input arrived, and control panel is sent to by the way of serial communication.
Read the count value for capturing register in step IV, as network voltage cycle count value, by its with communicate obtained by
To offset angle value subtract each other to get to mains voltage signal adjusted.
After network voltage is carried out level translation by the Acquisition Circuit of control panel in step V, the side of 3.3V is converted to
Wave signal, the signal acquisition as DSP capture unit.
The count value of read access time flag register, as the count value of current cycle signal, network voltage adjusted
Signal subtracts each other with it obtains phase difference QEK.
PI control is proportional plus integral control in step VI,
XIND=QEK*KP+ ∑ QEK*KI
Wherein KP and KI is respectively ratio, integral coefficient
Phase dropout regulator output valve XIND is added to the electric current week that can be obtained after adjusting with network voltage cycle count value
Phase signal-count value, by this count value divided by carrier wave ratio 120, the count value of each carrier cycle is can be obtained in carrier wave 6k
That is the locking phase for realizing current signal and network voltage is adjusted by difference, keeps its phase consistent the interrupt cycle of PWM.
Step VII uses dual channel oscilloscope, oscilloprobe ground connection is terminated at zero position, two test points are surveyed respectively
U is tried, U1 point voltage signal measures the zero crossing phase difference of two voltage signals, as offset angle value, the phase of TU-U1 and U
Potential difference, the periodic quantity of T-U1 voltage signal, offset angle 360*TU/T；
After measuring according to the method described above, using dual channel oscilloscope, differential probe measurement rectifier input power grid electricity is used
Pressure measures input current using current clamp, and network voltage and current phase are surveyed in the phase difference Td-rectifier input for measuring the two
Difference, the periodic quantity of T-U1 voltage signal, obtaining phase difference is θ=360*Td/T=2.89 °, calculating power-factor cos θ=
0.998 ≈ 1, i.e. realization unity power factor.
A kind of inversion test means for correcting applied to rectifier, including direct current input 1, the direct current input 1 and rectification
Bridge 3, which is connected and inputs 1 both ends in direct current, is connected with storage capacitor 2, and the rectifier bridge 3 is connect with three outputs 4, and described three defeated
Out 4, there are detection terminal U, detection terminal V, detection terminal W in three output 4, detection terminal can be observed by oscillograph
The waveform of U and network voltage U1, detection terminal V and network voltage V1, detection terminal W and network voltage W1.
The rectifier bridge 3 includes three groups of transistor groups for being connected in direct current input 1, and transistor includes transistor Sa1, it is brilliant
Body pipe Sa2, transistor Sb1, transistor Sb2, transistor Sc1, transistor Sc2。
Transistor Sa1Emitter and transistor Sa2Collector connection, and transistor Sa1, transistor Sa2Between connect and draw
Outlet, the transistor Sa1Emitter and diode Da1Anode connection, diode Da1Cathode and transistor Sa1Collector connect
It connects, the transistor Sa2Emitter and diode Da2Anode connection, diode Da2Cathode and transistor Sa2Collector connect
It connects.
Transistor Sb1Emitter and transistor Sb2Collector connection, and transistor Sb1, transistor Sb2Between connect and draw
Outlet, the transistor Sb1Emitter and diode Db1Anode connection, diode Db1Cathode and transistor Sb1Collector connect
It connects, the transistor Sb2Emitter and diode Db2Anode connection, diode Db2Cathode and transistor Sb2Collector connect
It connects.
Transistor SC1Emitter and transistor SC2Collector connection, and transistor SC1, transistor SC2Between connect and draw
Outlet, the transistor SC1Emitter and diode DC1Anode connection, diode DC1Cathode and transistor SC1Collector connect
It connects, the transistor SC2Emitter and diode DC2Anode connection, diode DC2Cathode and transistor SC2Collector connect
It connects.
Transistor Sa1, transistor Sa2Between lead-out wire on be sequentially connected in series inductance L, resistance R1, capacitor C1, test side
Sub- U is between resistance R1, capacitor C1.
Transistor Sb1, transistor Sb2Between lead-out wire on be sequentially connected in series inductance L, resistance R2, capacitor C2, test side
Sub- V is between resistance R2, capacitor C2.
Transistor SC1, transistor SC2Between lead-out wire on be sequentially connected in series inductance L, resistance R3, capacitor C3, test side
Sub- W is between resistance R3, capacitor C3.
The network voltage U1 and between concatenated inductance C4 and resistance R4, the network voltage V1 connect with being located at
Inductance C5 and resistance R5 between, network voltage W1 and between concatenated inductance C6 and resistance R6.
The direct current input 1 is DC DC power supply.
The storage capacitor 2 is capacitor C.
The present invention can measure the deviation of inverter voltage and voltage on line side, after carrying out phase compensation, net side input current with
The phase of network voltage is consistent, and the present invention considers hardware coupling influence in the design process, this influence factor is eliminated, and realizes
Unity power factor.
Claims (8)
1. bearing calibration is tested in the inversion for being applied to rectifier, it is characterised in that: the following steps are included:
(I) starts
System initialization；
Phase compensation angle is read in (II) communication
Phase compensation angle value is read by communication modes；
(III) offset angle clipping
Judge offset angle range: if it is greater than 360 °, offset angle 0；If it is greater than 180 °, offset angle is 180 ° of-θ；
If it is less than 180 °, offset angle θ；
(IV) Phase Locked Loop Synchronization signal carries out phase compensation
The counting periodic quantity of synchronization signal is subtracted into offset angle value；
(V) mains voltage signal carries out phase compensation
Mains voltage signal cycle count value subtracts offset angle value；
(VI) software phlase locking is adjusted
Software phase-lock loop PI control；
(VII) SPWM output phase frequency modulation is whole
SPWM carrier cycle time value is calculated, pwm pulse is exported；
(VIII) terminates
Observation measures voltage current phase difference.
2. bearing calibration is tested in the inversion according to claim 1 applied to rectifier, it is characterised in that: in step (I)
System initialization includes system clock initialization, interrupt vector initialization, serial communication interface initialization.
3. bearing calibration is tested in the inversion according to claim 1 applied to rectifier, it is characterised in that: in step (II)
Phase compensation angle value carries out parameter setting by the touch screen being connected with control panel, and the offset angle value that measurement is obtained is defeated
Enter, and is sent to control panel by the way of serial communication.
4. bearing calibration is tested in the inversion according to claim 1 applied to rectifier, it is characterised in that: in step (IV)
Read the count value for capturing register, as network voltage cycle count value, by its with communicate obtained offset angle value phase
Subtract to get mains voltage signal adjusted is arrived.
5. bearing calibration is tested in the inversion according to claim 1 applied to rectifier, it is characterised in that: in step (V)
After network voltage is carried out level translation by the Acquisition Circuit of control panel, the square-wave signal of 3.3V is converted to, is caught as DSP
Catch the signal acquisition of unit.
6. bearing calibration is tested in the inversion according to claim 4 applied to rectifier, it is characterised in that: read access time mark
The count value of will register, as the count value of current cycle signal, mains voltage signal adjusted is subtracted each other with it to be obtained
Phase difference QEK.
7. bearing calibration is tested in the inversion according to claim 1 applied to rectifier, it is characterised in that: step (VI) PI
Control is proportional plus integral control,
XIND=QEK*KP+ ∑ QEK*KI
Wherein KP and KI is respectively ratio, integral coefficient
Phase dropout regulator output valve XIND is added to the current cycle letter that can be obtained after adjusting with network voltage cycle count value
Number count value, by this count value divided by carrier wave ratio 120, the count value i.e. PWM of each carrier cycle is can be obtained in carrier wave 6k
Interrupt cycle, adjust to realize the locking phase of current signal and network voltage by difference, keep its phase consistent.
8. bearing calibration is tested in the inversion according to claim 1 applied to rectifier, it is characterised in that: step (VII) is adopted
With dual channel oscilloscope, oscilloprobe ground connection is terminated at into zero position, two test points test U respectively, U1 point voltage signal,
The zero crossing phase difference for measuring two voltage signals, as offset angle value, the phase difference of TU-U1 and U, T-U1 voltage signal
Periodic quantity, offset angle 360*TU/T；
After measuring according to the method described above, using dual channel oscilloscope, network voltage is inputted using differential probe measurement rectifier, is made
Input current is measured with current clamp, network voltage and current and phase difference, T-are surveyed in the phase difference Td-rectifier input for measuring the two
The periodic quantity of U1 voltage signal, obtaining phase difference is θ=360*Td/T=2.89 °, calculates the ≈ of power-factor cos θ=0.998 1,
Realize unity power factor.
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| CN111900885A (en) * | 2020-07-15 | 2020-11-06 | 国网北京市电力公司 | Control method and device for power supply of transformer area identification testing device |
| CN114814390A (en) * | 2021-01-21 | 2022-07-29 | 核工业理化工程研究院 | Multifunctional frequency converter test platform and test method thereof |
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