CN209844854U

CN209844854U - Inversion test correction device applied to rectifier

Info

Publication number: CN209844854U
Application number: CN201921091424.8U
Authority: CN
Inventors: 宋涛; 王伟强; 赵秋毅; 李俊扬
Original assignee: Research Institute of Physical and Chemical Engineering of Nuclear Industry
Current assignee: Research Institute of Physical and Chemical Engineering of Nuclear Industry
Priority date: 2019-07-12
Filing date: 2019-07-12
Publication date: 2019-12-24
Anticipated expiration: 2029-07-12

Abstract

The utility model discloses a be applied to contravariant test correcting unit of rectifier, including direct current input, direct current input and rectifier bridge switch-on and be connected with energy storage capacitor at direct current input both ends, the rectifier bridge is connected with three output, three outputs, there are sense terminal U, sense terminal V, sense terminal W in three outputs, can observe the waveform of sense terminal U and grid voltage U1, sense terminal V and grid voltage V1, sense terminal W and grid voltage W1 through oscilloscope. The rectifier bridge includes three sets of transistors coupled to the dc input. The utility model discloses can record the deviation value of contravariant voltage and net side voltage, carry out the phase compensation back, net side input current is unanimous with electric wire netting voltage's phase place, the utility model discloses consider the hardware coupling influence in the design process, eliminate this influence factor, realize unit power factor.

Description

Inversion test correction device applied to rectifier

Technical Field

The utility model belongs to the technical field of the rectifier, concretely relates to be applied to contravariant test correcting unit of rectifier.

Background

The frequency converter is used as a driving device of the motor, and in order to ensure long-term reliable operation of the motor, the output of the frequency converter needs to be kept stable, so that not only is the direct current output of the rectifier required to be stable, but also most of current harmonics are required to be eliminated, and the grid side current is sinusoidal; and the converter operates in unit power factor, improves the efficiency of the rectifier and really realizes 'green electric energy conversion'.

The rectifier applying the SPWM technology has stable direct current and input current distortion degree less than 5% under the condition of rated load, and has good performance, but does not realize unit power factor.

Although the phase-locked loop technology is adopted in software of the existing rectifier, the phase difference of the current tracking voltage is almost 0, the power factor cos phi is approximately equal to 1, and the unit power factor can be realized theoretically. However, due to the influence of the coupling of inductive devices such as a rectifier boost reactor and the like, the software control effect does not reach the expected target, and the power factor is only about 0.8 and does not reach 1.

Disclosure of Invention

The utility model discloses a solve the problem that prior art exists and propose, its purpose provides the contravariant test correcting unit who is applied to the rectifier.

The technical scheme of the utility model is that: the inversion test correction device comprises a direct current input, wherein the direct current input is communicated with a rectifier bridge, energy storage capacitors are connected to two ends of the direct current input, the rectifier bridge is connected with three outputs, the three outputs comprise a detection terminal U, a detection terminal V and a detection terminal W, and waveforms of the detection terminal U and a power grid voltage U1, the detection terminal V and the power grid voltage V1 and waveforms of the detection terminal W and the power grid voltage W1 can be observed through an oscilloscope.

The rectifier bridge comprises three groups of transistors coupled to the DC input, the transistors comprising a transistor S_a1Transistor S_a2Transistor S_b1Transistor S_b2Transistor S_c1Transistor S_c2。

Transistor S_a1And transistor S_a2Is connected to the collector of, and a transistor S_a1Transistor S_a2Between which a lead-out wire is connected, the transistor S_a1Emitter and diode D_a1Anode connection, diode D_a1Cathode and transistor S_a1The collector of said transistor S_a2Emitter and diode D_a2Anode connection, diode D_a2Cathode and transistor S_a2Is connected to the collector of (a).

Transistor S_b1And transistor S_b2Is connected to the collector of, and a transistor S_b1Transistor S_b2Between which a lead-out wire is connected, the transistor S_b1Emitter and diode D_b1Anode connection, diode D_b1Cathode and transistor S_b1The collector of said transistor S_b2Emitter and diode D_b2Anode connection, diode D_b2Cathode and transistor S_b2Is connected to the collector of (a).

Transistor S_C1And transistor S_C2Is connected to the collector of, and a transistor S_C1Transistor S_C2Between which a lead-out wire is connected, the transistor S_C1Emitter and diode D_C1Anode connection, diode D_C1Cathode and transistor S_C1The collector of said transistor S_C2Emitter and diode D_C2Anode connection, diode D_C2Cathode and transistor S_C2Is connected to the collector of (a).

Transistor S_a1Transistor S_a2An inductor L, a resistor R1 and a capacitor C1 are sequentially connected in series on the lead-out wire between the two, and a detection terminal U is positioned between the resistor R1 and the capacitor C1.

Transistor S_b1Transistor S_b2An inductor L, a resistor R2 and a capacitor C2 are sequentially connected in series on the lead-out wire between the two, and a detection terminal V is positioned between the resistor R2 and the capacitor C2.

Transistor S_C1Transistor S_C2In turn on the leading-out line betweenAn inductor L, a resistor R3 and a capacitor C3 are connected in series, and a detection terminal W is positioned between the resistor R3 and the capacitor C3.

The utility model discloses can record the deviation value of contravariant voltage and net side voltage, carry out the phase compensation back, net side input current is unanimous with electric wire netting voltage's phase place, the utility model discloses consider the hardware coupling influence in the design process, eliminate this influence factor, realize unit power factor.

Drawings

FIG. 1 is a schematic diagram of the test calibration of the present invention;

FIG. 2 is a flow chart of the test calibration of the present invention;

wherein:

1 DC input 2 energy storage capacitor

3 three-term output of a rectifier bridge and 4.

Detailed Description

The present invention will be described in detail below with reference to the accompanying drawings and examples:

as shown in fig. 1-2, an inversion test correction device applied to a rectifier includes a dc input 1, the dc input 1 is connected to a rectifier bridge 3, and energy storage capacitors 2 are connected to two ends of the dc input 1, the rectifier bridge 3 is connected to three outputs 4, the three outputs 4 are provided with a detection terminal U, a detection terminal V, and a detection terminal W, and waveforms of the detection terminal U and a grid voltage U1, the detection terminal V and a grid voltage V1, and the detection terminal W and a grid voltage W1 can be observed through an oscilloscope.

The rectifier bridge 3 comprises three groups of transistors coupled to the dc input 1, the transistors comprising a transistor S_a1Transistor S_a2Transistor S_b1Transistor S_b2Transistor S_c1Transistor S_c2。

Transistor S_C1Transistor S_C2An inductor L, a resistor R3 and a capacitor C3 are sequentially connected in series on the lead-out wire between the two, and a detection terminal W is positioned between the resistor R3 and the capacitor C3.

The grid voltage U1 is between an inductor C4 and a resistor R4 which are connected in series, the grid voltage V1 is between an inductor C5 and a resistor R5 which are connected in series, and the grid voltage W1 is between an inductor C6 and a resistor R6 which are connected in series.

The direct current input 1 is a DC direct current power supply.

The energy storage capacitor 2 is a capacitor C.

The inversion test correction method applied to the rectifier comprises the following steps:

start of

Initializing a system;

ii, communication reading phase compensation angle

Reading a phase compensation angle value through a communication mode;

compensating for angle clipping

Judging the compensation angle range: if the angle is more than 360 degrees, the compensation angle is 0; if the angle is larger than 180 degrees, the compensation angle is 180-theta; if the angle is less than 180 degrees, the compensation angle is theta;

iv, phase compensation is carried out on synchronous signals of phase-locked loop

Subtracting the compensation angle value from the counting period value of the synchronous signal;

v. calculating the phase difference between the synchronous signal of the phase-locked loop and the voltage signal of the power grid

Calculating the phase difference between the phase-locked loop synchronous signal and the power grid voltage signal;

vi.software phase-locked regulation

Controlling a software phase-locked loop (PI);

SPWM output phase frequency adjustment

Calculating the SPWM carrier period value and outputting PWM pulses;

viii, end

And observing and measuring the voltage and current phase difference.

The system initialization in the step i comprises system clock initialization, interrupt vector initialization and serial communication interface initialization.

And in the step ii, the phase compensation angle value is subjected to parameter setting through a touch screen connected with the control panel, the measured compensation angle value is input, and the compensation angle value is transmitted to the control panel in a serial port communication mode.

And iv, reading the count value of the capture register, namely the grid voltage period count value, and subtracting the compensation angle value obtained by communication from the grid voltage period count value to obtain an adjusted grid voltage signal.

And in the step V, the power grid voltage is subjected to level conversion through the acquisition circuit of the control board and then converted into a 3.3V square wave signal to be used as a capture signal of the DSP capture unit.

And reading the count value of the time mark register as the count value of the current period signal, and subtracting the adjusted power grid voltage signal from the current period signal to obtain the phase difference QEK.

The PI control in the step vi is proportional-integral control,

XIND＝QEK*KP+∑QEK*KI

wherein KP and KI are respectively proportional and integral coefficients

The output value XIND of the phase difference regulator is added with the counting value of the voltage period of the power grid to obtain the counting value of the current period signal after regulation, the counting value is divided by a carrier ratio 120, the carrier of the counting value is 6k, the counting value of each carrier period, namely the interrupt period of PWM (pulse-width modulation), and phase difference regulation is carried out to realize phase locking of the current signal and the voltage of the power grid so that the phases of the current signal and the voltage of the power grid are consistent.

Step vii, connecting the grounding end of the oscilloscope probe at a zero position by using a dual-channel oscilloscope, respectively testing voltage signals at a point U and a point U1 by using two test points, and measuring the zero crossing point phase difference of the two voltage signals as a compensation angle value, the phase difference between TU-U1 and U, the period value of the T-U1 voltage signal, wherein the compensation angle is 360 TU/T;

after the measurement is carried out according to the method, a dual-channel oscilloscope is adopted, a differential probe is used for measuring the input grid voltage of a rectifier, a current clamp is used for measuring the input current, the phase difference Td between the input grid voltage and the input current of the rectifier and the phase difference between the input grid voltage and the input current of the rectifier are measured, the period value of a T-U1 voltage signal is obtained, the phase difference theta is 360 multiplied by Td/T is 2.89 degrees, the power factor cos theta is calculated to be 0.998 and is approximately equal to 1, and the unit power factor is realized.

Claims

1. The utility model provides an inversion test correcting unit for rectifier, includes direct current input (1), its characterized in that: the direct current input (1) is communicated with the rectifier bridge (3), the two ends of the direct current input (1) are connected with the energy storage capacitor (2), the rectifier bridge (3) is connected with the three outputs (4), the three outputs (4) are provided with a detection terminal U, a detection terminal V and a detection terminal W, and waveforms of the detection terminal U and the power grid voltage U1, the detection terminal V and the power grid voltage V1 and the detection terminal W and the power grid voltage W1 can be observed through an oscilloscope.

2. The inversion test correction device applied to the rectifier according to claim 1, wherein: the rectifier bridge (3) comprises three groups of transistors coupled to the DC input (1), the transistors comprising a transistor S_a1Transistor S_a2Transistor S_b1Transistor S_b2Transistor S_c1Transistor S_c2。

3. The inversion test correction device applied to the rectifier according to claim 2, wherein: transistor S_a1And transistor S_a2Is connected to the collector of, and a transistor S_a1Transistor S_a2Between which a lead-out wire is connected, the transistor S_a1Emitter and diode D_a1Anode connection, diode D_a1Cathode and transistor S_a1The collector of said transistor S_a2Emitter and diode D_a2Anode connection, diode D_a2Cathode and transistor S_a2Is connected to the collector of (a).

4. The inversion test correction device applied to the rectifier according to claim 3, wherein: transistor S_b1And transistor S_b2Is connected to the collector of, and a transistor S_b1Transistor S_b2Between which a lead-out wire is connected, the transistor S_b1Emitter and diode D_b1Anode is connected withDiode D_b1Cathode and transistor S_b1The collector of said transistor S_b2Emitter and diode D_b2Anode connection, diode D_b2Cathode and transistor S_b2Is connected to the collector of (a).

5. The inversion test correction device applied to the rectifier according to claim 4, wherein: transistor S_C1And transistor S_C2Is connected to the collector of, and a transistor S_C1Transistor S_C2Between which a lead-out wire is connected, the transistor S_C1Emitter and diode D_C1Anode connection, diode D_C1Cathode and transistor S_C1The collector of said transistor S_C2Emitter and diode D_C2Anode connection, diode D_C2Cathode and transistor S_C2Is connected to the collector of (a).

6. The inversion test correction device applied to the rectifier according to claim 5, wherein: transistor S_a1Transistor S_a2An inductor L, a resistor R1 and a capacitor C1 are sequentially connected in series on the lead-out wire between the two, and a detection terminal U is positioned between the resistor R1 and the capacitor C1.

7. The inversion test correction device applied to the rectifier according to claim 6, wherein: transistor S_b1Transistor S_b2An inductor L, a resistor R2 and a capacitor C2 are sequentially connected in series on the lead-out wire between the two, and a detection terminal V is positioned between the resistor R2 and the capacitor C2.

8. The inversion test correction device applied to the rectifier according to claim 7, wherein: transistor S_C1Transistor S_C2An inductor L, a resistor R3 and a capacitor C3 are sequentially connected in series on the lead-out wire between the two, and a detection terminal W is positioned between the resistor R3 and the capacitor C3.