CN103346792A - Method and device for eliminating clock jitter in analog-to-digital conversion and digital pre-distortion method - Google Patents

Abstract

The invention discloses the method, apparatus and digital pre-distortion method of eliminating clock jitter in analog-to-digital conversion, the pre-distortion technology being related in communication field, it is desirable to provide one kind can eliminate the method, apparatus and digital pre-distortion method of clock jitter in analog-digital conversion process. Technical key point includes: step 1: being received analog signal z (t); Step 2: providing clock signal h (t) to analog-to-digital conversion module, while the product of the clock signal h (t) and tone signal m (t) being added in analog signal z (t) as reference signal q (t) and obtains composite signal r (t); Step 3: analog-to-digital conversion module carries out analog-to-digital conversion to composite signal r (t) and obtains the identical complex digital signal rjit (n) of two-way; Step 4: to the complex digital signal rjit (n) wherein all the way carry out jitter sequences estimation after obtain clock jitter sequence

Step 5: utilizing clock jitter sequence

Clock jitter elimination is carried out to the another way of the complex digital signal rjit (n), to obtain the pure digital signal y (n) for eliminating clock jitter.

Description

Method and device for eliminating clock jitter in analog-to-digital conversion and digital predistortion method

technical field

The present invention relates to the predistortion technology in the field of communication, in particular to a method and device for eliminating sampling clock jitter interference in a digital predistortion feedback path, and a predistortion method for eliminating clock jitter interference.

Background technique

The power amplifier (Power Amplifier PA) is one of the core components in the modern mobile communication system, and its performance directly affects the performance of the wireless communication system. To improve efficiency, amplifiers usually operate in a high-efficiency region close to the saturation point, where nonlinear characteristics exist in the amplifier. Since the current communication signal has a non-constant envelope, intermodulation distortion and spectrum growth will occur after nonlinear amplification, which will cause adjacent channel interference and deteriorate the bit error rate of the receiver. In order to solve this problem, a digital pre-distortion (Digital Pre-Distortion DPD) technology has emerged. With the assistance of pre-distortion technology, the power amplifier can work near the saturation point and maintain good linearity, thereby improving the efficiency of the power amplifier.

As shown in Figure 5, the traditional digital predistortion method, including direct learning structure and indirect learning structure, requires one or more feedback paths to couple, down-convert and filter the output signal of the power amplifier and finally convert it into a digital signal. to perform predistorter or power amplifier parameter estimation. However, the influence of the clock jitter introduced by the analog-to-digital converter in the feedback path is not considered in the traditional digital predistortion method. Especially for broadband signals, the clock jitter will deteriorate the signal-to-noise ratio of the sampled digital signal and affect the performance of digital pre-distortion.

Contents of the invention

Traditional digital pre-distortion methods require one or more feedback paths to couple, down-convert and filter the output signal of the power amplifier, and finally convert it into a digital signal for parameter estimation of the pre-distorter or power amplifier. However, the analog-to-digital conversion module in the feedback path will introduce clock jitter, especially for broadband signals, the clock jitter will deteriorate the signal-to-noise ratio of the sampled digital signal and affect the performance of digital pre-distortion.

The technical problem to be solved by the present invention is to provide a method and device capable of eliminating clock jitter in the analog-to-digital conversion process in view of the above existing problems.

The invention provides a method for eliminating clock jitter in the analog-to-digital conversion process, comprising:

Step 1: Receive the analog signal z(t);

Step 2: Provide the clock signal h(t) to the analog-to-digital conversion module, and simultaneously add the product of the clock signal h(t) and a single tone signal m(t) to the analog signal z(t) as a reference signal q(t) ) to obtain the composite signal r (t); select the monotone signal m (t) to separate its spectral range from the spectral range of the analog signal z (t);

Step 3: The analog-to-digital conversion module performs analog-to-digital conversion on the composite signal r(t) to obtain two identical digital signals r _jit (n);

Step 4: Perform jitter sequence estimation on one of the composite digital signals r _jit (n) to obtain a clock jitter sequence

对所述复合数字信号r_jit(n)的另一路进行时钟抖动消除，从而获得消除了时钟抖动的纯净数字信号y(n)。Step 5: Utilize the Clock Dithering Sequence

Perform clock jitter elimination on the other path of the composite digital signal r _jit (n), so as to obtain a pure digital signal y(n) from which clock jitter has been eliminated.

Preferably, said step 4 includes:

和

分别为单音信号m(t)的幅度和相位的估计值；f_m为单音信号m(t)的频率；T_s为采样时钟周期，即时钟信号h(t)的周期；Step 401: combine the composite digital signal r _jit (n) with the sequence The product of is filtered to filter out the reference digital signal r _q (n); where,

and

are the estimated values of the amplitude and phase of the single-tone signal m(t); f _m is the frequency of the single-tone signal m(t); T _s is the sampling clock period, that is, the period of the clock signal h(t);

Step 402: Take the imaginary part of the product of the reference digital signal r _q (n) and the constant (2πf _m ) ^-1 to obtain the clock jitter sequence

Preferably, said step 5 includes:

Step 501: filter the composite digital signal r _jit (n) and the digital signal y _jit (n) mixed with jitter;

Step 502: Perform Fourier transform on the digital signal y _jit (n) mixed with jitter;

Step 503: Multiply the result of the Fourier transform with the sequence j2πf _l , and perform an inverse Fourier transform on the product; l=0,1,...N-1, N is the number of frequency divisions in the analog signal z(t) Number, f _l is the frequency of each frequency division in the analog signal z (t);

相乘；Step 504: Combine the result obtained by inverse Fourier transform with the clock jitter sequence

multiplied;

Step 505: Subtract the multiplication result in step 504 from the digital signal y _jit (n) mixed with jitter to obtain a pure digital signal y(n) with clock jitter eliminated.

The present invention also provides a new digital pre-distortion method. This new digital pre-distortion method adopts the method for eliminating clock jitter in the analog-to-digital conversion process described in the present invention to carry out the feedback analog signal after down-conversion and filtering. Analog-to-digital conversion.

The present invention also provides a device for eliminating clock jitter in the analog-to-digital conversion process, including:

An analog signal receiving module, configured to receive an analog signal z(t);

The reference signal injection module is used to provide the clock signal h(t) to the analog-to-digital conversion module, and simultaneously add the product of the clock signal h(t) and a monotone signal m(t) as a reference signal q(t) to the analog Obtain composite signal r (t) in signal z (t); Select monotone signal m (t) to make its spectral range and the spectral range of described analog signal z (t) separate from each other;

The analog-to-digital conversion module is used to perform analog-to-digital conversion to the composite signal r(t) to obtain two identical digital signals r _jit (n);

The clock jitter sequence estimation module is used to obtain the clock jitter sequence after performing jitter sequence estimation on one of the channels of the composite digital signal r _jit (n)

对所述复合数字信号r_jit(n)的另一路进行时钟抖动消除，从而获得消除了时钟抖动的纯净数字信号y(n)。Clock jitter removal block for exploiting clock jitter sequences

Perform clock jitter elimination on the other path of the composite digital signal r _jit (n), so as to obtain a pure digital signal y(n) from which clock jitter has been eliminated.

Preferably, the clock jitter sequence estimation module includes:

的乘积进行滤波以筛选出参考数字信号r_q(n)；其中，

和

分别为单音信号m(t)的幅度和相位的估计值；f_m为单音信号m(t)的频率；T_s为采样时钟周期，即时钟信号h(t)的周期；Reference digital signal screening module for combining composite digital signal r _jit (n) with sequence

The product of is filtered to filter out the reference digital signal r _q (n); where,

and

are the estimated values of the amplitude and phase of the single-tone signal m(t); f _m is the frequency of the single-tone signal m(t); T _s is the sampling clock period, that is, the period of the clock signal h(t);

Take the imaginary part operation module, which is used to take the imaginary part of the product of the reference digital signal r _q (n) and the constant (2πf _m ) ^-1 , to obtain the clock jitter sequence

Preferably, the clock jitter elimination module includes:

A digital signal screening module mixed with jitter is used for filtering the composite digital signal r _jit (n) to filter out the digital signal y _jit (n) mixed with jitter;

Fourier transform module, for carrying out Fourier transform to the digital signal y _jit (n) mixed with jitter;

Compensation and inverse Fourier transform module, used to multiply the result of Fourier transform with the sequence j2πf _l , and perform inverse Fourier transform on the product; l=0,1,...N-1, N is an analog signal The number of frequency divisions in z (t), f _l is the frequency of each frequency division in the analog signal z (t);

The multiplication operation module is used to combine the result obtained by the inverse Fourier transform with the clock jitter sequence multiplied;

The subtraction module is used to subtract the multiplication result in step 504 from the digital signal y _jit (n) mixed with jitter to obtain a pure digital signal y(n) with clock jitter eliminated.

In summary, owing to adopting above-mentioned technical scheme, the beneficial effect of the present invention is:

The method and device for eliminating clock jitter in the analog-to-digital conversion process provided by the invention effectively eliminates the clock jitter introduced in the analog-to-digital conversion process, and improves the precision of the analog-to-digital conversion.

The new digital pre-distortion method provided by the invention adopts the method of eliminating the clock jitter in the process of analog-to-digital conversion, thereby eliminating the influence of the digital pre-distortion feedback path clock jitter on the signal. Specifically, the signal-to-noise ratio of the sampled digital signal can be improved, the accuracy of the power amplifier modeling or power amplifier inversion model can be improved, and the linearization performance of the digital pre-distortion on the power amplifier can be improved.

Description of drawings

The invention will be illustrated by way of example with reference to the accompanying drawings, in which:

FIG. 1 is a flow diagram of a method for eliminating clock jitter during digital-to-analog conversion in the present invention.

FIG. 2 is a schematic diagram of a reference signal injection process in FIG. 1 .

FIG. 3 is a schematic diagram of a clock jitter sequence estimation process in FIG. 1 .

FIG. 4 is a schematic diagram of a clock jitter elimination process in FIG. 1 .

FIG. 5 is a schematic diagram of a traditional digital predistortion structure.

FIG. 6 is a schematic diagram of a digital predistortion structure in the present invention.

Detailed ways

All features disclosed in this specification, or steps in all methods or processes disclosed, may be combined in any manner, except for mutually exclusive features and/or steps.

Any feature disclosed in this specification, unless specifically stated, can be replaced by other alternative features that are equivalent or have similar purposes. That is, unless expressly stated otherwise, each feature is one example only of a series of equivalent or similar features.

As shown in Figure 1 and Figure 2, an embodiment of the method for eliminating clock jitter in the analog-to-digital conversion process includes:

Step 1: Receive an analog signal z(t) 109 .

Step 2: Provide clock signal h(t)205 to the analog-to-digital conversion module, h(t)=cos(2πf _s t+β(t)), f _s represents the clock frequency of the selected crystal oscillator (this value is known value), β(t) represents the phase noise. At the same time, the product of the clock signal h(t) 303 and a single tone signal m(t) 304 is added to the analog signal z(t) 109 as a reference signal q(t) 305 to obtain a composite signal r(t) 204, r (t)=z(t)+q(t).

和

Among them, the single-tone signal is a cosine wave signal, m(t)=A _m cos(2πf _m t+θ _m ), because of its single frequency component, a single-tone signal is obtained. A _m represents the amplitude of the monotone (cosine) signal, f _m represents the clock frequency of the selected crystal oscillator (this value is a known value), and θ _m represents the initial phase. A _m and θ _m can be accurately calculated by conventional sine and cosine signal parameter estimation methods, and the calculation results are respectively recorded as

and

It should be noted that in this step, it is necessary to select a monotone signal m(t) that satisfies the condition: its spectral range, ie frequency, is separated from the spectral range of the analog signal z(t), and cannot overlap. It should also be noted that when performing this step, it must be ensured that the clock signal h(t) when multiplied by the monotone signal m(t) is exactly the same as the clock signal h(t) when it is sent to the analog-to-digital conversion module, including the same phase , that is, these two sub-steps should be performed simultaneously, or the time delays for the clock signal h(t) to reach the multiplier and the digital-to-analog conversion module are the same. All methods known to those skilled in the art to ensure the same time delay are applicable to this step. For example, when designing the PCB circuit board, ensure that the clock signal h(t) reaches the multiplier and the wiring length of the digital-to-analog conversion module is equal, then it can ensure that the delay of the clock signal h(t) to the multiplier and the digital-to-analog conversion module is equal.

The above variables t are continuous real numbers.

Step 3: The analog-to-digital conversion module 201 performs analog-to-digital conversion on the composite signal r(t) to obtain two identical composite digital signals r _jit (n), r _jit (n)=r(nTs), n is 0, 1 , an integer of 2..., T _s =1/f _s represents the sampling clock cycle. Since the analog-to-digital conversion module 201 will introduce clock jitter during the conversion process, interference will be caused to the signal.

208；Step 4: Perform jitter sequence estimation on one of the channels 206 of the composite digital signal r _jit (n) to obtain a clock jitter sequence

208;

208对所述复合数字信号r_jit(n)的另一路207进行时钟抖动消除，从而获得消除了时钟抖动的纯净数字信号y(n)110。Step 5: Utilize the Clock Dithering Sequence

208 performs clock jitter elimination on the other path 207 of the composite digital signal r _jit (n), so as to obtain a pure digital signal y(n) 110 with clock jitter eliminated.

As shown in Fig. 3, in another embodiment of the present invention, the step 4 further includes:

404的乘积进行滤波以筛选出参考数字信号r_q(n)405；其中，

和分别为单音信号m(t)的幅度和相位的估计值；f_m为单音信号m(t)的频率；T_s为采样时钟周期，即时钟信号h(t)的周期。Step 401: combine the composite digital signal r _jit (n) 206 with the sequence

The product of 404 is filtered to filter out the reference digital signal r _q (n) 405; where,

and are the estimated values of the amplitude and phase of the monotone signal m(t); f _m is the frequency of the monotone signal m(t); T _s is the sampling clock period, that is, the period of the clock signal h(t).

The composite digital signal r _jit (n)206 is expressed as r _jit (n)=z(nT _s +δ _n )+q _jit (n), when the frequency of the monotone signal is lower than the lowest frequency division in the analog signal z(t) When , the reference digital signal r _q (n) is screened out by low-pass filtering, and the clock jitter sequence can be easily obtained

Step 402: Take the imaginary part of the product of the reference digital signal r _q (n) and the constant (2πf _m ) ^-1 to obtain the clock jitter sequence

First analyze the discrete signal h _jit (n) after the clock signal h (t) 303 in the composite signal r (t) 204 passes through the analog-to-digital conversion module 201, expressed as:

h _jit (n)=cos(2πf _s nT _s +2πf _s δ _n +β(nT _s +δ _n ))

Among them, T _s =1/f _s represents the sampling clock period; δ _n is the clock jitter sequence. In general, the phase noise β(t) is a slowly varying function of time, so the following approximation can be made:

${\mathrm{<span\; class="notranslate">\; \&delta;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; \&ap;</span><span\; class="notranslate">\; -</span>\frac{\mathrm{<span\; class="notranslate">\; \&beta;</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span>}{\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}}$

And the following approximation can be further made: β(nT _s +δ _n )≈β(nT _s ). Therefore, the discrete signal h _jit (n) can be approximately expressed as:

h _jit (n)=cos(2πf _s δ _n +β(nT _s ))≈1.

Therefore, the reference signal q(t) 305 can be expressed as a discrete digital signal through the analog-to-digital conversion module 201 as follows:

${\mathrm{<span\; class="notranslate">\; q</span>}}_{\mathrm{<span\; class="notranslate">\; jit</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; A</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}\mathrm{<span\; class="notranslate">\; cos</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}{\mathrm{<span\; class="notranslate">\; \&delta;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; \&theta;</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; .</span>$

That is, the reference digital signal r _q (n) 405 filtered by the low-pass filter 401 can be expressed as:

${\mathrm{<span\; class="notranslate">\; r</span>}}_{\mathrm{<span\; class="notranslate">\; q</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; LPF</span>}<span\; class="notranslate">\; \{</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}}{{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; A</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}}{\mathrm{<span\; class="notranslate">\; r</span>}}_{\mathrm{<span\; class="notranslate">\; jit</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; )</span>{\mathrm{<span\; class="notranslate">\; e</span>}}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; j</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; \&theta;</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; \}</span>$

$<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; LPF</span>}<span\; class="notranslate">\; \{</span><span\; class="notranslate">\; (</span>{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; A</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}\mathrm{<span\; class="notranslate">\; cos</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}{\mathrm{<span\; class="notranslate">\; \&delta;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; \&theta;</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&delta;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; )</span><span\; class="notranslate">\; \&times;</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}}{{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; A</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}}{\mathrm{<span\; class="notranslate">\; e</span>}}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; j</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; \&theta;</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; \}</span>$

$<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; LPF</span>}<span\; class="notranslate">\; \{</span><span\; class="notranslate">\; (</span>\frac{{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; A</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}}{\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; (</span>{\mathrm{<span\; class="notranslate">\; e</span>}}^{\mathrm{<span\; class="notranslate">\; j</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}{\mathrm{<span\; class="notranslate">\; \&delta;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; \&theta;</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; e</span>}}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; j</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}{\mathrm{<span\; class="notranslate">\; \&delta;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; +</span>{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; \&theta;</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; )</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&delta;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; )</span><span\; class="notranslate">\; \&times;</span>\frac{\mathrm{<span\; class="notranslate">\; 2</span>}}{{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; A</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}}{\mathrm{<span\; class="notranslate">\; e</span>}}^{<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; j</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; +</span>{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; \&theta;</span>}}}_{\mathrm{<span\; class="notranslate">\; m</span>}}<span\; class="notranslate">\; )</span>}$

$<span\; class="notranslate">\; \&ap;</span>{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="e\; j"\; filenames="HDA00003488734500021.png"\; state="\{\{state\}\}">e</figure-callout></span><figure-callout\; id="2"\; label="e\; j"\; filenames="HDA00003488734500021.png"\; state="\{\{state\}\}">\; </figure-callout>}}^{\mathrm{<span\; class="notranslate">\; </span>}}$

$<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; cos</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}{\mathrm{<span\; class="notranslate">\; \&delta;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; j</span>}\mathrm{<span\; class="notranslate">\; sin</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; m</span>}}{\mathrm{<span\; class="notranslate">\; \&delta;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}<span\; class="notranslate">\; )</span>$

考虑到δ_n的值很小，接近0，因此2πf_mδ_n也很小，那么进一步将上式的结果做近似处理得到：Design the cut-off bandwidth of the LPF (low-pass filter) to be smaller than f _m , then other frequency components will be filtered out after passing through the LPF, and only the

Considering that the value of δ _n is very small, close to 0, so 2πf _m δ _n is also very small, then further approximate the result of the above formula to get:

cos(2πf _m d _n )+jsin(2πf _m δ _n )≈1+j2πf _m δ _n

当然，本领域技术人员可以合理料想，本步骤也可以先对参考数字信号r_q(n)取虚部，再将虚部与常数(2πf_m)^-1的乘积。Therefore, the clock jitter sequence can be obtained by taking the imaginary part of the product of the reference digital signal r _q (n) and the constant (2πf _m ) ^-1

Of course, those skilled in the art can reasonably imagine that in this step, the imaginary part of the reference digital signal r _q (n) can also be obtained first, and then the product of the imaginary part and the constant (2πf _m ) ^-1 can be obtained.

As shown in Figure 4, in another embodiment of the present invention, the step 5 includes:

Step 501: Filter another composite digital signal r _jit (n) 207 to filter out the digital signal y _jit (n) 506 mixed with jitter. When the frequency of the monotone signal is lower than the lowest frequency division of the analog signal z(t), the digital signal y _jit (n) 506 mixed with jitter is screened out by high-pass filtering.

Step 502: Perform Fourier transform 501 on the digital signal y _jit (n) 506 mixed with jitter;

Step 503: Multiply 502 the result of the Fourier transform 501 and the sequence j2πf _l 508, and perform an inverse Fourier transform on the product; l=0,1,...N-1, N is in the analog signal z(t) Frequency division number;

Step 504: Combine the result obtained by inverse Fourier transform with the clock jitter sequence multiplied;

Step 505: Subtract the multiplication result in step 504 from the digital signal y _jit (n) 506 mixed with jitter to obtain a pure digital signal y(n) 110 with clock jitter eliminated.

After the composite digital signal r _jit (n) 207 passes through the high-pass filter to filter out the reference signal, the remaining digital signal y _jit (n) 506 mixed with jitter can be expressed as:

y _jit (n)=z(nT _s +δ _n )

Considering that the clock jitter sequence δ _n is very small relative to the sampling period T _s , the first-order Taylor series expansion of it is:

${\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; jit</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&delta;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\stackrel{<span\; class="notranslate">\; \&CenterDot;</span>}{\mathrm{<span\; class="notranslate">\; z</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&delta;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\stackrel{<span\; class="notranslate">\; \&Center\; Dot;</span>}{\mathrm{<span\; class="notranslate">\; z</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; T</span>}}_{\mathrm{<span\; class="notranslate">\; the\; s</span>}}<span\; class="notranslate">\; )</span>$

Among them, y(n)=z(nT _s ), z represents the first derivative of z(t) at time t=nT _s . Considering the multi-carrier signal used in the existing communication system for communication (for example, OFDM signal), the analog signal z(t) can be expressed as:

$\mathrm{<span\; class="notranslate">\; z</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; t</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\sqrt{\mathrm{<span\; class="notranslate">\; N</span>}}}\underset{\mathrm{<span\; class="notranslate">\; l</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}{\mathrm{<span\; class="notranslate">\; e</span>}}^{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="j"\; filenames="HDA00003488734500021.png"\; state="\{\{state\}\}">j</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}\mathrm{<span\; class="notranslate">\; t</span>}}<span\; class="notranslate">\; ;</span>$

Among them, N represents the number of carriers, S _l is the transmitted symbol, and f _l is the frequency of the lth carrier. The textbook "Signals and Systems" points out that "any physically realizable signal has a Fourier change", that is, it can be expanded according to the Fourier series. Therefore, it is not difficult for those skilled in the art to imagine that when the analog signal z(t ) is a general analog signal, it can also be subjected to spectrum analysis to obtain its frequency-divided signals and the number of frequency-divided signals, so the general analog signal z(t) can also be expressed according to the above formula.

So y _jit (n) can be expressed as:

${\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; jit</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; \&delta;</span>}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\sqrt{\mathrm{<span\; class="notranslate">\; N</span>}}}\underset{\mathrm{<span\; class="notranslate">\; l</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="j"\; filenames="HDA00003488734500021.png"\; state="\{\{state\}\}">j</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}{\mathrm{<span\; class="notranslate">\; e</span>}}^{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="j"\; filenames="HDA00003488734500021.png"\; state="\{\{state\}\}">j</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}\mathrm{<span\; class="notranslate">\; t</span>}}$

Among them, the jitter sequence δ _n has been calculated, and the calculated value is The transmitted symbol sequence S _l of the original signal can be estimated by the Fourier transform F _l of the received signal y _jit (n). Therefore, the pure signal 110 can be obtained by the following formula:

$\mathrm{<span\; class="notranslate">\; the\; y</span>}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; the\; y</span>}}_{\mathrm{<span\; class="notranslate">\; jit</span>}}<span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; no</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>{\stackrel{<span\; class="notranslate">\; ^</span>}{\mathrm{<span\; class="notranslate">\; \&delta;</span>}}}_{\mathrm{<span\; class="notranslate">\; no</span>}}\frac{\mathrm{<span\; class="notranslate">\; 1</span>}}{\sqrt{\mathrm{<span\; class="notranslate">\; N</span>}}}\underset{\mathrm{<span\; class="notranslate">\; l</span>}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; 0</span>}}{\overset{\mathrm{<span\; class="notranslate">\; N</span>}<span\; class="notranslate">\; -</span>\mathrm{<span\; class="notranslate">\; 1</span>}}{\mathrm{<span\; class="notranslate">\; \&Sigma;</span>}}}\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="j"\; filenames="HDA00003488734500021.png"\; state="\{\{state\}\}">j</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}{\mathrm{<span\; class="notranslate">\; e</span>}}^{\mathrm{<span\; class="notranslate">\; <figure-callout\; id="2"\; label="j"\; filenames="HDA00003488734500021.png"\; state="\{\{state\}\}">j</figure-callout></span>}\mathrm{<span\; class="notranslate">\; 2</span>}\mathrm{<span\; class="notranslate">\; \&pi;</span>}{\mathrm{<span\; class="notranslate">\; f</span>}}_{\mathrm{<span\; class="notranslate">\; l</span>}}\mathrm{<span\; class="notranslate">\; t</span>}}$

可以由发射符号为j2πf_lF_l的序列通过N点傅里叶反变换得到。Among them, the signal

It can be obtained by N-point inverse Fourier transform of the sequence whose transmitted symbol is j2πf _l F _l .

As shown in Fig. 5, the present invention also provides a kind of new digital predistortion method, and this new digital budgetary method adopts the method for eliminating the clock jitter in the analog-to-digital conversion process described in the present invention to after down-conversion and filtering Analog-to-digital conversion of the feedback analog signal.

Concrete digital predistortion method provided by the present invention all comprises the following steps:

The digital predistorter 100 adds predistortion (transformation reciprocal to distortion) to the baseband digital baseband signal 107 to be transmitted;

The digital signal 108 mixed with pre-distortion is divided into two identical paths, one of which is sent to the pre-distortion parameter estimation module 106, and the other path is sequentially subjected to digital-to-analog conversion 101, frequency up-conversion and filtering 102;

The filtered signal is sent to the power amplifier 103. After the signal is amplified, the signal is transmitted through the radio frequency antenna on the one hand, and coupled into the feedback loop on the other hand;

In the feedback loop, the coupled-in signal 111 enters down-conversion and filtering 104 in turn, and is sent to the pre-distortion parameter estimation module 106 after analog-to-digital conversion; the analog-to-digital conversion adopts the aforementioned method of eliminating clock jitter in the analog-to-digital conversion process 105 to convert;

The predistortion parameter estimating module 106 calculates the predistortion parameter, and outputs it to the digital predistorter 100, and the digital predistorter 100 adds the predistortion to the baseband digital signal to be transmitted, and so on.

Applying the digital-to-analog conversion method of eliminating clock jitter to the digital pre-distortion process can bring very prominent technical effects, such as improving the signal-to-noise ratio of the sampled digital signal, improving the accuracy of the power amplifier modeling or power amplifier inversion model, Improve the linearization performance of digital predistortion on power amplifiers.

The present invention is not limited to the foregoing specific embodiments. The present invention extends to any new feature or any new combination disclosed in this specification, and any new method or process step or any new combination disclosed.

Claims (7)

1. A method for eliminating clock jitter in the analog-to-digital conversion process, characterized in that, comprising: Step 1: Receive the analog signal z(t); Step 2: Provide the clock signal h(t) to the analog-to-digital conversion module, and simultaneously add the product of the clock signal h(t) and a single tone signal m(t) to the analog signal z(t) as a reference signal q(t) ) to obtain the composite signal r (t); select the monotone signal m (t) to separate its spectral range from the spectral range of the analog signal z (t); Step 3: The analog-to-digital conversion module performs analog-to-digital conversion on the composite signal r(t) to obtain two identical composite digital signals r _jit (n); Step 4: Perform jitter sequence estimation on one of the composite digital signals r _jit (n) to obtain a clock jitter sequence Step 5: Utilize the Clock Dithering Sequence Perform clock jitter elimination on the other path of the composite digital signal r _jit (n), so as to obtain a pure digital signal y(n) from which clock jitter has been eliminated. 2. the method for eliminating clock jitter in the analog-to-digital conversion process according to claim 1, is characterized in that, described step 4 comprises: Step 401: combine the composite digital signal r _jit (n) with the sequence

The product of is filtered to filter out the reference digital signal r _q (n); where,

and

are the estimated values of the amplitude and phase of the single-tone signal m(t); f _m is the frequency of the single-tone signal m(t); T _s is the sampling clock period, that is, the period of the clock signal h(t); Step 402: Take the imaginary part of the product of the reference digital signal r _q (n) and the constant (2πf _m ) ^-1 to obtain the clock jitter sequence

3. the method for eliminating clock jitter in the analog-to-digital conversion process according to claim 2, is characterized in that, described step 5 comprises: Step 501: filter the composite digital signal r _jit (n) and the digital signal y _jit (n) mixed with jitter; Step 502: Perform Fourier transform on the digital signal y _jit (n) mixed with jitter; Step 503: Multiply the result of the Fourier transform with the sequence j2πf _l , and perform an inverse Fourier transform on the product; l=0,1,...N-1, N is the number of frequency divisions in the analog signal z(t) Number, f _l is the frequency of each frequency division in the analog signal z (t); Step 504: Combine the result obtained by inverse Fourier transform with the clock jitter sequence multiplied; Step 505: Subtract the multiplication result in step 504 from the digital signal y _jit (n) mixed with jitter to obtain a pure digital signal y(n) with clock jitter eliminated. 4. A digital predistortion method, characterized in that, the method for eliminating clock jitter in the analog-to-digital conversion process described in claims 1 to 3 is used to perform analog-to-digital conversion on the feedback analog signal after down-conversion and filtering. 5. A device for eliminating clock jitter in the analog-to-digital conversion process, characterized in that it comprises: An analog signal receiving module, configured to receive an analog signal z(t); The reference signal injection module is used to provide the clock signal h(t) to the analog-to-digital conversion module, and simultaneously add the product of the clock signal h(t) and a monotone signal m(t) to the analog signal as a reference signal q(t) Obtain composite signal r (t) in signal z (t); Select monotone signal m (t) to make its spectral range and the spectral range of described analog signal z (t) separate from each other; The analog-to-digital conversion module is used to perform analog-to-digital conversion to the composite signal r(t) to obtain two identical digital signals r _jit (n); The clock jitter sequence estimation module is used to obtain the clock jitter sequence after performing jitter sequence estimation on one of the channels of the composite digital signal r _jit (n)

Clock jitter removal block for exploiting clock jitter sequences

Perform clock jitter elimination on the other path of the composite digital signal r _jit (n), so as to obtain a pure digital signal y(n) from which clock jitter has been eliminated. 6. The device for eliminating clock jitter in the analog-to-digital conversion process according to claim 5, characterized in that, the method for eliminating clock jitter in the analog-to-digital conversion process according to claim 1, wherein the clock jitter The sequence estimation module includes: Reference digital signal screening module for combining composite digital signal r _jit (n) with sequence

The product of is filtered to filter out the reference digital signal r _q (n); where,

and

are the estimated values of the amplitude and phase of the single-tone signal m(t); f _m is the frequency of the single-tone signal m(t); T _s is the sampling clock period, that is, the period of the clock signal h(t); Take the imaginary part operation module, which is used to take the imaginary part of the product of the reference digital signal r _q (n) and the constant (2πf _m ) ^-1 , to obtain the clock jitter sequence

7. The device for eliminating clock jitter in the analog-to-digital conversion process according to claim 6, wherein the clock jitter elimination module comprises: A digital signal screening module mixed with jitter is used for filtering the composite digital signal r _jit (n) to filter out the digital signal y _jit (n) mixed with jitter; Fourier transform module, for carrying out Fourier transform to the digital signal y _jit (n) mixed with jitter; Compensation and inverse Fourier transform module, used to multiply the result of Fourier transform with the sequence j2πf _l , and perform inverse Fourier transform on the product; l=0,1,...N-1, N is an analog signal The number of frequency divisions in z (t), f _l is the frequency of each frequency division in the analog signal z (t); The multiplication operation module is used to combine the result obtained by the inverse Fourier transform with the clock jitter sequence

multiplied; The subtraction module is used to subtract the multiplication result in step 504 from the digital signal y _jit (n) mixed with jitter to obtain a pure digital signal y(n) with clock jitter eliminated.

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