CN103258504A - Electrophoretic display driving method - Google Patents
Electrophoretic display driving method Download PDFInfo
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- CN103258504A CN103258504A CN2013101305835A CN201310130583A CN103258504A CN 103258504 A CN103258504 A CN 103258504A CN 2013101305835 A CN2013101305835 A CN 2013101305835A CN 201310130583 A CN201310130583 A CN 201310130583A CN 103258504 A CN103258504 A CN 103258504A
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Abstract
Provided is an electrophoretic display driving method. The electrophoretic display driving method includes the steps that display driving is achieved when a driving voltage which has an impulse waveform is applied to a driving electrode of display pixels of an electrophoretic display, a data signal impulse is controlled to write in effective image data according to a source electrode clock signal impulse in a data input time quantum of an impulse driving waveform, and an output enabling signal impulse and a gate electrode clock signal impulse are kept in a low level. The output enabling signal impulse and the gate electrode clock signal impulse are simultaneously changed to be a high level from the low level after the output enabling signal impulse and the gate electrode clock signal impulse are controlled to delay a first time, namely an initial time of the data output time quantum, in the data output time quantum of the impulse driving waveform, the written-in effective image data are output in a second time quantum when the second time of the high level is kept, and corresponding images are displayed through the electrophoretic display. Through the electrophoretic display driving method, the output enabling signal impulse and the gate electrode clock signal impulse are simultaneously turned on after images are written in a storage circuit, a pixel electrode is driven, the displaying effect is ensured, and electricity is saved.
Description
Technical field
The present invention relates to the electrophoretic display apparatus technical field, relate in particular to a kind of for the driving method by the Micro Controller Unit (MCU) driving electrophoretic display device (EPD).
Background technology
Current, electrophoretic display apparatus must use special-purpose controller to drive, and Single Chip Microcomputer (SCM) system can only be used for TN LCD(twisted nematic liquid crystal display screen) or STN LCD(Supertwist Nematic Liquid Crystal Display screen) driving, still do not have the Single Chip Microcomputer (SCM) system that is complementary with electrophoretic display apparatus.
Existing electrophoretic display apparatus comprises the display screen with a plurality of pixels, in each pixel, after writing picture signal via the pixel switch element to memory circuit, drive pixel electrode by the current potential corresponding with the picture signal that writes, between pixel electrode and common electrode, produce potential difference (PD).Thereby, show by the electrophoresis element that drives between pixel electrode and common electrode.Fig. 1 is the pulse sequence waveform synoptic diagram that drives electrophoretic display apparatus in the prior art by nonshared control unit, wherein, SDCE_L represents the chip selection signal pulse, SDCLK represents the source electrode clock signal pulse, SDDO presentation video signal pulse, SDLE represents the latch signal pulse, and SDOE represents the output enable signal pulse, and GDCLK represents the gate pole clock signal pulse.Wherein, this pulsed drive waveform is divided into very first time section P1, the second time period P2 and the 3rd time period P3 according to the output timing of each signal pulse.In the driving process, at very first time section P1, it is high level that the controller retention tab is selected signal pulse SDCE_L, control source electrode clock signal pulse SDCLK postpones p1 from initial time and exports a clock pulse signal with specific time sequence after the time, outputting data signals pulse SDDO is to carry out the input of viewdata signal, control latch signal pulse SDLE and gate pole clock signal pulse GDCLK are becoming high level by low level from initial time delay p2 after the time, and keep becoming low level again in the termination moment of this very first time section P1 behind the latch signal pulse SDLE high level state duration p3, can not change with the state variation of output terminal with the input state that keeps input interface.It is that high level state is to the termination moment of this very first time section P1 that controller also keeps gate pole clock signal GDCLK, control output enable signal pulse SDOE simultaneously and become high level state at delay this very first time section P1 initial time p4 after the time, prepare output image data, wherein p1<p2+p3<p4.At the second time period P2, the controller control strip selects signal pulse SDCE_L to become low level at the initial time of the second time period P2 by high level, make controller write effective view data to memory circuit, become effective viewdata signal with control data signal pulses SDDO at the viewdata signal of this second time period P2 input.Meanwhile, controller keeps gate pole clock signal pulse GDCLK and output enable signal pulse SDLE high level, thus effective view data that controller outputting data signals pulse SDOE writes.At the 3rd time period P3, controller chip selection signal pulse SDCE_L becomes high level by low level, to stop in memory circuit, writing view data, and keep closing behind source electrode clock signal pulse SDCLK and the output enable signal pulse time p5, and keep becoming low level behind the gate pole clock signal pulse GDCLK high level state time p6 p5 wherein〉p6.Therefore, when nonshared control unit in the prior art drives electrophoretic display apparatus, when writing valid data, exports data signal pulses SDDO the valid data that this writes.
This shows, when the electrophoretic display apparatus of prior art adopts nonshared control unit to drive, because the processing speed of nonshared control unit is higher, its drive waveforms that adopts can also be opened the output of carrying out data simultaneously with the output enable signal pulse when writing effective view data.But, because the processing speed of single-chip microcomputer is low than nonshared control unit, when utilizing single-chip microcomputer to drive according to the drive waveforms of prior art, when electrophoretic display apparatus refreshes displaying contents, the overlong time of opening drive electrode because of original waveform causes non-electrode when the front wheel driving row also to be driven unintentionally, makes displaying contents unintelligible; And when single-chip microcomputer showed that data are filled, driving time was elongated because data are filled, and causes electrophoretic display apparatus in running order always, thereby the waste electric energy.
Summary of the invention
In view of this, be necessary to provide a kind of for the driving method by the Micro Controller Unit (MCU) driving electrophoretic display device (EPD), can be directly driven by single-chip microcomputer and reduce driving time and the raising display effect of electrophoretic display device (EPD).
The invention provides a kind of electrophoretic display driving method, the corresponding drive electrode of the display pixel of this electrophoretic display device (EPD), drive electrode at this electrophoretic display device (EPD) display pixel applies the driving voltage realization display driver with a pulsed drive waveform, institute's pulsed drive waveform comprises source electrode clock signal pulse, chip selection signal pulse, data signal pulses, output enable signal pulse and gate pole clock signal pulse, and this method comprises:
Control this data signal pulses in this pulsed drive waveform data section input time and write effective view data according to this source electrode clock signal pulse, and keep this output enable signal pulse and this gate pole clock signal pulse to be in low level.And
Control the initial time that this output enable signal pulse and gate pole clock signal pulse postpone this data output time section in this pulsed drive waveform data output time section and become high level by low level simultaneously after the very first time, and keep second time of high level to export effective view data that this writes in this second time period, show respective image by this electrophoretic display device (EPD).
With respect to prior art, the driving method of electrophoretic display device (EPD) provided by the invention, in memory circuit, write the picture signal pulse and open output enable signal pulse and gate pole clock signal pulse simultaneously after finishing, pixel electrode is driven, the waveform that output is default.Reduced the time of opening electrode, the time of effectively having avoided electrode to be driven unintentionally, thus guarantee display effect.
Description of drawings
Fig. 1 is the pulsed drive waveform synoptic diagram that passes through the nonshared control unit drive cataphoresis display in the prior art.
Fig. 2 is the high-level schematic functional block diagram of the electrophoretic display device (EPD) of an embodiment of the present invention.
Fig. 3 is the pulsed drive waveform synoptic diagram that passes through the Micro Controller Unit (MCU) driving electrophoretic display device (EPD) of an embodiment of the present invention.
Fig. 4 is the driving method process flow diagram that passes through the Micro Controller Unit (MCU) driving electrophoretic display device (EPD) of an embodiment of the present invention.
The main element symbol description
Electrophoretic display device (EPD) | 10 |
Single- |
11 |
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12 |
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13 |
Following embodiment will further specify the present invention in conjunction with above-mentioned accompanying drawing.
Embodiment
Below in conjunction with accompanying drawing, the present invention is described in further detail.
See also Fig. 2, be the high-level schematic functional block diagram of electrophoretic display device (EPD) of the present invention, this electrophoretic display device (EPD) 10 comprises single-chip microcomputer 11, drive electrode 12 and display unit 13.Interim, this display unit 13 comprises a plurality of display pixel (not shown), and this single-chip microcomputer 11 shows correspondence image by applying a driving voltage with pulse waveform to drive electrode 12 thereby the display pixel of driving display unit 13 correspondingly changes.
See also Fig. 3, be the pulsed drive waveform synoptic diagram of the present invention by the Micro Controller Unit (MCU) driving electrophoretic display device (EPD), this pulsed drive waveform comprises chip selection signal pulse SDCE_L, source electrode clock signal pulse SDCLK, data signal pulses SDDO, latch signal pulse SDLE, output enable signal pulse SDOE and gate pole clock signal pulse GDCLK.
Please consult Fig. 4 simultaneously, be the present invention by the driving method process flow diagram of Micro Controller Unit (MCU) driving electrophoretic display device (EPD), the driving method of this electrophoretic display device (EPD) is used this pulsed drive waveform and is realized display driver with the drive electrode of the display pixel correspondence that drives this electrophoretic display device (EPD).This pulsed drive waveform is divided into very first time section T1, the second time period T2, the 3rd time period T4 and the 4th time period T4 according to the output timing of each signal pulse.This method comprises the steps:
Step S30, at very first time section T1, it is high level that this single-chip microcomputer output and retention tab are selected signal pulse SDCE_L, control postpones t1 in chip selection signal pulse SDCE_L output back and exports a source electrode clock signal pulse SDCLK with specific time sequence after the time.In the present embodiment, this source electrode clock signal pulse SDCLK is the cyclic pulse signal that specific time sequence is arranged.This single-chip microcomputer is also controlled in this very first time section T1 outputting data signals pulse SDDO carrying out the input of viewdata signal, and to keep latch signal pulse SDLE, output enable signal pulse SDOE and gate pole clock signal pulse GDCLK be low level.
Because chip selection signal pulse SDCE_L continues high level at very first time section T1, single-chip microcomputer does not write effective view data at very first time T1 in the memory circuit of electrophoretic display device (EPD), therefore, data signal pulses SDDO is invalid viewdata signal at the viewdata signal of this very first time section T1 input.At this moment, this electrophoretic display device (EPD) there is no output and the demonstration of image.
Step S31, at the second time period T2, this Single-chip Controlling chip selection signal pulse SDCE_L becomes low level at the initial time of this second time period T2 by high level, keep this source electrode clock signal pulse of output SDCLK, continue control data signal pulses SDDO input image data signal, and write effective view data at this second time period T2 control data signal pulses SDDO according to this source electrode clock signal pulse SDCLK.Simultaneously, single-chip microcomputer keeps latch signal pulse SDLE, output enable signal pulse SDOE and gate pole clock signal pulse GDCLK to be in low level, makes this electrophoretic display device (EPD) can not export and upgrade the shown view data of this electrophoretic display device (EPD) when writing effective view data in memory circuit.
When chip selection signal pulse SDCE_L becomes low level by high level, this single-chip microcomputer begins to write effective view data to memory circuit, so data signal pulses SDDO becomes effective viewdata signal at the viewdata signal of this second time period T2 input by invalid viewdata signal.Therefore, at this second time period T2, this single-chip microcomputer is imported effective viewdata signal according to source electrode clock signal pulse SDCE_L control data signal pulses SDDO, thereby realizes writing of view data.
Step S32, at the 3rd time period T3, Single-chip Controlling chip selection signal pulse SDCE_L becomes high level at the initial time of the 3rd time period T3 by low level, the viewdata signal of control data signal pulses SDDO input becomes invalid viewdata signal, keeps simultaneously closing this source electrode clock signal pulse SDCLK behind the output source electrode clock signal pulse SDCLK duration t2.Equally, at the 3rd time period T3, single-chip microcomputer keeps latch signal pulse SDLE, output enable signal pulse SDOE and gate pole clock signal pulse GDCLK to be in low level.
When chip selection signal pulse SDCE_L becomes high level by low level, this single-chip microcomputer stops to write effective view data to memory circuit, so this data signal pulses SDDO becomes invalid viewdata signal at the viewdata signal of the 3rd time period T3 input by effective viewdata signal.Therefore, at the 3rd time period T3, this single-chip microcomputer stops to write of view data.
Step S33, when the 4th time period T4, this single-chip microcomputer retention tab selects signal pulse SDCE_L to be in high level, control output enable signal pulse SDOE and gate pole clock signal pulse GDCLK by low level become high level simultaneously at delay t3 after the time, and to keep enable signal pulse SDOE and gate pole clock signal pulse GDCLK be that high level state continues the t4 time, effective view data output to write at this t4 time period inner control data signal pulses SDDO makes this electrophoretic display device (EPD) correspondingly show corresponding image.
This single-chip microcomputer is also controlled latch signal pulse SDLE and is become high level at the initial time of the 4th time period T4 by low level, being used for retention tab selects the input state of signal pulse SDCE_L, source electrode clock signal pulse SDCLK and data signal pulses SDDO and can not change with the state variation of output terminal, the state of input is saved to output, and keep the lasting t5 of this latch signal pulse SDLE to become low level by high level after the time, thereby remove the lock-out state to chip selection signal pulse SDCE_L, source electrode clock signal pulse SDCLK and data signal pulses SDDO.In the present embodiment, t3〉t5.
At the 4th time period T4, the single-chip microcomputer retention tab is selected signal pulse SDCE_L to be in high level and is no longer write effective view data to memory circuit with the assurance single-chip microcomputer, and then the viewdata signal that keeps data signal pulses SDDO to import is invalid viewdata signal.
Step S34, single-chip microcomputer is controlled output enable signal pulse SDOE constantly and gate pole clock signal pulse GDCLK becomes low level by high level simultaneously simultaneously in the termination of the 4th time period T4, to stop this effective view data of output, correspondingly the shown view data of electrophoretic display device (EPD) stops to upgrade.
This single-chip microcomputer apply voltage signal with this drive waveforms to the drive electrode of this electrophoretic display device (EPD) display pixel finishing demonstration and the renewal of electrophoretic display device (EPD) one frame image data, and apply repeatedly voltage signal with this drive waveforms to the drive electrode of the display pixel of this electrophoretic display device (EPD) to finish demonstration and the renewal of electrophoretic display device (EPD) all images data.
Because, when this electrophoretic display device (EPD) drives the drive electrode of certain delegation's pixel in the demonstration of carrying out the next frame view data, because the corresponding charged particle of pixel be not subjected to keeping the origin-location when voltage drives in the electrophoretic display device (EPD), be that image can not disappear after the power down, thus the not driven pixel of other pixel drive electrodes the brightness of the corresponding image that shows can not decay.After the driven pixel position data signal pulses of pixel drive electrode writes effective view data again, and correspondingly export effective view data that this writes, thereby the display effect of electrophoretic display device (EPD) is strengthened.
Use the driving method of above-mentioned electrophoretic display device (EPD), in memory circuit, write effective view data and open output enable signal pulse SDOE and gate pole clock signal pulse GDCLK after finishing simultaneously, pixel electrode is driven output and the demonstration of waveform to realize effective view data that this writes that output is default.Thereby, reduced the time of opening electrode, the time of effectively having avoided electrode to be driven unintentionally, and guaranteed display effect.
Be understandable that, for the person of ordinary skill of the art, can make other various corresponding changes and distortion by technical conceive according to the present invention, and all these change the protection domain that all should belong to claim of the present invention with distortion.
Claims (8)
1. electrophoretic display driving method, the corresponding drive electrode of the display pixel of described electrophoretic display device (EPD), drive electrode at described electrophoretic display device (EPD) display pixel applies the driving voltage realization display driver with a pulsed drive waveform, institute's pulsed drive waveform comprises source electrode clock signal pulse, chip selection signal pulse, data signal pulses, output enable signal pulse and gate pole clock signal pulse, it is characterized in that described method comprises:
Control described data signal pulses in described pulsed drive waveform data section input time and write effective view data according to described source electrode clock signal pulse, and keep described output enable signal pulse and described gate pole clock signal pulse to be in low level; And
Control the initial time that described output enable signal pulse and gate pole clock signal pulse postpone described data output time section in described pulsed drive waveform data output time section and become high level by low level simultaneously after the very first time, and keep second time of high level with the effective view data in described second time period output said write, show respective image by described electrophoretic display device (EPD).
2. electrophoretic display driving method as claimed in claim 1 is characterized in that, " control described data signal pulses in described pulsed drive waveform data section input time and write effective view data according to described source electrode clock signal pulse " comprising:
Very first time section in described data section input time, keeping described chip selection signal pulse is high level, control is exported the source electrode clock signal pulse with specific time sequence at described chip selection signal pulse output back delay control after three times, the described data signal pulses of control output to be carrying out the input of viewdata signal, and to keep described output enable signal pulse and described gate pole clock signal pulse be low level;
In second time period of described data section input time, control the initial time of described chip selection signal pulse in described second time period and become low level by high level, keep the described source electrode clock signal pulse of output, continue the described data signal pulses of control and write effective view data according to described source electrode clock signal pulse, and keep described output enable signal pulse and described gate pole clock signal pulse to be in low level; And
In the 3rd time period of described data section input time, control the initial time of described chip selection signal pulse in described the 3rd time period and become high level by low level, the viewdata signal of control data signal pulses input becomes invalid viewdata signal, keep the described source electrode clock signal pulse of output to continue to close described source electrode clock signal pulse after the 4th time, and keep described output enable signal pulse and gate pole clock signal pulse to be in low level.
3. electrophoretic display driving method as claimed in claim 2 is characterized in that, described pulse waveform also comprises the latch signal pulse, and described method also comprises:
Keeping described latch signal pulse is low level in described first, second and third time period; And
Control described latch signal pulse and become high level at the initial time of described pulsed drive waveform data output time section by low level, can be with the state variation of output terminal with the state that keeps described chip selection signal pulse, source electrode clock signal pulse and data signal pulses.
4. electrophoretic display driving method as claimed in claim 3 is characterized in that, also comprises:
Keep described latch signal pulse persistance to become low level by high level after the 5th time, to remove the lock-out state to described chip selection signal pulse, source electrode clock signal pulse and data signal pulses.
5. electrophoretic display driving method as claimed in claim 4 is characterized in that, the described very first time is greater than the 5th time.
6. electrophoretic display driving method as claimed in claim 1 is characterized in that, described source electrode clock signal pulse is the cyclic pulse signal that specific time sequence is arranged.
7. electrophoretic display driving method as claimed in claim 1 is characterized in that, also comprises:
Control described output enable signal pulse and gate pole clock signal pulse constantly in the termination of described pulsed drive waveform data output time section and become low level by high level simultaneously, to stop to export described effective view data, the shown image of described electrophoretic display device (EPD) stops to upgrade.
8. electrophoretic display driving method as claimed in claim 7 is characterized in that, applies the display driver that the driving voltage with described pulsed drive waveform is realized all images on the drive electrode of described electrophoretic display device (EPD) display pixel repeatedly.
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CN2013101305835A CN103258504A (en) | 2013-04-16 | 2013-04-16 | Electrophoretic display driving method |
TW102113910A TW201442002A (en) | 2013-04-16 | 2013-04-19 | Method for driving electrophoretic display |
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Cited By (1)
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CN107767820A (en) * | 2016-08-16 | 2018-03-06 | 晶宏半导体股份有限公司 | Drive And Its Driving Method for electrophoretic display device (EPD) |
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US10276109B2 (en) * | 2016-03-09 | 2019-04-30 | E Ink Corporation | Method for driving electro-optic displays |
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- 2013-04-16 CN CN2013101305835A patent/CN103258504A/en active Pending
- 2013-04-19 TW TW102113910A patent/TW201442002A/en unknown
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JP2005326883A (en) * | 2000-06-22 | 2005-11-24 | Seiko Epson Corp | Method and circuit for driving electrophoretic display device, and electronic equipment |
JP2007193201A (en) * | 2006-01-20 | 2007-08-02 | Seiko Epson Corp | Unit and method for driving electrophoretic display panel |
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CN107767820A (en) * | 2016-08-16 | 2018-03-06 | 晶宏半导体股份有限公司 | Drive And Its Driving Method for electrophoretic display device (EPD) |
CN107767820B (en) * | 2016-08-16 | 2019-10-18 | 晶宏半导体股份有限公司 | Drive And Its Driving Method for electrophoretic display device (EPD) |
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Application publication date: 20130821 |