CN103035546B - A kind of small size bonding point two-wire bonding method - Google Patents
A kind of small size bonding point two-wire bonding method Download PDFInfo
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- CN103035546B CN103035546B CN201210549358.0A CN201210549358A CN103035546B CN 103035546 B CN103035546 B CN 103035546B CN 201210549358 A CN201210549358 A CN 201210549358A CN 103035546 B CN103035546 B CN 103035546B
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- line
- bonding
- small size
- bonding point
- bonded
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
- H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/494—Connecting portions
- H01L2224/4941—Connecting portions the connecting portions being stacked
- H01L2224/49429—Wedge and ball bonds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/78—Apparatus for connecting with wire connectors
- H01L2224/7825—Means for applying energy, e.g. heating means
- H01L2224/783—Means for applying energy, e.g. heating means by means of pressure
- H01L2224/78301—Capillary
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Wire Bonding (AREA)
Abstract
The invention belongs to ic manufacturing technology field, more particularly to a kind of small size pad two-wire bonding method, can implement successively as follows：A, it is bonded number one line（1）；Second bonding point of number one line（102）It is placed in chip（3）On；The thread ball of number one line（101）It is placed in substrate（4）On；B, it is bonded No. second line（2）；The thread ball of No. second line（201）It is placed in chip（3）On, the second bonding point of No. second line（202）It is placed at substrate（4）On；The thread ball of No. second line（201）It is bonded in the second bonding point of number one line（102）On.Simple to operate, IC reliability and high yield rate of the invention, the bonding of small size pad chip batch can be achieved.
Description
Technical field
The invention belongs to ic manufacturing technology field, more particularly to a kind of small size bonding point two-wire bonding method.
Background technology
With the progress of integrated circuit technique, more and more high is required to the integrated level of hybrid circuit, the function of chip is continuous
Increase, size is but more and more small, and so as to which the area ratio for causing pad shared in whole chip substantially rises, this is just to normal
Two-wire bonding bring difficulty.But the key technology in wire bonding based semiconductor packaging technology, it directly affects integrated
The reliability and yield rate of circuit.
Shown in Figure 1, at present, conventional two-wire bonding technology typically uses two lines bonding pattern side by side, and this is required
The pad size of thread ball position is larger.Referring to Fig. 2, size P is exactly the minimum dimension of pad, it is contemplated that bonding tool is (in Fig. 2
Chopper) size, P is bigger than 2 times of thread ball diameter.If pad size herein is less than P, then can not just carry out two-wire
Bonding.
The content of the invention
It is contemplated that provided in place of overcome the deficiencies in the prior art it is a kind of simple to operate, IC reliability and into
Product rate is high, and small size, the small size bonding point two-wire bonding method of pad chip batch bonding can be achieved.
To reach above-mentioned purpose, what the present invention was realized in.
A kind of small size bonding point two-wire bonding method, can implement successively as follows.
A, it is bonded number one line；Second bonding point of number one line is placed on chip；The thread ball of number one line is placed in substrate
On.
B, it is bonded No. second line；The thread ball of No. second line is placed on chip, and the second bonding point of No. second line is placed at lining
On bottom；The thread ball of No. second line is bonded on the second bonding point of number one line.
Simple to operate, IC reliability and high yield rate of the invention, the bonding of small size pad chip batch can be achieved.
Bonding position on chip of the present invention, the thread ball of No. second line are to be stacked in up and down with the second bonding point of number one line
Together, it is necessary to pad size meet be not less than thread ball diameter.Therefore, as long as pad size can carry out single line key
Close, it becomes possible to carry out two-wire bonding.Compared to the two-wire bonding technology of routine, the present invention can realize double on smaller pad
Line bonding.As long as pad size can carry out single line bonding, it becomes possible to carry out two-wire bonding.
Brief description of the drawings
The invention will be further described with reference to the accompanying drawings and detailed description.Protection scope of the present invention not only office
It is limited to the statement of following content.
Fig. 1 is that conventional two-wire is bonded schematic diagram.
Fig. 2 is that conventional two-wire is bonded operation schematic diagram.
Fig. 3 is that two-wire of the present invention is bonded operation top view.
Fig. 4 is that two-wire of the present invention is bonded operation side view.
In figure：1st, number one line；2nd, No. second line；3rd, chip；4th, substrate；5th, thread ball；6th, the second bonding point of line；7th, split
Knife；8th, line；102nd, the second bonding point of number one line；101st, the thread ball of number one line；202nd, the second bonding point of No. second line；
201st, the thread ball of No. second line.
Embodiment
As shown in the figure, it is assumed that the pad size on chip is small, and the pad on substrate is sufficiently large, small size Pad two-wire keys
Conjunction method, it can implement successively as follows.
A, it is bonded number one line 1；Second bonding point 102 of number one line is placed on chip 3；The thread ball 101 of number one line
It is placed on substrate 4.
B, it is bonded No. second line 2；The thread ball 201 of No. second line is placed on chip 3, the second bonding point 202 of No. second line
It is placed on the substrate 4；The thread ball 201 of No. second line is bonded on the second bonding point 102 of number one line.
The purpose of two-wire bonding is to improve the reliability of bonding, is generally used for the product higher to reliability requirement
In.This is a kind of two-wire bonding method suitable for small size pad occasion, and the pad of small size said herein generally refers to core
The bonding point on pad i.e. chip on piece.It present invention can be suitably applied to gold ball bonding, copper ball bonding and similar bonding work
Skill.
It is to be understood that above with respect to the specific descriptions of the present invention, it is merely to illustrate the present invention and is not limited to this
Technical scheme described by inventive embodiments, it will be understood by those within the art that, still the present invention can be carried out
Modification or equivalent substitution, to reach identical technique effect；As long as meet use needs, all protection scope of the present invention it
It is interior.
Claims (1)
1. a kind of small size bonding point two-wire bonding method, it is characterised in that implement successively as follows：
A, it is bonded number one line（1）；Second bonding point of number one line（102）It is placed in chip（3）On；The thread ball of number one line
（101）It is placed in substrate（4）On；
B, it is bonded No. second line（2）；The thread ball of No. second line（201）It is placed in chip（3）On, the second bonding point of No. second line
（202）It is placed at substrate（4）On；The thread ball of No. second line（201）It is bonded in the second bonding point of number one line（102）On.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210549358.0A CN103035546B (en) | 2012-12-18 | 2012-12-18 | A kind of small size bonding point two-wire bonding method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210549358.0A CN103035546B (en) | 2012-12-18 | 2012-12-18 | A kind of small size bonding point two-wire bonding method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN103035546A CN103035546A (en) | 2013-04-10 |
| CN103035546B true CN103035546B (en) | 2018-01-16 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210549358.0A Active CN103035546B (en) | 2012-12-18 | 2012-12-18 | A kind of small size bonding point two-wire bonding method |
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Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105845655B (en) * | 2016-03-24 | 2018-05-04 | 中国电子科技集团公司第二十九研究所 | Superposition carries out the method and microbonding disk superposition bonding structure of ball-shaped welded on microbonding disk |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR0148883B1 (en) * | 1995-05-17 | 1998-12-01 | 김광호 | Semiconductor package using double wire bonding |
| US6189765B1 (en) * | 1998-04-14 | 2001-02-20 | Hyundai Electronics Industries Co., Ltd. | Apparatus and method for detecting double wire bonding |
| KR20050048430A (en) * | 2003-11-19 | 2005-05-24 | 앰코 테크놀로지 코리아 주식회사 | Double wire bonding structure of semiconductor device |
| JP2008066370A (en) * | 2006-09-05 | 2008-03-21 | Yamaha Corp | Wire bonding method |
| CN101552257A (en) * | 2008-03-31 | 2009-10-07 | 恩益禧电子股份有限公司 | Semiconductor device capable of switching operation modes |
| CN102437141A (en) * | 2011-12-09 | 2012-05-02 | 天水华天科技股份有限公司 | Dense-pitch small-pad copper-wire bonded single intelligent card (IC) chip packing piece and preparation method thereof |
-
2012
- 2012-12-18 CN CN201210549358.0A patent/CN103035546B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR0148883B1 (en) * | 1995-05-17 | 1998-12-01 | 김광호 | Semiconductor package using double wire bonding |
| US6189765B1 (en) * | 1998-04-14 | 2001-02-20 | Hyundai Electronics Industries Co., Ltd. | Apparatus and method for detecting double wire bonding |
| KR20050048430A (en) * | 2003-11-19 | 2005-05-24 | 앰코 테크놀로지 코리아 주식회사 | Double wire bonding structure of semiconductor device |
| JP2008066370A (en) * | 2006-09-05 | 2008-03-21 | Yamaha Corp | Wire bonding method |
| CN101552257A (en) * | 2008-03-31 | 2009-10-07 | 恩益禧电子股份有限公司 | Semiconductor device capable of switching operation modes |
| CN102437141A (en) * | 2011-12-09 | 2012-05-02 | 天水华天科技股份有限公司 | Dense-pitch small-pad copper-wire bonded single intelligent card (IC) chip packing piece and preparation method thereof |
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| Publication number | Publication date |
|---|---|
| CN103035546A (en) | 2013-04-10 |
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Effective date of registration: 20180118 Address after: No. 16, No. four street, Shenyang economic and Technological Development Zone, Liaoning, Liaoning Patentee after: Kodenshi Corp. Address before: No. 16, No. 4 Street, Shenyang economic and Technological Development Zone, Liaoning, Liaoning Patentee before: Horizon semiconductor (Shenyang) Co., Ltd. |