CN102760745B - LED array - Google Patents

Abstract

The present invention discloses a light emitting diode array, which is composed of N (N≥3) light emitting diode units, including: a permanent substrate; a bonding layer located on the permanent substrate; a second conductive layer located on the bonding layer; a second separation layer located on the second conductive layer; a bridging metal layer located on the second separation layer; a first separation layer located on the bridging metal layer; a conductive connection layer located on the first separation layer; an epitaxial structure located on the conductive connection layer; and a first electrode located on the epitaxial structure. The light emitting diode units are electrically connected to each other via the bridging metal layer.

Description

LED array

technical field

The invention relates to a light emitting diode array, in particular to a light emitting diode array composed of N (N≧3) light emitting diode units.

Background technique

In recent years, due to the advancement of epitaxy and process technology, light emitting diodes (light emitting diodes, referred to as LEDs) have become one of the solid-state lighting sources with great potential. Due to the limitations of the physical mechanism, LEDs can only be driven by direct current. Therefore, any lighting design using LEDs as light sources needs to be equipped with electronic components such as rectification and step-down to convert the alternating current directly provided by the power company into the usable LED. DC power supply. However, the addition of electronic components such as rectification and step-down will not only increase the cost of lighting, but also the low AC-DC conversion efficiency and large size of electronic components such as rectification and step-down will affect the reliability of LEDs in daily lighting applications. and service life.

Contents of the invention

The light-emitting diode array includes: a permanent substrate; an adhesive layer located on the permanent substrate; a second conductive layer located on the adhesive layer; a second separation layer located on the second conductive layer; a bridge metal layer located between the second separation layer on; the first separation layer is located on the bridge metal layer; the conductive connection layer is located on the first separation layer; the epitaxial structure is located on the conductive connection layer; and the first electrode is located on the epitaxial structure.

The light-emitting diode array includes: a permanent substrate; an adhesive layer located on the permanent substrate; a first conductive layer located on the adhesive layer; a second separation layer located on the first conductive layer; a bridge metal layer located between the second separation layer on; the first separation layer is located on the bridging metal layer; the conductive connection layer is located on the first separation layer; and the epitaxial structure is located on the conductive connection layer.

The light-emitting diode array includes N light-emitting diode units (N≧3), and the light-emitting diode units are electrically connected to each other through a jumper metal layer.

Description of drawings

1A-1I are schematic cross-sectional structural views of a light emitting diode array 1 disclosed in the present invention.

1A'-1G' are schematic top views of the structure of the LED array 1 disclosed in the present invention.

2A-2I are schematic cross-sectional structural views of the LED array 2 disclosed in the present invention.

2A'-2G' are schematic top views of the structure of the LED array 2 disclosed in the present invention.

Explanation of reference signs

1, 2: LED array

11: Growth substrate

12: First conductivity type semiconductor layer

13: active layer

14: Second conductivity type semiconductor layer

15: Groove

16: Platform

17: Conductive connection layer

18: Aisle

19: The first separation layer

20: Conductive area

21: Bridge the metal layer

22: Second separation layer

23: Second conductive layer

24: bonding layer

25: permanent substrate

26: The first conductive layer

27: First electrode

28: Second electrode

I: first area

II: Second Zone

III: The third area

a, b: electrically isolated area

detailed description

The present invention discloses a light emitting diode array composed of N (N≥3) light emitting diode units, including the first light emitting diode unit, the second light emitting diode unit... to the (N-1)th light emitting diode in sequence a diode unit and an Nth light-emitting diode unit. The LED array has a first area (I) and a third area (III), wherein the first area (I) includes the first LED unit, and the third area (III) includes the Nth LED unit; and the second area (II) is located between the first area (I) and the third area (III), and includes the second light emitting diode unit... to the (N-1)th light emitting diode unit in sequence.

Embodiment 1 discloses that the LED array 1 is composed of 3 LED units. The schematic cross-sectional view of the structure is shown in Figures 1A-1I, and the top view of the structure is shown in Figures 1A'-1G'. A method for manufacturing a light emitting diode array 1, comprising the following steps:

1. Provide a growth substrate 11, and form an epitaxial structure on the growth substrate 11, wherein the epitaxial structure includes a first conductivity type semiconductor layer 12, an active layer 13, and a second conductivity type semiconductor layer 14, as shown in Figure 1A and Figure 1A' shown.

2. Then etch part of the epitaxial structure of the first region (I) and the second region (II) to form a plurality of trenches 15, wherein the unetched epitaxial structure then forms a plurality of platforms 16; and the third region (III) The epitaxial structure is not etched, as shown in FIG. 1B and FIG. 1B'.

3. Form a conductive connection layer 17 on some areas of the plurality of platforms 16, wherein the platform area not covered by the conductive connection layer 17 forms a plurality of walkways 18; as shown in FIG. 1C and FIG. 1C'.

4. Form the first separation layer 19 on the part of the conductive connection layer 17, on the plurality of corridors 18, and on the sidewalls of the plurality of trenches 15, but in the part of the conductive connection layer 17 in the first region (I) All of the conductive connection layer 17 above and in the third region (III) are not covered by the first separation layer 19 . The conductive region 20 is a region not covered by the first separation layer 19 on the conductive connection layer 17 in the second region (II). As shown in Figure 1D and Figure 1D'.

5. Form a bridging metal layer 21 on the first separation layer 19, in the conductive region 20, in the plurality of trenches 15, and on all the conductive connection layers 17 in the third region (III), but in the first Part of the conductive connection layer 17 in the region (I) will serve as the electrical connection between the subsequent second conductive layer and the second conductive type semiconductor layer, so it is not covered by the jumper metal layer 21 above it. The region a adjacent to the conductive region 20 in the second region (II) is not covered by the bridging metal layer 21, which can be used for electrical isolation; as shown in FIG. 1E and FIG. 1E'. The part of the bridging metal layer 21 located in the first region (I) extends into the plurality of trenches 15 and is electrically connected with the first conductivity type semiconductor layer 12; 21 is electrically isolated from the second conductive type semiconductor layer 14 by the first separation layer 19 . The bridging metal layer 21 located on the conductive region 20 in the second region (II) is electrically connected to the second conductive type semiconductor layer 14 through the conductive connection layer 17 , and part of the bridging metal layer 21 extends to a plurality of trenches 15 It is inside and electrically connected to the first conductive type semiconductor layer 12 ; the bridging metal layer 21 on the plurality of platforms 16 and the corridors 18 is electrically isolated from the second conductive type semiconductor layer 14 by the first separation layer 19 . The bridging metal layer 21 located in the third region (III) is electrically connected to the second conductive type semiconductor layer 14 through the conductive connection layer 17 .

6. Form the second spacer layer 22 on the bridging metal layer 21 and the area a of the second region (II), but the second spacer layer 22 does not cover part of the conductive connection layer 17 in the first region (I) ; As shown in Figure 1F and Figure 1F'.

7. Form a second conductive layer 23 on the second spacer layer 22 and on the part of the conductive connection layer 17 in the first region (I); as shown in FIG. 1G and FIG. 1G'.

8. Form an adhesive layer 24 on the second conductive layer 23; provide a permanent substrate 25; and bond the permanent substrate 25 through the adhesive layer 24, as shown in FIG. 1H.

9. Remove the growth substrate 11 to expose the first conductivity type semiconductor layer 12 and roughen its surface. Next, etch down from the first conductivity type semiconductor layer 12 to expose the first separation layer 19 in the plurality of aisles 18 to form N LED units. Wherein the first light emitting diode unit is located in the first area (I), the second light emitting diode unit ... in order to the (N-1)th light emitting diode unit is located in the second area (II), and the Nth light emitting diode The unit is located in the third zone (III). Finally, the first electrode 27 is formed on the roughened surface of the first conductive type semiconductor layer 12 of the Nth light emitting diode unit, that is, the light emitting diode array 1 with N light emitting diode units electrically connected in series via the bridging metal layer 21 is formed, as shown in Figure 1I.

Embodiment 2 discloses that the LED array 2 is composed of 3 LED units. The structural cross-sectional schematic diagrams are shown in Figures 2A-2I, and the structural top view schematic diagrams are shown in Figures 2A'-2G'. The manufacturing method of light-emitting diode array 2 comprises the following steps:

1. Provide a growth substrate 11, and form an epitaxial structure on the growth substrate 11, wherein the epitaxial structure includes a first conductivity type semiconductor layer 12, an active layer 13, and a second conductivity type semiconductor layer 14, as shown in Figure 2A and Figure 2A' shown.

2. Then etching part of the epitaxial structure to form a plurality of trenches 15, wherein the unetched epitaxial structure forms a plurality of platforms 16, as shown in FIG. 2B and FIG. 2B'.

3. Form a conductive connection layer 17 on some areas of the plurality of platforms 16, wherein the platform area not covered by the conductive connection layer 17 forms a plurality of walkways 18; as shown in FIG. 2C and FIG. 2C'.

4. Form the first separation layer 19 on part of the conductive connection layer 17 , on the plurality of channels 18 , and on the sidewalls of the plurality of trenches 15 . The area of the conductive connection layer 17 in the second area (II) and the third area (III) not covered by the first separation layer 19 is defined as the conductive area 20; as shown in FIG. 2D and FIG. 2D'.

5. Form a bridging metal layer 21 on a portion of the first separation layer 19 , in the conductive region 20 , and in the plurality of trenches 15 except the third region (III). However, part of the first separation layer 19 in the first region (I) is used to electrically isolate the subsequent second conductive layer from the first conductive type semiconductor layer, so the bridging metal layer 21 is not covered thereon. The first separation layer 19 in the plurality of trenches 15 and the plurality of platforms in the third region (III) will be used as the electrical isolation of the subsequent first conductive layer and the second conductive type semiconductor layer, so it is not placed above it. A covering bridging metal layer 21 is formed, as shown in FIG. 2E and FIG. 2E′. Part of the bridging metal layer 21 located in the first region (I) extends into the plurality of trenches 15 and is electrically connected to the first conductivity type semiconductor layer 12, and the bridging metal layer located on the plurality of platforms 16 and the walkways 18 21 is electrically isolated from the second conductive type semiconductor layer 14 by the first separation layer 19 . The bridging metal layer 21 located on the conductive region 20 in the second region (II) is electrically connected to the second conductive type semiconductor layer 14 through the conductive connection layer 17; part of the bridging metal layer 21 extends to a plurality of trenches 15 It is inside and electrically connected to the first conductive type semiconductor layer 12 ; the bridging metal layer 21 on the plurality of platforms 16 and the corridors 18 is electrically isolated from the second conductive type semiconductor layer 14 by the first separation layer 19 . The bridging metal layer 21 located on the conductive region 20 in the third region (III) is electrically connected to the second conductive type semiconductor layer 14 through the conductive connection layer 17 . In addition, the region b adjacent to the conductive region 20 in the second region (II) and the third region (III) is not completely covered by the bridging metal layer 21 and can be used for electrical isolation.

6. On the bridging metal layer 21, on the part of the first separation layer 19 in the first region (I) and on the b region that is not completely covered by the bridging metal layer 21 in the second region (II) The second spacer layer 22, but the second spacer layer 22 does not cover within the plurality of grooves 15 in the third region (III), on the first spacer layer 19 of the plurality of platforms, and not in the third region (III). Region b completely covered by the bridging metal layer 21 ; as shown in FIG. 2F and FIG. 2F ′.

7. On the second separation layer 22, within the plurality of grooves 15 in the third region (III), on the first separation layer 19 of the plurality of platforms, and in the third region (III) are not bridged The region b completely covered by the metal layer 21 forms the first conductive layer 26 ; as shown in FIG. 2G and FIG. 2G ′.

8. Form an adhesive layer 24 on the first conductive layer 26; provide a permanent substrate 25, and bond with the permanent substrate 25 through the adhesive layer 24, as shown in FIG. 2H.

9. Remove the growth substrate 11 to expose the first conductivity type semiconductor layer 12 and roughen its surface. Next, etch down from the first conductivity type semiconductor layer 12 to expose the first separation layer 19 in the plurality of corridors 18 to form N light emitting diode units. Wherein the first light emitting diode unit is located in the first area (I), the second light emitting diode unit to (N-1)th light emitting diode unit are located in the second area (II), and the Nth light emitting diode unit is located in the third area (III) . Then in the first region (I) the first conductive type semiconductor layer 12 that does not form the part of the bridge metal layer 21 is etched downward to expose the conductive connection layer 17, and the second electrode 28 is formed on the conductive connection layer 17 , that is, an LED array 2 in which N LED units are electrically connected in series via the metal layer 21 is formed, as shown in FIG. 2I .

In the first and second embodiments above, the material of the growth substrate 11 includes at least one material selected from the material group consisting of gallium arsenide, gallium phosphide, sapphire, silicon carbide, gallium nitride, or aluminum nitride. . The epitaxial structure is composed of a III-V group semiconductor material, and the III-V group semiconductor material is an aluminum gallium indium phosphide series compound or an aluminum gallium indium nitride series compound. The conductive connection layer 17 includes one or more materials selected from the group consisting of indium tin oxide, cadmium tin oxide, antimony tin oxide, indium zinc oxide, zinc aluminum oxide, and zinc tin oxide. The first separation layer 19 and the second separation layer 22 are insulating materials, which can respectively include one or more than one material selected from silicon dioxide, titanium oxide, titanium dioxide, trititanium pentoxide, dititanium trioxide, di The group consisting of cerium oxide, zinc sulfide, and aluminum oxide. The first conductive layer 26 and the second conductive layer 23 can be silver or aluminum. The bonding layer 24 is a conductive material, and its constituent material can be metal or metal alloy, such as AuSn, PbSn, AuGe, AuBe, AuSi, Sn, In, Au, PdIn. The permanent substrate 25 is a conductive material, such as carbide, metal, metal alloy, metal oxide or metal composite material. The material of the bridging metal layer 21 includes metal, metal alloy or metal oxide.

The examples listed in the present invention are only used to illustrate the present invention, and are not intended to limit the scope of the present invention. Any obvious modifications or changes made by anyone to the present invention will not depart from the spirit and scope of the present invention.

Claims (10)

1. A light emitting diode array, having a first area, a third area and a second area, comprising: permanent substrate; an adhesive layer on the permanent substrate; a second conductive layer located on the bonding layer; a second separation layer located on the second conductive layer; a bridging metal layer located on the second separation layer; a first separation layer located on the bridging metal layer; a conductive connection layer located on the first separation layer outside the third region; An epitaxial structure, located on the conductive connection layer, includes: the second conductivity type semiconductor layer; an active layer located on the second conductivity type semiconductor layer; and a first conductivity type semiconductor layer located on the active layer; and The first electrode is located on the epitaxial structure. 2. The light emitting diode array according to claim 1, wherein the epitaxial structure further comprises a plurality of trenches extending from the second conductive type semiconductor layer to the first conductive type semiconductor layer except the third region, so that The first separation layer is located on sidewalls of the plurality of trenches, and the bridging metal layer extends into the plurality of trenches. 3. The light emitting diode array as claimed in claim 1, wherein the conductive connection layer is located between part of the bridging metal layer and the epitaxial structure in the third region, and the conductive connection layer is in the first region Located between part of the second conductive layer and the epitaxial structure. 4. The light emitting diode array as claimed in claim 1, further comprising a conductive region, the conductive region is located on the conductive connection layer in the second region and is not covered by the first separation layer. 5. A light emitting diode array having a first area, a third area and a second area, comprising: permanent substrate; an adhesive layer on the permanent substrate; a first conductive layer located on the bonding layer; a second separation layer located on the first conductive layer; a bridging metal layer located on the second spacer layer outside the third region; a first separation layer located on the bridging metal layer; a conductive connection layer located on the first separation layer; and An epitaxial structure, located on the conductive connection layer, comprising: the second conductivity type semiconductor layer; an active layer located on the second conductivity type semiconductor layer; and The first conductive type semiconductor layer is located on the active layer. 6. The light-emitting diode array as claimed in claim 1 or 5, the array further comprising N light-emitting diode units and a plurality of aisles between the N light-emitting diode units, wherein N≥3, and the N light-emitting diode units It includes a first light emitting diode unit, a second light emitting diode unit to (N-1)th light emitting diode unit, and an Nth light emitting diode unit; the first light emitting diode unit is located in the first area, and the Nth light emitting diode unit is located in the In the third area, the second light emitting diode unit to the (N-1)th light emitting diode unit are located in the second area, wherein the second area is located between the first area and the third area, and the N light emitting diode units The diode units are electrically connected in series with each other through the jumper metal layer. 7. The light emitting diode array according to claim 5, further comprising a plurality of grooves extending from the second conductive type semiconductor layer to the first conductive type semiconductor layer, and the first separation layer is located between the plurality of trenches. sidewalls of a trench, such that the first conductive layer extends into the plurality of trenches in the third region, and the bridging metal layer extends into the plurality of trenches in the first region and the second region. in the groove. 8. The light emitting diode array as claimed in claim 5, wherein the conductive connection layer is located between part of the first spacer layer and the epitaxial structure in the first region and the second region, and the conductive connection layer The third region is located between part of the bridging metal layer and the epitaxial structure. 9. The light emitting diode array according to claim 5, further comprising a conductive region, the conductive region is located on the conductive connection layer of the second region and the third region, and is not covered by the first separation layer . 10. The light emitting diode array according to claim 4 or 9, further comprising an electrically isolated area adjacent to the conductive area and above which is not covered by the bridging metal layer.