CN102646715A - TFT (thin film transistor) and manufacturing method thereof - Google Patents
TFT (thin film transistor) and manufacturing method thereof Download PDFInfo
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- CN102646715A CN102646715A CN2011104520302A CN201110452030A CN102646715A CN 102646715 A CN102646715 A CN 102646715A CN 2011104520302 A CN2011104520302 A CN 2011104520302A CN 201110452030 A CN201110452030 A CN 201110452030A CN 102646715 A CN102646715 A CN 102646715A
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Abstract
The invention provides a TFT (thin film transistor), comprising a substrate, a gate electrode layer, a gate electrode insulating layer, an oxide semiconductor layer, a source electrode layer and a drain electrode layer, wherein the gate electrode insulating layer is arranged on the gate electrode layer; the oxide semiconductor layer is arranged on the gate electrode insulating layer and comprises a first transition area, a second transition area and a channel area, the first transition area and the second transition are not mutually adjacent and the channel area is arranged between the first transition area and the second transition area; and the source electrode layer and the drain electrode layer are arranged on the first transition area and the second transition area, the resistivity of the first transition area and the second transition area is lower than the resistivity of the channel area, the first transition area and the source electrode layer form ohm contact, and the second transition area and the drain electrode layer also form the ohm contact. The invention further provides a manufacturing method of the TFT. Through the technical scheme of the invention, the stability and the on-state current of the TFT are improved.
Description
Technical field
The present invention relates to technical field of semiconductors, relate in particular to a kind of thin-film transistor and manufacturing approach thereof of using oxide semiconductor.
Background technology
OLED (OLED, Organic Light Emitting Display) be a kind of utilize that organic semiconducting materials is processed, with the thin-film light emitting device of direct voltage drive, OLED Display Technique and traditional LCD (LCD; Liquid Crystal Display) display mode is different; Need not backlight, adopt extremely thin coating of organic material and glass substrate, when electric current passes through; These organic materials will be luminous, and response speed is fast.And the OLED display screen can do lighter and thinnerly, and visible angle is bigger, and can significantly save electric energy, is considered to most probable novel planar display of future generation.
The thin-film transistor that active matrix OLED has been used to control this pixel for each pixel has been equipped with is as switch, therefore through drive circuit, can independently control each pixel, can not cause the influence of crosstalking etc. to other pixels simultaneously.Said thin-film transistor comprises grid, source electrode and drain electrode and gate insulation layer and active layer at least.
At present, active layer mainly is made up of silicon, can be amorphous silicon or polysilicon.Adopt amorphous silicon material to make the thin-film transistor of active layer; Restriction (like mobility, ON state current etc.) because of its characteristic; Be difficult to need the big electric current and the occasion of response fast, such as the display of OLED and large scale, high-resolution or high refreshing frequency etc.Adopt polycrystalline silicon material to make the thin-film transistor of active layer, its characteristic is superior to adopting amorphous silicon material to make the thin-film transistor of active layer, can be used for OLED; But because of its uniformity not good; Large-sized display is still had any problem in the preparation, if handle the uneven problem of polysilicon characteristic with the method that increases compensating circuit, has increased thin-film transistor and the quantity of electric capacity in the pixel again simultaneously; Increase mask quantity and manufacture difficulty, caused output to lower and yield decline.
Therefore, oxide semiconductor comes into one's own day by day.The characteristic that adopts oxide semiconductor material to make the thin-film transistor of active layer is superior to adopting amorphous silicon material to make the thin-film transistor of active layer, like mobility, ON state current, switching characteristic etc.Though its characteristic is made the thin-film transistor of active layer not as adopting polycrystalline silicon material, the application scenario of be enough to satisfy the demand response fast and big electric current is like high frequency, high score ratio, large-sized display and OLED etc.The uniformity of oxide is better, compares with polysilicon, owing to there is not homogeneity question, need not increase compensating circuit, on mask quantity and manufacture difficulty, all has superiority.There is not difficulty aspect the large-sized display of making yet.And adopt method such as sputter just can prepare, and need not increase additional apparatus, have cost advantage.
Do in the thin-film transistor of active layer with oxide semiconductor existing, the contact performance between source-drain electrode and the active layer is relatively poor, sometimes even can not form ohmic contact, has influenced the ON state current and the stability of thin-film transistor greatly.
Summary of the invention
The technical problem that the embodiment of the invention will solve is, to above-mentioned defective, a kind of thin-film transistor and manufacturing approach thereof is provided, and it can improve the contact performance between active layer and the source-drain electrode, thereby improves the stability and the ON state current of thin-film transistor.
On the one hand, the embodiment of the invention provides a kind of thin-film transistor, comprising:
Substrate;
Gate electrode layer;
Gate insulator on the said gate electrode layer;
Oxide semiconductor layer on the said gate insulator, said oxide semiconductor layer comprise the channel region between mutual non-conterminous first transition region and second transition region and said first transition region and second transition region; And
Source electrode layer and drain electrode layer on said first transition region and said second transition region,
Wherein, The resistivity of said first transition region and said second transition region is lower than the resistivity of said channel region; And form ohmic contact between said first transition region and the said source electrode layer, form ohmic contact between said second transition region and the said drain electrode layer.
On the other hand, the embodiment of the invention also provides a kind of above-mentioned method of manufacturing thin film transistor, comprising:
On substrate, form gate electrode layer;
On said gate electrode layer, form gate insulator;
On said gate insulator, form oxide semiconductor layer;
On said oxide semiconductor layer, form non-conterminous first transition region and second transition region mutually, the resistivity of said first transition region and said second transition region is lower than the resistivity of the channel region between the two;
On said first transition region, form source electrode layer, and on said second transition region, form drain electrode layer, said source electrode layer and said first transition region form ohmic contact, and said drain electrode layer and said second transition region form ohmic contact.
Moreover the embodiment of the invention also provides a kind of thin-film transistor, comprising:
Substrate;
Resilient coating;
Oxide semiconductor layer on the said resilient coating, said oxide semiconductor layer comprise the channel region between mutual non-conterminous first transition region and second transition region and said first transition region and second transition region;
Source electrode layer and drain electrode layer on said first transition region and said second transition region;
Gate insulator on said source electrode layer and the said drain electrode layer; And,
Gate electrode layer on the said gate insulator,
Wherein, The resistivity of said first transition region and said second transition region is lower than the resistivity of said channel region; And form ohmic contact between said first transition region and the said source electrode layer, form ohmic contact between said second transition region and the said drain electrode layer.
Moreover the embodiment of the invention also provides a kind of above-mentioned method of manufacturing thin film transistor, comprising:
On substrate, form resilient coating;
On said resilient coating, form oxide semiconductor layer;
On said oxide semiconductor layer, form non-conterminous first transition region and second transition region, the resistivity of said first transition region and said second transition region is lower than the resistivity of the channel region between the two;
On said first transition region, form source electrode layer, and on said second transition region, form drain electrode layer, said source electrode layer and said first transition region form ohmic contact, and said drain electrode layer and said second transition region form ohmic contact;
On said source electrode layer and said drain electrode layer, form gate insulator;
On said gate insulator, form gate electrode layer.
According to embodiments of the invention; Inject or Cement Composite Treated by Plasma through carrying out ion in first transition region of the channel region both sides of oxide semiconductor layer and second transition region; The resistivity of winning between transition region and source electrode layer and second transition region and the drain regions is reduced, thereby improve the stability and the ON state current of thin-film transistor.Owing to can accurately control the injection rate of metal ion in the ion implantation process, thereby can effectively control the elemental composition ratio of first and second contact zones.The transition region of different metal injection rate can show different resistivity, and leak in the prior art source and active layer contact zone composition is uncontrollable thereby solved, and resistivity is the problem of fluctuation arbitrarily.Because it is inner rather than increase one deck transition zone in addition that first and second transition regions of the present invention are contained in said oxide semiconductor layer, therefore avoided of the influence of the etching etc. in later stage to said oxide semiconductor layer.
Description of drawings
Fig. 1 is the structural representation of the embodiment of the invention 1 described thin-film transistor;
Fig. 2 a-2d is the sketch map of the embodiment of the invention 2 described method of manufacturing thin film transistor;
Fig. 3 is the structural representation of the embodiment of the invention 3 described thin-film transistors;
Fig. 4 a-4d is the sketch map of the embodiment of the invention 4 described method of manufacturing thin film transistor.
Wherein, 100,200: substrate; 101,205: gate electrode layer; 102,204: gate insulator; 103,202: oxide semiconductor layer; 103a, 202a: first transition region; 103b, 202b: second transition region; 203a, 104a: source electrode layer: 203b, 104b: drain electrode layer; 201: resilient coating.
Embodiment
Below in conjunction with accompanying drawing and embodiment, specific embodiments of the invention is done further explain.Following examples are used to explain the present invention, but are not used for limiting scope of the present invention.
Execution mode 1
As shown in Figure 1; Thin-film transistor of the present invention; Comprise: substrate 100 is provided with gate electrode layer 101, and gate electrode layer 101 is provided with gate insulator 102, and gate insulator 102 is provided with oxide semiconductor layer 103; It is active layer; Carry out ion in oxide semiconductor layer 103 both sides and inject or Cement Composite Treated by Plasma, form the first transition region 103a and the second transition region 103b of high conduction, the wherein said first transition region 103a has identical elemental composition and resistivity with the second transition region 103b.Between the said first transition region 103a and the second transition region 103b is channel region; The said first transition region 103a is provided with source electrode layer 104a; Form ohmic contact between said first transition region 103a and the said source electrode layer 104a; The said second transition region 103b is provided with drain electrode layer 104b, forms ohmic contact between said second transition region 103b and the said drain electrode layer 104b.
The element of the first transition region 103a of oxide semiconductor layer described in this execution mode 103, the second transition region 103b and channel region is formed identical; But the concentration ratio channel region of one or more elements among said first transition region 103a and the said second transition region 103b is high, makes the resistivity of said first transition region 103a and the said second transition region 103b be lower than said channel region.
Use above-mentioned thin-film transistor; Inject or Cement Composite Treated by Plasma through carrying out ion in first transition region of the channel region both sides of oxide semiconductor layer and second transition region; The resistivity of winning between transition region and source electrode layer and second transition region and the drain regions is reduced, thereby improve the stability and the ON state current of thin-film transistor.
Also be disposed with passivation layer and transparent electrode layer respectively on said source electrode layer 104a in the thin-film transistor of the present invention and the said drain electrode layer 104b.
In the present embodiment; The material of said gate electrode layer 101 comprises: the single or multiple lift composite laminate that one or more materials in molybdenum (Mo), molybdenum niobium alloy (MoNb), aluminium (Al), aluminium neodymium alloy (AlNd), titanium (Ti) and the copper (Cu) form is preferably Mo, Al or contains the single or multiple lift composite membrane of the alloy composition of Mo, Al; Thickness is 100nm～3000nm.
In the present embodiment, said gate insulator 102 can be made up of a kind of or two kinds of multilayer complex films formed in the oxide (HfOx) of the nitride (SiNx) of the oxide (SiOx) of silicon, silicon and lanthanum at least.Said gate insulator is with special plasma enhanced chemical vapor deposition method (PECVD; Plasma Enhanced Chemical Vapor Deposition makes; Be characterized in that rete contains lower low hydrogen content; And gate insulator 102 forms excellent contact with oxide semiconductor layer 103 surfaces, makes chemical composition between the two be difficult to mutual diffusion.
In the present embodiment; Said oxide semiconductor layer 103 comprises at least two kinds of oxides in indium oxide, zinc oxide, tin oxide, the gallium oxide, specifically can be in indium oxide gallium zinc (IGZO), indium zinc oxide (IZO), tin indium oxide (InSnO), the indium oxide gallium tin (InGaSnO) wherein a kind of.The middle part of said oxide semiconductor layer 103 is channel regions, and the both sides of said channel region are the first transition region 103a and the second transition region 103b, and the resistivity of said first transition region 103a and the said second transition region 103b is lower than the resistivity of said channel region.
In the present embodiment; The material of said source electrode layer 104a and said drain electrode layer 104b can be the single or multiple lift composite laminate that one or more materials among Mo, MoNb, Al, AlNd, Ti, the Cu form, and is preferably Mo, Al or contains the single or multiple lift composite membrane of the alloy composition of Mo, Al.
Execution mode 2
Like Fig. 2 a-Fig. 2 d and shown in Figure 1, method of manufacturing thin film transistor of the present invention comprises:
Shown in Fig. 2 a, on substrate 100, form gate electrode layer 101;
Shown in Fig. 2 b, on said gate electrode layer 101, form gate insulator 102;
Shown in Fig. 2 c, on said gate insulator 102, form oxide semiconductor layer 103 through sputtering method or other method;
Shown in Fig. 2 d; Utilize means such as ion injection or Cement Composite Treated by Plasma on said oxide semiconductor layer 103, to form the non-conterminous first transition region 103a and the second transition region 103b, the resistivity of said first transition region 103a and the said second transition region 103b is lower than the resistivity of the channel region between the two;
As shown in Figure 1; On the said first transition region 103a, form source electrode layer 104a through sputtering method or other method; On the said second transition region 103b, form drain electrode layer 104b; Said source electrode layer 104a and the said first transition region 103a form ohmic contact, and said drain electrode layer 104b and the said second transition region 103b form ohmic contact.
Use the thin-film transistor that said method is made; Inject or Cement Composite Treated by Plasma through carrying out ion in first transition region of the channel region both sides of oxide semiconductor layer and second transition region; The resistivity of winning between transition region and source electrode layer and second transition region and the drain regions is reduced, thereby improve the stability and the ON state current of thin-film transistor.
In the present embodiment, can also comprise:
On source electrode layer 104a and drain electrode layer 104b, form passivation layer, and on passivation layer, form the step of transparent electrode layer.
Saidly on said oxide semiconductor layer 103, form the non-conterminous first transition region 103a and the second transition region 103b specifically comprises:
On said oxide semiconductor layer 103, be coated with photoresist; After photoetching; Stay the photoresist of channel region top; Do not have the part of photoresist protection to carry out ion to said oxide semiconductor layer 103 channel region both sides and inject or Cement Composite Treated by Plasma, so that said oxide semiconductor layer 103 both sides form the first transition region 103a and the second transition region 103b.The resistivity of the said first transition region 103a and the second transition region 103b is lower than the resistivity of channel region.
Material with said oxide semiconductor layer 103 is that IGZO gives an example; Said ion injects and specifically comprises: injection material can be one or both of In, Ga, Zn, Sn; Through regulating the dosage that injects, make the resistivity of said oxide semiconductor layer 103 be reduced to required desired value.For oxide material, high more like the atomic ratio of In among the IGZO, its resistivity is low more, according to the needs of this principle and actual resistivity, can select low dosage 10nA/cm
2～1 μ A/cm
2Or high dose 1 μ A/cm
2～10 μ A/cm
2The In+ ion inject, in order to obtain alap resistance, the implantation dosage of In is preferably 1 μ A/cm
2～10 μ A/cm
2, can reach 10 through the IGZO resistivity behind the injection In+ ion
1～10
5Ohmcm;
Equally; Material with said oxide semiconductor layer 103 is that IGZO gives an example; Said Cement Composite Treated by Plasma specifically comprises: can adopt the plasma of H+, CF4, N2 etc. to come said oxide semiconductor layer 103 is handled; The resistivity of this transitional region can be controlled through power, time, the gas flow of regulating plasma treatment, and the resistivity of IGZO can reduce by 1～6 one magnitude after treatment, as from 10
8Be reduced to 10
2Ohmcm makes the resistivity of IGZO material of said first transition region 103a and the said second transition region 103b reduce greatly.Improve the contact performance of the source electrode layer 104a and the first transition region 103a and the drain electrode layer 104b and the second transition region 103b, improved the ON state current of thin-film transistor.Can reach 10 through IGZO resistivity after the H+ plasma treatment
1～10
5Ohmcm.
Execution mode 3
As shown in Figure 3; Thin-film transistor of the present invention comprises: substrate 200 is provided with buffering (buffer) layer 201, and said resilient coating 201 is provided with oxide semiconductor layer 202; It is active layer; Carry out ion in oxide semiconductor layer 103 both sides and inject or Cement Composite Treated by Plasma, form the first transition region 202a and the second transition region 202b of high conduction, the wherein said first transition region 202a has identical elemental composition and resistivity with the second transition region 202b.Between the said first transition region 202a and the second transition region 202b is channel region; The said first transition region 202a is provided with source electrode layer 203a; Form the contact zone between said first transition region 202a and the said source electrode layer 203a; The said second transition region 202b is provided with drain electrode layer 203b, forms the contact zone between said second transition region 202b and the said drain electrode layer 203b.Said source electrode layer 203a and said drain electrode layer 203b are provided with gate insulator 204, and gate insulator 204 is provided with gate electrode layer 205.
The element of the first transition region 202a of oxide semiconductor layer described in this execution mode 202, the second transition region 202b and channel region is formed identical; But the concentration ratio channel region of one or more elements among said first transition region 202a and the said second transition region 202b is high, makes the resistivity of said first transition region 202a and the said second transition region 202b be lower than said channel region.
Use above-mentioned thin-film transistor; Inject or Cement Composite Treated by Plasma through carrying out ion in first transition region of the channel region both sides of oxide semiconductor layer and second transition region; The resistivity of winning between transition region and source electrode layer and second transition region and the drain regions is reduced, thereby improve the stability and the ON state current of thin-film transistor.
Also be disposed with passivation layer and transparent electrode layer on the said gate electrode layer 205 in the thin-film transistor of the present invention respectively.
In the present embodiment; The material of said gate electrode layer 205 comprises: the single or multiple lift composite laminate that one or more materials in molybdenum (Mo), molybdenum niobium alloy (MoNb), aluminium (Al), aluminium neodymium alloy (AlNd), titanium (Ti) and the copper (Cu) form; Be preferably Mo, Al or contain the single or multiple lift composite membrane of the alloy composition of Mo, Al, thickness is 100nm～3000nm.
In the present embodiment, said gate insulator 204 can be made up of a kind of or two kinds of multilayer complex films formed in the oxide (HfOx) of the nitride (SiNx) of the oxide (SiOx) of silicon, silicon and lanthanum at least.Said gate insulator is with special plasma enhanced chemical vapor deposition method (PECVD; Plasma Enhanced Chemical Vapor Deposition makes; Be characterized in that rete contains lower low hydrogen content; And gate insulator 204 forms excellent contact with said source electrode layer 203a and said drain electrode layer 203b surface, makes chemical composition between the two be difficult to mutual diffusion.
In the present embodiment; Said oxide semiconductor layer 103 comprises at least two kinds of oxides in indium oxide, zinc oxide, tin oxide, the gallium oxide, specifically can be in indium oxide gallium zinc (IGZO), indium zinc oxide (IZO), tin indium oxide (InSnO), the indium oxide gallium tin (InGaSnO) wherein a kind of.The middle part of said oxide semiconductor layer 103 is channel regions, and the both sides of said channel region are the first transition region 202a and the second transition region 202b, and the resistivity of said first transition region 202a and the said second transition region 202b is lower than the resistivity of said channel region.
In the present embodiment; The material of said source electrode layer 203a and said drain electrode layer 203b can be the single or multiple lift composite laminate that one or more materials among Mo, MoNb, Al, AlNd, Ti, the Cu form, and is preferably Mo, Al or contains the single or multiple lift composite membrane of the alloy composition of Mo, Al.
Execution mode 4
Like Fig. 4 a-Fig. 4 d and shown in Figure 3, method of manufacturing thin film transistor of the present invention comprises:
Shown in Fig. 4 a, on substrate 200, form resilient coating 201;
On said resilient coating 201, form oxide semiconductor layer 202 through sputtering method or other method;
Shown in Fig. 4 b; Utilize means such as ion injection or Cement Composite Treated by Plasma on said oxide semiconductor layer 202, to form the non-conterminous first transition region 202a and the second transition region 202b, the resistivity of said first transition region 202a and the said second transition region 202b is lower than the resistivity of the channel region between the two;
Shown in Fig. 4 c; On the said first transition region 202a, form source electrode layer 203a through sputtering method or other method; On the said second transition region 202b, form drain electrode layer 203b; Said source electrode layer 203a and the said first transition region 202a form ohmic contact, and said drain electrode layer 203b and the said second transition region 202b form ohmic contact;
Shown in Fig. 4 d, on said source electrode layer 203a and said drain electrode layer 203b, form gate insulator 204;
As shown in Figure 3, on said gate insulator 204, form gate electrode layer 205.
Use the thin-film transistor that said method is made; Inject or Cement Composite Treated by Plasma through carrying out ion in first transition region of the channel region both sides of oxide semiconductor layer and second transition region; The resistivity of winning between transition region and source electrode layer and second transition region and the drain regions is reduced, thereby improve the stability and the ON state current of thin-film transistor.
In the present embodiment, can also comprise:
On gate electrode layer 205, form passivation layer, and on passivation layer, form the step of transparent electrode layer.
Saidly on said oxide semiconductor layer 202, form the non-conterminous first transition region 202a and the second transition region 202b specifically comprises:
On said oxide semiconductor layer 202, be coated with photoresist; After photoetching; Stay the photoresist of channel region top; Do not have the part of photoresist protection to carry out ion to said oxide semiconductor layer 202 channel region both sides and inject or Cement Composite Treated by Plasma, so that said oxide semiconductor layer 202 both sides form the first transition region 202a and the second transition region 202b.The resistivity of the said first transition region 202a and the second transition region 202b is lower than the resistivity of channel region.
Material with said oxide semiconductor layer 202 is that IGZO gives an example; Said ion injects and specifically comprises: injection material can be one or both of In, Ga, Zn, Sn; Through regulating the dosage that injects, make the resistivity of said oxide semiconductor layer 202 be reduced to required desired value.For oxide material, high more like the atomic ratio of In among the IGZO, its resistivity is low more, according to the needs of this principle and actual resistivity, can select low dosage 10nA/cm
2～1 μ A/cm
2Or high dose 1 μ A/cm
2～10 μ A/cm
2The In+ ion inject, in order to obtain alap resistance, the implantation dosage of In is preferably 1 μ A/cm
2～10 μ A/cm
2, can reach 10 through the IGZO resistivity behind the injection In+ ion
1～10
5Ohmcm;
Equally; Material with said oxide semiconductor layer 202 is that IGZO gives an example; Said Cement Composite Treated by Plasma specifically comprises: can adopt the plasma of H+, CF4, N2 etc. to come said oxide semiconductor layer 202 is handled; The resistivity of this transitional region can be controlled through power, time, the gas flow of regulating plasma treatment, and the resistivity of IGZO can reduce by 1～6 one magnitude after treatment, as from 10
8Be reduced to 10
2Ohmcm makes the resistivity of IGZO material of said first transition region 202a and the said second transition region 202b reduce greatly.Improve the contact performance of the source electrode layer 203a and the first transition region 202a and the drain electrode layer 203b and the second transition region 202b, improved the ON state current of thin-film transistor.Can reach 10 through IGZO resistivity after the H+ plasma treatment
1～10
5Ohmcm.
In sum; The invention discloses a kind of thin-film transistor and manufacturing approach thereof of using oxide semiconductor; According to the present invention; Inject or Cement Composite Treated by Plasma through carrying out ion, the resistivity of winning between transition region and source electrode layer and second transition region and the drain regions is reduced in first transition region of the channel region both sides of oxide semiconductor layer and second transition region, thus the stability and the ON state current of raising thin-film transistor.Owing to can accurately control the injection rate of metal ion in the ion implantation process, thereby can effectively control the elemental composition ratio of first and second contact zones.The transition region of different metal injection rate can show different resistivity, thereby it is uncontrollable to have solved in the prior art source-drain electrode and active layer contact zone composition, and resistivity is the problem of fluctuation arbitrarily.Because it is inner rather than increase one deck transition zone in addition that first and second transition regions of the present invention are contained in said oxide semiconductor layer, therefore avoided of the influence of the etching etc. in later stage to said oxide semiconductor layer.
Above execution mode only is used to explain the present invention; And be not limitation of the present invention; The those of ordinary skill in relevant technologies field under the situation that does not break away from the spirit and scope of the present invention, can also be made various variations and modification; Therefore all technical schemes that are equal to also belong to category of the present invention, and scope of patent protection of the present invention should be defined by the claims.
Claims (10)
1. a thin-film transistor is characterized in that, comprising:
Substrate;
Gate electrode layer;
Gate insulator on the said gate electrode layer;
Oxide semiconductor layer on the said gate insulator, said oxide semiconductor layer comprise the channel region between mutual non-conterminous first transition region and second transition region and said first transition region and second transition region; And
Source electrode layer and drain electrode layer on said first transition region and said second transition region;
Wherein, The resistivity of said first transition region and said second transition region is lower than the resistivity of said channel region; And form ohmic contact between said first transition region and the said source electrode layer, form ohmic contact between said second transition region and the said drain electrode layer.
2. thin-film transistor according to claim 1 is characterized in that, said oxide semiconductor layer comprises at least two kinds of oxides in indium oxide, zinc oxide, tin oxide, the gallium oxide.
3. thin-film transistor according to claim 2 is characterized in that, said oxide semiconductor layer comprises wherein a kind of in indium oxide gallium zinc, tin indium oxide zinc, the zinc tin oxide.
4. a method of manufacturing thin film transistor is characterized in that, comprising:
On substrate, form gate electrode layer;
On said gate electrode layer, form gate insulator;
On said gate insulator, form oxide semiconductor layer;
On said oxide semiconductor layer, form non-conterminous first transition region and second transition region mutually, the resistivity of said first transition region and said second transition region is lower than the resistivity of the channel region between the two;
On said first transition region, form source electrode layer, and on said second transition region, form drain electrode layer, said source electrode layer and said first transition region form ohmic contact, and said drain electrode layer and said second transition region form ohmic contact.
5. method of manufacturing thin film transistor according to claim 4 is characterized in that, saidly on oxide semiconductor layer, forms non-conterminous first transition region and second transition region specifically comprises:
On said oxide semiconductor layer, be coated with photoresist; After photoetching; Stay the photoresist of channel region top; Do not have the part of photoresist protection to carry out ion to said oxide semiconductor layer channel region both sides and inject or Cement Composite Treated by Plasma, so that said oxide semiconductor layer both sides form first transition region and second transition region.
6. a thin-film transistor is characterized in that, comprising:
Substrate;
Resilient coating;
Oxide semiconductor layer on the said resilient coating, said oxide semiconductor layer comprise the channel region between mutual non-conterminous first transition region and second transition region and said first transition region and second transition region;
Source electrode layer and drain electrode layer on said first transition region and said second transition region;
Gate insulator on said source electrode layer and the said drain electrode layer; And,
Gate electrode layer on the said gate insulator,
Wherein, The resistivity of said first transition region and said second transition region is lower than the resistivity of said channel region; And form ohmic contact between said first transition region and the said source electrode layer, form ohmic contact between said second transition region and the said drain electrode layer.
7. thin-film transistor according to claim 6 is characterized in that, said oxide semiconductor layer comprises at least two kinds of oxides in indium oxide, zinc oxide, tin oxide, the gallium oxide.
8. thin-film transistor according to claim 7 is characterized in that, said oxide semiconductor layer comprises wherein a kind of in indium oxide gallium zinc, indium zinc oxide, the tin indium oxide zinc.
9. a method of manufacturing thin film transistor is characterized in that, comprising:
On substrate, form resilient coating;
On said resilient coating, form oxide semiconductor layer;
On said oxide semiconductor layer, form non-conterminous first transition region and second transition region, the resistivity of said first transition region and said second transition region is lower than the resistivity of the channel region between the two;
On said first transition region, form source electrode layer, and on said second transition region, form drain electrode layer, said source electrode layer and said first transition region form ohmic contact, and said drain electrode layer and said second transition region form ohmic contact;
On said source electrode layer and said drain electrode layer, form gate insulator;
On said gate insulator, form gate electrode layer.
10. method of manufacturing thin film transistor according to claim 9 is characterized in that, saidly on oxide semiconductor layer, forms non-conterminous first transition region and second transition region specifically comprises:
On said oxide semiconductor layer, be coated with photoresist; After photoetching; Stay the photoresist of channel region top; Do not have the part of photoresist protection to carry out ion to said oxide semiconductor layer channel region both sides and inject or Cement Composite Treated by Plasma, so that said oxide semiconductor layer both sides form first transition region and second transition region.
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| CN103219391A (en) * | 2013-04-07 | 2013-07-24 | 京东方科技集团股份有限公司 | Thin film transistor, manufacturing method thereof, array substrate and display device |
| CN103487999A (en) * | 2013-05-24 | 2014-01-01 | 合肥京东方光电科技有限公司 | Array substrate, preparation method and display device |
| CN104716193A (en) * | 2013-12-11 | 2015-06-17 | 昆山工研院新型平板显示技术中心有限公司 | Thin film transistor and preparation method and application thereof |
| WO2015143839A1 (en) * | 2014-03-24 | 2015-10-01 | 京东方科技集团股份有限公司 | Method for manufacturing oxide thin film transistor array substrate |
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| CN106158978A (en) * | 2016-07-08 | 2016-11-23 | 武汉华星光电技术有限公司 | Thin film transistor (TFT), array base palte and preparation method thereof |
| CN107003576A (en) * | 2014-12-08 | 2017-08-01 | 夏普株式会社 | Liquid crystal display device |
| CN107916406A (en) * | 2016-10-05 | 2018-04-17 | 冯·阿登纳有限公司 | Method and magnetic control means for bipolar magnetron sputtering |
| WO2020244404A1 (en) * | 2019-06-04 | 2020-12-10 | 京东方科技集团股份有限公司 | Thin film transistor and manufacturing method therefor, and array substrate, display panel and display device |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20100035888A (en) * | 2008-09-29 | 2010-04-07 | 엘지디스플레이 주식회사 | Thin film transistor and method for manufacturing the same |
| US7910920B2 (en) * | 2007-02-16 | 2011-03-22 | Samsung Electronics Co., Ltd. | Thin film transistor and method of forming the same |
| CN102122620A (en) * | 2011-01-18 | 2011-07-13 | 北京大学深圳研究生院 | Method for manufacturing self-aligned thin film transistor |
-
2011
- 2011-12-29 CN CN2011104520302A patent/CN102646715A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7910920B2 (en) * | 2007-02-16 | 2011-03-22 | Samsung Electronics Co., Ltd. | Thin film transistor and method of forming the same |
| KR20100035888A (en) * | 2008-09-29 | 2010-04-07 | 엘지디스플레이 주식회사 | Thin film transistor and method for manufacturing the same |
| CN102122620A (en) * | 2011-01-18 | 2011-07-13 | 北京大学深圳研究生院 | Method for manufacturing self-aligned thin film transistor |
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| CN106158978A (en) * | 2016-07-08 | 2016-11-23 | 武汉华星光电技术有限公司 | Thin film transistor (TFT), array base palte and preparation method thereof |
| CN106158978B (en) * | 2016-07-08 | 2019-05-21 | 武汉华星光电技术有限公司 | Thin film transistor (TFT), array substrate and preparation method thereof |
| WO2018006441A1 (en) * | 2016-07-08 | 2018-01-11 | 武汉华星光电技术有限公司 | Thin film transistor, array substrate and manufacturing method therefor |
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