CN102281069B - Analog-to-digital conversion circuit - Google Patents

Abstract

The present invention relates to an analog-to-digital conversion circuit, which includes an integration circuit, a reference signal generating circuit, a comparator and a first counting circuit. The integration circuit integrates an input signal to generate an integration signal. The reference signal generating circuit generates a plurality of reference signals in sequence. The comparator receives the integration signal and the reference signals and compares the integration signal and the reference signals in sequence to generate a plurality of comparison signals in sequence. The first counting circuit counts the comparison signals to generate a reset signal to reset the integration circuit. Since the integration circuit is reset once after the comparator generates the plurality of comparison signals, the number of times the integration circuit is reset can be reduced, thereby reducing the nonlinear effect and improving the accuracy of the analog-to-digital conversion circuit.

Description

Analog-to-digital conversion circuit

technical field

The present invention relates to a conversion circuit, in particular to an analog-to-digital conversion circuit.

Background technique

Nowadays, the microcomputer system has the ability of fast calculation and data storage. In the current electromechanical system, the controller (controller) made by the microcomputer has already replaced the old purely mechanical or electromechanical control mechanism. The signal modes inside the microcomputer are all digital signals, which are usually called logic "0" or "1". Logic 0 represents a low potential, usually 0 volts in a microcomputer system, and logic 1 represents a high potential, usually in a microcomputer system Medium is 5 volts. However, physical phenomena in nature often present continuous input signals after being quantified. Therefore, if you want to transfer the change of external physical quantities into the microcomputer for calculation, or output commands from the microcomputer to drive the device, you need The process of converting a signal.

Generally, continuous signals such as voltage or current to be measured can be called input signals. A device that converts an input signal into a digital signal is called an analog-to-digital converter (ADC). In the conversion technology of analog to digital signals, there are various circuit structures to complete the work, namely: (1) single slope ADC (SingleSlopeIntegratingA/DConverter) (2) double slope ADC (DoubleSlopeIntegratingA/DConverter).

In the analog-to-digital converter, there is an integrating circuit, as shown in Figure 1, the input signal Iin is integrated through the integrating circuit including the capacitor C and the operational amplifier 12, so that an integral can be generated at the output terminal D of the operational amplifier 12 Signal, as shown in Figure 2, the integral signal is a triangular wave signal. The comparator 14 compares the integral signal with a reference signal Vref to generate a comparison signal. The counter 16 is coupled to the output terminal of the comparator 14 to count the comparison signal, which means counting a triangular wave signal, so that a digital signal can be generated, and the comparison signal is used as a reset signal RST to reset the integration circuit to generate the next integration signal , which generates the next triangular wave signal.

It can be seen from the above that, every time the comparator 14 compares the integrated signal with the reference signal to generate a comparison signal, it must reset the integrating circuit to generate the next integrated signal. Therefore, for a 12-bit analog-to-digital converter, the counter 16 needs to count 4096 times, so the integrating circuit must be reset 4096 times. When the conventional integrating circuit is reset, a nonlinear error (IntegralNon-Linearity, INL) will be generated, and the nonlinear error will be accumulated. Therefore, this nonlinear error will increase as the number of resets of the integrating circuit increases. increase, which reduces the accuracy of the analog-to-digital converter. Therefore, how to reduce the occurrence of nonlinear effects is an important issue in the development of analog-to-digital converters.

Therefore, the present invention proposes an analog-to-digital conversion circuit aimed at the above-mentioned problems, which can reduce the number of resets of the integrating circuit and reduce nonlinear effects, so as to solve the above-mentioned problems.

Contents of the invention

The object of the present invention is to provide an analog-to-digital conversion circuit, which uses a comparator to sequentially compare the integral signal and the complex reference signal to generate complex comparison signals, and the first counting circuit counts the comparison signals to generate a reset signal to Resetting the integrating circuit, since the integrating circuit is reset only once after the comparator generates complex comparison signals, this can reduce the number of times the integrating circuit is reset, reduce nonlinear effects, and improve the accuracy of the analog-to-digital conversion circuit.

In order to achieve the above-mentioned purpose, the present invention is an analog-to-digital conversion circuit, which includes:

an integrating circuit, integrating an input signal to generate an integrating signal;

A reference signal generating circuit, which sequentially generates a plurality of reference signals;

a comparator, receiving the integral signal and the reference signals, and sequentially comparing the integral signal and the reference signals to sequentially generate a plurality of comparison signals; and

A first counting circuit receives the comparison signals and counts the comparison signals to generate a reset signal to reset the integrating circuit and the first counting circuit.

In the present invention, the reference signal generation circuit further includes:

A voltage divider circuit receives a reference voltage and generates the reference signals; and

A switch module is coupled between the voltage dividing circuit and the comparator to sequentially transmit the reference signals to the comparator, and the switch module is controlled by the first counting circuit.

In the present invention, the voltage dividing circuit includes a plurality of resistors, and the resistors are connected in series.

In the present invention, wherein the integrating circuit further includes:

an operational amplifier receiving the input signal;

a capacitor connected in parallel to the operational amplifier to generate the integral signal;

a first discharge switch, coupled between one terminal of the capacitor and a first discharge terminal, the first discharge switch is controlled by the first counting circuit; and

A second discharge switch is coupled between the other end of the capacitor and a second discharge end, and the second discharge switch is controlled by the first counting circuit.

In the present invention, the integral signal is a triangular wave signal.

In the present invention, the comparator is a hysteresis comparator.

In the present invention, wherein the first counting circuit includes:

A counter counts the comparison signals to generate a count signal; and

A logic circuit generates the reset signal according to the count signal.

In the present invention, wherein the counter further includes:

A plurality of flip-flops are connected in series to generate the counting signal by counting the comparison signals.

In the present invention, it further includes:

a second counting circuit coupled to the first counting circuit to count the reset signal to generate a counting signal; and

A latch circuit receives the counting signals of the first counting circuit and the second counting circuit to generate a latching signal.

The present invention has beneficial effects: the integrating circuit of the analog-to-digital conversion circuit described in the present invention is reset only once after the comparator generates the comparison signals, so that the number of times the integrating circuit is reset can be reduced, thereby reducing the cost of the integrating circuit. Non-linear error, and improve the accuracy of the analog-to-digital conversion circuit.

Description of drawings

Fig. 1 is the circuit diagram of the integration circuit of prior art;

Fig. 2 is the waveform diagram of the integrating circuit of prior art;

Fig. 3 is a circuit diagram of a preferred embodiment of the analog-to-digital conversion circuit of the present invention; and

FIG. 4 is a waveform diagram of a preferred embodiment of the analog-to-digital conversion circuit of the present invention.

[Description of drawing number comparison]

C capacitance Iin input signal

RST reset signal V _cmi first discharge terminal

V _cmo second discharge terminal V _ref reference signal

V _REFP reference voltage V _REFN reference level

12 operational amplifier 14 comparator

16 counters 20 integration circuits

22 operational amplifier 24 capacitor

26 first discharge switch 28 second discharge switch

30 reference signal generation circuit 32 voltage divider circuit

34 switch modules 40 comparators

50 first counting circuit 52 flip-flop

54 logic circuit 61 second counting circuit

63 latch circuits 65 integral signals

67 Reference signal 69 Small triangle wave signal

detailed description

In order to have a further understanding and understanding of the structural features of the present invention and the achieved effects, the preferred embodiments and accompanying drawings are used for a detailed description, as follows:

First, please refer to FIG. 3 and FIG. 4 , which are circuit diagrams and waveform diagrams of a preferred embodiment of the analog-to-digital conversion circuit of the present invention. As shown in the figure, the analog-to-digital conversion circuit of the present invention includes an integrating circuit 20 , a reference signal generating circuit 30 , a comparator 40 and a first counting circuit 50 . The integration circuit 20 receives an input signal Iin and integrates the input signal Iin to generate an integration signal 65 as shown in FIG. 4 . In this embodiment, the input signal Iin is a current signal. The reference signal generation circuit 30 sequentially generates a plurality of reference signals. The positive input terminal and the negative input terminal of the comparator 40 respectively receive the integrated signal 65 generated by the integrating circuit 20 and the reference signals generated by the reference signal generating circuit 30, and compare the integrated signal 65 and these reference signals in sequence to obtain Generate complex comparison signals. A preferred embodiment of the comparator 40 of the analog-to-digital conversion circuit of the present invention is a hysteresis comparator.

Referring to FIG. 3 again, the first counting circuit 50 is coupled to the output terminal of the comparator 40 to receive the comparison signals generated by the comparator 40 and count the comparison signals. When the first counting circuit 50 counts the times of the comparison signals to a threshold value, it generates a reset signal RST to reset the integrating circuit 20 . The integrating circuit 20 is reset once by the first counting circuit 50 only after the comparator 40 compares the integrating signal 65 and the reference signals to generate the comparison signals, so that the number of times the integrating circuit 20 is reset can be reduced to The non-linear error of the integration circuit 20 can be reduced, and the precision of the analog-to-digital conversion circuit can be improved.

In addition, the integration circuit 20 of the analog-to-digital conversion circuit of the present invention further includes an operational amplifier 22 , a capacitor 24 , a first discharge switch 26 and a second discharge switch 28 . The input terminal of the operational amplifier 22 receives the input signal Iin. The capacitor 24 is connected in parallel with the operational amplifier 22 to generate the integrated signal 65 . When the input signal Iin is input to the integration circuit 20 , the integration circuit 20 will integrate the input signal Iin to generate the integration signal 65 . As shown in FIG. 4 , the integral signal 65 of the analog-to-digital conversion circuit of the present invention is a triangular wave signal. The first discharge switch 26 is coupled between one terminal of the capacitor 24 and a first discharge terminal V _cmi , and is controlled by the reset signal RST of the first counting circuit 50 . The second discharge switch 28 is coupled between the other terminal of the capacitor 24 and a second discharge terminal V _cmo , and is also controlled by the reset signal RST of the first counting circuit 50 . The first reset signal RST is used to turn on the first discharge switch 26 and the second discharge switch 28 to discharge the capacitor 22 and reset the integration circuit 20 . In this way, the integration circuit 20 will re-integrate the input signal Iin to generate the next integration signal 65, that is, generate the next triangular wave signal.

Referring to FIG. 3 again, the reference bit signal generation circuit 30 of the analog-to-digital conversion circuit of the present invention further includes a voltage divider circuit 32 and a switch module 34 . The two ends of the voltage divider circuit 32 respectively receive a reference voltage V _REFP and a reference level V _REFN , the voltage divider circuit 32 includes a plurality of resistors, and these resistors are connected in series to divide the reference voltage V _REFP to generate 4 shows complex reference signals 67 with different levels, the levels of these reference signals 67 are gradually increased. The switch module 34 is coupled between the voltage divider circuit 32 and the comparator 40 to sequentially transmit the reference signals 67 of different levels to the comparator 40 for the comparator 40 to compare the integrated signal 65 with the reference signals 67, And generate complex comparison signals.

Once the level of the integrated signal 65 is higher than the level of a reference signal 67 provided by the reference signal generating circuit 30, the switch module 34 will switch to transmit a reference signal 67 with a higher level to the comparator 40 . Since the level of the integrated signal 65 will gradually increase, the comparator 40 compares the integrated signal 65 with the reference signals 67 to generate complex comparison signals. The reference signal generation circuit 30 provides reference signals 67 of different levels to the comparator 40 for comparison with the integral signal 65 , so each comparison signal generated by the comparator 40 is equivalent to a small triangular wave signal 69 . Therefore, the first counting circuit 50 counts the number of these comparison signals, which is equivalent to counting the number of the triangular wave signal 69 . The switch module 34 of the present invention is controlled by the first counting circuit 50 , and the first counting circuit 50 controls the switch module 34 every time a comparison signal is counted to transmit reference signals 67 of different levels to the comparator 40 . The switch module 30 of the present invention includes a plurality of switches respectively coupled between the resistors of the voltage dividing circuit 32 and the comparator 40 to provide reference signals 67 of different levels to the comparator 40 . These switches are controlled by the first counting circuit 50 . Referring again to FIG. 3 , the first counting circuit 50 of the analog-to-digital conversion circuit of the present invention includes a counter and a logic circuit 54 . In this embodiment, the counter includes a plurality of flip-flops 52 connected in series, and the flip-flops 52 are D-type flip-flops 52 . An input terminal D of each flip-flop 52 is coupled to an inverting output terminal QB, and a frequency input terminal CK of the first flip-flop of these flip-flops 52 is coupled to the output of the comparator 40 terminal to receive the comparison signal. In addition, except the last flip-flop 52 of the flip-flops 52 , an output terminal Q of each flip-flop 52 is coupled to a frequency input terminal CK of the next flip-flop 52 to be connected in series. The output terminal Q of each flip-flop 52 respectively outputs counting signals B0 - B3 , and the counting signals B0 - B3 are binary. The above-mentioned counter is used for counting the quantity of the comparison signal, which is equivalent to counting the quantity of the triangular wave signal 69, and correspondingly outputs the counting signals B0-B3. These counting signals B0 - B3 can be used as control signals for controlling the switch module 34 to control the switches of the switch module 34 to transmit reference signals 67 of different levels to the comparator 40 . The counter in this embodiment is realized by using a complex flip-flop 52, but it is not limited to the fact that the counter of the first counting circuit 50 of the present invention can only be composed of flip-flops 52, and those skilled in the art will know that the counter can also be composed of other common circuits. .

The logic circuit 54 is coupled to the counter to receive the counting signals B0 - B3 , and obtain the quantity of the triangular wave signal 69 according to the counting signals B0 - B3 . When the logic circuit 54 learns that the quantity of the triangular wave signal 69 reaches the threshold value according to the counting signals B0-B3, it generates a reset signal RST to reset the integrating circuit 20 to re-integrate the input signal Iin to generate the next new integrating signal 65 , which generates the next big triangle wave signal. The threshold value of this embodiment is pre-set in the logic circuit 54, and its value can be changed according to application requirements. In addition, the reset signal RST will also reset the counter of the first counting circuit 50. In this embodiment, the flip-flops 52 are reset by the reset signal RST, so as to re-count the complex comparisons output by the comparator 40. signal.

It can be seen from the above description that the first counting circuit 50 is used to count the number of these comparison signals, that is, count the number of small triangular wave signals 69, and reset the integral signal 65 when the number of comparison signals reaches the threshold value to generate the next Integrate the signal, and reset the counting signals B0~B3. In this way, each integral signal 65 is equivalent to including a fixed number of small triangular wave signals 69 .

Referring to FIG. 3 again, the present invention further includes a second counting circuit 61 and a latch circuit 63 . The second counting circuit 61 receives the reset signal RST generated by the first counting circuit 50 and counts the reset signal RST to generate a counting signal and transmits it to the latch circuit 63 . The counting signal generated by the second counting circuit 61 represents the quantity of the integrating signal 65 , that is, the quantity of the large triangular wave signal generated by the integrating circuit 20 . The latch circuit 63 is further coupled to the first counting circuit 50 to receive the counting signals B0-B3, so that the latching circuit 63 is based on the counting signals B0-B3 of the first counting circuit 50 and the counting signal of the second counting circuit 61 , the quantity of the integral signal 65 and the quantity of the small triangular wave signal 69 included in the integral signal 65 can be obtained. In other words, the total number of small triangular wave signals 69 is the product of the number of integrated signals 65 and the number of small triangular wave signals 69 included in each integrated signal 65 . The latch circuit 63 generates a latch signal according to the counting signals B0 - B3 of the first counting circuit 50 and the counting signal of the second counting circuit 61 to provide to subsequent circuits. The application of the latch signal to the subsequent circuit will vary with different circuit designs, and is not the main technical feature of the present invention, so it will not be described in detail here.

Using the analog-to-digital conversion circuit of the present invention can reduce the number of resets of the integration circuit 20, reduce nonlinear effects, and improve the accuracy of the analog-to-digital conversion circuit. For example, for a 12-bit analog-to-digital conversion circuit, it must generate 4096 small triangle wave signals. Therefore, the integrating circuit of the conventional analog-to-digital conversion circuit must be reset 4096 times. However, the integrating circuit 20 of the present invention does not need to be reset 4096 times. If the reference signal generating circuit 30 of the present invention can provide 16 reference signals 67 of different levels, that is, one integrating signal 65 can relatively include 16 Small triangular wave signal 69, so the first counting circuit 50 is a 4-bit counting circuit, and the second counting circuit 61 is designed to be an 8-bit counting circuit, and is used to count the quantity of the integral signal 65, so that the function of 12 bits can be achieved. In other words, the integration circuit 20 of the present invention only needs to be reset 256 times, so the number of resets is only 16th of that of the prior art. In this way, the number of times the integration circuit 20 is reset can be effectively reduced, the non-linear effect is reduced, and the accuracy of the analog-to-digital conversion circuit is improved. The above-mentioned first counting circuit 50 is a 4-bit counting circuit and the second counting circuit 61 is The 8-bit counting circuit is only a preferred embodiment of the present invention. The first counting circuit 50 and the second counting circuit 61 can be designed according to application requirements and are not limited to the above-mentioned embodiment.

In summary, the analog-to-digital conversion circuit of the present invention includes an integrating circuit, a reference signal generating circuit, a comparator, and a first counting circuit. The integrating circuit integrates an input signal to generate an integral signal, and the reference signal generating circuit sequentially generates complex reference signals for comparison. The device receives the integrated signal generated by the integrating circuit and the reference signals generated by the reference signal generating circuit, and compares the integrated signal and the reference signals in sequence to generate complex comparison signals, and the first counting circuit counts the comparison signals to The reset signal is generated to reset the integration circuit, so that the number of reset integration circuits can be reduced to reduce nonlinear effects and improve the accuracy of the analog-to-digital conversion circuit.

In summary, it is only a preferred embodiment of the present invention, and is not intended to limit the implementation scope of the present invention. All equivalent changes and Modifications should be included within the scope of the claims of the present invention.

Claims (9)

1. an analog-to-digital conversion circuit, is characterized in that, it includes:

One integrating circuit, integration one input signal is to produce an integration signal;

One reference signal produces circuit, sequentially produces a plurality of reference signal;

One comparator, receives this integration signal and those reference signal, and sequentially compares this integration signal and those reference signal, a plurality ofly compares signal sequentially to produce;

One first counting circuit, receives those and compares signal, and counts those and compare signal, resets this integrating circuit and this first counting circuit to produce a replacement signal; And

One second counting circuit, couples this first counting circuit to count this replacement signal, to produce a counting signal.

2. analog-to-digital conversion circuit as claimed in claim 1, is characterized in that, wherein this reference signal generation circuit more comprises:

One bleeder circuit, receives a reference voltage, and produces those reference signal; And

One switch module, couples between this bleeder circuit and this comparator, and sequentially to transmit those reference signal to this comparator, this switch module is controlled by this first counting circuit.

3. analog-to-digital conversion circuit as claimed in claim 2, it is characterized in that, wherein this bleeder circuit comprises a plurality of resistance, and those resistance are connected mutually.

4. analog-to-digital conversion circuit as claimed in claim 1, it is characterized in that, wherein this integrating circuit more comprises:

One operational amplifier, receives this input signal;

One electric capacity, is parallel to this operational amplifier, to produce this integration signal;

One first discharge switch, couple between one end of this electric capacity and one first discharge end, this first discharge switch is controlled by this first counting circuit; And

One second discharge switch, couple between the other end of this electric capacity and one second discharge end, this second discharge switch is controlled by this first counting circuit.

5. analog-to-digital conversion circuit as claimed in claim 1, it is characterized in that, wherein this integration signal is a triangular wave signal.

6. analog-to-digital conversion circuit as claimed in claim 1, it is characterized in that, wherein this comparator is a hysteresis comparator.

7. analog-to-digital conversion circuit as claimed in claim 1, it is characterized in that, wherein this first counting circuit comprises:

One counter, counts those and compares signal, and produce a counting signal; And

One logical circuit, produces this replacement signal according to this counting signal.

8. analog-to-digital conversion circuit as claimed in claim 7, it is characterized in that, wherein this counter more comprises: a plurality of flip-flop, and it is connected mutually, compares signal to count those and produces this counting signal.

9. analog-to-digital conversion circuit as claimed in claim 1, is characterized in that, wherein this first counting circuit counts those and compares signal, and produces a counting signal, and this analog-to-digital conversion circuit more comprises:

One latch circuit, those receiving this first counting circuit and this second counting circuit count signal, to produce a bolt-lock signal.