CN101916796A - Method for making gradational diffusion photoelectric diode by using MOCVD epitaxial system - Google Patents
Method for making gradational diffusion photoelectric diode by using MOCVD epitaxial system Download PDFInfo
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Abstract
The invention relates to a method for making a gradational diffusion photoelectric diode by using an MOCVD epitaxial system. The method comprises the following steps performed on a semi-insulating indium phosphide substrate by using the MOCVD epitaxial system: performing the primary epitaxy of the photoelectric diode; forming an indium gallium arsenide ohmic contact layer; doping by using an MOCVD epitaxial system-based gradational diffusion method; making a pseudo-table by using a method combining reactive ion etching and chemical wet etching; making a second step by using a chemical wet etching method; making a SiO2 passivation layer and a photosensitive surface; evaporating an etching electrode; thinning the substrate and performing back sputtering and electrode alloying. Zinc phosphide is continuously generated during the diffusion and the method has the advantages of high doping, low ohmic contact resistance and high responsibility; moreover, abrupt junctions are formed during the diffusion, the dark current is small and the reliability is good; the gradational diffusion is adopted, which is implemented by two steps and is uniform; besides, the pseudo-table structure is adopted, the dark current is small, the reliability is good and the dark current of a chip is only 10pA.
Description
Technical field
The present invention relates to the manufacture method of the high-speed photodiode that a kind of optical communication system uses, particularly a kind of accurate table top, the manufacture method of coplanar electrode type two-forty indium gallium arsenic/indium phosphide photodiode based on the gradation type diffusion of MOCVD system.
Background technology
The propelling of IT application process and the demand of network application are promoting development of internet technology fast.Under the promotion rapidly of the speed increase that the total bandwidth of network was doubled with every year, new network application and network technology are constantly emerged in large numbers.The development of dense wave division multipurpose (DWDM) technology, EPON (PON) technology, Ethernet (Ethernet) technology, Long Term Evolution (TD-LTE) innovation technology and maturation make optical communication technology towards big capacity, high-speed light mechanics of communication and full optical communication network technical development.Light transceiving chip (laser and detector) technology is the core technology as optical communication, also is faced with increasing challenge.Traditional making photo-detector tube core adopts open pipe diffusion or stopped pipe method of diffusion usually, and doping content reaches 1E18cm
-3,, can not make single side abrupt junction and contact with low ohm; And there are the big shortcoming of optical signal detecting nonlinear distortion or dark current again in traditional plane or mesa tube core.This is the problem that will solve.
Diffuse source is zinc methide, adopts hydrogen to bring reative cell into as carrier gas.Zinc methide and phosphine decompose and take place the compound of organic chemical reactions formation zinc phosphide in diffusion temperature.Traditional diffusion furnace mode is that sample places in the quartz boat of open or sealing, and sample maintains static in the diffusion process, and the air-flow distribution form is an Eddy Distribution.The diffusion technology of diffusion furnace stops reducing the zinc phosphide saturated vapor by the control temperature and realizes.In temperature-fall period, print can not be isolated with diffuse source, forms progressive junction in diffusion.
Summary of the invention
The objective of the invention is at above-mentioned present situation, aim to provide a kind of method with two-forty, high reliability, high-responsivity, little dark current, the easy a kind of MOCVD of employing epitaxial system making of good, the accurate table top making of diffusion uniformity gradational diffusion photoelectric diode.
The implementation of the object of the invention is, a kind of method that adopts the MOCVD epitaxial system to make gradational diffusion photoelectric diode, and sample places on the rotating base of reative cell, and reactor top is gathered and is sprayed into the aperture of gas, and concrete steps are as follows:
1) method of employing MOCVD is carried out an extension of photodiode on the semi-insulating inp substrate, extension constitutes by five layers, is followed successively by semi-insulating inp I substrate, n type inp resilient coating, n type inp cladding layer, indium gallium arsenic absorbed layer, n type inp cladding layer and the indium gallium arsenic contact layer 6 of mixing Fe from bottom to up.
2) doing mask layer with 2500 dust silicon dioxide, is 1: 1: 20 sulfuric acid with volume ratio: hydrogen peroxide: the not protected indium gallium of aqueous corrosion arsenic 55 seconds, make indium gallium arsenic ohmic contact layer,
3) adopt the method that spreads based on MOCVD system gradation type to mix, doping method is to do mask layer with 3000 dust silicon dioxide, makes diameter by lithography and be 50 microns circular diffusion hole, and with 1: 10 hydrochloric acid of volume ratio: the aqueous solution cleaned 50 seconds, washed with de-ionized water 5 minutes, at 530 ℃, pressure is under the 225 holder conditions then, and the zinc methide flow is per minute 5 mark condition milliliters, spread 15 minutes, the zinc methide flow is per minute 10 mark condition milliliters, spreads 5 minutes, anneals under 470 ℃ of conditions at last;
4) the plasma reinforced chemical vapor deposition 3000 dust silicon dioxide of growing,
The plasma reinforced chemical vapor deposition 3000 dust silicon dioxide of growing are done mask layer, utilizing reactive ion etching method to etch area then is that 70 microns * microns, the degree of depth are 2.9 microns square, adopting volume ratio at last is 1: 1: 20 sulfuric acid: hydrogen peroxide: aqueous corrosion 25 seconds
5) doing mask layer with photoresist, make the rectangular pattern of 126 microns of 240 microns * by lithography, is 1: 1 phosphoric acid then with volume ratio: the not protected phosphorization phosphide indium layer of hydrochloric acid solution corrosion 23 seconds, produce second step,
6) with the plasma reinforced chemical vapor deposition apparatus 5000 dust silicon dioxide passivation layer of growing;
7) producing diameter with the method etching silicon dioxide of reactive ion etching earlier is 50 microns circular holes, and utilizing the plasma reinforced chemical vapor deposition apparatus growth thickness then is 1600 dust silicon nitride antireflection layers, produces photosurface;
8) earlier with the method etching contact hole of reactive ion etching, make electrode pattern then by lithography, sputtered titanium, platinum, gold successively are with glue to peel off at last again, produce P-type and N-type electrode;
9) earlier with substrate thinning to 150 μ m, sputtered with Ti, Pt, Au successively then;
10) alloy 55s under 415 ℃ of conditions makes electrode metalization.
The present invention compared with prior art has the following advantages:
1, zinc phosphide is produced by chemical reaction, and in diffusion process, zinc phosphide continue to produce, easier realization indium phosphide highly doped, and doping content can reach 2E18cm-3, and diffusion furnace diffusion way indium phosphide doping content is generally 5E17cm-3.The doping content that improves phosphorization phosphide indium layer can improve the die response degree and the speed of response to 2E18, can obtain good Ohmic contact simultaneously, reduces the chip contact resistance.
2, when diffusion is finished, can close the diffuse source gas valve in real time, stop the carrying out of diffusion, in diffusion, form abrupt junction.The formation abrupt junction helps chip and obtains little dark current, little electric capacity and high reliability.
3, sample places on the reative cell base, and base does not stop rotation in diffusion process.Gas sprays into by the densely covered aperture of reactor top, and air-flow is distributed as laminar flow distribution, and air-flow is more evenly distributed, so diffusion uniformity is better.
4, the gradation type diffusion is carried out in two steps, in the phosphorization phosphide indium layer diffusion process, adopt the low discharge diffusion way, in the ingaas layer diffusion process, fade to the high flow capacity diffusion way, zinc is evenly distributed at phosphorization phosphide indium layer, and indium phosphide and indium gallium arsenic interface are clear, and concentration gradient changes greatly, suddenlys change to high concentration from low concentration, after entering indium gallium arsenic, concentration is exponential damping.
5, adopt accurate mesa structure, dark current is little, good reliability, and the chip dark current only is 10 skins peaces.
Description of drawings
Fig. 1 is the epitaxy junction composition of the photodiode made of the present invention,
Fig. 2 is the indium gallium arsenic contact layer schematic diagram that the present invention makes,
Fig. 3 is the heterojunction P-district schematic diagram that the present invention makes,
Fig. 4 is the first step schematic diagram that the present invention makes,
Fig. 5 is the second step schematic diagram that the present invention makes,
Fig. 6 is the passivation layer schematic diagram that the present invention makes,
Fig. 7 is the photosurface schematic diagram that the present invention makes,
Fig. 8 is P-type and the N-type electrode schematic diagram that the present invention makes,
Fig. 9 is substrate thinning of the present invention and back spatter schematic diagram,
Figure 10 adopts constant current amount diffusion electrochemical capacitor-voltage tester curve of the present invention,
Figure 11 adopts gradation type diffusion electrochemical capacitor-voltage tester curve of the present invention,
Figure 12 is the accurate mesa structure schematic diagram that the present invention makes,
Figure 13 is adopt the present invention repeatedly to circulate a table top profile that dry etching and selective wet etching produce.
Embodiment
The method that an extension, indium gallium arsenic ohmic contact formable layer, the employing that the present invention adopts the MOCVD epitaxial system to carry out photodiode on the semi-insulating inp substrate mixes, adopts reactive ion etching (RIE) and chemical wet etching to combine based on the gradation type diffusion method of MOCVD epitaxial system is made accurate table top, adopts the chemical wet etching legal system to make second step, is made S
iO
2Passivation layer, making photosurface, evaporation etching electrode, substrate thinning, back spatter and electrode metalization.
The present invention is described in detail in detail with reference to the accompanying drawings.
The method of employing MOCVD is carried out an extension of photodiode on the semi-insulating inp substrate, extension constitutes (see figure 1) by five layers, 4,1 micron n type inp cladding layer 5 of i type indium gallium arsenic absorbed layer and 0.1 micron i type indium gallium arsenic contact layer 6 that to be followed successively by 3,2 microns doping contents of 2,1.0 microns n type inp cladding layers of 1,0.5 micron n type inp resilient coating of semi-insulating inp I substrate of mixing Fe from bottom to up be 1E15cm-3.
Adopt wet etching method making indium gallium arsenic ohmic contact layer as shown in Figure 2.The plasma enhanced CVD method 2500 dust silicon dioxide of growing; make indium gallium arsenic contact layer figure by lithography; reactive ion etching etches away not protected silicon dioxide; keep silicon dioxide as mask layer 7; remove photoresist with 5 minutes method of 5 minutes-acetone of plasma aura spray-plasma aura; be 1: 1: 20 sulfuric acid with volume ratio: hydrogen peroxide: the not protected indium gallium of aqueous corrosion arsenic 55 seconds, deionized water rinsing 5 minutes keeps indium gallium arsenic as ohmic contact layer 8.
Employing is mixed based on the method for MOCVD system gradation type diffusion.
The diffusion mechanism of mixing: in the MOCVD reative cell, condition enactment is pressure 225 torrs, and 530 ℃ of temperature adopt arsine and phosphine as catalytic reaction gas and protective gas.Diffuse source is zinc methide, adopts hydrogen to bring reative cell into as carrier gas.Zinc methide and phosphine decompose and take place the compound of organic chemical reactions formation zinc phosphide in diffusion temperature.Traditional diffusion furnace mode, sample place in the quartz boat of open or sealing, with Solid State Source arsenic zinc, zinc phosphide saturated vapor as diffuse source.Diffusion furnace diffusion way indium phosphide doping content is generally 5E17cm-3.
With reference to Fig. 3; the present invention adopts 3000 dust silicon dioxide to do mask layer earlier; make diameter by lithography and be 50 microns circular diffusion hole; adopt the method for reactive ion etching to etch away not protected silicon dioxide; keep silicon dioxide as mask layer 9; remove photoresist with 5 minutes method of 5 minutes-acetone of plasma aura spray-plasma aura; with 1: 10 hydrochloric acid of volume ratio: the aqueous solution cleaned 50 seconds; washed with de-ionized water 5 minutes, then at 530 degrees centigrade, pressure is under the 225 holder conditions; adopting the zinc methide flow earlier is 5 mark condition milliliter per minutes; spread 15 minutes, it is per minute 10 mark condition milliliters that the zinc methide flow is adopted in the back, spreads 5 minutes; Zn diffuses into indium gallium arsenic ohmic contact layer 8; 1.0 micron N-phosphorization phosphide indium layer, i type ingaas layer locates 10 for 0.1 micron, and annealing is 600 seconds under 470 ℃ of conditions.Zinc phosphide is produced by chemical reaction.The advantage that this gradation type method of diffusion mixes is, in diffusion process, zinc phosphide continues to produce, easier realization indium phosphide highly doped, and its doping content can reach 2E18cm
-3, the doping content that improves phosphorization phosphide indium layer can improve the die response degree and the speed of response, can obtain good Ohmic contact simultaneously, reduces the chip contact resistance.
With reference to Fig. 4, the method that reactive ion etching and chemical wet etching combine is made accurate table top.The plasma reinforced chemical vapor deposition 3000 dust silicon dioxide of growing; making area by lithography is the figure of 70 microns of 70 microns *; the method etching silicon dioxide of reactive ion etching 13 minutes; be used as mask layer 11 by photoresist protection silicon dioxide; remove photoresist with 5 minutes method of 5 minutes~acetone of plasma aura spray-plasma aura; 1 micron phosphorization phosphide indium layer 5 of method etching with reactive ion etching; 0.9 micron ingaas layer 4 amounts to 110 minutes; with volume ratio 1: 1: 20 sulfuric acid: hydrogen peroxide: aqueous corrosion residue indium gallium arsenic 25 seconds, deionized water rinsing 5 minutes.
With reference to Fig. 5; the method of chemical wet etching is made second step: photoresist is done mask layer; make the rectangular pattern of 126 microns of 240 microns * by lithography; it with volume ratio 1: 1 phosphoric acid: the not protected phosphorization phosphide indium layer of hydrochloric acid solution corrosion 23 seconds; deionized water rinsing 5 minutes is produced second step 3.
With reference to Fig. 6, with the plasma reinforced chemical vapor deposition apparatus 5000 dust silicon dioxide passivation layer 12 of growing.
With reference to Fig. 7, producing diameter with the method etching silicon dioxide of reactive ion etching earlier is 50 microns circular holes, and utilizing the plasma reinforced chemical vapor deposition apparatus growth thickness then is 1600 dust silicon nitride antireflection layers 13, produces photosurface.
With reference to Fig. 8, make P-type and N-type electrode.Make contact hole graph by lithography, the method etch silicon nitride and the silicon dioxide of reactive ion etching, remove photoresist with 5 minutes method of 5 minutes-acetone of plasma aura spray-plasma aura, deionized water rinsing 5 minutes, make electrode pattern by lithography, sputtered titanium, platinum, golden thickness are respectively 600 dusts, 800 dusts, 2000 dusts successively, and band glue is peeled off, and produces P-type electrode 14 and N-type electrode electrode 15.
With reference to Fig. 9, semi-insulating inp I substrate 1 attenuate is become the thin substrate 1 of 150 micron thickness, sputtered titanium, platinum, gold are overleaf successively produced back spatter layer 16 then, and the thickness of titanium, platinum, gold is respectively 400 dusts, 500 dusts, 2500 dusts.
10, metal alloyization: alloy 55s under 415 ℃ of conditions.
The present invention can close the diffuse source gas valve in real time when diffusion is finished, stop the carrying out of diffusion, forms abrupt junction in diffusion.The formation abrupt junction helps chip and obtains little dark current, little electric capacity and high reliability.Sample places on the reative cell base, and base does not stop rotation in diffusion process.Gas sprays into by the densely covered aperture of reactor top, and air-flow is distributed as laminar flow distribution, and air-flow is more evenly distributed, so diffusion uniformity is better.
Diffusion is carried out in two steps, adopts the low discharge diffusion way in the phosphorization phosphide indium layer diffusion process, fades to the high flow capacity diffusion way in the ingaas layer diffusion process.Because there is very big-difference in the Diffusion Law of zinc in indium phosphide and indium gallium arsenic material, diffusion easily in indium phosphide, and diffusion rate is slower in indium gallium arsenic material, if adopt the diffusion of constant current amount, because the difference of diffusion rate, zinc is being piled up at the interface easily, forms progressive junction 17 as shown in figure 10, causes the dark current and the capacitance characteristic variation of chip.The gradation type diffusion way, zinc is evenly distributed at phosphorization phosphide indium layer, and indium phosphide and indium gallium arsenic interface are clear, and concentration gradient changes greatly, suddenlys change to high concentration from low concentration, and after entering indium gallium arsenic, concentration is exponential damping form shown in Figure 11.
Why the present invention adopts accurate mesa structure 18 as shown in figure 12, is because of planar structure is easy to obtain little dark current and high reliability, but has nonlinear distortion.Nonlinear distortion is meant second-order distortion and the third order intermodulation distortion in the analog signal transmission process, and main cause has: near the non-absorption that exhausts high-doped zone space charge effect, the uptake zone.Mesa structure is eliminated the influence of side direction p-n junction by etching away the side direction p-n junction, can effectively suppress nonlinear distortion, but because the center absorbed layer is exposed, in technology making, storage and use, vulnerable to pollution, introduce more surface state, thereby make dark current become big, the reliability variation.Accurate mesa structure is taken all factors into consideration the advantage of planar structure and mesa structure, by control centre district p-n junction area and side direction p-n junction width, can partly eliminate side direction p-n junction effects of distribution parameters, effectively suppress nonlinear distortion, and dark current is little, good reliability.Chip dark current among the present invention only is 10 skins peaces.
The method that the present invention adopts repeatedly circulate dry etching and selective wet etching to combine is produced table top as shown in figure 13.The dry etching that repeatedly circulates adopts reactive ion etching method, every etching 10 minutes, and aerating oxygen cleaned cavity 4 minutes.In etching process, can react the generation high molecular polymer, high molecular polymer accumulates in sample surfaces can make the table top that etches be trapezoidal table top.Clean by oxygen and to continue etching after cavity was taken high molecular polymer away in 4 minutes, can form steep table top.Adopt selective wet etching after adopting the dry etching that repeatedly circulates earlier, wet etching can be removed the physical damnification layer that dry etching causes, and the wet etching rear surface is smooth, the passivation layer free of pinholes that makes covering, and compactness is good, thereby improves chip reliability.And wet etching has good selectivity, by selecting suitable corrosive liquid, can realize the good selective corrosion of indium gallium arsenic/phosphorization phosphide indium layer.By the accurate degree of depth of control dry etching, reduce the time of wet etching among the present invention, the very big side etching phenomenon of avoiding wet etching to cause of degree, thereby the distributed capacitance of reduction chip have improved the speed of response of chip as far as possible.
Claims (6)
1. a method that adopts the MOCVD epitaxial system to make gradational diffusion photoelectric diode is characterized in that sample places on the rotating base of reative cell, and reactor top is gathered and sprayed into the aperture of gas, and concrete steps are as follows:
1) method of employing MOCVD is carried out an extension of photodiode on the semi-insulating inp substrate, extension constitutes by five layers, is followed successively by semi-insulating inp I substrate, n type inp resilient coating, n type inp cladding layer, indium gallium arsenic absorbed layer, n type inp cladding layer and the indium gallium arsenic contact layer 6 of mixing Fe from bottom to up.
2) doing mask layer with 2500 dust silicon dioxide, is 1: 1: 20 sulfuric acid with volume ratio: hydrogen peroxide: the not protected indium gallium of aqueous corrosion arsenic 55 seconds, make indium gallium arsenic ohmic contact layer,
3) adopt the method that spreads based on MOCVD system gradation type to mix, doping method is to do mask layer with 3000 dust silicon dioxide, makes diameter by lithography and be 50 microns circular diffusion hole, and with 1: 10 hydrochloric acid of volume ratio: the aqueous solution cleaned 50 seconds, washed with de-ionized water 5 minutes, at 530 ℃, pressure is under the 225 holder conditions then, and the zinc methide flow is per minute 5 mark condition milliliters, spread 15 minutes, the zinc methide flow is per minute 10 mark condition milliliters, spreads 5 minutes, anneals under 470 ℃ of conditions at last;
4) the plasma reinforced chemical vapor deposition 3000 dust silicon dioxide of growing are done mask layer, utilizing reactive ion etching method to etch area then is that 70 microns * microns, the degree of depth are 2.9 microns square, adopting volume ratio at last is 1: 1: 20 sulfuric acid: hydrogen peroxide: aqueous corrosion 25 seconds, produce accurate table top;
5) doing mask layer with photoresist, make the rectangular pattern of 126 microns of 240 microns * by lithography, is 1: 1 phosphoric acid then with volume ratio: the not protected phosphorization phosphide indium layer of hydrochloric acid solution corrosion 23 seconds, make second step;
6) with the plasma reinforced chemical vapor deposition apparatus 5000 dust silicon dioxide passivation layer of growing;
7) producing diameter with the method etching silicon dioxide of reactive ion etching earlier is 50 microns circular holes, and utilizing the plasma reinforced chemical vapor deposition apparatus growth thickness then is 1600 dust silicon nitride antireflection layers, produces photosurface;
8) earlier with the method etching contact hole of reactive ion etching, make electrode pattern then by lithography, sputtered titanium, platinum, gold successively are with glue to peel off at last again, produce P-type and N-type electrode;
9) earlier with substrate thinning to 150 μ m, sputtered with Ti, Pt, Au successively then;
10) alloy 55s under 415 ℃ of conditions makes electrode metalization.
2. a kind of method that adopts the MOCVD epitaxial system to make gradational diffusion photoelectric diode according to claim 1 is characterized in that thickness 5-30 micron, and the fracture strength of film is not less than 50 MPas, and yield strength is not less than 20 MPas.
3. a kind of method that adopts the MOCVD epitaxial system to make gradational diffusion photoelectric diode according to claim 1; after it is characterized in that making figure by lithography; with the method etching silicon dioxide of reactive ion etching 13 minutes; be used as mask layer (14) by photoresist protection silicon dioxide; remove photoresist with 5 minutes method of 5 minutes-acetone of plasma aura spray-plasma aura; with 1 micron phosphorization phosphide indium layer of method etching (13) of reactive ion etching, 0.9 micron ingaas layer (12) amounts to 110 minutes.
4. a kind of method that adopts the MOCVD epitaxial system to make gradational diffusion photoelectric diode according to claim 1 is characterized in that producing P-type and N-type electrode, and sputter thickness is respectively 600 dusts, 800 dusts, the titanium of 2000 dusts, platinum, gold successively.
5. a kind of method that adopts the MOCVD epitaxial system to make gradational diffusion photoelectric diode according to claim 1 is characterized in that titanium, platinum, the golden thickness of back spatter layer (21) is respectively 400 dusts, 500 dusts, 2500 dusts.
6. a kind of method that adopts the MOCVD epitaxial system to make gradational diffusion photoelectric diode according to claim 1 is characterized in that adopting reactive ion etching method, every etching 10 minutes, and aerating oxygen cleaned cavity 4 minutes.
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CN102569065A (en) * | 2011-12-23 | 2012-07-11 | 重庆平伟实业股份有限公司 | Acid washing process of diode chip |
CN106449855A (en) * | 2016-11-23 | 2017-02-22 | 苏州苏纳光电有限公司 | Single-row current carrier photoelectric detector and method for manufacturing same |
CN114171642A (en) * | 2021-12-08 | 2022-03-11 | 中国电子科技集团公司第四十四研究所 | Preparation method of coplanar N electrode of InGaAs focal plane photoelectric detector |
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