CN107895713B - TFT substrate manufacturing method - Google Patents
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- CN107895713B CN107895713B CN201711245330.7A CN201711245330A CN107895713B CN 107895713 B CN107895713 B CN 107895713B CN 201711245330 A CN201711245330 A CN 201711245330A CN 107895713 B CN107895713 B CN 107895713B
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- 239000000758 substrate Substances 0.000 title claims abstract description 57
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 33
- 239000010410 layer Substances 0.000 claims abstract description 291
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 93
- 239000011241 protective layer Substances 0.000 claims abstract description 59
- 238000006356 dehydrogenation reaction Methods 0.000 claims abstract description 58
- 238000005530 etching Methods 0.000 claims abstract description 23
- 239000007788 liquid Substances 0.000 claims abstract description 13
- 238000000151 deposition Methods 0.000 claims abstract description 12
- 239000010408 film Substances 0.000 claims description 137
- 238000000034 method Methods 0.000 claims description 31
- 239000004065 semiconductor Substances 0.000 claims description 14
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 10
- 238000005984 hydrogenation reaction Methods 0.000 claims description 6
- 238000001312 dry etching Methods 0.000 claims description 5
- 239000010409 thin film Substances 0.000 claims description 5
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- 238000010438 heat treatment Methods 0.000 claims description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 2
- 238000000206 photolithography Methods 0.000 description 9
- 238000010586 diagram Methods 0.000 description 7
- 239000000463 material Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 5
- 239000002184 metal Substances 0.000 description 5
- 238000000059 patterning Methods 0.000 description 4
- 230000009286 beneficial effect Effects 0.000 description 3
- 150000002500 ions Chemical class 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- UMVBXBACMIOFDO-UHFFFAOYSA-N [N].[Si] Chemical compound [N].[Si] UMVBXBACMIOFDO-UHFFFAOYSA-N 0.000 description 2
- 229910052681 coesite Inorganic materials 0.000 description 2
- 229910052906 cristobalite Inorganic materials 0.000 description 2
- 238000005240 physical vapour deposition Methods 0.000 description 2
- 229910052682 stishovite Inorganic materials 0.000 description 2
- 229910052905 tridymite Inorganic materials 0.000 description 2
- 238000009825 accumulation Methods 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 239000002346 layers by function Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000004033 plastic Substances 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 150000003376 silicon Chemical class 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 235000012239 silicon dioxide Nutrition 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
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- H01L2021/775—
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- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
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- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention provides a TFT substrate manufacturing method, which comprises the following steps: providing a substrate; sequentially forming a protective layer, a hydrogenated film layer and a patterned photoresist layer on the substrate; carrying out dehydrogenation treatment on the hydrogenated film layer to form a dehydrogenated film layer; etching the protective layer and the dehydrogenation film layer, wherein the edge of the dehydrogenation film layer is retracted relative to the edge of the photoresist layer and the edge of the protective layer so as to form a groove between the photoresist layer and the protective layer; depositing a functional film layer on the substrate, wherein the functional film layer comprises a first functional film layer positioned on the photoresist layer and a second functional film layer positioned on the surface of the substrate, and an opening of the groove is formed between the first functional film layer and the protective layer; and arranging the photoresist layer in stripping liquid, wherein the stripping liquid fills the groove through the opening of the groove and reacts with the photoresist layer to separate the photoresist layer from the protective layer. The invention can improve the production efficiency of the display panel.
Description
Technical Field
The invention relates to the technical field of display, in particular to a manufacturing method of a Thin Film Transistor (TFT) substrate.
Background
In the process of fabricating a thin film transistor array substrate (referred to as a TFT substrate in the present invention), each layer structure is formed by a photolithography process. Generally, five masks are required for the entire TFT substrate process. However, the excessive number of photomasks increases the manufacturing cost, and also causes the accumulation of the problems of too long process flow and good product yield, thereby greatly reducing the production efficiency.
In order to reduce the number of masks, an indium tin oxide semiconductor transparent conductive film (ITO layer) and a protective layer (PV layer) may be simultaneously formed through one mask by a Lift-off process, thereby reducing the total number of masks to three (3 masks). However, in the process of removing the photoresist layer with the stripping solution, since the photoresist layer is covered with a thin film, the stripping solution cannot directly contact the photoresist layer, which hinders the removal of the photoresist layer and the patterning, and further hinders the photolithography process, thereby reducing the production efficiency of the display panel.
Disclosure of Invention
The invention provides a manufacturing method of a TFT substrate, which can improve the production efficiency of a display panel.
The invention provides a TFT substrate manufacturing method, which comprises the following steps:
providing a substrate;
sequentially forming a protective layer, a hydrogenated film layer and a patterned photoresist layer on the substrate, wherein the hydrogenated film layer is a film layer subjected to hydrogenation treatment;
carrying out dehydrogenation treatment on the hydrogenated film layer to form a dehydrogenated film layer;
etching the protective layer and the dehydrogenation film layer, wherein the edge of the dehydrogenation film layer is retracted relative to the edge of the photoresist layer and the edge of the protective layer so as to form a groove between the photoresist layer and the protective layer;
depositing a functional film layer on the substrate, wherein the functional film layer comprises a first functional film layer positioned on the photoresist layer and a second functional film layer positioned on the surface of the substrate, and an opening of the groove is formed between the first functional film layer and the protective layer;
and arranging the photoresist layer in stripping liquid, wherein the stripping liquid fills the groove through the opening of the groove and reacts with the photoresist layer to separate the photoresist layer from the protective layer.
Wherein, the hydrogenated film layer is a hydrogenated amorphous silicon layer or a nitrogen silicon layer.
And in the step of carrying out dehydrogenation treatment on the hydrogenated film layer to form a dehydrogenated film layer, the dehydrogenated film layer is of a honeycomb structure.
Wherein, in the step of etching the protective layer and the dehydrogenation film layer, the protective layer and the dehydrogenation film layer are subjected to dry etching treatment.
Wherein, in the step of etching the protective layer and the dehydrogenation film layer, the etching rate of the dehydrogenation film layer is greater than the etching rate of the protective layer.
And in the step of arranging the photoresist layer in stripping liquid, filling the grooves with the stripping liquid through the openings of the grooves and reacting with the photoresist layer, corroding the surface of the photoresist layer facing the substrate by the stripping liquid so as to separate the photoresist layer from the protective layer and separate the first functional film layer on the photoresist layer from the protective layer.
And in the step of carrying out dehydrogenation treatment on the hydrogenated film layer, carrying out dehydrogenation treatment on the hydrogenated film layer by adopting a laser irradiation or heating method.
Wherein, the functional film layer is an ITO film.
In the step of sequentially forming the protective layer, the hydrogenated film layer and the patterned photoresist layer on the substrate, the hydrogenated film layer is a hydrogenated amorphous silicon layer;
and after the step of removing the photoresist layer through the groove, removing the dehydrogenation film layer by adopting a dry etching process.
Wherein the step of providing the substrate further comprises:
providing a transparent plate;
depositing a gate on the transparent plate;
depositing a gate insulating layer on the transparent plate;
forming a semiconductor layer and a source drain electrode on the grid insulating layer;
and depositing a protective layer on the gate insulating layer, the semiconductor layer and the source and drain electrodes. The invention provides a TFT substrate manufacturing method, which comprises the steps of depositing a hydrogenation film layer which can be a hydrogenated amorphous silicon layer or a hydrogenated silicon layer between a protective layer and a photoresist layer, carrying out dehydrogenation treatment on the hydrogenation film layer before etching the hydrogenation film layer and the protective layer, wherein in the process of etching the dehydrogenation film layer and the protective layer, as the dehydrogenation film layer is porous and loose, and the etching rate of the dehydrogenation film layer is greater than that of the protective layer, the edge of the dehydrogenation film layer is retracted relative to the edge of the photoresist layer and the edge of the protective layer, a groove is formed between the dehydrogenation film layer and the protective layer, the photoresist layer is arranged in stripping liquid, the stripping liquid fills the groove through the opening of the groove and reacts with the photoresist layer to enable the photoresist layer to be separated from the protective layer, thereby preventing the functional film layer from completely covering the photoresist layer, the method can prevent the photoresist layer from being removed and the pattern from being formed, thereby preventing the photoetching process and reducing the production efficiency of the display panel. Meanwhile, the adhesion between the dehydrogenation film layer and the photoresist layer is reduced, which is beneficial to stripping the photoresist layer, improving the efficiency of the photoetching process and improving the yield of products.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
Fig. 1 is a flowchart of a method for manufacturing a TFT substrate according to an embodiment of the present invention.
Fig. 2 is a schematic structural diagram of a substrate in the TFT substrate manufacturing method according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of the TFT substrate in step S107 in the manufacturing method according to the embodiment of the present invention.
Fig. 4 is a schematic structural diagram of the TFT substrate in step S108 in the manufacturing method according to the embodiment of the present invention.
Fig. 5 is a schematic structural diagram of the TFT substrate in step S109 in the manufacturing method according to the embodiment of the present invention.
Fig. 6 is a schematic structural diagram of the TFT substrate in step S110 in the manufacturing method according to the embodiment of the present invention.
Fig. 7 is a schematic structural diagram of the TFT substrate in step S111 in the manufacturing method according to the embodiment of the present invention.
Fig. 8 is a schematic structural diagram of the TFT substrate in step S112 in the manufacturing method according to the embodiment of the present invention.
Detailed Description
In order that the above objects, features and advantages of the present application can be more clearly understood, a detailed description of the present application will be given below with reference to the accompanying drawings and detailed description. In addition, the embodiments and features of the embodiments of the present application may be combined with each other without conflict.
In the following description, numerous specific details are set forth to provide a thorough understanding of the present application, and the described embodiments are merely a subset of the embodiments of the present application, rather than all embodiments. All other embodiments obtained by a person of ordinary skill in the art without any inventive work based on the embodiments in the present application are within the scope of protection of the present application.
In addition, the following description of the various embodiments refers to the accompanying drawings, which are included to illustrate specific embodiments that can be used to practice the present application. Directional phrases used in this application, such as, for example, "top," "bottom," "upper," "lower," "front," "rear," "left," "right," "inner," "outer," "side," and the like, refer only to the orientation of the appended drawings and are, therefore, used herein for better and clearer illustration and understanding of the application and are not intended to indicate or imply that the referenced device or element must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the application.
Referring to fig. 1, fig. 1 is a manufacturing method of a TFT substrate for preparing a TFT substrate 200 according to an embodiment of the present invention. Including the following step S100.
S101, please refer to fig. 2, a transparent plate 201 is provided.
In some possible embodiments, the transparent plate 201 is configured to transmit light. The transparent plate 201 may be made of glass, ceramic, plastic, etc. The transparent plate 201 may be a rectangular plate body, and the transparent plate 201 includes a flat surface on which a layer structure is fabricated to prepare a TFT array.
S102, referring to fig. 2, a gate 202 is deposited on the transparent plate 201.
In some possible embodiments, a first metal layer is deposited on the transparent plate 201, and the first metal layer is patterned by photolithography using a conventional photomask as a first photomask to form the gate 202.
S103, referring to fig. 2, a gate insulating layer 203 is deposited on the transparent plate 201.
In some possible embodiments, a gate insulating layer 203 is deposited on the transparent plate 201 and the gate 202 such that the gate insulating layer 203 covers a portion of the substrate and completely covers the gate 202.
S104, referring to fig. 2, a semiconductor layer 204, a source 205 and a drain 206 are formed on the gate insulating layer 203.
In some possible embodiments, a semiconductor material layer and a second metal layer are deposited on the gate insulating layer 203, and a photoresist layer required in patterning the semiconductor material layer and the second metal layer is then used as a second mask, and the semiconductor material layer and the second metal layer are subjected to photolithography by using a halftone mask or a gray tone mask, so that the semiconductor region and the source 205 and the drain 206 are formed above the gate 202 by patterning. The transparent plate 201, and the gate insulating layer 203, the semiconductor layer 204, and the source and drain electrodes 205 and 206 disposed on the transparent plate 201 may form a substrate 100.
The embodiment of the invention mainly protects a photoetching method which can improve the stripping efficiency of photoresist. The photolithography method includes the following steps.
S105, referring to fig. 2, a protective layer 207 is deposited on the gate insulating layer 203, the semiconductor layer 204, and the source and drain electrodes 205 and 206.
In some possible embodiments, a protective layer 207 is deposited on the gate insulating layer 203, the semiconductor layer 204, and the source and drain electrodes 205 and 206, such that the protective layer 207 completely covers the gate insulating layer 203, the semiconductor layer 204, and the source and drain electrodes 205 and 206. Wherein, the material of the protection layer 207 may be SiO2 or SiON. The protective layer 207 may serve as a planarization layer in preparation for subsequent processing.
S106, referring to fig. 3, a hydrogenated film layer 208 is formed on the protective layer 207.
In this embodiment, the hydrogenated film layer 208 is a film layer rich in H ions. The hydrogenated film layer 208 is a hydrogenated film layer, and may be a hydrogenated amorphous silicon layer or a hydrogenated nitrogen silicon layer.
In some possible embodiments, the hydrogenated film layer 208 is rich in H ions, and a porous and loose dehydrogenated film layer may be formed after the hydrogenated film layer 208 is subjected to a dehydrogenation process, so that an etching rate of the porous and loose dehydrogenated film layer is greater than an etching rate of the protective layer 207 in an etching process, so as to form a groove between the protective layer 207 and the photoresist layer, and an inner wall of one side of the groove is formed by a surface of the photoresist layer. After the functional film layer is deposited, the groove can be contacted with the photoresist layer, thereby avoiding the problem that the photoresist layer can not be removed or can be completely removed.
In other embodiments, not limited to the hydrogenated amorphous silicon layer or the silicon nitride layer, other films may be formed on the protective layer 207 and the photoresist layer, the films may form a groove between the photoresist layer and the protective layer 207 in the etching process, and the photoresist layer may be removed through the groove.
S107, referring to fig. 3, a patterned photoresist layer 209 is disposed on the hydrogenated film layer 208.
In some possible embodiments, a photoresist material is disposed on the hydrogenated film layer 208, and a halftone mask or a gray tone mask is used as a third mask to pattern the photoresist layer 209, so that a portion of the photoresist layer 209 is removed by full exposure development, so that a portion of the surface of the hydrogenated film layer 208 is exposed.
S108, referring to fig. 4, performing a dehydrogenation process on the hydrogenated film layer 208 to form a dehydrogenated film layer 210.
In some possible embodiments, the hydrogenated film layer 208 is irradiated with laser light to perform dehydrogenation treatment on the hydrogenated film layer 208.
In other embodiments, the hydrogenated film layer 208 may be subjected to a high temperature treatment at 300 to 400 ℃ to perform a dehydrogenation treatment on the hydrogenated film layer 208.
In this embodiment, H ions in the hydrogenated film layer 208 are dissociated, thereby forming a porous, loose and porous dehydrogenated film layer 210 having a honeycomb structure.
S109, referring to fig. 5, the protection layer 207 and the dehydrogenation film layer 210 are etched.
In some possible embodiments, the protective layer 207 and the dehydrogenation film layer 210 are dry etched. Since the protection layer 207 and the dehydrogenation film layer 210 are provided with the patterned photoresist layer 209, and the photoresist layer 209 may prevent the protection layer 207 and the dehydrogenation film layer 210 from being etched in a partial region, the protection layer 207 and the dehydrogenation film layer 210 are patterned, and the patterned shape of the protection layer 207 substantially corresponds to the patterned photoresist layer 209.
In this embodiment, since the dehydrogenation film layer 210 is porous and loose, and the etching rate of the dehydrogenation film layer 210 is greater than that of the protection layer 207, the edge of the dehydrogenation film layer 210 is retracted relative to the edge of the photoresist layer 209 and the edge of the protection layer 207, so that a groove 211 can be formed between the dehydrogenation film layer 210 and the protection layer 207, and the opening 2111 of the groove 211 faces to the direction perpendicular to the substrate 100.
Specifically, the edge of the protection layer 207 and the edge of the photoresist layer 209 extend beyond the edge of the dehydrogenation film layer 210, so that a groove 211 is formed between the dehydrogenation film layer 210 and the protection layer 207, and the inner wall of the groove 211 includes the surface of the protection layer 207 facing the photoresist layer 209, the surface of the photoresist layer 209 facing the protection layer 207, and the end face of the dehydrogenation film layer 210. Wherein the end face of the dehydrogenation film layer 210 faces the opening of the groove 211.
S110, referring to fig. 6, a functional film 212 is deposited on the substrate 100, the functional film 211 includes a first functional film 213 on the photoresist layer 209 and a second functional film 214 on the substrate surface, and an opening of the recess 211 is formed between the first functional film 213 and the protection layer 207.
In some possible embodiments, the functional film layer 212 may be deposited on exposed surfaces of the photoresist layer 209 and other layers using Physical Vapor Deposition (PVD).
In some possible embodiments, the first functional film 213 and the second functional film 214 are located at different heights, i.e., the first functional film 213 and the second functional film 214 are staggered. The groove 211 is located between the first functional film layer 213 and the second functional film layer 214.
In this embodiment, the extending direction of the groove 211 is perpendicular to the orientation of the substrate 100, so that the functional film layer 212 does not cover the groove 211 when the functional film layer 212 is deposited in the direction of the substrate 100. Namely, the groove 211 exposes the functional film layer 212.
In some possible embodiments, the functional film layer 212 is an ITO thin film.
In some possible embodiments, the area where the protection layer 207 and the dehydrogenation film layer 210 are etched is a via hole, and the via hole exposes a surface of the source/drain 205, so that an electrical connection can be formed with the second functional film layer 214 later.
In the process of depositing the functional film 212 toward the substrate 100, since the opening 2111 of the groove 211 faces the direction perpendicular to the substrate 100, the functional film 212 does not cover the groove 211, and thus the photoresist layer 209 can be removed through the groove 211, thereby preventing the functional film 212 from completely covering the photoresist layer 209, which hinders the removal of the photoresist layer 209 and the formation of patterns, and further hindering the photolithography process, which reduces the production efficiency of the display panel.
S111, referring to fig. 7, the photoresist layer 209 is disposed in a stripping solution, and the stripping solution fills the groove 211 through the opening of the groove 211 and reacts with the photoresist layer 209 to separate the photoresist layer 209 from the protection layer 207.
In some possible embodiments, the stripping solution etches the photoresist layer 209 toward the surface of the substrate 100 to separate the photoresist layer 209 from the protection layer 207 and separate the first functional film 213 on the photoresist layer 209 from the protection layer 207.
In another embodiment, the photoresist layer 209 may be irradiated with laser or ultraviolet light to absorb light and then expanded, and then the photoresist layer 209 may be soaked in the stripping solution to achieve a better stripping effect.
In some possible embodiments, referring to fig. 8, the hydrogenated film layer 208 is a hydrogenated amorphous silicon layer.
Referring to fig. 8, after the step of removing the photoresist layer 209 through the groove 211, a step S112 of removing the dehydrogenation film layer 210 by a dry etching process is further included to remove the dehydrogenation amorphous silicon layer.
In the embodiment, the dehydrogenation film layer 210 is porous and loose, so that the adhesion between the dehydrogenation film layer 210 and the photoresist layer 209 is reduced, which is beneficial to peeling the photoresist layer 209 from the dehydrogenation film layer 210, thereby improving the efficiency of the photolithography process and improving the yield of products.
In other embodiments of the present invention, the above steps may be replaced by different orders, or the above steps may be omitted or added.
Depositing a hydrogenated amorphous silicon layer between a protective layer 207 and a photoresist layer 209, performing dehydrogenation treatment on the hydrogenated film layer 208 before etching the hydrogenated film layer 208 and the protective layer 207, wherein in the process of etching the dehydrogenated film layer 210 and the protective layer 207, as the dehydrogenated film layer 210 is porous and loose, the etching rate of the dehydrogenated film layer 210 is greater than that of the protective layer 207, the edge of the dehydrogenated film layer 210 is retracted relative to the edge of the photoresist layer 209 and the edge of the protective layer 207, a groove 211 is formed between the dehydrogenated film layer 210 and the protective layer 207, an opening of the groove 211 is formed between the first functional layer 213 and the protective layer, the photoresist layer 209 is arranged in stripping liquid, the stripping liquid fills the groove 211 through the opening of the groove 211 and reacts with the photoresist layer 209 to separate the photoresist layer 207, therefore, the functional film 212 can be prevented from completely covering the photoresist layer 209, which can hinder the removal of the photoresist layer 209 and the patterning, and further hinder the photolithography process, thereby reducing the production efficiency of the display panel. Meanwhile, the adhesion between the dehydrogenation film layer 210 and the photoresist layer 209 is reduced, which is beneficial to stripping the photoresist layer 209, improving the efficiency of the photolithography process and increasing the yield of the product.
It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned. Furthermore, it is obvious that the word "comprising" does not exclude other elements or steps, and the singular does not exclude the plural.
Finally, it should be noted that the above embodiments are only for illustrating the technical solutions of the present application and not for limiting, and although the present application is described in detail with reference to the above preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made to the technical solutions of the present application without departing from the spirit and scope of the technical solutions of the present application.
Claims (10)
1. A TFT substrate manufacturing method is characterized by comprising the following steps:
providing a substrate;
sequentially forming a protective layer, a hydrogenated film layer and a patterned photoresist layer on the substrate, wherein the hydrogenated film layer is a film layer subjected to hydrogenation treatment;
carrying out dehydrogenation treatment on the hydrogenated film layer to form a dehydrogenated film layer;
etching the protective layer and the dehydrogenation film layer, wherein the edge of the dehydrogenation film layer is retracted relative to the edge of the photoresist layer and the edge of the protective layer so as to form a groove between the photoresist layer and the protective layer;
depositing a functional film layer on the substrate, wherein the functional film layer comprises a first functional film layer positioned on the photoresist layer and a second functional film layer positioned on the surface of the substrate, and an opening of the groove is formed between the first functional film layer and the protective layer;
and arranging the photoresist layer in stripping liquid, wherein the stripping liquid fills the groove through the opening of the groove and reacts with the photoresist layer to separate the photoresist layer from the protective layer.
2. The method of manufacturing a TFT substrate according to claim 1, wherein the hydrogenated film layer is a hydrogenated amorphous silicon layer or a silicon nitride layer.
3. The method for manufacturing a TFT substrate according to claim 2, wherein the step of forming the dehydrogenation film layer by performing dehydrogenation processing on the hydrogenation film layer has a honeycomb structure.
4. The method of manufacturing a TFT substrate according to claim 3, wherein the step of etching the protective layer and the dehydrogenation film layer includes dry etching the protective layer and the dehydrogenation film layer.
5. The method of manufacturing a TFT substrate according to claim 4, wherein in the step of etching the protective layer and the dehydrogenation film layer, an etching rate of the dehydrogenation film layer is greater than an etching rate of the protective layer.
6. The method according to claim 1, wherein the step of placing the photoresist layer in a stripping solution, the stripping solution filling the recess through the opening of the recess and reacting with the photoresist layer, the stripping solution etching the surface of the photoresist layer facing the substrate to separate the photoresist layer from the protective layer and the first functional film layer on the photoresist layer from the protective layer.
7. The method of manufacturing a TFT substrate according to claim 1, wherein in the step of performing dehydrogenation processing on the hydrogenated film layer, the hydrogenated film layer is subjected to dehydrogenation processing by laser irradiation or heating.
8. The method for manufacturing a TFT substrate according to claim 1, wherein the functional film layer is an ITO thin film.
9. The method of manufacturing a TFT substrate as claimed in claim 1, wherein in the step of sequentially forming a protective layer, a hydrogenated film layer and a patterned photoresist layer on the substrate, the hydrogenated film layer is a hydrogenated amorphous silicon layer;
and after the step of removing the photoresist layer through the groove, removing the dehydrogenation film layer by adopting a dry etching process.
10. The method of manufacturing of claim 1, wherein the step of providing a substrate further comprises:
providing a transparent plate;
depositing a gate on the transparent plate;
depositing a gate insulating layer on the transparent plate;
forming a semiconductor layer and a source drain electrode on the grid insulating layer;
and depositing a protective layer on the gate insulating layer, the semiconductor layer and the source and drain electrodes.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201711245330.7A CN107895713B (en) | 2017-11-30 | 2017-11-30 | TFT substrate manufacturing method |
| PCT/CN2018/071625 WO2019104837A1 (en) | 2017-11-30 | 2018-01-05 | Tft substrate manufacturing method |
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| CN201711245330.7A CN107895713B (en) | 2017-11-30 | 2017-11-30 | TFT substrate manufacturing method |
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| CN107895713B true CN107895713B (en) | 2020-05-05 |
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| US20220285408A1 (en) * | 2019-11-26 | 2022-09-08 | Chongqing Konka Photoelectric Technology Research Institute Co., Ltd. | Isolation structure of a photoresist stripper, tft arrays and preparation method thereof |
| CN111740001B (en) * | 2020-01-20 | 2022-09-09 | 绍兴中芯集成电路制造股份有限公司 | Piezoelectric device and method of forming the same |
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| WO2019104837A1 (en) | 2019-06-06 |
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