CN107797050A - A kind of method of location-server mainboard electrifying timing sequence abnormal state - Google Patents
A kind of method of location-server mainboard electrifying timing sequence abnormal state Download PDFInfo
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- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
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Abstract
The present invention provides a kind of method of location-server mainboard electrifying timing sequence abnormal state, and power on signal is sent to the first power module of server master board, judges whether electricity is normal on the first power module；After electricity is normal on first power module, power on signal is sent to the second source module of server master board；Judge whether electricity is normal in second source module；After electricity is normal in second source module, power on signal is sent to the 3rd power module of server master board, judges whether electricity is normal on the 3rd power module；After electricity is normal on 3rd power module, the like until all power modules of server master board are both powered up normally.Universal meter need not be used, and power module is measured one by one again, is improved the operating efficiency of mainboard test process, be it also avoid repeated work during testing host exception.
Description
Technical field
The present invention relates to server field, more particularly to a kind of side of location-server mainboard electrifying timing sequence abnormal state
Method.
Background technology
Aux electricity and core electricity on server master board share more than ten and planted, and the logical design of mainboard is to each power's
It is upper electricity and power down order have strict requirements, in motherboard design, always occur some design mistakes cause electricity or fall
Electric sequential is not normally functioning, and so as to cause mainboard to be unable to normal switch machine, has influence on the function of whole mainboard.
Therefore, this point is specifically contemplated that in motherboard design, so that when electricity is abnormal with power down in appearance, can be fast
Speed navigates to abnormal power, realizes the quick function of solving bug.
In existing mainboard power designs, in appearance during electrical anomaly, usually using universal meter to each power's
Enable signals and powergood signals are measured, and control sequential logic is investigated one by one abnormal power occurs.
When occurring abnormal every time, the operation of repeatability can be all carried out, and requires to look up each power enable letters
Number and pin position information of the powergood signals on mainboard, it is necessary to consume substantial amounts of time and efforts.
In electrical anomaly power in positioning, it is necessary to compare whether each power of the investigation of sequential logic one by one has exception,
And the pin position of each power signals is required to look up, the process workload is bigger, it is necessary to consume substantial amounts of time and efforts.And
And when the problem of same occurs in multi-disc mainboard, increase that workload will be at double.Operating efficiency can be so had a strong impact on, is delayed
The progress of whole project.
The content of the invention
In order to overcome above-mentioned deficiency of the prior art, the present invention provides a kind of location-server mainboard electrifying timing sequence state
Abnormal method, method include：
Power on signal is sent to the first power module of server master board, judges whether electricity is normal on the first power module；
After electricity is normal on first power module, power on signal is sent to the second source module of server master board；
Judge whether electricity is normal in second source module；
After electricity is normal in second source module, power on signal is sent to the 3rd power module of server master board, judges the
Whether electricity is normal on three power modules；
After electricity is normal on 3rd power module, the like until all power modules of server master board are both powered up just
Often.
Preferably, when the first power module first powers on abnormal, power on signal is sent to the first power module again,
Judge whether electricity is normal on the first power module；
After such as electricity is normal on the first power module, power on signal is sent to the second source module of server master board, is judged
Whether electricity is normal in second source module；
After electricity is normal in second source module, power on signal is sent to the 3rd power module of server master board, judges the
Whether electricity is normal on three power modules；
The like until all power modules of server master board are both powered up normally.
Preferably, when the first power module first powers on abnormal, power on signal is sent to the first power module again,
Judge whether electricity is normal on the first power module；
Such as electrical anomaly on the first power module, judge whether the first power module reaches default electric number；
When not up to default electric number, the power on signal of preset times is sent to the first power module again, judges the
Whether electricity is normal on one power module；
When reaching default electric number, then the first power module failure information is sent.
Preferably, when second source module first powers on abnormal, power on signal is sent to second source module again,
Judge whether electricity is normal in second source module；
Such as electrical anomaly in second source module, judge whether second source module reaches default electric number；
When not up to default electric number, the power on signal of preset times is sent to second source module again, judges the
Whether electricity is normal on two power modules；
When reaching default electric number, then second source module failure information is sent.
Preferably, the first power module of definition status machine register first powers on normal value as the first power module the
One predetermined normal level；
First power module of definition status machine register, second of upper electric normal value is default for the first power module second
Normal value；
Electric normal value is the first power module N default just in first power module n-th of definition status machine register
Constant value；
It is default for the first power module first that first power module of definition status machine register first powers on exceptional value
Exceptional value；
First power module of definition status machine register, second of upper electrical anomaly value is default for the first power module second
Exceptional value；
Electrical anomaly value is preset different for the first power module N in first power module n-th of definition status machine register
Constant value；
For first power module after first powering on normally, system exports first the first predetermined normal level of power module；
For first power module after electricity is normal on second, system exports first the second predetermined normal level of power module；
For first power module after electricity is normal in n-th, system exports the first power module N predetermined normal levels；
For first power module after exception is first powered on, system output the first power module first presets exceptional value；
For first power module on second after electrical anomaly, system output the first power module second presets exceptional value；
In n-th after electrical anomaly, system exports the first power module N and presets exceptional value first power module.
Preferably, the second source module of definition status machine register first powers on normal value as second source module the
One predetermined normal level；
Second of upper electric normal value of the second source module of definition status machine register is default for second source module second
Normal value；
Electric normal value is second source module N default just in the second source module n-th of definition status machine register
Constant value；
It is default for second source module first that the second source module of definition status machine register first powers on exceptional value
Exceptional value；
Second of upper electrical anomaly value of the second source module of definition status machine register is default for second source module second
Exceptional value；
Electrical anomaly value is preset different for second source module N in the second source module n-th of definition status machine register
Constant value；
Second source module is after first powering on normally, system output second source the first predetermined normal level of module；
Second source module is after electricity is normal on second, system output second source the second predetermined normal level of module；
Second source module is after electricity is normal in n-th, system output second source module N predetermined normal levels；
For second source module after exception is first powered on, system output second source module first presets exceptional value；
For second source module on second after electrical anomaly, system output second source module second presets exceptional value；
For second source module in n-th after electrical anomaly, system output second source module N presets exceptional value.
Preferably, each power module is correspondingly connected with an indicator of the power supply status, and indicator of the power supply status is used to indicate
Electric exception or normal on power module.
Preferably, mainboard is provided with several LEDs and memory according to preset order arrangement；
LED according to preset order arrangement is used to show current state machine registers by the light on and off of LED
Value；
Memory is used to storing the normal value that each power module defines and exceptional value and real-time store power module
Current state information.
As can be seen from the above technical solutions, the present invention has advantages below：
The method of location-server mainboard electrifying timing sequence abnormal state is according to default testing sequence, test server mainboard
On power module, when power module breaks down, fault cues can be sent.It is abnormal based on occurring in mainboard power-on and power-off,
Just can the current exception of accurate judgement and normal by the light on and off situation of LED, it is not necessary to use universal meter power supply mould one by one again
Block is measured, and improves the operating efficiency of mainboard test process, it also avoid repeated work during testing host exception.
Brief description of the drawings
In order to illustrate more clearly of technical scheme, the required accompanying drawing used in description will be made below simple
Ground introduction, it should be apparent that, drawings in the following description are only some embodiments of the present invention, for ordinary skill
For personnel, on the premise of not paying creative work, other accompanying drawings can also be obtained according to these accompanying drawings.
Fig. 1 is the method flow diagram of location-server mainboard electrifying timing sequence abnormal state；
Fig. 2 is the embodiment of the method flow chart of location-server mainboard electrifying timing sequence abnormal state.
Embodiment
To enable goal of the invention, feature, the advantage of the present invention more obvious and understandable, will use below specific
Embodiment and accompanying drawing, the technical scheme protected to the present invention are clearly and completely described, it is clear that implementation disclosed below
Example is only part of the embodiment of the present invention, and not all embodiment.Based on the embodiment in this patent, the common skill in this area
All other embodiment that art personnel are obtained under the premise of creative work is not made, belong to the model of this patent protection
Enclose.
The present embodiment provides a kind of method of location-server mainboard electrifying timing sequence abnormal state, as shown in figure 1, method bag
Include：
Power on signal is sent to the first power module of server master board, judges whether electricity is normal on the first power module；
After electricity is normal on first power module, power on signal is sent to the second source module of server master board；
Judge whether electricity is normal in second source module；
After electricity is normal in second source module, power on signal is sent to the 3rd power module of server master board, judges the
Whether electricity is normal on three power modules；
After electricity is normal on 3rd power module, the like until all power modules of server master board are both powered up just
Often.
Specifically,
S1, power on signal is sent to the first power module of server master board；
S1A, judge whether electricity is normal on the first power module；
After electricity is normal on first power module；
S2, power on signal is sent to the second source module of server master board；
When the first power module first powers on abnormal,
S1B, send power on signal to the first power module again；
S1C, judge whether electricity is normal on the first power module；
After electricity is normal on first power module, power on signal is sent to the second source module of server master board；
As the first power module goes up electrical anomaly again；
S1D, judges whether the first power module reaches default electric number；
Upper electric number is preset when reaching,
S1E, send the first power module failure information.
Specifically upper electric number can need to set according to test, be not construed as limiting here.If default electric number it
After electricity is normal on interior first power module, power on signal is sent to the second source module of server master board.
S2A, judge whether electricity is normal in second source module；
After electricity is normal in second source module；
S3, power on signal is sent to the 3rd power module of server master board；
S4, after electricity is normal on the 3rd power module, the like until all power modules of server master board are both powered up
Normally.
When second source module first powers on abnormal,
S2B, send power on signal to second source module again；
S2C, judge whether electricity is normal in second source module；
After electricity is normal in second source module, power on signal is sent to the 3rd power module of server master board；
As second source module goes up electrical anomaly again；
S2D, judges whether second source module reaches default electric number；
Upper electric number is preset when reaching,
S2E, send second source module failure information.
Specifically upper electric number can need to set according to test, be not construed as limiting here.If default electric number it
After electricity is normal in interior second source module, power on signal is sent to the 3rd power module of server master board.
The electric sequence of each power module of mainboard as described above, judge whether electricity succeeds on power module one by one.It is main
The electric sequence of on board supply module is set by server needs, is not construed as limiting here.
In the present embodiment, it is the first power supply that the first power module of definition status machine register, which first powers on normal value,
The predetermined normal level of module first；
First power module of definition status machine register, second of upper electric normal value is default for the first power module second
Normal value；Electric normal value is the first power module N default normal in first power module n-th of definition status machine register
Value；It is default abnormal for the first power module first that first power module of definition status machine register first powers on exceptional value
Value；First power module of definition status machine register, second of upper electrical anomaly value is that the first power module second is default abnormal
Value；Electrical anomaly value is that the first power module N presets exceptional value in first power module n-th of definition status machine register；
For first power module after first powering on normally, system exports first the first predetermined normal level of power module；First power supply mould
For block after electricity is normal on second, system exports first the second predetermined normal level of power module；First power module is in n-th
After electricity is normal, system exports the first power module N predetermined normal levels；First power module is after exception is first powered on
System output the first power module first presets exceptional value；For first power module on second after electrical anomaly, system exports first
Power module second presets exceptional value；For first power module in n-th after electrical anomaly, system exports the first power module N
Default exceptional value.
It is default for second source module first that the second source module of definition status machine register first powers on normal value
Normal value；Second of upper electric normal value of the second source module of definition status machine register is that second source module second is default just
Constant value；Electric normal value is second source module N default normal in the second source module n-th of definition status machine register
Value；It is default abnormal for second source module first that the second source module of definition status machine register first powers on exceptional value
Value；Second of upper electrical anomaly value of the second source module of definition status machine register is that second source module second is default abnormal
Value；Electrical anomaly value is that second source module N presets exceptional value in the second source module n-th of definition status machine register；
Second source module is after first powering on normally, system output second source the first predetermined normal level of module；Second source mould
Block is after electricity is normal on second, system output second source the second predetermined normal level of module；Second source module is in n-th
After electricity is normal, system output second source module N predetermined normal levels；Second source module is after exception is first powered on
System output second source module first presets exceptional value；For second source module on second after electrical anomaly, system exports second
Power module second presets exceptional value；For second source module in n-th after electrical anomaly, system exports second source module N
Default exceptional value.
The like, electric normal value and N are preset in the n-th that each power module defines by state machine registers
Exceptional value.
Internal logic was delayed in what stage when so tester can more intuitively observe upper electrical anomaly.Can be with
The size of status register value is directly displayed by the light on and off situation of onboard LED.
Specifically, each power module is correspondingly connected with an indicator of the power supply status, indicator of the power supply status is used to indicate
Electric exception or normal on power module.
Mainboard is provided with several LEDs and memory according to preset order arrangement；The LED arranged according to preset order
The value of current state machine registers is shown for the light on and off by LED；Memory is determined for storing each power module
The normal value and the current state information of exceptional value and real-time store power module of justice.
The present invention also provides a specific embodiment, specifically includes：
In server master board design, through carrying out the control of sequential frequently with CPLD, CPLD is being received on last stage
After power powergood signals, according to certain timing requirements, next stage power enable signals can be provided.Cause
Whether this, effectively can judge that abnormal power up is by the logic realization inside CPLD according to the power of different phase
Delay in what stage, and shown by way of LED, so as to realize the power signals of electrical anomaly in fast positioning.
The mode of adoption status machine realizes the electric control up and down of power signals in the design of CPLD internal logics, and joins
According to the flow chart in Fig. 2, the method that explanation detects abnormal power by taking P5V power modules and P3V3 power modules as an example；
In the logical design inside CPLD, the mode of use state machine realizes each power control, when P5V electricity
When the PowerGood of source module previous stage meets condition, CPLD internal logics can export the enable signal of P5V power modules
(enable), the VR chips of P5V power modules carry out voltage conversion on this enable signal meeting drive circuit board, so as to generate
The voltage of P5V power modules, after the P5V power module voltage stabilizations of generation, VR chips can send P5V power modules
POWERGOOD signals.
If P5V power module voltages are constantly in the unstable stage, P5V power modules would not be sent
PowerGood signals, now, always P5V power modules can be waited to send powerGood signals inside CPLD；Only P5V power supplys
After the powerGood signals of module are effective, CPLD internal logics send enable signals to P3V3 power modules.
Such as electrical anomaly on P5V power modules, judge whether P5V power modules reach default electric number；When P5V power supply moulds
The not up to default electric number of block, the power on signal of preset times is sent to P5V power modules, judges P5V power modules again
Whether upper electricity is normal；Upper electric number is preset when P5V power modules reach, then sends P5V power module failure information.
Meanwhile in order to more intuitively observe during upper electrical anomaly CPLD internal logics be delay in what stage, it is necessary to
A register is defined inside CPLD, for representing the state of state machine, and is come by the light on and off situation of onboard LED direct
The size of display status register value.
After the powergood of P5V power modules is effective, the value for defining the status register is 10, now onboard LED
The light on and off situation of lamp be 1010 (" 1 " represent it is bright, " 0 " represent goes out)；When P3V3 power modules powergood signals effectively it
Afterwards, the value of definition status register is 11, and now the light on and off situation of onboard LED is 1011.
Therefore, when the light on and off situation by LED judges the value of status register for 10, you can be quickly judged as
The power of the last stage of P5V power modules is normal, but P5V power modules can not be normally effective.Now only need handle
Energy is placed on the related signal of P5V power modules to determine whether normally to go up the reason for electric.
In the present embodiment, mainboard power enable signals and powergood signals are coupled with mainboard CPLD,
And the value that 4 LEDs are used for showing current status register is left on mainboard；
In the design of CPLD internal logics, it should which the mode of use state machine realizes each power of mainboard power-on and power-off
Sequential logic, and being designed in order according to the standard time sequence of mainboard, only powergood signals on last stage effectively it
The enable signals of next stage could be exported afterwards；
In electric in appearance and lower electrical anomaly, the value of status register is judged by the value of LED, so as to accurately infer
Go out the power of current exception, and the current abnormal power of selective analysis other signals, related bug is excluded in time.
When mainboard power-on and power-off occur abnormal, it is only necessary to which by the light on and off situation of onboard LED, just energy accurate judgement is current
Abnormal power and normal power, it is not necessary to using universal meter, power is measured one by one again, improves mainboard debug mistakes
The operating efficiency of journey, it also avoid repeated work during a large amount of mainboard exceptions.
The foregoing description of the disclosed embodiments, professional and technical personnel in the field are enable to realize or using the present invention.
A variety of modifications to these embodiments will be apparent for those skilled in the art, as defined herein
General Principle can be realized in other embodiments without departing from the spirit or scope of the present invention.Therefore, it is of the invention
The embodiments shown herein is not intended to be limited to, and is to fit to and principles disclosed herein and features of novelty phase one
The most wide scope caused.
Claims (8)
- A kind of 1. method of location-server mainboard electrifying timing sequence abnormal state, it is characterised in that method includes：Power on signal is sent to the first power module of server master board, judges whether electricity is normal on the first power module；After electricity is normal on first power module, power on signal is sent to the second source module of server master board；Judge whether electricity is normal in second source module；After electricity is normal in second source module, power on signal is sent to the 3rd power module of server master board, judges the 3rd electricity Whether electricity is normal on source module；After electricity is normal on 3rd power module, the like until all power modules of server master board are both powered up normally.
- 2. the method for location-server mainboard electrifying timing sequence abnormal state according to claim 1, it is characterised in thatWhen the first power module first powers on abnormal, power on signal is sent to the first power module again, judges the first electricity Whether electricity is normal on source module；After such as electricity is normal on the first power module, power on signal is sent to the second source module of server master board, judges second Whether electricity is normal on power module；After electricity is normal in second source module, power on signal is sent to the 3rd power module of server master board, judges the 3rd electricity Whether electricity is normal on source module；The like until all power modules of server master board are both powered up normally.
- 3. the method for location-server mainboard electrifying timing sequence abnormal state according to claim 1 or 2, it is characterised in thatWhen the first power module first powers on abnormal, power on signal is sent to the first power module again, judges the first electricity Whether electricity is normal on source module；Such as electrical anomaly on the first power module, judge whether the first power module reaches default electric number；When not up to default electric number, the power on signal of preset times is sent to the first power module again, judges the first electricity Whether electricity is normal on source module；When reaching default electric number, then the first power module failure information is sent.
- 4. the method for location-server mainboard electrifying timing sequence abnormal state according to claim 1, it is characterised in thatWhen second source module first powers on abnormal, power on signal is sent to second source module again, judges the second electricity Whether electricity is normal on source module；Such as electrical anomaly in second source module, judge whether second source module reaches default electric number；When not up to default electric number, the power on signal of preset times is sent to second source module again, judges the second electricity Whether electricity is normal on source module；When reaching default electric number, then second source module failure information is sent.
- 5. the method for location-server mainboard electrifying timing sequence abnormal state according to claim 2, it is characterised in thatIt is default normal for the first power module first that first power module of definition status machine register first powers on normal value Value；First power module of definition status machine register, second of upper electric normal value is that the first power module second is default normal Value；Electric normal value is the first power module N predetermined normal levels in first power module n-th of definition status machine register；It is default abnormal for the first power module first that first power module of definition status machine register first powers on exceptional value Value；First power module of definition status machine register, second of upper electrical anomaly value is that the first power module second is default abnormal Value；Electrical anomaly value is that the first power module N presets exceptional value in first power module n-th of definition status machine register；For first power module after first powering on normally, system exports first the first predetermined normal level of power module；For first power module after electricity is normal on second, system exports first the second predetermined normal level of power module；For first power module after electricity is normal in n-th, system exports the first power module N predetermined normal levels；For first power module after exception is first powered on, system output the first power module first presets exceptional value；For first power module on second after electrical anomaly, system output the first power module second presets exceptional value；In n-th after electrical anomaly, system exports the first power module N and presets exceptional value first power module.
- 6. the method for location-server mainboard electrifying timing sequence abnormal state according to claim 5, it is characterised in thatIt is default normal for second source module first that the second source module of definition status machine register first powers on normal value Value；Second of upper electric normal value of the second source module of definition status machine register is that second source module second is default normal Value；Electric normal value is second source module N predetermined normal levels in the second source module n-th of definition status machine register；It is default abnormal for second source module first that the second source module of definition status machine register first powers on exceptional value Value；Second of upper electrical anomaly value of the second source module of definition status machine register is that second source module second is default abnormal Value；Electrical anomaly value is that second source module N presets exceptional value in the second source module n-th of definition status machine register；Second source module is after first powering on normally, system output second source the first predetermined normal level of module；Second source module is after electricity is normal on second, system output second source the second predetermined normal level of module；Second source module is after electricity is normal in n-th, system output second source module N predetermined normal levels；For second source module after exception is first powered on, system output second source module first presets exceptional value；For second source module on second after electrical anomaly, system output second source module second presets exceptional value；For second source module in n-th after electrical anomaly, system output second source module N presets exceptional value.
- 7. the method for location-server mainboard electrifying timing sequence abnormal state according to claim 6, it is characterised in thatEach power module is correspondingly connected with an indicator of the power supply status, and indicator of the power supply status is used to indicate electric on power module Exception or normal.
- 8. the method for location-server mainboard electrifying timing sequence abnormal state according to claim 6, it is characterised in thatMainboard is provided with several LEDs and memory according to preset order arrangement；LED according to preset order arrangement is used for the value that current state machine registers are shown by the light on and off of LED；Memory is used to storing the current of the normal value that each power module defines and exceptional value and real-time store power module Status information.
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