CN107463460B - Power supply system and power supply method based on hardware watchdog - Google Patents
Power supply system and power supply method based on hardware watchdog Download PDFInfo
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- CN107463460B CN107463460B CN201710698450.6A CN201710698450A CN107463460B CN 107463460 B CN107463460 B CN 107463460B CN 201710698450 A CN201710698450 A CN 201710698450A CN 107463460 B CN107463460 B CN 107463460B
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
- G06F11/0751—Error or fault detection not based on redundancy
- G06F11/0754—Error or fault detection not based on redundancy by exceeding limits
- G06F11/0757—Error or fault detection not based on redundancy by exceeding limits by exceeding a time limit, i.e. time-out, e.g. watchdogs
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Abstract
The invention relates to power supply, in particular to a power supply system and a power supply method based on a hardware watchdog, wherein the power supply system comprises an equipment module, a power supply module, a watchdog circuit module, a power-on reset starting circuit module, a comparator circuit module and a timer circuit module; the device module is respectively connected with the power supply module and the watchdog circuit module, the power supply module is connected with the comparator circuit module, and the comparator circuit module is respectively connected with the watchdog circuit module and the power-on reset starting circuit module; the timer circuit module is respectively connected with the power-on reset starting circuit module watchdog circuit module; the invention ensures that the CPU starts the function of the watchdog circuit module after the program is burnt by setting the time for shielding the function of the watchdog circuit module, thereby reducing the trouble caused by software burning when the product is produced in a large scale.
Description
Technical Field
The invention relates to power supply, in particular to a power supply system and a power supply method based on a hardware watchdog.
Background
The hardware watchdog circuit in the prior art can generate a reset signal to restart the CPU, so as to avoid software crash. However, when the technology cannot shield the function of the watchdog during power-on, for an application program with an android system, a long period of time is needed during online software burning, and the hardware watchdog function should be shielded, otherwise, when the software is burned, the application software does not send a watchdog feeding signal, so that the hardware is restarted frequently, and the software is burned unsuccessfully. In the prior art, the system also operates by software, belongs to a software watchdog protection mode, and if the MCU is dead, the whole system can not operate and can only restart the power supply manually.
Disclosure of Invention
Aiming at the defects or shortages in the prior art, the invention aims to solve the technical problems that: the power supply circuit can solve the technical problem that equipment is not restarted in a circulating mode due to a watchdog in the software burning process.
In order to achieve the above purpose, the technical scheme adopted by the invention is to provide a power supply system based on a hardware watchdog, wherein the power supply system comprises an equipment module, a power supply module, a watchdog circuit module, a power-on reset starting circuit module, a comparator circuit module and a timer circuit module; the power module is electrically connected with the equipment module, the watchdog circuit module, the power-on reset starting circuit module, the comparator circuit module and the timer circuit module, the equipment module is connected with the watchdog circuit module, and the comparator circuit module is respectively connected with the watchdog circuit module, the power-on reset starting circuit module and the timer circuit module; the timer circuit module is respectively connected with the power-on reset starting circuit module watchdog circuit module; the power supply module is used for supplying power to the power supply system; the watchdog circuit module is used for preventing the system from dead circulation; the timer circuit module is used for shielding the function t seconds of the watchdog circuit module at the moment of system power-on; the power-on reset starting circuit module is used for starting the function of the timer circuit module at the moment of system power-on; the comparator circuit module is used for controlling the switching state of the power supply module; the device module is used for sending a watchdog feeding signal to the watchdog circuit module.
As a further improvement of the invention, the timer module comprises a resistor R66, a capacitor C32, a capacitor C33 and a timer U24; the pin GND of the timer U24 is connected with GND; the pin TRIB of the timer U24 is respectively connected with the power-on reset starting circuit module and the watchdog circuit module; the pin OUT of the timer U24 is connected with the watchdog circuit module; the pins DISCHG and THOLD of the timer U24 are respectively connected with one end of the resistor R66, and the other end of the resistor R66 is connected with the pin VCC of the timer U24; one end of the resistor R66 is connected with one end of the capacitor C32, the other end of the capacitor C32 is connected with one end of the capacitor C33, the other end of the capacitor C33 is connected with a pin CVOLT of the timer U23, one end of the capacitor C33 is connected with GND, and the other end of the capacitor C32 is connected with GND.
The pin RESET of the timer U24 is respectively connected with the power supply module, the watchdog circuit module, the power-on RESET starting circuit module and the comparator circuit module; the pin VCC of the timer U24 is respectively connected with the power supply module, the watchdog circuit module, the power-on reset starting circuit module and the comparator circuit module.
As a further improvement of the invention, the power-on reset starting circuit module comprises a resistor R68 and a capacitor C34, wherein one end of the resistor R68 is respectively connected with a pin TRIB of the timer U24 and the watchdog circuit module, and the other end of the resistor R68 is respectively connected with the timer module, the watchdog circuit module, the comparator module and the power supply module; one end of the resistor R66 is connected to one end of the capacitor C34, and the other end of the capacitor C34 is connected to GND.
As a further improvement of the invention, the watchdog circuit module comprises a resistor R67 and a timer U23; the pin WDO of the watchdog circuit module is respectively connected with the pin TRIB of the timer U24, one end of the resistor R68 and one end of the capacitor C34; one end of the resistor R67 is respectively connected with a pin RESET of the timer, a pin VCC on the timer, the other end of the resistor R68, the comparator circuit module and the power supply module; the GND pin/connection GND of the timer U23; the pin EN of the timer U23 is connected with the pin OUT of the timer U24; the pin WDI of the timer U23 is configured to receive the feeding signal; the pin VCC of the timer U23 is connected to the other end of the resistor R67.
As a further improvement of the invention, the comparator module comprises a resistor R65, a resistor R69 and a comparator U25; the pin GND of the comparator U25 is connected with GND, the pin IN < 2+ > of the comparator is connected with the power supply module, and the voltage of 3.3V on the power supply module is connected; the pin IN2 of the comparator U25 is respectively connected with the pin TRIB of the timer U24 and the pin WDO/-of the timer U23; the pin OUT2 of the comparator U25 is connected with one end of the resistor R69, and the other end of the resistor R69 is connected with the power supply module; the pin VCC of the comparator U25 is respectively connected with the pin VCC of the timer U24, the pin RESET of the timer U24, the pin VCC of the timer U23 and the power supply module; the pin OUT2 of the comparator U25 is also connected with one end of a resistor R65, and the other end of the resistor R65 is connected with GND.
As a further improvement of the invention, the power supply module comprises a resistor R70, a polar capacitor C35, a triode Q7 and a MOS tube Q1; the base electrode of the triode Q7 is connected with the other end of the resistor R69, and the collector electrode of the triode Q7 is connected with GND; the emitter of the triode Q7 is connected with one end of the resistor R70, one end of the resistor R70 is connected with one end of the polar capacitor C35, and the other end of the capacitor C35 is connected with GND; the emitter of the triode Q7 is also connected with the grid electrode of the MOS tube; the source electrode of the MOS tube Q1 is connected with one end of a polar capacitor C35, and the source electrode of the MOS tube Q1 is also respectively connected with a pin VCC of the timer U24, a pin RESET of the timer U24, the other end of the resistor R68, a pin VCC of the timer U23 and a pin VCC of the comparator U25; and the drain electrode of the MOS tube Q1 is connected with the equipment module.
As a further improvement of the invention, the timer U24 is of a model NE555, and the timer U23 is of a model STWD100 YYYWY 3F.
A power supply method of a power supply system based on a hardware watchdog comprises the following steps:
s01, at the moment of system power-on, the power-on reset starting circuit module sends a trigger signal to the timer module to start the timer module, and the equipment module continuously sends a dog feeding signal to the watchdog circuit module;
s02, within T seconds, the timer module shields the function of the watchdog circuit module, and the watchdog circuit module continuously sends a high-level trigger signal to the comparator circuit module;
s03, after T seconds, the watchdog circuit module works normally, and the watchdog circuit module sends a trigger level signal to the comparator circuit module;
s04, the comparator circuit module judges whether the trigger level signal is of a low level, if so, the comparator circuit module sends a power-off signal to the circuit module, and the power supply of the power supply system is interrupted; if the power supply is at a high level, the power supply of the power supply system is normal. Specifically, in step S03, the watchdog circuit module starts timing at the T second, and if the watchdog circuit module does not receive the watchdog feeding signal sent by the system device module after 1.6S, the power supply system is also powered off.
The beneficial effects of the invention are as follows: the function of the watchdog circuit module is started after the CPU burns the program by setting the time for shielding the function of the watchdog circuit module, so that the trouble caused by software burning during mass production of products is reduced.
Drawings
FIG. 1 is a block diagram of a circuit provided by the present invention;
FIG. 2 is a circuit diagram provided by the present invention;
fig. 3 is a flow chart provided by the present invention.
Detailed Description
The invention is further described with reference to the following description of the drawings and detailed description.
1-3, the invention provides a system power supply circuit system based on hardware watchdog control, which comprises an equipment module, a power module, a watchdog circuit module, a power-on reset starting circuit module, a comparator circuit module and a timer circuit module; the device module is respectively connected with the power supply module and the watchdog circuit module, the power supply module is connected with the comparator circuit module, and the comparator circuit module is respectively connected with the watchdog circuit module and the power-on reset starting circuit module; the timer circuit module is respectively connected with the power-on reset starting circuit module watchdog circuit module;
the power module is used for supplying power to the system;
the watchdog circuit module is used for preventing the system from dead circulation;
the timer circuit module is used for shielding the function t seconds of the watchdog circuit module at the moment of system power-on;
the power-on reset starting circuit module is used for starting the function of the timer circuit module at the moment of system power-on;
the comparator circuit module is used for controlling the switching state of the power supply module;
the device module is used for sending a watchdog feeding signal to the watchdog circuit module.
The timer module comprises a resistor R66, a capacitor C32, a capacitor C33 and a timer U24; the pin GND of the timer U24 is connected with GND; the pin TRIB of the timer U24 is respectively connected with the power-on reset starting circuit module and the watchdog circuit module; the pin OUT of the timer U24 is connected with the watchdog circuit module;
the pins DISCHG and THOLD of the timer U24 are respectively connected with one end of the resistor R66, and the other end of the resistor R66 is connected with the pin VCC of the timer U24; one end of the resistor R66 is connected with one end of the capacitor C32, the other end of the capacitor C32 is connected with one end of the capacitor C33, the other end of the capacitor C33 is connected with a pin CVOLT of the timer U23, one end of the capacitor C33 is connected with GND, and the other end of the capacitor C32 is connected with GND.
The pin RESET of the timer U24 is respectively connected with the power supply module, the watchdog circuit module, the power-on RESET starting circuit module and the comparator circuit module; the pin VCC of the timer U24 is respectively connected with the power supply module, the watchdog circuit module, the power-on reset starting circuit module and the comparator circuit module.
Further, the power-on reset starting circuit module comprises a resistor R68 and a capacitor C34, one end of the resistor R68 is respectively connected with a pin TRIB of the timer U24 and the watchdog circuit module, and the other end of the resistor R68 is respectively connected with the timer module, the watchdog circuit module, the comparator module and the power supply module; one end of the resistor R66 is connected to one end of the capacitor C34, and the other end of the capacitor C34 is connected to GND.
Further, the watchdog circuit module comprises a resistor R67 and a timer U23; the pin WDO/of the watchdog circuit module is respectively connected with the pin TRIB of the timer U24, one end of the resistor R68 and one end of the capacitor C34; the other end of the resistor R67 is respectively connected with a pin RESET of the timer, a pin VCC on the timer, the other end of the resistor R68, the comparator circuit module and the power supply module; the pin GND/GND of the timer U23; the pin EN of the timer U23 is connected with the pin OUT of the timer U24; the pin WDI of the timer U23 is configured to receive the feeding signal; the pin VCC of the timer U23 is connected to the other end of the resistor R67.
Further, the comparator module comprises a resistor R65, a resistor R69 and a comparator U25; the pin GND of the comparator U25 is connected with GND, and the pin In2+ of the comparator is connected with a +3.3V circuit signal; the pin IN2 of the comparator U25 is respectively connected with the pin TRIB of the timer U24 and the pin WDO/-of the timer U23; the pin OUT2 of the comparator U25 is connected with one end of the resistor R69, and the other end of the resistor R69 is connected with the power supply module; the pin VCC of the comparator U25 is respectively connected with the pin VCC of the timer U24, the pin RESET of the timer U24, the pin VCC of the timer U23 and the power supply module; the pin OUT2 of the comparator U25 is also connected with one end of a resistor R65, and the other end of the resistor R65 is connected with GND.
The power supply module comprises a resistor R70, a polar capacitor C35, a triode Q7 and a MOS tube Q1; the base electrode of the triode Q7 is connected with the other end of the resistor R69, and the collector electrode of the triode Q7 is connected with GND; the emitter of the triode Q7 is connected with one end of the resistor R70, one end of the resistor R70 is connected with one end of the polar capacitor C35, and the other end of the capacitor C35 is connected with GND; the emitter of the triode Q7 is also connected with the grid electrode of the MOS tube; the source electrode of the MOS tube Q1 is connected with one end of a polar capacitor C35, and the source electrode of the MOS tube Q1 is also respectively connected with a pin VCC of the timer U24, a pin RESET of the timer U24, the other end of the resistor R68, a pin VCC of the timer U23 and a pin VCC of the comparator U25; and the drain electrode of the MOS tube Q1 is connected with the equipment module. GND is GND.
The model of the timer U24 is NE555, and the model of the timer U23 is STWD100 YYYWY 3F.
As shown in fig. 3, a power supply method of a power supply system based on a hardware watchdog includes the steps of:
s01, at the moment of system power-on, the power-on reset starting circuit module sends a trigger signal to the timer module to start the timer module, and the equipment module continuously sends a dog feeding signal to the watchdog circuit module; the OUT pin of timer U24 of the timer module sends a high signal to timer U23. The OUT pin of the timer U24 remains high for the time T set by the resistor R66 and the capacitor C32.
S02, within T seconds, the timer module shields the function of the watchdog circuit module, and the watchdog circuit module continuously sends a high-level trigger signal to the comparator circuit module;
under the condition that the IN 2-pin of the comparator U25 is at a high level, the circuits of the triode Q7 and the MOS tube Q1 are conducted, and the power supply system supplies power normally.
Specifically, the conditions for the output pin WDO of the watchdog circuit IC timer U23 to output a high level are:
1) When the function of the watchdog circuit module is shielded, the pin WDO of the timer U23 always outputs a high level, and the function of shielding the watchdog circuit module at the moment of power-on mainly aims at normal power supply of a power supply system and normal work.
2) When the function of the watchdog circuit module is not shielded, the equipment module continuously sends a watchdog feeding signal to the watchdog circuit module within 1.6S, the pin WDO of the timer U23 always outputs a high level, and the power supply system can work normally.
S03, after T seconds, the watchdog circuit module works normally, and the watchdog circuit module sends a trigger level signal to the comparator circuit module;
s04, the comparator circuit module judges whether the trigger level signal is of a low level, if so, the comparator circuit module sends a power-off signal to the circuit module, and the power supply of the power supply system is interrupted; if the power supply is at a high level, the power supply of the power supply system is normal. Specifically, in step S03, the watchdog circuit module starts timing at the T second, and if the watchdog circuit module does not receive the watchdog feeding signal sent by the system device module after 1.6S, the power supply system is also powered off.
When the equipment module does not send a dog feeding signal to the watchdog circuit module or stops sending the dog feeding signal after 1.6 seconds, the pin WDO of the timer U23 can send a low-level pulse, the connection of the triode Q7 and the MOS tube Q1 is cut off, and the equipment module is powered off; the low level pulse of pin WDO of timer U23 can trigger the timer circuit module at this time, and the function of the watchdog circuit module is masked again, where time T is to allow more time to ensure that the CPU is fully started and sends a watchdog signal or enough time is available to complete the system software burn.
More specifically, the delay time set when the system is powered up is different from 1.6S of the watchdog timer U23, 1.6S is the time identified by the timer U23 itself, when the watchdog IC is not shielded by the timer circuit module, the watchdog circuit module determines the received pulse time, no pulse is received in 1.6S, the output pin WDO of the timer U23 will send out a low level trigger, if no circuit of the timer is present, the output of the watchdog will output a high level after 1.6S, the system will normally supply power, and no system device signal is received in the following 1.6S, the watchdog will send out a low level power-off again, and the start time when the device with the operating system or the software is burned will be greater than 1.6S mostly, which will cause the system to restart continuously. The invention aims to introduce a timing circuit to ensure the system to work.
More specifically, when the pin TRIB of the timer U24 generates a low level signal and the pin OUT of the timer U24 is triggered to generate a high level signal, the pin WDO/of the watchdog chip timer U23 always keeps high level, which is the same as the pin EN/signal of the timer U23. After the pin WDO/output signal of the timer U23 passes through the comparator circuit module, the pin OUT2 of the comparator U25 outputs a low-level signal, so that the power circuit of the power module is kept in a conductive normal power supply state.
After the timing time t=1.1r66×c32, the pin OUT of the timer U24 outputs a low level signal and keeps, the watchdog timer U23 is activated to work, when the watchdog circuit module works normally, the pin WDO/output of the timer U23 is high level, and when the pin WDI input signal of the watchdog circuit module is abnormal, that is, the watchdog circuit module does not receive the feeding signal sent by the device module, the pin WDO/output of the timer U23 is low level pulse, the whole power supply of the device module is cut off, and the power-up is restarted. This ensures that the entire system crashes due to any software or hardware failure.
Specifically, the functions of each circuit module are as follows:
power-on reset starting circuit module: the TRIB pin comprises a resistor R68 and a capacitor C34, and is used for outputting a low-level pulse at the moment of power-on to trigger a timer module. The output terminal changes from low level to high level due to the charging of the capacitor C34 at the instant after the output terminal of the power-on reset starting circuit module outputs the low level pulse.
A timer module: the timer U24 adopts an NE555 timer IC, and a pin TRIB of an input end is connected with a pin WDO of the watchdog circuit module and the power-on reset starting circuit module. When pin TRIB receives a low level pulse signal, pin OUT of timer U24 triggers to high level pulse, and the retention time of the high level pulse is determined by the internal charge-discharge and comparator circuit module of NE 555.
T=1.1×r66×c32, and after the high level passes time T seconds, the output becomes low level.
Watchdog circuit module: a main IC (U23) of the hardware watchdog circuit is STWD100YNYWY3F of ST company, the main function of the watchdog circuit is that a pin WDI input pin receives an external (equipment module) pulse signal, the maximum pulse interval is 1.6S, and when the input end exceeds 1.6S and the pin WDI has no pulse signal, the input signal is abnormal. The output WDO/pin of the watchdog IC (timer U23) changes from high to low at this time.
Pin EN is the enable terminal of the IC (of timer U23) and is active when a high level is input. The low level shields the watchdog IC function, i.e., the pin WDO/will remain high regardless of the pulse signal input on pin WDI.
Comparator circuit module: comprising a comparator U25, the pin in2+ (input) of said comparator U25 being a voltage signal of 3.3V. Pin IN 2-is connected to the output of the power-on reset initiation circuit block, i.e. one end of capacitor C34, the input of the timer block (pin trim), the output of the watchdog circuit block (WDO /). When the pin IN 2-is a high level signal, the output OUT2 of the comparator U25 is a low level signal, the triode Q7 and the MOS tube Q1 are conducted, and the equipment module supplies power normally. When the pin IN 2-is a low level signal, the output end OUT2 is high level, the triode Q7 and the MOS tube Q1 are turned off, and the power supply of the equipment module is disconnected.
And a power supply module: the system comprises a triode Q7 with a P channel, wherein the MOS transistors Q1 and +A5V are external power supplies of the system, and when the MOS transistor Q1 and the triode Q7 are conducted, power supplies are provided for system equipment.
The beneficial effects of the invention are as follows: the function of the watchdog circuit module is started after the CPU burns the program by setting the time for shielding the function of the watchdog circuit module, so that the trouble caused by software burning during mass production of products is reduced.
The foregoing is a further detailed description of the invention in connection with the preferred embodiments, and it is not intended that the invention be limited to the specific embodiments described. It will be apparent to those skilled in the art that several simple deductions or substitutions may be made without departing from the spirit of the invention, and these should be considered to be within the scope of the invention.
Claims (4)
1. The power supply system based on the hardware watchdog is characterized by comprising an equipment module, a power supply module, a watchdog circuit module, a power-on reset starting circuit module, a comparator circuit module and a timer circuit module; the power module is electrically connected with the equipment module, the watchdog circuit module, the power-on reset starting circuit module, the comparator circuit module and the timer circuit module, the equipment module is connected with the watchdog circuit module, and the comparator circuit module is respectively connected with the watchdog circuit module, the power-on reset starting circuit module and the timer circuit module; the timer circuit module is respectively connected with the power-on reset starting circuit module and the watchdog circuit module;
the power supply module is used for supplying power to the power supply system;
the watchdog circuit module is used for preventing the system from dead circulation;
the timer circuit module is used for shielding the function t seconds of the watchdog circuit module at the moment of system power-on;
the power-on reset starting circuit module is used for starting the function of the timer circuit module at the moment of system power-on;
the comparator circuit module is used for controlling the switching state of the power supply module;
the equipment module is used for sending a dog feeding signal to the watchdog circuit module;
the timer circuit module comprises a resistor R66, a capacitor C32, a capacitor C33 and a timer U24; the GND pin of the timer U24 is connected with GND; the pin TRIB of the timer U24 is respectively connected with the power-on reset starting circuit module and the watchdog circuit module; the pin OUT of the timer U24 is connected with the watchdog circuit module;
one end of the resistor R66 is respectively connected with a pin DISCHG, a pin THOLD of the timer U24 and one end of the capacitor C32, and the other end of the resistor R66 is connected with a pin VCC of the timer U24; the other end of the capacitor C32 is connected with one end of the capacitor C33 and GND respectively, and the other end of the capacitor C33 is connected with a pin CVOLT of the timer U23;
the comparator circuit module comprises a resistor R65, a resistor R69 and a comparator U25; the GND pin of the comparator U25 is connected with GND, and the pin IN < 2+ > of the comparator is connected with the power supply module; the pin IN2 of the comparator U25 is respectively connected with the pin TRIB of the timer U24 and the pin WDO/-of the timer U23; the pin OUT2 of the comparator U25 is connected with one end of the resistor R69, the pin OUT2 of the comparator U25 is also connected with one end of the resistor R65, and the other end of the resistor R69 is connected with the power supply module; the pin VCC of the comparator U25 is respectively connected with the pin VCC of the timer U24, the pin RESET of the timer U24, the pin VCC of the timer U23 and the power supply module; the other end of the resistor R65 is connected with GND;
the power supply module comprises a resistor R70, a polar capacitor C35, a triode Q7 and a MOS tube Q1; the base electrode of the triode Q7 is connected with the other end of the resistor R69, and the collector electrode of the triode Q7 is connected with GND; the emitter of the triode Q7 is connected with one end of the resistor R70, one end of the resistor R70 is connected with one end of the polar capacitor C35, and the other end of the capacitor C35 is connected with GND; the emitter of the triode Q7 is also connected with the grid electrode of the MOS tube; the source electrode of the MOS tube Q1 is connected with one end of a polar capacitor C35, and the source electrode of the MOS tube Q1 is also respectively connected with a pin VCC of the timer U24, a pin RESET of the timer U24, the other end of the resistor R68, a pin VCC of the timer U23 and a pin VCC of the comparator U25; the drain electrode of the MOS tube Q1 is connected with the equipment module;
at the moment of system power-on, in the time T set by the resistor R66 and the capacitor C32, the pin OUT of the timer U24 always keeps high level, the pin OUT2 of the comparator U25 outputs a low level signal, and the power circuit of the power module keeps a normal power supply state; t is a delay time set when the system is powered on, t=1.1×resistor R66×capacitor C32;
after the delay time T, the pin OUT of the timer U24 outputs a low-level signal and keeps the low-level signal, the IN 2-pin of the comparator U25 is high-level, the triode Q7 and the MOS tube Q1 are conducted, and the power supply system supplies power normally;
the power-on reset starting circuit module comprises a resistor R68 and a capacitor C34, wherein one end of the resistor R68 is respectively connected with a pin TRIB of the timer U24 and the watchdog circuit module, one end of the resistor R68 is connected with one end of the capacitor C34, and the other end of the capacitor C34 is connected with GND;
the watchdog circuit module comprises a resistor R67 and a timer U23; the pin WDO of the watchdog circuit module is respectively connected with the pin TRIB of the timer U24, one end of the resistor R68 and one end of the capacitor C34; one end of the resistor R67 is respectively connected with a pin RESET of the timer, a pin VCC on the timer, the other end of the resistor R68, the comparator circuit module and the power supply module; the GND pin of the timer U23 is connected with GND; the pin EN of the timer U23 is connected with the pin OUT of the timer U24; the pin WDI of the timer U23 is configured to receive the feeding signal; the pin VCC of the timer U23 is connected to the other end of the resistor R67.
2. The hardware watchdog-based power supply system of claim 1, wherein the timer U24 is of a model NE555 and the timer U23 is of a model STWD100YNYWY3F.
3. A power supply method of a hardware watchdog-based power supply system, for controlling the hardware watchdog-based power supply system according to claim 2, comprising the steps of:
s01, at the moment of system power-on, the power-on reset starting circuit module sends a trigger signal to the timer circuit module to start the timer circuit module, and the equipment module continuously sends a dog feeding signal to the watchdog circuit module;
s02, within T seconds, the timer circuit module shields the function of the watchdog circuit module, and the watchdog circuit module continuously sends a high-level trigger signal to the comparator circuit module;
s03, after T seconds, the watchdog circuit module works normally, and the watchdog circuit module sends a trigger level signal to the comparator circuit module;
s04, the comparator circuit module judges whether the trigger level signal is of a low level, if so, the comparator circuit module sends a power-off signal to the circuit module, and the power supply of the power supply system is interrupted; if the power supply is at a high level, the power supply of the power supply system is normal.
4. The method for supplying power to a power supply system based on a hardware watchdog according to claim 3, wherein in step S03, the watchdog circuit module starts timing at the T-th second, and if after 1.6S, the watchdog circuit module does not receive a watchdog feeding signal sent by the system device module, the power supply system is powered off.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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| CN107463460A (en) | 2017-12-12 |
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