CN106486169B - A kind of method for deleting of Nand Flash - Google Patents
A kind of method for deleting of Nand Flash Download PDFInfo
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- CN106486169B CN106486169B CN201510523195.2A CN201510523195A CN106486169B CN 106486169 B CN106486169 B CN 106486169B CN 201510523195 A CN201510523195 A CN 201510523195A CN 106486169 B CN106486169 B CN 106486169B
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Abstract
The invention discloses the method for deleting of Nand Flash a kind of, comprising: S101, carries out soft-erase operation to erasing block；Whether storage unit meets erased conditions in S102, the verification erasing block；If storage unit meets erased conditions in S103, the erasing block, terminate erasing operation；It is no to then follow the steps S104；S104, it is applied to the current erasure voltage for wiping block to set step value lifting, erasing operation is carried out to the erasing block, later return step S102.Method for deleting provided by the invention can reduce the charge trap in erase process in Nand Flash storage unit, alleviate the offset of storage unit threshold voltage, to slow down the erasing decline of Nand Flash, increase its erasing times and then prolong its service life.
Description
Technical field
The present invention relates to hardware of memory device technical field more particularly to a kind of method for deleting of Nand Flash.
Background technique
Nand Flash is one kind of Flash memory, belongs to non-volatile memory device (Non-volatile Memory
Device), internal to use non-linear macroelement mode, have many advantages, such as that capacity is big, rewriting speed is fast, is suitable for mass data
Storage.Fig. 1 is an easy structure figure of Nand Flash in the prior art, is selected by memory cell array 11, wordline single
First 12, the control unit 15 of bit line selecting unit 13, voltage pump 14 and entire Nand Flash chip forms, wherein storage
Cell array 11 includes storage unit, and wordline and bit lines based on each storage unit form.Specifically, storage unit is first
First page is formed, and by multiple pages of blockings, finally forms a Nand Flash's by multiple pieces with wordline, bit line connection respectively
Memory cell array 11.Operation to Nand Flash includes three parts: erasing operation, programming (write operation) and read operation,
Erasing operation is wherein carried out in blocks, is programmed as unit of page and read operation.
In Nand Flash, a storage unit can see a metal oxide semiconductcor field effect transistor as
(Metal-Oxide-Semiconductor Field-Effect Transistor,MOSFET).Fig. 2 is a kind of common
MOSFET structure figure, including grid 20, source electrode 21, drain electrode 22, P-type silicon semiconductor substrate 23 and tunnel oxide 24.Its phase
Connection between mutually are as follows: P-type silicon semiconductor substrate 23 diffuses out two N-type regions, covers one layer of tunnel above P-type silicon semiconductor substrate 23
Oxide layer 24 is worn, is finally made into two holes with the method for corrosion above N-type region, is distinguished on the insulating layer with the method for metallization
And three electrodes are made into two holes: grid 20, source electrode 21 and drain electrode 22, source electrode 21 and drain electrode 22 respectively correspond two N-type regions
And grid 20 is the wordline of storage unit, drain electrode 22 is the bit line of storage unit.Further, grid 20 includes control grid again
201, polysilicon interlayer dielectric 202 (Inter Poly Dielectric, IPD), floating grid 203, and floating grid 203
Store charge.In a storage unit, if the setting voltage (such as read voltage) of control grid 201 is greater than floating grid 203
Middle storage charge threshold voltage, then show that storage unit is in the conductive state, and state of memory cells is 1 at this time；If control gate
The setting voltage (such as read voltage) of pole 201, which is less than in floating grid 203, stores charge threshold voltage, then shows that storage unit is in
Not on-state, state of memory cells is 0 at this time.
In Nand Flash, erasing and programming operation to Nand Flash are by erasing block or programmed page
Apply the threshold voltage realization of relevant voltage change storage unit floating grid 203.The threshold value of storage unit floating grid 203
Voltage, which changes, can influence the change of state of memory cells, it should be noted that erase and program operations be it is opposed, it is existing
The erasing pulse or programming pulse that erasing or operation scheme for programming, primary erasing or programming process apply are fixed and invariable.Base
In existing programmed and erased method, in programming operation, some electronics are during being tunneling to floating grid without enough energy
Floating grid 203 is reached, but is fallen into tunnel oxide 24, these fall into tunnel oxide 24 when carrying out erasing operation
Electronics can not be moved in half conductive substrate 23 of p-type by high pressure erasing from tunnel oxide 24.With programmed and erased time
Several increases, the electronics being trapped in tunnel oxide 24 is more and more, and the electronics that can be migrated by erasing operation is got over
Come fewer, lead to the offset of storage unit threshold voltage in erase process, make programmed threshold voltage and wipes the tune of threshold voltage
It is smaller and smaller to save window, reduces Nand Flash erasing times, and then shorten the service life of Nand Flash memory.
Summary of the invention
In view of this, the embodiment of the present invention provides the method for deleting of Nand Flash a kind of, to extend in Nand Flash
The service life deposited.
The embodiment of the invention provides the method for deleting of Nand-Flash a kind of, comprising:
S101, soft-erase operation is carried out to erasing block；
Whether storage unit meets erased conditions in S102, the verification erasing block；
If storage unit meets erased conditions in S103, the erasing block, terminate erasing operation；It is no to then follow the steps
S104；
S104, it is applied to the current erasure voltage for wiping block to set step value lifting, the erasing block is carried out
Erasing operation, later return step S102.
Further, described pair of erasing block carries out soft-erase operation, comprising:
A, apply initial soft-erase voltage for erasing block, and persistently press within a preset time；
B, it is lifted current soft-erase voltage to set voltage increment value, equally persistently pressed in the preset time；
If c, current soft-erase voltage value does not reach preset voltage value, repeatedly step b.
Further, before described pair of erasing block progress soft-erase operation, further includes:
The memory block to be wiped, note are chosen by wordline selection and bit line selection based on the control unit in Nand Flash
To wipe block.
Further, described to apply initial soft-erase voltage for erasing block, and persistently press within a preset time, comprising:
Apply initial soft-erase voltage to the erasing block by the voltage pump in Nand Flash, and within a preset time
Continued from voltage pump to erasing block pressure, the initial soft-erase voltage is in 5V or so, and the range of the preset time is in 10 μ s
~150 μ s.
Further, the range of the preset voltage value is set in 12V~15V.
It is further, described to be lifted current soft-erase voltage to set voltage increment value, comprising:
Regulate and control voltage pump by the control unit in Nand Flash to set the voltage increment value lifting erasing block and apply
The current soft-erase voltage added.
It is further, described to set the current erasure voltage that step value lifting is applied to the erasing block, comprising:
Regulate and control voltage pump by the control unit in Nand Flash to set step value lifting and be applied to the erasing block
Current erasure voltage.
Further, the erase status of the storage unit refers to that the calibration voltage in the storage unit control grid is greater than
The current threshold voltage of the storage unit.
The method for deleting of a kind of Nand Flash provided in an embodiment of the present invention, when carrying out erasing operation first to erasing
Block carries out soft-erase operation, if after having carried out soft-erase operation, wiping storage unit in block and erase status not being fully achieved yet,
It is then recycled again to it and applies erasing voltage and be gradually lifted erasing voltage in each cycle.This method can reduce erase process
Charge trap in middle Nand Flash storage unit alleviates the offset of storage unit threshold voltage, to slow down Nand
The erasing of Flash is failed, and is increased its erasing times and then is prolonged its service life.
Detailed description of the invention
Fig. 1 is the easy structure figure of Nand Flash；
Fig. 2 is a kind of structure of the metal oxide semiconductcor field effect transistor as storage unit in Nand Flash
Figure；
Fig. 3 is a kind of flow chart of the method for deleting for Nand Flash that the embodiment of the present invention one provides；
Fig. 4 is a kind of flow chart of the method for deleting of Nand Flash provided by Embodiment 2 of the present invention.
Specific embodiment
The present invention is described in further detail with reference to the accompanying drawings and examples.It is understood that this place is retouched
The specific embodiment stated is used only for explaining the present invention rather than limiting the invention.It also should be noted that in order to just
In description, only some but not all contents related to the present invention are shown in the drawings.
Embodiment one
Fig. 3 is a kind of flow chart for the method for deleting of Nand Flash that the embodiment of the present invention one provides, this method by
Nand Flash is executed, and is a kind of improvement to existing method for deleting, as shown in figure 3, this method comprises:
Step S101, soft-erase operation is carried out to erasing block.
In the present embodiment, the erasing block is concretely used for erasing operation in the memory cell array of Nand Flash
A memory cell block.The erasing operation is carried out as unit of memory cell block, the storage unit of the Nand Flash
Array is made of multiple memory cell blocks, and the memory cell block is made of multiple storage unit pages, the storage unit page by
Multiple storage units are formed with ranks connection.In a storage unit page, every row is connected by multiple storage units with wordline, often
Column are connected by multiple storage units with bit line, and a storage unit page shares a wordline, a memory cell block shared one
Root bit line.
Illustratively, in single layer cell (Single-Level Cell, SLC) Nand that a memory size is 8GB
In Flash particle, a storage unit page includes the main memory area of 4KB and the shared region of 0.125KB, and a memory block is by 64
The main memory area of memory page composition, i.e., one memory block is 256KB, and shared region 8KB, a Nand Flash particle is by 4096
Memory cell block composition, it is about 8GB that memory size, which is total up to 8448MB,.
In the present embodiment, two parts can be divided into the improvement of existing erasing operation: soft-erase operation and circulation erasing behaviour
Make, so that erasing block is reached erase status when soft-erase operates, then carry out circulation erasing operation.In existing erasing operation,
It is initially that erasing block directly applies a higher initial erasing voltage value, falls into the electronics of tunnel oxide at this time in the height applied
It cannot smoothly be moved in half conductive substrate of p-type under erasing voltage value, thereby result in the offset of storage unit threshold voltage.
The soft-erase operation can regard a part improved to existing erasing operation as.The soft wiping that the present embodiment proposes
Concretely except operation: first applying lower initial erasing voltage value for erasing block, and be slowly increased erasing voltage, and increased
Erasing voltage is finally not more than the initial erasing voltage value in existing erasing operation.Erasing block can have by soft-erase operation
Effect reduces the electronics of the delay in tunnel oxide.
Whether storage unit meets erased conditions in S102, the verification erasing block.
In the present embodiment, the course of work of Nand Flash includes programming operation, erasing operation etc., these operations are usual
It is realized with judging whether the current state of storage unit changes, the change of the storage unit current state is based primarily upon storage
How much the charge of floating grid judges in unit, i.e., is sentenced according to the size of the threshold voltage of storage unit and setting voltage
It is disconnected, if the threshold voltage of storage unit is less than setting voltage, illustrate that the state of storage unit is 0, in wanting erase status,
If the threshold voltage of storage unit is greater than setting voltage, illustrates that the state of storage unit is 1, be in programmable state.
In the present embodiment, after the soft-erase operation for executing the step S101, first the erasing block can be verified,
Judge that whether storage unit meets erased conditions in the erasing block, and in Nand Flash, it is specific to meet the erased conditions
The threshold value that can refer to most storage units in erasing block below wipes calibration voltage, does not reach the storage list of erase status
The ability that first number is less than error checking and correct algorithm (Error Correcting Code, ECC) can be corrected, the ECC
It is the technology that one kind can be realized " error checking and correction ", ECC memory is exactly the memory for applying this technology, general to answer more
With on server and graphics workstation, this will make entire computer system more tend to safety and stability at work.
If storage unit meets erased conditions in S103, the erasing block, terminate erasing operation；It is no to then follow the steps
S104；
In the present embodiment, if the soft-erase operation for only carrying out step S101 to erasing block can make the storage for wiping block
Unit reaches erased conditions, then not needing to execute following step, but the erasing operation of Nand Flash is often a circulation
Process, only carrying out soft-erase operation possibly can not make the state of memory cells for wiping block reach 1 and then meet erased conditions, need
Further progress circulation erasing.
Illustratively, it if the current state in the erasing block in storage unit is not meet erased conditions, that is, stores
The current state of unit is not 1, need to just execute step S104 and carry out circulation erasing operation；If storage unit in the erasing block
In current state be erase status, then show to complete erasing operation, erasing operation can be terminated.If should be noted that into
It is not over erasing operation after the operation of row soft-erase, it is soft that the current erasure voltage of erasing block is applied to when starting step S104
Erasing voltage at the end of erasing operation.
S104, it is applied to the current erasure voltage for wiping block to set step value lifting, the erasing block is carried out
Erasing operation, later return step S102.
In the present embodiment, in two stages, the stage one refers specifically to the current erasure voltage: after soft-erase operates,
The soft-erase voltage that the erasing block applies, stage two refer specifically to: in circulation erasing, applying after executing step S102 and S103 again
The erasing voltage being added on erasing block.
In the present embodiment, since erase process is to store charge in storage unit floating grid to serve as a contrast to P-type silicon semiconductor
The process of the mobile change threshold voltage at bottom, if the storage unit for wiping block after soft-erase operation does not reach erase status,
In order to reduce the charge trap in erase process in Nand Flash storage unit, the present embodiment is primary circulation erasing operation
In erasing operation, using the strategy for being gradually lifted erasing voltage, the current erasure voltage is to set step value lifting.
Further, voltage pump can be regulated and controled by the control unit in Nand Flash to be applied to set step value lifting
The current erasure voltage of the erasing block.
In the present embodiment, the variation range of the step value is generally in 0.1V~2V, the stepping described in erasing operation
It is worth the setting of size depending on the concrete condition of Nand Flash chip.
Its erase process is divided into soft-erase behaviour by a kind of method for deleting for Nand Flash that the embodiment of the present invention one provides
Make and following cycle erasing operation.Soft-erase operation is carried out for erasing block first, if wiped in block after completing soft-erase operation
Storage unit still not fully achieved erase status, then recycles again to it and apply erasing voltage and in each cycle gradually lifting wiping
Except voltage.Method for deleting based on the embodiment of the present invention, NandFlash can weaken the effect that charge trap is generated in erase process
It answers, so that the threshold voltage of floating grid be altered in steps, the storage unit in block to be wiped is made to progressively reach erase status, alleviate
The problem of threshold window deviates in erase process and programming process, it is possible thereby to increase the erasing times of Nand Flash, reaches
Extend the effect of Nand Flash service life.
Embodiment two
Fig. 4 is a kind of flow chart of the method for deleting of Nand Flash provided in an embodiment of the present invention, more than the present embodiment
It states and optimizes based on embodiment, be that erasing block carries out soft-erase operation optimization by step in the present embodiment are as follows: a, to wipe
Except block applies initial soft-erase voltage, and persistently press within a preset time；B, current soft wiping is lifted to set voltage increment value
Except voltage, equally persistently press in the preset time；If c, current soft-erase voltage value does not reach preset voltage value,
Then repeat step b.
Further, it is before erasing block applies initial soft-erase voltage, to also add step in step:
The memory block to be wiped, note are chosen by wordline selection and bit line selection based on the control unit in Nand Flash
To wipe block.
Correspondingly, the method for the present embodiment includes the following steps:
S201, the storage to be wiped is chosen by wordline selection and bit line selection based on the control unit in Nand Flash
Block is denoted as erasing block.
In the present embodiment, the reading, programming of entire Nand Flash, erasing operation are realized by described control unit
, in the erasing operation of Nand Flash, selected erasing block is needed before carrying out erasing operation, the erasing block is by control unit
The memory block to be wiped is chosen by addressing according to its logical address by wordline selecting unit and bit line selecting unit.
S202, apply initial soft-erase voltage for erasing block, and persistently press within a preset time.
In the present embodiment, the control gate for applying initial soft-erase voltage and concretely wiping block in Nand Flash
It is extreme to apply low pressure, apply positive high voltage in the p-well that P-type silicon semiconductor is formed, to make charge in floating grid to P-type silicon
It is moved in semiconductor substrate.Preferably, the low pressure applied in the control gate terminal of erasing block is less than 1V, applies in the p-well
The positive high voltage added is not more than 5V.
Further, initial soft-erase voltage can be applied to the erasing block by the voltage pump in Nand Flash, and
Continued within a preset time from voltage pump to erasing block pressure, the initial soft-erase voltage is in 5V or so, the preset time
Range in 10 μ of μ s~150 s.
S203, it is lifted current soft-erase voltage to set voltage increment value, equally persistently pressed in the preset time.
In the present embodiment, the voltage increment value that sets is a fixed value, i.e., the soft-erase voltage value being lifted every time is not
Become, it is preferred that the scope control of the voltage increment value is in 0.5V~1.5V.The current soft-erase voltage of lifting is easy to deposit
Movement of the charge to P-type silicon semiconductor substrate in storage unit floating grid.
Further, voltage pump can be regulated and controled by the control unit in Nand Flash and is lifted institute to set voltage increment value
State the current soft-erase voltage that erasing block applies.
S204, judge whether current soft-erase voltage value reaches preset voltage value, if so, thening follow the steps S205；If it is not,
Then return step S203.
In the present embodiment, the soft-erase voltage that soft-erase operation applies for erasing block there are the restriction of voltage value,
Compared with existing erasing operation, the peak of the soft-erase voltage cannot be greater than in existing erasing operation for erasing block application
Initial voltage, therefore the soft-erase can be operated to the pre- erasing operation before being interpreted as circulation erasing.Generally, existing erasing behaviour
In work, the initial voltage value applied is usually 12V~15V or so.
Further, the range of the preset voltage value is set in 12V~15V.
S205, judge whether storage unit meets erased conditions in the erasing block, if it is not, thening follow the steps S206；If
It is to then follow the steps S207.
In the present embodiment, the verification for whether meeting erased conditions to storage unit in the erasing block passes through Nand
The control unit of Flash executes.
Further, the erase status of the storage unit refers to that the calibration voltage in the storage unit control grid is greater than
The current threshold voltage of the storage unit.
In the present embodiment, the voltage that sets in the storage unit control grid illustratively can as a specific voltage
To apply read voltage to control grid.The setting voltage is used for compared with floating grid threshold voltage, works as threshold voltage value
When less than setting voltage, the state of storage unit is 1, shows that the storage unit reaches erase status.
S206, it is applied to the current erasure voltage for wiping block to set step value lifting, the erasing block is carried out
Erasing operation, later return step S204.
In the present embodiment, the variation range of the step value is generally in 0.1V~2V, the stepping described in erasing operation
It is worth the setting of size depending on the concrete condition of Nand Flash chip.In each erasing operation of circulation erasing, stepping
Value be it is transformable, the amplitude of variation of the step value is unlimited, it is preferred that is set as increasing every time by the amplitude of variation of step value
1V.Lifting erasing voltage is capable of increasing storage moving number of the charge to P-type silicon semiconductor substrate in storage unit floating grid,
Faster change threshold voltage, accelerates storage unit and reach the speed of erase status, to complete erasing operation as early as possible.
S207, terminate erasing operation.
In the present embodiment, if storage unit meets erased conditions in the erasing block, show to complete Nand
The erasing operation that erasing block is chosen in Flash, to terminate erasing operation.
The method for deleting of Nand Flash provided by Embodiment 2 of the present invention a kind of, is to the excellent of the embodiment of the present invention one
Change, soft-erase operation will be carried out first for erasing block and be embodied as applying initial soft-erase voltage, whether judge soft-erase voltage
Reach and pre-set, if reaching preset value, otherwise the operation after then carrying out is lifted soft-erase with certain voltage incremental value
Voltage；Meanwhile before applying initial soft-erase voltage for erasing block, step is increased based on the control list in Nand Flash
Member chooses the memory block to be wiped by wordline selection and bit line selection.Method for deleting based on the embodiment of the present invention, by holding
The operation of row soft-erase and circulation erasing operation later can effectively weaken generation charge in Nand Flash erase process and fall into
Trap alleviates the problem of threshold window deviates in erase process and programming process, thus increases the erasing times of Nand Flash, reaches
To the effect for extending Nand Flash service life.
Note that the above is only a better embodiment of the present invention and the applied technical principle.It will be appreciated by those skilled in the art that
The invention is not limited to the specific embodiments described herein, be able to carry out for a person skilled in the art it is various it is apparent variation,
It readjusts and substitutes without departing from protection scope of the present invention.Therefore, although being carried out by above embodiments to the present invention
It is described in further detail, but the present invention is not limited to the above embodiments only, without departing from the inventive concept, also
It may include more other equivalent embodiments, and the scope of the invention is determined by the scope of the appended claims.
Claims (7)
1. a kind of method for deleting of Nand Flash characterized by comprising
S101, soft-erase operation is carried out to erasing block, comprising:
A, apply initial soft-erase voltage for erasing block, and persistently press within a preset time；
B, it is lifted current soft-erase voltage to set voltage increment value, equally persistently pressed in the preset time；
If c, current soft-erase voltage value does not reach preset voltage value, repeatedly step b；
Whether storage unit meets erased conditions in S102, the verification erasing block, comprising: does not reach erasing shape in erasing block
The ability that the storage unit number of state is less than error checking and correct algorithm can be corrected；
If storage unit meets erased conditions in S103, the erasing block, terminate erasing operation；It is no to then follow the steps
S104；
S104, it is applied to the current erasure voltage for wiping block to set step value lifting, the erasing block is wiped
It operates, later return step S102；Wherein, step value is transformable, and the variation range of step value is 0.1V~2V, described to work as
Preceding erasing voltage is the erasing voltage at the end of soft-erase operation.
2. the method according to claim 1, wherein also being wrapped before described pair of erasing block carries out soft-erase operation
It includes:
The memory block to be wiped is chosen by wordline selection and bit line selection based on the control unit in Nand Flash, is denoted as wiping
Except block.
3. the method according to claim 1, wherein described apply initial soft-erase voltage for erasing block, and
It persistently presses in preset time, comprising:
Apply initial soft-erase voltage to the erasing block by the voltage pump in Nand Flash, and within a preset time by electricity
Press pump continues to erasing block pressure, and the initial soft-erase voltage is in 5V or so, and the range of the preset time is in 10 s~150 μ
μs。
4. the method according to claim 1, wherein the range of the preset voltage value is set in 12V~15V.
5. the method according to claim 1, wherein described be lifted current soft-erase electricity to set voltage increment value
Pressure, comprising:
Regulate and control voltage pump by the control unit in Nand Flash to set voltage increment value and be lifted what the erasing block applied
Current soft-erase voltage.
6. the method according to claim 1, wherein described be applied to the erasing block to set step value lifting
Current erasure voltage, comprising:
Regulate and control voltage pump by the control unit in Nand Flash to set step value lifting and be applied to working as the erasing block
Preceding erasing voltage.
7. the method according to claim 1, wherein the erase status of the storage unit refers to the storage unit
It controls the calibration voltage in grid and is greater than the current threshold voltage of the storage unit.
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| JP6831080B2 (en) * | 2017-08-15 | 2021-02-17 | ケント ディスプレイズ インコーポレイテッド | Electronic writer that can be selectively erased by user adjustment |
| CN110838328B (en) * | 2018-08-17 | 2021-09-10 | 北京兆易创新科技股份有限公司 | Memory erasing method and system |
| CN110838329B (en) * | 2018-08-17 | 2022-04-01 | 北京兆易创新科技股份有限公司 | Memory erasing method and system |
| CN110838327A (en) * | 2018-08-17 | 2020-02-25 | 北京兆易创新科技股份有限公司 | Memory erasing method and system |
| US10892025B2 (en) | 2019-06-13 | 2021-01-12 | Western Digital Technologies, Inc. | Soft erase and programming of nonvolatile memory |
| CN110289038B (en) * | 2019-07-02 | 2021-05-07 | 珠海创飞芯科技有限公司 | Method for connecting bit line and sense amplifier of NAND flash memory, and sense amplifier |
| US11004525B1 (en) * | 2020-02-20 | 2021-05-11 | Sandisk Technologies Llc | Modulation of programming voltage during cycling |
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