CN106304317B - The compensation method of sleep awakening timing offset and electronic equipment - Google Patents
The compensation method of sleep awakening timing offset and electronic equipment Download PDFInfo
- Publication number
- CN106304317B CN106304317B CN201510355227.2A CN201510355227A CN106304317B CN 106304317 B CN106304317 B CN 106304317B CN 201510355227 A CN201510355227 A CN 201510355227A CN 106304317 B CN106304317 B CN 106304317B
- Authority
- CN
- China
- Prior art keywords
- timer
- sleep
- mode
- dormant
- moment
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 230000007958 sleep Effects 0.000 title claims abstract description 88
- 238000000034 method Methods 0.000 title claims abstract description 20
- 230000004617 sleep duration Effects 0.000 claims abstract description 22
- 230000002618 waking effect Effects 0.000 claims abstract description 10
- 238000004891 communication Methods 0.000 claims description 29
- 230000001360 synchronised effect Effects 0.000 claims description 8
- 238000004364 calculation method Methods 0.000 claims description 2
- 230000007774 longterm Effects 0.000 claims 1
- 230000008859 change Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000004458 analytical method Methods 0.000 description 2
- 238000001514 detection method Methods 0.000 description 2
- 230000005059 dormancy Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000000630 rising effect Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 238000011897 real-time detection Methods 0.000 description 1
- 238000005070 sampling Methods 0.000 description 1
- 230000000087 stabilizing effect Effects 0.000 description 1
- 230000002123 temporal effect Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04W—WIRELESS COMMUNICATION NETWORKS
- H04W56/00—Synchronisation arrangements
- H04W56/004—Synchronisation arrangements compensating for timing error of reception due to propagation delay
- H04W56/0045—Synchronisation arrangements compensating for timing error of reception due to propagation delay compensating for timing error by altering transmission time
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Mobile Radio Communication Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
- Electric Clocks (AREA)
Abstract
The invention discloses a kind of compensation method of sleep awakening timing offset and electronic equipments.In the present invention comprising the steps of: obtain the sleep duration that need to enter dormant first timer；Enter dormant time point T1 and sleep duration according to first timer, calculates the wake-up moment of first timer；Acquisition does not enter the time point T2 that dormant second timer is recorded when waking up first timer；According to the error of T2 and the wake-up moment calculated, the timing offset of first timer is adjusted.In present embodiment, based on one without passing through dormant second timer, pass through dormant first timer in the timing-compensation for the sleep timing error for waking up the moment to one to realize, caused by switching slow clock due to sleep after sleep awakening so as to avoid first timer the problem of timing offset, the offset issue of the auxiliary mode timers sleep awakening timing of system is efficiently solved.
Description
Technical field
The present invention relates to the communications fields, in particular to the compensation method of the sleep awakening timing offset in the communications field and electricity
Sub- equipment.
Background technique
In current communication system, in order to reduce the power consumption of chip, chip is generally in sleep state when not working.
After chip is switched to working condition from sleep state, terminal needs do temporal synchronous with base station.Timer is in work thus
As when provide two kinds of operating modes, normal count mode and slow Timer modes.Under normal count mode, timer is originally
The sampling clock (being generated by fast clock division) of mode counts, for GSM mode, count frequency 1.08MHz, for TD mould
Formula, count frequency are 1/8 chip, i.e. 10.24MHz, for TD-LTE and LTE fdd mode, count frequency 30.72MHz.
Under slow Timer modes, slow timer counts (clock generally uses 32.768KHz) with Slow Clock, no matter which kind of mode.
When chip works normally, this can be arranged when some mode enters low power consumpting state in normal count mode in runs
Mode timers worked in the time of slow Timer modes, timer were then switched to slow Timer modes, when all timings
Device all works in slow Timer modes, and other need the module of fast clock chip can enter at this time not at work
Sleep, and when reaching the wakeup time of setting, sleep awakening operation can be issued, chip will be waken up, and then timer can
Automatically switch to normal count mode.Because hardware can compensate slow clock jitter automatically, by taking TD timer as an example, from normal meter
When digital modeling is switched to slow Timer modes, timer is counted always, will timing when the rising edge of a slow clock arrives
The current count value of device passes to slow timer, while timer stops counting, and runs are in slow Timer modes at this time,
The counting clock of slow timer is 32.768KHz, is not count value to be added to 1, but add 312.5 in each clock cycle
(is equal to for the 32.768KHz clock cycle of a standard 312.5 10.24MHz clock cycle, this value is calibrated by 32K
Module obtains, and can thus compensate the error of slow clock automatically by hardware).When setting timer switches from slow Timer modes
To after normal count mode, when the rising edge of slow clock arrives, slow timer stops counting, while by the whole of count value
Number part passes to timer, and timer continues to count, and runs are in normal count mode at this time.So timer this two
Kind mode can accomplish seamless switching, ensure that timer is still able to maintain and base station in chip after sleep in this way
Time synchronization information.When system sleep, only slow clock operation, but the precision and stability of slow clock crystal oscillator is limited, to guarantee
Synchronization time does not lose after sleep, needs to calibrate the Slow Clock with high speed stabilizing clock.By calculating specified number
The slow timer clock period in normal counter clock cycle number (value includes decimal), to obtain speed timer
Calibration value.Baseband chip can be according to the state (whether entering sleep state) of each mode timers, and whether each CPU enters
Sleep pattern, and other module (such as DMA:Direct Memory Access, HWA:Hardware Accelerator
Deng) whether enter idle state, to judge baseband chip and other modules (such as power module, radio-frequency module, audio-frequency module etc.),
Whether low-power consumption (being denoted as deep sleep) is entered.Under deep sleep, whole system close the fast clock of input, and with it is fast
It is electric under clock related function module, to achieve the purpose that deep power-saving.
As described above, having whether each mode timers enter sleep state in the condition of baseband chip sound sleep, also
It is to judge whether timer uses RTC (Real-Time Clock, generally using 32K clock) clock to count.One mode exists
When there is no task in certain period of time, need software that timer is switched to sleep pattern, until at the time of that contemplates that task point,
Timer automatically switches to working condition after counting expires.Timer in a sleep mode, is counted using RTC clock, although
Slow clock have passed through fast clock alignment, but there are problems that two here, influence whether determining for timer under sleep state
Shi Jingdu.First is that calibrating slow counter due to fast counter has certain calibration accuracy, the realization of general calibration circuit is
Using fixed-point computation, the loss of significance of certain calculating is certainly existed.In addition, timer is in a calibration process and in sleep procedure
The clock of RTC can change, this variation is especially sensitive to temperature change.It, just must be at two to guarantee high RTC precision
Aspect has higher requirement, first is that improving RTC calibrates circuit counting precision, will increase hard-wired complexity in this way；In addition,
The frequency for improving calibration increases the frequency of RTC calibration, this way can be to temperature especially when temperature change is very fast
The power consumption of degree detection, software controlling strategies and baseband chip has bigger influence.
For second aspect selective analysis, such mode has the disadvantage in that the influence due to temperature to RTC clock most
Greatly, therefore to reach preferable RTC effect is calibrated, increases temperature sensing circuit in usual board, real-time detection board is (especially
Around RTC) temperature change, when rate of temperature change reaches certain thresholding, just starting RTC calibration.Here certainly will increase
Temperature sensing circuit, and detection temperature bring power consumption.In addition, since the strategy of RTC calibration is relative complex, with terminal
Working condition, the process of protocol stack sofeware and the physical characteristic of terminal are related, especially the system in multi-mode and multi-standby (standby)
In, this calibration will be more complicated.The unstability that RTC is only eliminated by software starting calibration circuit, in practical application mistake
It is very difficult in journey.Again, RTC calibration module needs fast clock at work, when system reaches sleep condition
When, system originally can enter deep sleep modes, but since calibration circuit is working, whole system be caused to cannot be introduced into sound sleep.
The time usually to be worked due to RTC calibration module in hundred ms (millisecond) rank, so to the optimization of the power consumption of system be have it is very big
Influence.When having an access module in system in working condition, corresponding timer is work in normal count status, that
Even if the timer of other modes is switched to sleep state, whole system still not can enter deep sleep.Fast clock at this time
Existing, and with network be it is synchronous, precision is guaranteed.But the timer of non-operating mode has been switched at this time
Sleep pattern, then its time precision is just determined by the RTC clock precision after calibrating, then certainly existing in foregoing description
The loss of the accuracy of timekeeping of analysis.
Summary of the invention
The purpose of the present invention is to provide a kind of compensation method of sleep awakening timing offset and electronic equipments, avoid
The problem of one timer leads to timing offset due to the slow clock of sleep switching after sleep awakening, it is auxiliary to efficiently solve system
The offset issue of mode timers sleep awakening timing ensure that the timing of the timer by sleep and network time keep same
Step.
In order to solve the above technical problems, the present invention provides a kind of compensation method of sleep awakening timing offset, comprising with
Lower step: the sleep duration that need to enter dormant first timer is obtained；Entered according to first timer dormant
Time point T1 and sleep duration, calculate the wake-up moment of first timer；Acquisition does not enter dormant second timer and exists
The time point T2 recorded when waking up first timer；According to the error of T2 and the wake-up moment calculated, first timer is adjusted
Timing offset.
The present invention also provides a kind of electronic equipment, include: sleep duration obtains module, need to enter sleep shape for obtaining
The sleep duration of the first timer of state；Computing module, for according to first timer enter dormant time point T1 and
Sleep duration, calculates the wake-up moment of first timer；Time point obtains module, does not enter dormant second for obtaining
The time point T2 that timer is recorded when waking up first timer；Module is adjusted, for according to T2 and the wake-up moment of calculating
Error adjusts the timing offset of first timer.
Embodiment of the present invention is in terms of existing technologies, no by dormant second timing based on one
Device, come realize to one by dormant first timer wake up the moment sleep timing error timing-compensation, from
And the problem of first timer switches timing offset caused by slow clock as sleep after sleep awakening is avoided, effectively solve
The auxiliary mode timers sleep awakening timing offset problem of system of having determined.
In addition, first timer and second timer are respectively the mode timers under different wireless communication mode.It is moving
In dynamic communication system, there are many wireless communications mode and deposit, each mode has a set of distinctive time set.If a certain channel radio
Whole timers under letter mode need to be configured within a certain period of time into sleep state, then need another wireless communications mode at this time
Under timing of the dormant timer to the timer of the wireless communications mode at the sleep awakening moment that do not enter into carry out
Calibration；Switch slowly after sleep awakening due to sleeping so as to avoid dormant timer is entered under the wireless communications mode
Clock and the problem of lead to timing offset.
In addition, including following sub-step: according to the wake-up of calculating in the step of adjusting the timing offset of first timer
The error at moment adjusts the frame header position of first timer timing.By adjusting the frame header position of first timer, to compensate
The timing offset that one timer generates at the sleep awakening moment, to make second timer to first timer in sleep awakening
The timing at quarter is calibrated.The frequency that RTC period regulation can be effectively reduced is changed to judge whether to enter by adjusting offset
RTC calibration, it is possible to reduce unnecessary RTC calibration, to reduce system overall power.
In addition, recorded when obtaining first timer time point T2 the step of before, also include: detect whether exist not
Into dormant second timer, recorded if it is present entering and obtaining second timer when waking up first timer
Time point T2 the step of；If it does not exist, then executing following steps: synchronous signal obtaining local zone time and net based on the received
The relativeness of network time；A frame header position is determined according to the relativeness of acquisition and periodically generates the frame synchronization moment；It will
The frame synchronization moment of generation is as network time.If there is no dormant second timer is not entered, will be unable to obtain
The timing offset that first timer generates at the sleep awakening moment.Need to obtain the opposite pass of local zone time and network time at this time
System, and frame header position is adjusted with this, and then compensate the timing offset that first timer generates at the sleep awakening moment.
Detailed description of the invention
Fig. 1 is according to the module signal for adjusting slow clocking error in communication system in the prior art at the sleep awakening moment
Figure；
Fig. 2 is the flow chart of the compensation method of the sleep awakening timing offset of first embodiment according to the present invention；
Fig. 3 is that second timer does not enter dormant schematic diagram in first embodiment according to the present invention；
Second timer is in dormant schematic diagram to Fig. 4 in first embodiment according to the present invention；
Fig. 5 according to the present invention first embodiment adjustment first timer frame header position structural schematic diagram.
Fig. 6 is the structural schematic diagram of the electronic equipment of second embodiment according to the present invention.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to each reality of the invention
The mode of applying is explained in detail.However, it will be understood by those skilled in the art that in each embodiment of the present invention,
In order to make the reader understand this application better, many technical details are proposed.But even if without these technical details and base
In the various changes and modifications of following embodiment, each claim of the application technical side claimed also may be implemented
Case.
The first embodiment of the present invention is related to a kind of compensation methodes of sleep awakening timing offset.In present embodiment
In, based on the timer of one mode B, work is synchronized another in fast clock technology state with the timing information of this timer
The timer of an outer Mode A, this timer are counted using slow clock；After being waken up by the timer of software compensation Mode A
At the time of, Mode A bring time error is given to eliminate slow clock.In present embodiment, the timer (i.e. first of A in mode
Timer) and Mode B timer (i.e. second timer) be respectively mode timers under different wireless communication mode for,
It is illustrated, detailed process is as shown in Figure 2.
In step 201, the sleep duration that need to enter dormant first timer is obtained.
Specifically, the wireless communications mode according to belonging to first timer first, getting frame period.Such as first
Wireless communications mode belonging to timer is TD-SCDMA mode, since the frame period under TD-SCDMA mode is 5ms, is then known
The frame period of wireless communications mode belonging to first timer is 5ms.Then, according to the frame period of acquisition, and configuration is slept
Dormancy frame number calculates sleep duration.For above-mentioned case, it is assumed that the sleep frame number of configuration is N frame, then when the sleep of first timer
A length of N*5ms.
Then, in step 202, dormant time point T1 and sleep duration are entered according to first timer, calculated
The wake-up moment of first timer.
Specifically, first timer, which receives, enters dormant instruction i.e. into sleep state, work as first timer
When entering sleep state, electronic equipment can star a timer, record current time point T1, and save it in electricity
In the relevant component of sub- equipment；Or according to the time recording unit built in electronic equipment, current time point T1 is obtained, and will
It is stored in the corresponding table of time recording unit.It can also be entered using other acquisition modes acquisition first timers and be slept
The time point T1 of dormancy state.
For example, as shown in figure 3, when frame head is FH1, configuration enters under TD-SCDMA mode belonging to first timer
Sleep N frame, and be FH2 wake-up in frame head.A length of N*5ms when due to having got sleep in a step 101, in conjunction with FH1
Moment point is T1, and frame head FH2 at the time of point is T1+ (N*5) ms when wake-up can be calculated.
Then, 203 are entered step, judges whether there is and does not enter dormant second timer.If it is present into
Enter step 204；If it does not exist, then entering step 206.
Specifically, if the communication pattern that terminal device is supported is TD-SCDMA and TD-LTE, and TD-LTE mode begins
When end is in fast clock count state (as shown in Figure 3), that is, it can determine that presence does not enter dormant second timer (i.e.
The mode timers of TD-LTE), then enter step 204；If TD-LTE mode also enters slow clock count state (such as Fig. 4 institute
Show), and the mode timers of other communication patterns are not present, that is, it can determine that there is no do not enter dormant second timing
Device then enters step 206.
In step 204, the time point T2 that second timer is recorded when waking up first timer is obtained.Due to second fixed
When device do not enter sleep state always, i.e. second timer is in running order always, therefore in sleep awakening moment FH2, can
It is synchronous by being timed with second timer (i.e. the mode timers of TD-LTE), obtain current frame head at the time of point (T2).
Then, 205 are entered step, according to the error of T2 and the wake-up moment calculated, adjusts the frame of first timer timing
Head position.
Frame head FH2 at the time of point T1+ (N*5) ms is waken up specifically, will be calculated.With the current frame head moment of acquisition
Point T2, which subtracts each other, can be obtained slow clocking error Δ=(T1+N × 5)-T2 introduced in sleep procedure, then lead to after sleep awakening
The frame header position of adjustment frame timing is crossed, to compensate the error that sleep introduces, to keep consistent with the Timing Synchronization of network.Specifically
Ground modifies the value in comparator, the current time is adjusted forward or backward according to the time error of the slow clock of acquisition,
To guarantee that the time calculated later does not have error.
If in step 203, determining then to enter step 206 there is no dormant second timer is not entered.
As shown in figure 4, first timer (mode timers i.e. under TD-SCDMA mode) configures entrance at frame head FH1
Sleep N frame, second timer (mode timers i.e. under TD-LTE mode) while TD-SCDMA switches into low-power consumption
It is also at sleep state, is waken up in TD-SCDMA timer when frame head is FH2, known to being obtained when frame head is FH1
Moment point T1, it is T1+ (N*5) ms that wake-up association frame head FH2 at the time of point, which can be calculated, and in sleep awakening moment FH2
It can be T2 by obtaining current frame head at the time of point with TD-LTE timer Timing Synchronization, two moment points are subtracted each other into acquisition
Δ=(T1+N × 5)-T2 result should be 0, can not obtain the error that the slow clock of TD-SCDMA mode introduces at this time.Therefore,
Dormant second timer is not entered when being not present, then enters step 206.
In step 206, the relativeness of synchronous signal obtaining local zone time and network time based on the received.
Specifically, first timer is cycle count, it is single if the timer under TD-SCDMA mode is with 1/8chip
Position, cycle period 51200, count value count down to 51199 from 0, and a frame period is 5ms, and UE (user equipment) passes through reception
Synchronization signal obtains the relativeness of local zone time and network time.
Then, 207 are entered step, the position of frame head is determined according to the relativeness of acquisition, and will be old by timing adjustment
Frame head is adjusted to new frame header position.
An initial frame header position is had existed when due to searching net, and reception signal is waited to confirm real network frame header position
Afterwards, current frame header position can be adjusted to new frame header position according to relativeness, it can this, which is realized, generates the frame synchronization moment
Purpose.
Wherein, relativeness is the relativeness of local zone time and network time.
Then, 208 are entered step, using the frame synchronization moment of generation as network time.
Specifically, position shown in 0 mark is the 0 of cycle counter as shown in figure 5, N, N+1 etc. are frame head position
Moment point, frame synchronization moment are generated by comparator, when the value in comparator is equal to the loop count of current timer then
Triggering is interrupted, and the reference position as sending and receiving data is on the basis of frame header position.After the value of comparator is software and Network Synchronization
It is arranged, is initially 30719 for LTE, network time and local hardware timer has then been determined after searching net
Deviation, then driving can modify the value of comparator, interrupt and the consistent effect of network frame head to reach hardware timer.
So timing offset has been calculated after sleep awakening, can change by adjusting fiducial value in comparator
The position of network frame head, as shown in the arrow between Fig. 5 chain lines and dotted line, frame head is just adjusted to dotted line position from chain-dotted line
It sets, to guarantee the time point after the data sended and received later use adjustment.
It is noted that being the mode timers (in multimode terminal not enter sleep in the present embodiment
Two timers) be illustrated for timing adjustment to be calibrated into the mode timers (first timer) of sleep, but
In practical application, mode is compensated by the time point tolerance that the sleep awakening moment generates to timer and is not limited to mode timing
Compensation of the device to mode timers, also can be used can synchronize calculating error with mode timers, can carry out speed
Other hardware timers of timer switching, by adjusting the position of frame head after sleep awakening, to achieve the purpose that Timing Synchronization.
As long as specifically, can determine that the relative time relationship of two timers realizes that compensation, such as mode timers exist
X cycle (period) has been run in a period of time, and another non-mode timer has run Y cycle, if two
It is all accurately then to unify to the time on a time shaft be the same, but it actually may be due to two timers
An error is had in conversion a to time shaft caused by clock source is variant, it, can be by this implementation for such scene
The timer of low precision is become more accurate by compensating by mode.
Embodiments of the present invention can not only meet the needs of multimode system protocol stack sofeware timing, while also be able to satisfy
Mutual Timing Synchronization between multiple arithmetic processors in communication equipment.Such as current smart phone generally includes application processor
And communication processor, it include again two or more arithmetic processors in each processor.Since the realization of this timer is compared
It is general, it is possible to as the timing base between multicore.And present embodiment is applicable not only to wireless communication system, to it
His single mode, multi-mode communication system are also applicable in.
Presently filed embodiment can will enter dormant timer and not enter into the timer progress of sleep
Synchronous, the sleep error that each mode introduces in the case of guarantee sound sleep is identical, the multi-mode preemption after sleep awakening can be solved
Gap distributes time conflict problem.It can effectively improve the precision of the Timing Synchronization of the non-traffic mode of multimode system.
Second embodiment of the present invention is related to a kind of electronic equipment.As shown in fig. 6, comprising: sleep duration obtains module,
For obtaining the sleep duration that need to enter dormant first timer；Computing module, for being entered according to first timer
Dormant time point T1 and sleep duration, calculate the wake-up moment of first timer；Time point obtains module, for obtaining
The time point T2 that dormant second timer is recorded when waking up first timer is not entered；Module is adjusted, basis is used for
The error of T2 and the wake-up moment calculated, adjust the timing offset of first timer.
Further, electronic equipment is the terminal device for supporting at least two wireless communications modes；First timer and
Two timers are respectively the mode timers under different wireless communication mode.
Further, it includes following submodule: frame period acquisition submodule that sleep duration, which obtains module, for obtaining first
The frame period of wireless communications mode belonging to timer；Duration calculation submodule, for the frame period according to acquisition, and configuration
Sleep frame number, calculate sleep duration.
Further, adjustment module adjusts the frame head position of first timer timing according to the error at the wake-up moment of calculating
It sets.
Due in mobile communication system there are many wireless communications mode and depositing, and each mode has a set of distinctive timing
Device.If whole timers under a certain wireless communications mode need to be configured into sleep state, at this time within a certain period of time
It needs using one without passing through dormant second timer, passes through dormant first timer to one to realize
In the timing-compensation for the sleep timing error for waking up the moment, so as to avoid first timer since sleep is cut after sleep awakening
The problem of changing timing offset caused by slow clock, efficiently solves the auxiliary mode timers sleep awakening timing offset of system and asks
Topic.
It is not difficult to find that present embodiment is apparatus embodiments corresponding with first embodiment, present embodiment can be with
First embodiment is worked in coordination implementation.The relevant technical details mentioned in first embodiment still have in the present embodiment
Effect, in order to reduce repetition, which is not described herein again.Correspondingly, the relevant technical details mentioned in present embodiment are also applicable in
In first embodiment.
It is noted that each module involved in present embodiment is logic module, and in practical applications, one
A logic unit can be a physical unit, be also possible to a part of a physical unit, can also be with multiple physics lists
The combination of member is realized.In addition, in order to protrude innovative part of the invention, it will not be with solution institute of the present invention in present embodiment
The technical issues of proposition, the less close unit of relationship introduced, but this does not indicate that there is no other single in present embodiment
Member.
It will be understood by those skilled in the art that the respective embodiments described above are to realize specific embodiments of the present invention,
And in practical applications, can to it, various changes can be made in the form and details, without departing from the spirit and scope of the present invention.
Claims (10)
1. a kind of compensation method of sleep awakening timing offset, which is characterized in that comprise the steps of:
Obtain the sleep duration that need to enter dormant first timer；
Enter dormant time point T1 and the sleep duration according to the first timer, calculates the first timer
The wake-up moment；
Acquisition does not enter the time point T2 that dormant second timer is recorded when waking up the first timer；
According to the error of the T2 and the wake-up moment of the calculating, the timing offset of the first timer is adjusted.
2. the compensation method of sleep awakening timing offset according to claim 1, which is characterized in that
The first timer and the second timer are respectively the mode timers under different wireless communication mode.
3. the compensation method of sleep awakening timing offset according to claim 2, which is characterized in that the acquisition need to be into
Include following sub-step in the step of entering the sleep duration of dormant first timer:
Obtain the frame period of wireless communications mode belonging to the first timer；
According to the frame period of acquisition, and the sleep frame number of configuration, the sleep duration is calculated.
4. the compensation method of sleep awakening timing offset according to claim 2, which is characterized in that in adjustment described first
Include following sub-step in the step of timing offset of timer:
According to the error at the wake-up moment of the calculating, the frame header position of the first timer timing is adjusted.
5. the compensation method of sleep awakening timing offset according to claim 2, which is characterized in that obtaining described in wake-up
Before the step of time point T2 recorded when first timer, also include:
It detects whether to exist and does not enter dormant second timer, called out if it is present entering and obtaining second timer
Wake up the first timer when record time point T2 the step of；If it does not exist, then executing following steps:
The relativeness of synchronous signal obtaining local zone time and network time based on the received；
The position of frame head is determined according to the relativeness of acquisition, and old frame head is adjusted to by new frame header position by timing adjustment.
6. the compensation method of sleep awakening timing offset according to any one of claim 2 to 5, which is characterized in that
The first timer is the mode timers of TD SDMA TD-SCDMA；
The second timer is the mode timers of timesharing long term evolution TD-LTE.
7. a kind of electronic equipment, characterized by comprising:
Duration of sleeping obtains module, for obtaining the sleep duration that need to enter dormant first timer；
Computing module is calculated for entering dormant time point T1 and the sleep duration according to the first timer
The wake-up moment of the first timer；
Time point obtains module, does not enter dormant second timer note when waking up the first timer for obtaining
The time point T2 of record；
Module is adjusted, for the error according to the T2 and the wake-up moment of the calculating, adjusts determining for the first timer
When deviation.
8. electronic equipment according to claim 7, which is characterized in that the electronic equipment is to support at least two channel radios
The terminal device of letter mode；
The first timer and the second timer are respectively the mode timers under different wireless communication mode.
9. electronic equipment according to claim 8, which is characterized in that it includes following submodule that the sleep duration, which obtains module,
Block:
Frame period acquisition submodule, for obtaining the frame period of wireless communications mode belonging to the first timer；
Duration calculation submodule, for the frame period according to acquisition, and the sleep frame number of configuration, when calculating the sleep
It is long.
10. electronic equipment according to claim 8, which is characterized in that the module that adjusts is according to the wake-up of the calculating
The error at moment adjusts the frame header position of the first timer timing.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510355227.2A CN106304317B (en) | 2015-06-24 | 2015-06-24 | The compensation method of sleep awakening timing offset and electronic equipment |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201510355227.2A CN106304317B (en) | 2015-06-24 | 2015-06-24 | The compensation method of sleep awakening timing offset and electronic equipment |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN106304317A CN106304317A (en) | 2017-01-04 |
| CN106304317B true CN106304317B (en) | 2019-05-21 |
Family
ID=57650305
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201510355227.2A Active CN106304317B (en) | 2015-06-24 | 2015-06-24 | The compensation method of sleep awakening timing offset and electronic equipment |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106304317B (en) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107765760B (en) * | 2017-11-17 | 2021-05-04 | 上海伟世通汽车电子系统有限公司 | RTC module clock source dynamic calibration method and RTC module clock source dynamic calibration system in instrument sleep mode |
| CN109799872B (en) * | 2018-12-29 | 2020-09-11 | 百富计算机技术（深圳）有限公司 | Method and device for improving awakening precision of low-resolution real-time clock and electronic equipment |
| US11762102B2 (en) * | 2020-02-27 | 2023-09-19 | Qualcomm Incorporated | Timing error adjustment in mobile devices |
| CN112230711B (en) * | 2020-09-25 | 2023-03-14 | 紫光展锐(重庆)科技有限公司 | Calibration device, method and computer readable storage medium |
| CN112905250A (en) * | 2021-02-09 | 2021-06-04 | 上海锐伟电子科技有限公司 | Awakening method and system of embedded equipment |
| CN113038445B (en) * | 2021-03-26 | 2022-11-18 | 上海磐启微电子有限公司 | Calibration method of Bluetooth sleep clock |
| CN113453325B (en) * | 2021-06-25 | 2022-11-01 | 展讯通信（上海）有限公司 | Crystal oscillator clock calibration method, device, equipment and medium |
| CN115826731B (en) * | 2022-10-19 | 2023-07-11 | 科东(广州)软件科技有限公司 | Sleep control method and device, storage medium and computing equipment |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1413054A (en) * | 2001-10-19 | 2003-04-23 | Lg电子株式会社 | Time error compensation device and method for terminal |
| CN1451247A (en) * | 1999-11-04 | 2003-10-22 | 高通股份有限公司 | Method and apparatus for activating a high frequency clock following a sleep mode with in a mobile station operating in a slotted paging mode |
| CN1753534A (en) * | 2005-09-16 | 2006-03-29 | 重庆重邮信科股份有限公司 | Method of improving preciseness of mobile communication terminal low frequency crystal oscillator |
| US7529531B2 (en) * | 2005-11-09 | 2009-05-05 | Qualcomm, Incorporated | Apparatus and methods for estimating a sleep clock frequency |
| EP2854458A1 (en) * | 2013-09-30 | 2015-04-01 | Honeywell International Inc. | Wireless sensor time synchronization |
-
2015
- 2015-06-24 CN CN201510355227.2A patent/CN106304317B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1451247A (en) * | 1999-11-04 | 2003-10-22 | 高通股份有限公司 | Method and apparatus for activating a high frequency clock following a sleep mode with in a mobile station operating in a slotted paging mode |
| CN1413054A (en) * | 2001-10-19 | 2003-04-23 | Lg电子株式会社 | Time error compensation device and method for terminal |
| CN1753534A (en) * | 2005-09-16 | 2006-03-29 | 重庆重邮信科股份有限公司 | Method of improving preciseness of mobile communication terminal low frequency crystal oscillator |
| US7529531B2 (en) * | 2005-11-09 | 2009-05-05 | Qualcomm, Incorporated | Apparatus and methods for estimating a sleep clock frequency |
| EP2854458A1 (en) * | 2013-09-30 | 2015-04-01 | Honeywell International Inc. | Wireless sensor time synchronization |
Non-Patent Citations (1)
| Title |
|---|
| 综合校时模块的设计与实现;张柯;《中国优秀硕士学位论文全文数据库》;20140115;全文 |
Also Published As
| Publication number | Publication date |
|---|---|
| CN106304317A (en) | 2017-01-04 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106304317B (en) | The compensation method of sleep awakening timing offset and electronic equipment | |
| CN100521807C (en) | Synchronization of time base units | |
| KR100969260B1 (en) | Precise sleep timer using a low-cost and low-accuracy clock | |
| US8867421B2 (en) | Correction of clock errors in a wireless station to enable reduction of power consumption | |
| US8872548B2 (en) | Method and apparatus for calibrating low frequency clock | |
| US8488506B2 (en) | Oscillator settling time allowance | |
| US9307571B2 (en) | Communication device and frequency offset calibrating method | |
| US20180176864A1 (en) | Method and apparatus to controlling sleep time for bluetooth device and bluetooth enabled device | |
| US6311081B1 (en) | Low power operation in a radiotelephone | |
| CN103327587B (en) | A kind of terminal sleep cycle control methods and device | |
| CN101083815B (en) | Method and apparatus for realizing mobile terminal clock relation track | |
| CN104735772B (en) | A kind of device and method of Timing Synchronization | |
| CN102638885B (en) | Timing processing device and method | |
| CN105578586B (en) | A kind of synchronization timing device and method | |
| CN102858001B (en) | Page Indication Channel monitor method and terminal | |
| US11895588B2 (en) | Timing precision maintenance with reduced power during system sleep | |
| Terraneo et al. | Jitter-compensated VHT and its application to WSN clock synchronization | |
| CN103491623A (en) | Integrated circuit and communication method thereof | |
| CN106488515A (en) | A kind of intervalometer, baseband chip and its sleep state changing method | |
| JP2008205805A (en) | Intermittent receiver | |
| WO2006093297A1 (en) | Intermittent reception control apparatus | |
| TW200526053A (en) | Precise sleep timer using a low-cost and low-accuracy clock | |
| MXPA06007169A (en) | Precise sleep timer using a low-cost and low-accuracy clock |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20180815 Address after: 201206 Pudong New Area, Shanghai Mingyue Road, 1258, Mingyue road 1258, 3, fourth story A406 room. Applicant after: Chen core technology Co.,Ltd. Applicant after: DATANG SEMICONDUCTOR DESIGN Co.,Ltd. Address before: 200233 4 building, No. 333, No. 41, Qinjiang Road, Shanghai, Xuhui District Applicant before: LEADCORE TECHNOLOGY Co.,Ltd. Applicant before: DATANG SEMICONDUCTOR DESIGN Co.,Ltd. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20221110 Address after: 201206 Pudong New Area, Shanghai, China (Shanghai) free trade pilot area, 1258 A406 3 fourth story room. Patentee after: Chen core technology Co.,Ltd. Patentee after: Chenxin Technology Co.,Ltd. Address before: 201206 Pudong New Area, Shanghai Mingyue Road, 1258, Mingyue road 1258, 3, fourth story A406 room. Patentee before: Chen core technology Co.,Ltd. Patentee before: DATANG SEMICONDUCTOR DESIGN Co.,Ltd. |
|
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 201206 Pudong New Area, Shanghai, China (Shanghai) free trade pilot area, 1258 A406 3 fourth story room. Patentee after: Chen core technology Co.,Ltd. Patentee after: Chenxin Technology Co.,Ltd. Address before: 201206 Pudong New Area, Shanghai, China (Shanghai) free trade pilot area, 1258 A406 3 fourth story room. Patentee before: Chen core technology Co.,Ltd. Patentee before: Chenxin Technology Co.,Ltd. |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20241028 Address after: Room 102, Building 16, No. 1699, the Pearl River Road, Huangdao District, Qingdao, Shandong 266500 Patentee after: Chenxin Technology Co.,Ltd. Country or region after: China Address before: 201206 Pudong New Area, Shanghai, China (Shanghai) free trade pilot area, 1258 A406 3 fourth story room. Patentee before: Chen core technology Co.,Ltd. Country or region before: China Patentee before: Chenxin Technology Co.,Ltd. |